added 2.6.29.6 aldebaran kernel
[nao-ulib.git] / kernel / 2.6.29.6-aldebaran-rt / arch / arm / mach-realview / include / mach / board-eb.h
blob268d7701fa9bbc5409a89dc3876d832c94669cb1
1 /*
2 * arch/arm/mach-realview/include/mach/board-eb.h
4 * Copyright (C) 2007 ARM Limited
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
21 #ifndef __ASM_ARCH_BOARD_EB_H
22 #define __ASM_ARCH_BOARD_EB_H
24 #include <mach/platform.h>
27 * RealView EB + ARM11MPCore peripheral addresses
29 #define REALVIEW_EB_UART0_BASE 0x10009000 /* UART 0 */
30 #define REALVIEW_EB_UART1_BASE 0x1000A000 /* UART 1 */
31 #define REALVIEW_EB_UART2_BASE 0x1000B000 /* UART 2 */
32 #define REALVIEW_EB_UART3_BASE 0x1000C000 /* UART 3 */
33 #define REALVIEW_EB_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
34 #define REALVIEW_EB_WATCHDOG_BASE 0x10010000 /* watchdog interface */
35 #define REALVIEW_EB_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
36 #define REALVIEW_EB_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
37 #define REALVIEW_EB_GPIO0_BASE 0x10013000 /* GPIO port 0 */
38 #define REALVIEW_EB_RTC_BASE 0x10017000 /* Real Time Clock */
39 #define REALVIEW_EB_CLCD_BASE 0x10020000 /* CLCD */
40 #define REALVIEW_EB_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */
41 #define REALVIEW_EB_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */
42 #define REALVIEW_EB_SMC_BASE 0x10080000 /* Static memory controller */
44 #define REALVIEW_EB_FLASH_BASE 0x40000000
45 #define REALVIEW_EB_FLASH_SIZE SZ_64M
46 #define REALVIEW_EB_ETH_BASE 0x4E000000 /* Ethernet */
47 #define REALVIEW_EB_USB_BASE 0x4F000000 /* USB */
49 #ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB
50 #define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */
51 #define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */
52 #define REALVIEW_EB11MP_TWD_BASE 0x10100600
53 #define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */
54 #define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */
55 #define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */
56 #else
57 #define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */
58 #define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */
59 #define REALVIEW_EB11MP_TWD_BASE 0x1F000600
60 #define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */
61 #define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */
62 #define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
63 #endif
65 #define IRQ_EB_GIC_START 32
68 * RealView EB interrupt sources
70 #define IRQ_EB_WDOG (IRQ_EB_GIC_START + 0) /* Watchdog timer */
71 #define IRQ_EB_SOFT (IRQ_EB_GIC_START + 1) /* Software interrupt */
72 #define IRQ_EB_COMMRx (IRQ_EB_GIC_START + 2) /* Debug Comm Rx interrupt */
73 #define IRQ_EB_COMMTx (IRQ_EB_GIC_START + 3) /* Debug Comm Tx interrupt */
74 #define IRQ_EB_TIMER0_1 (IRQ_EB_GIC_START + 4) /* Timer 0 and 1 */
75 #define IRQ_EB_TIMER2_3 (IRQ_EB_GIC_START + 5) /* Timer 2 and 3 */
76 #define IRQ_EB_GPIO0 (IRQ_EB_GIC_START + 6) /* GPIO 0 */
77 #define IRQ_EB_GPIO1 (IRQ_EB_GIC_START + 7) /* GPIO 1 */
78 #define IRQ_EB_GPIO2 (IRQ_EB_GIC_START + 8) /* GPIO 2 */
79 /* 9 reserved */
80 #define IRQ_EB_RTC (IRQ_EB_GIC_START + 10) /* Real Time Clock */
81 #define IRQ_EB_SSP (IRQ_EB_GIC_START + 11) /* Synchronous Serial Port */
82 #define IRQ_EB_UART0 (IRQ_EB_GIC_START + 12) /* UART 0 on development chip */
83 #define IRQ_EB_UART1 (IRQ_EB_GIC_START + 13) /* UART 1 on development chip */
84 #define IRQ_EB_UART2 (IRQ_EB_GIC_START + 14) /* UART 2 on development chip */
85 #define IRQ_EB_UART3 (IRQ_EB_GIC_START + 15) /* UART 3 on development chip */
86 #define IRQ_EB_SCI (IRQ_EB_GIC_START + 16) /* Smart Card Interface */
87 #define IRQ_EB_MMCI0A (IRQ_EB_GIC_START + 17) /* Multimedia Card 0A */
88 #define IRQ_EB_MMCI0B (IRQ_EB_GIC_START + 18) /* Multimedia Card 0B */
89 #define IRQ_EB_AACI (IRQ_EB_GIC_START + 19) /* Audio Codec */
90 #define IRQ_EB_KMI0 (IRQ_EB_GIC_START + 20) /* Keyboard/Mouse port 0 */
91 #define IRQ_EB_KMI1 (IRQ_EB_GIC_START + 21) /* Keyboard/Mouse port 1 */
92 #define IRQ_EB_CHARLCD (IRQ_EB_GIC_START + 22) /* Character LCD */
93 #define IRQ_EB_CLCD (IRQ_EB_GIC_START + 23) /* CLCD controller */
94 #define IRQ_EB_DMA (IRQ_EB_GIC_START + 24) /* DMA controller */
95 #define IRQ_EB_PWRFAIL (IRQ_EB_GIC_START + 25) /* Power failure */
96 #define IRQ_EB_PISMO (IRQ_EB_GIC_START + 26) /* PISMO interface */
97 #define IRQ_EB_DoC (IRQ_EB_GIC_START + 27) /* Disk on Chip memory controller */
98 #define IRQ_EB_ETH (IRQ_EB_GIC_START + 28) /* Ethernet controller */
99 #define IRQ_EB_USB (IRQ_EB_GIC_START + 29) /* USB controller */
100 #define IRQ_EB_TSPEN (IRQ_EB_GIC_START + 30) /* Touchscreen pen */
101 #define IRQ_EB_TSKPAD (IRQ_EB_GIC_START + 31) /* Touchscreen keypad */
104 * RealView EB + ARM11MPCore interrupt sources (primary GIC on the core tile)
106 #define IRQ_EB11MP_AACI (IRQ_EB_GIC_START + 0)
107 #define IRQ_EB11MP_TIMER0_1 (IRQ_EB_GIC_START + 1)
108 #define IRQ_EB11MP_TIMER2_3 (IRQ_EB_GIC_START + 2)
109 #define IRQ_EB11MP_USB (IRQ_EB_GIC_START + 3)
110 #define IRQ_EB11MP_UART0 (IRQ_EB_GIC_START + 4)
111 #define IRQ_EB11MP_UART1 (IRQ_EB_GIC_START + 5)
112 #define IRQ_EB11MP_RTC (IRQ_EB_GIC_START + 6)
113 #define IRQ_EB11MP_KMI0 (IRQ_EB_GIC_START + 7)
114 #define IRQ_EB11MP_KMI1 (IRQ_EB_GIC_START + 8)
115 #define IRQ_EB11MP_ETH (IRQ_EB_GIC_START + 9)
116 #define IRQ_EB11MP_EB_IRQ1 (IRQ_EB_GIC_START + 10) /* main GIC */
117 #define IRQ_EB11MP_EB_IRQ2 (IRQ_EB_GIC_START + 11) /* tile GIC */
118 #define IRQ_EB11MP_EB_FIQ1 (IRQ_EB_GIC_START + 12) /* main GIC */
119 #define IRQ_EB11MP_EB_FIQ2 (IRQ_EB_GIC_START + 13) /* tile GIC */
120 #define IRQ_EB11MP_MMCI0A (IRQ_EB_GIC_START + 14)
121 #define IRQ_EB11MP_MMCI0B (IRQ_EB_GIC_START + 15)
123 #define IRQ_EB11MP_PMU_CPU0 (IRQ_EB_GIC_START + 17)
124 #define IRQ_EB11MP_PMU_CPU1 (IRQ_EB_GIC_START + 18)
125 #define IRQ_EB11MP_PMU_CPU2 (IRQ_EB_GIC_START + 19)
126 #define IRQ_EB11MP_PMU_CPU3 (IRQ_EB_GIC_START + 20)
127 #define IRQ_EB11MP_PMU_SCU0 (IRQ_EB_GIC_START + 21)
128 #define IRQ_EB11MP_PMU_SCU1 (IRQ_EB_GIC_START + 22)
129 #define IRQ_EB11MP_PMU_SCU2 (IRQ_EB_GIC_START + 23)
130 #define IRQ_EB11MP_PMU_SCU3 (IRQ_EB_GIC_START + 24)
131 #define IRQ_EB11MP_PMU_SCU4 (IRQ_EB_GIC_START + 25)
132 #define IRQ_EB11MP_PMU_SCU5 (IRQ_EB_GIC_START + 26)
133 #define IRQ_EB11MP_PMU_SCU6 (IRQ_EB_GIC_START + 27)
134 #define IRQ_EB11MP_PMU_SCU7 (IRQ_EB_GIC_START + 28)
136 #define IRQ_EB11MP_L220_EVENT (IRQ_EB_GIC_START + 29)
137 #define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30)
138 #define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31)
140 #define IRQ_EB11MP_UART2 -1
141 #define IRQ_EB11MP_UART3 -1
142 #define IRQ_EB11MP_CLCD -1
143 #define IRQ_EB11MP_DMA -1
144 #define IRQ_EB11MP_WDOG -1
145 #define IRQ_EB11MP_GPIO0 -1
146 #define IRQ_EB11MP_GPIO1 -1
147 #define IRQ_EB11MP_GPIO2 -1
148 #define IRQ_EB11MP_SCI -1
149 #define IRQ_EB11MP_SSP -1
151 #define NR_GIC_EB11MP 2
154 * Only define NR_IRQS if less than NR_IRQS_EB
156 #define NR_IRQS_EB (IRQ_EB_GIC_START + 96)
158 #if defined(CONFIG_MACH_REALVIEW_EB) \
159 && (!defined(NR_IRQS) || (NR_IRQS < NR_IRQS_EB))
160 #undef NR_IRQS
161 #define NR_IRQS NR_IRQS_EB
162 #endif
164 #if defined(CONFIG_REALVIEW_EB_ARM11MP) || defined(CONFIG_REALVIEW_EB_A9MP) \
165 && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
166 #undef MAX_GIC_NR
167 #define MAX_GIC_NR NR_GIC_EB11MP
168 #endif
171 * Core tile identification (REALVIEW_SYS_PROCID)
173 #define REALVIEW_EB_PROC_MASK 0xFF000000
174 #define REALVIEW_EB_PROC_ARM7TDMI 0x00000000
175 #define REALVIEW_EB_PROC_ARM9 0x02000000
176 #define REALVIEW_EB_PROC_ARM11 0x04000000
177 #define REALVIEW_EB_PROC_ARM11MP 0x06000000
178 #define REALVIEW_EB_PROC_A9MP 0x0C000000
180 #define check_eb_proc(proc_type) \
181 ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \
182 == proc_type)
184 #ifdef CONFIG_REALVIEW_EB_ARM11MP
185 #define core_tile_eb11mp() check_eb_proc(REALVIEW_EB_PROC_ARM11MP)
186 #else
187 #define core_tile_eb11mp() 0
188 #endif
190 #ifdef CONFIG_REALVIEW_EB_A9MP
191 #define core_tile_a9mp() check_eb_proc(REALVIEW_EB_PROC_A9MP)
192 #else
193 #define core_tile_a9mp() 0
194 #endif
196 #define machine_is_realview_eb_mp() \
197 (machine_is_realview_eb() && (core_tile_eb11mp() || core_tile_a9mp()))
199 #endif /* __ASM_ARCH_BOARD_EB_H */