kernel/2.6.29.6-aldebaran-rt/arch/arm/mach-omap2/mcbsp.c

   1 /*
   2  * linux/arch/arm/mach-omap2/mcbsp.c
   3  *
   4  * Copyright (C) 2008 Instituto Nokia de Tecnologia
   5  * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * Multichannel mode not supported.
  12  */
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/clk.h>
  16 #include <linux/err.h>
  17 #include <linux/io.h>
  18 #include <linux/platform_device.h>
  19
  20 #include <mach/irqs.h>
  21 #include <mach/dma.h>
  22 #include <mach/irqs.h>
  23 #include <mach/mux.h>
  24 #include <mach/cpu.h>
  25 #include <mach/mcbsp.h>
  26
  27 const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" };
  28
  29 static void omap2_mcbsp2_mux_setup(void)
  30 {
  31         omap_cfg_reg(Y15_24XX_MCBSP2_CLKX);
  32         omap_cfg_reg(R14_24XX_MCBSP2_FSX);
  33         omap_cfg_reg(W15_24XX_MCBSP2_DR);
  34         omap_cfg_reg(V15_24XX_MCBSP2_DX);
  35         omap_cfg_reg(V14_24XX_GPIO117);
  36         /*
  37          * TODO: Need to add MUX settings for OMAP 2430 SDP
  38          */
  39 }
  40
  41 static void omap2_mcbsp_request(unsigned int id)
  42 {
  43         if (cpu_is_omap2420() && (id == OMAP_MCBSP2))
  44                 omap2_mcbsp2_mux_setup();
  45 }
  46
  47 static struct omap_mcbsp_ops omap2_mcbsp_ops = {
  48         .request        = omap2_mcbsp_request,
  49 };
  50
  51 #ifdef CONFIG_ARCH_OMAP2420
  52 static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
  53         {
  54                 .phys_base      = OMAP24XX_MCBSP1_BASE,
  55                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP1_RX,
  56                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
  57                 .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
  58                 .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
  59                 .ops            = &omap2_mcbsp_ops,
  60                 .clk_names      = clk_names,
  61                 .num_clks       = 2,
  62         },
  63         {
  64                 .phys_base      = OMAP24XX_MCBSP2_BASE,
  65                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP2_RX,
  66                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
  67                 .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
  68                 .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
  69                 .ops            = &omap2_mcbsp_ops,
  70                 .clk_names      = clk_names,
  71                 .num_clks       = 2,
  72         },
  73 };
  74 #define OMAP2420_MCBSP_PDATA_SZ         ARRAY_SIZE(omap2420_mcbsp_pdata)
  75 #else
  76 #define omap2420_mcbsp_pdata            NULL
  77 #define OMAP2420_MCBSP_PDATA_SZ         0
  78 #endif
  79
  80 #ifdef CONFIG_ARCH_OMAP2430
  81 static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
  82         {
  83                 .phys_base      = OMAP24XX_MCBSP1_BASE,
  84                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP1_RX,
  85                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
  86                 .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
  87                 .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
  88                 .ops            = &omap2_mcbsp_ops,
  89                 .clk_names      = clk_names,
  90                 .num_clks       = 2,
  91         },
  92         {
  93                 .phys_base      = OMAP24XX_MCBSP2_BASE,
  94                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP2_RX,
  95                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
  96                 .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
  97                 .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
  98                 .ops            = &omap2_mcbsp_ops,
  99                 .clk_names      = clk_names,
 100                 .num_clks       = 2,
 101         },
 102         {
 103                 .phys_base      = OMAP2430_MCBSP3_BASE,
 104                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP3_RX,
 105                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP3_TX,
 106                 .rx_irq         = INT_24XX_MCBSP3_IRQ_RX,
 107                 .tx_irq         = INT_24XX_MCBSP3_IRQ_TX,
 108                 .ops            = &omap2_mcbsp_ops,
 109                 .clk_names      = clk_names,
 110                 .num_clks       = 2,
 111         },
 112         {
 113                 .phys_base      = OMAP2430_MCBSP4_BASE,
 114                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP4_RX,
 115                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP4_TX,
 116                 .rx_irq         = INT_24XX_MCBSP4_IRQ_RX,
 117                 .tx_irq         = INT_24XX_MCBSP4_IRQ_TX,
 118                 .ops            = &omap2_mcbsp_ops,
 119                 .clk_names      = clk_names,
 120                 .num_clks       = 2,
 121         },
 122         {
 123                 .phys_base      = OMAP2430_MCBSP5_BASE,
 124                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP5_RX,
 125                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP5_TX,
 126                 .rx_irq         = INT_24XX_MCBSP5_IRQ_RX,
 127                 .tx_irq         = INT_24XX_MCBSP5_IRQ_TX,
 128                 .ops            = &omap2_mcbsp_ops,
 129                 .clk_names      = clk_names,
 130                 .num_clks       = 2,
 131         },
 132 };
 133 #define OMAP2430_MCBSP_PDATA_SZ         ARRAY_SIZE(omap2430_mcbsp_pdata)
 134 #else
 135 #define omap2430_mcbsp_pdata            NULL
 136 #define OMAP2430_MCBSP_PDATA_SZ         0
 137 #endif
 138
 139 #ifdef CONFIG_ARCH_OMAP34XX
 140 static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
 141         {
 142                 .phys_base      = OMAP34XX_MCBSP1_BASE,
 143                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP1_RX,
 144                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
 145                 .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
 146                 .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
 147                 .ops            = &omap2_mcbsp_ops,
 148                 .clk_names      = clk_names,
 149                 .num_clks       = 2,
 150         },
 151         {
 152                 .phys_base      = OMAP34XX_MCBSP2_BASE,
 153                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP2_RX,
 154                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
 155                 .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
 156                 .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
 157                 .ops            = &omap2_mcbsp_ops,
 158                 .clk_names      = clk_names,
 159                 .num_clks       = 2,
 160         },
 161         {
 162                 .phys_base      = OMAP34XX_MCBSP3_BASE,
 163                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP3_RX,
 164                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP3_TX,
 165                 .rx_irq         = INT_24XX_MCBSP3_IRQ_RX,
 166                 .tx_irq         = INT_24XX_MCBSP3_IRQ_TX,
 167                 .ops            = &omap2_mcbsp_ops,
 168                 .clk_names      = clk_names,
 169                 .num_clks       = 2,
 170         },
 171         {
 172                 .phys_base      = OMAP34XX_MCBSP4_BASE,
 173                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP4_RX,
 174                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP4_TX,
 175                 .rx_irq         = INT_24XX_MCBSP4_IRQ_RX,
 176                 .tx_irq         = INT_24XX_MCBSP4_IRQ_TX,
 177                 .ops            = &omap2_mcbsp_ops,
 178                 .clk_names      = clk_names,
 179                 .num_clks       = 2,
 180         },
 181         {
 182                 .phys_base      = OMAP34XX_MCBSP5_BASE,
 183                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP5_RX,
 184                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP5_TX,
 185                 .rx_irq         = INT_24XX_MCBSP5_IRQ_RX,
 186                 .tx_irq         = INT_24XX_MCBSP5_IRQ_TX,
 187                 .ops            = &omap2_mcbsp_ops,
 188                 .clk_names      = clk_names,
 189                 .num_clks       = 2,
 190         },
 191 };
 192 #define OMAP34XX_MCBSP_PDATA_SZ         ARRAY_SIZE(omap34xx_mcbsp_pdata)
 193 #else
 194 #define omap34xx_mcbsp_pdata            NULL
 195 #define OMAP34XX_MCBSP_PDATA_SZ         0
 196 #endif
 197
 198 static int __init omap2_mcbsp_init(void)
 199 {
 200         if (cpu_is_omap2420())
 201                 omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ;
 202         if (cpu_is_omap2430())
 203                 omap_mcbsp_count = OMAP2430_MCBSP_PDATA_SZ;
 204         if (cpu_is_omap34xx())
 205                 omap_mcbsp_count = OMAP34XX_MCBSP_PDATA_SZ;
 206
 207         mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
 208                                                                 GFP_KERNEL);
 209         if (!mcbsp_ptr)
 210                 return -ENOMEM;
 211
 212         if (cpu_is_omap2420())
 213                 omap_mcbsp_register_board_cfg(omap2420_mcbsp_pdata,
 214                                                 OMAP2420_MCBSP_PDATA_SZ);
 215         if (cpu_is_omap2430())
 216                 omap_mcbsp_register_board_cfg(omap2430_mcbsp_pdata,
 217                                                 OMAP2430_MCBSP_PDATA_SZ);
 218         if (cpu_is_omap34xx())
 219                 omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata,
 220                                                 OMAP34XX_MCBSP_PDATA_SZ);
 221
 222         return omap_mcbsp_init();
 223 }
 224 arch_initcall(omap2_mcbsp_init);