riscv: define REG_S1 and REG_S2
[musl.git] / crt / x32 / 
tree8841ba99ad9b8b3fb83355126a9b27ddb833ffdc
drwxr-xr-x   ..
-rw-r--r-- 95 crti.s
-rw-r--r-- 61 crtn.s