drivers/3dfx.h

   1 /*
   2  * Copyright (C) Colin Cross Apr 2000
   3  * changed by zsteva Aug/Sep 2001, see vo_3dfx.c
   4  *
   5  * This file is part of MPlayer.
   6  *
   7  * MPlayer is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * MPlayer is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along
  18  * with MPlayer; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  20  */
  21
  22 #ifndef MPLAYER_3DFX_H
  23 #define MPLAYER_3DFX_H
  24
  25 #define VOODOO_IO_REG_OFFSET     ((unsigned long int)0x0000000)
  26 #define VOODOO_YUV_REG_OFFSET    ((unsigned long int)0x0080100)
  27 #define VOODOO_AGP_REG_OFFSET    ((unsigned long int)0x0080000)
  28 #define VOODOO_2D_REG_OFFSET     ((unsigned long int)0x0100000)
  29 #define VOODOO_YUV_PLANE_OFFSET  ((unsigned long int)0x0C00000)
  30
  31 #define VOODOO_BLT_FORMAT_YUYV   (8<<16)
  32 #define VOODOO_BLT_FORMAT_UYVY   (9<<16)
  33 #define VOODOO_BLT_FORMAT_16     (3<<16)
  34 #define VOODOO_BLT_FORMAT_24     (4<<16)
  35 #define VOODOO_BLT_FORMAT_32     (5<<16)
  36
  37 #define VOODOO_YUV_STRIDE        (1024>>2)
  38
  39 struct voodoo_yuv_fb_t {
  40   uint32_t Y[0x0040000];
  41   uint32_t U[0x0040000];
  42   uint32_t V[0x0040000];
  43 };
  44
  45 struct voodoo_yuv_reg_t {
  46   uint32_t yuvBaseAddr;
  47   uint32_t yuvStride;
  48 };
  49
  50 struct voodoo_2d_reg_t {
  51   uint32_t status;
  52   uint32_t intCtrl;
  53   uint32_t clip0Min;
  54   uint32_t clip0Max;
  55   uint32_t dstBaseAddr;
  56   uint32_t dstFormat;
  57   uint32_t srcColorkeyMin;
  58   uint32_t srcColorkeyMax;
  59   uint32_t dstColorkeyMin;
  60   uint32_t dstColorkeyMax;
  61   signed long bresError0;
  62   signed long bresError1;
  63   uint32_t rop;
  64   uint32_t srcBaseAddr;
  65   uint32_t commandExtra;
  66   uint32_t lineStipple;
  67   uint32_t lineStyle;
  68   uint32_t pattern0Alias;
  69   uint32_t pattern1Alias;
  70   uint32_t clip1Min;
  71   uint32_t clip1Max;
  72   uint32_t srcFormat;
  73   uint32_t srcSize;
  74   uint32_t srcXY;
  75   uint32_t colorBack;
  76   uint32_t colorFore;
  77   uint32_t dstSize;
  78   uint32_t dstXY;
  79   uint32_t command;
  80   uint32_t RESERVED1;
  81   uint32_t RESERVED2;
  82   uint32_t RESERVED3;
  83   uint8_t  launchArea[128];
  84 };
  85
  86
  87 struct voodoo_io_reg_t {
  88   uint32_t status;
  89   uint32_t pciInit0;
  90   uint32_t sipMonitor;
  91   uint32_t lfbMemoryConfig;
  92   uint32_t miscInit0;
  93   uint32_t miscInit1;
  94   uint32_t dramInit0;
  95   uint32_t dramInit1;
  96   uint32_t agpInit;
  97   uint32_t tmuGbeInit;
  98   uint32_t vgaInit0;
  99   uint32_t vgaInit1;
 100   uint32_t dramCommand;
 101   uint32_t dramData;
 102   uint32_t RESERVED1;
 103   uint32_t RESERVED2;
 104
 105   uint32_t pllCtrl0;
 106   uint32_t pllCtrl1;
 107   uint32_t pllCtrl2;
 108   uint32_t dacMode;
 109   uint32_t dacAddr;
 110   uint32_t dacData;
 111
 112   uint32_t rgbMaxDelta;
 113   uint32_t vidProcCfg;
 114   uint32_t hwCurPatAddr;
 115   uint32_t hwCurLoc;
 116   uint32_t hwCurC0;
 117   uint32_t hwCurC1;
 118   uint32_t vidInFormat;
 119   uint32_t vidInStatus;
 120   uint32_t vidSerialParallelPort;
 121   uint32_t vidInXDecimDeltas;
 122   uint32_t vidInDecimInitErrs;
 123   uint32_t vidInYDecimDeltas;
 124   uint32_t vidPixelBufThold;
 125   uint32_t vidChromaMin;
 126   uint32_t vidChromaMax;
 127   uint32_t vidCurrentLine;
 128   uint32_t vidScreenSize;
 129   uint32_t vidOverlayStartCoords;
 130   uint32_t vidOverlayEndScreenCoord;
 131   uint32_t vidOverlayDudx;
 132   uint32_t vidOverlayDudxOffsetSrcWidth;
 133   uint32_t vidOverlayDvdy;
 134
 135   uint32_t vga_registers_not_mem_mapped[12];
 136   uint32_t vidOverlayDvdyOffset;
 137   uint32_t vidDesktopStartAddr;
 138   uint32_t vidDesktopOverlayStride;
 139   uint32_t vidInAddr0;
 140   uint32_t vidInAddr1;
 141   uint32_t vidInAddr2;
 142   uint32_t vidInStride;
 143   uint32_t vidCurrOverlayStartAddr;
 144 };
 145
 146
 147 struct pioData_t {
 148   short port;
 149   short size;
 150   int device;
 151   void *value;
 152 };
 153
 154 typedef struct pioData_t pioData;
 155 typedef struct voodoo_2d_reg_t voodoo_2d_reg;
 156 typedef struct voodoo_io_reg_t voodoo_io_reg;
 157 typedef struct voodoo_yuv_reg_t voodoo_yuv_reg;
 158 typedef struct voodoo_yuv_fb_t voodoo_yuv_fb;
 159
 160
 161 /* from linux/driver/video/tdfxfb.c, definition for 3dfx registers.
 162  *
 163  * author: Hannu Mallat <hmallat@cc.hut.fi>
 164  */
 165
 166 #ifndef PCI_DEVICE_ID_3DFX_VOODOO5
 167 #define PCI_DEVICE_ID_3DFX_VOODOO5      0x0009
 168 #endif
 169
 170 /* membase0 register offsets */
 171 #define STATUS                          0x00
 172 #define PCIINIT0                        0x04
 173 #define SIPMONITOR                      0x08
 174 #define LFBMEMORYCONFIG         0x0c
 175 #define MISCINIT0                       0x10
 176 #define MISCINIT1                       0x14
 177 #define DRAMINIT0                       0x18
 178 #define DRAMINIT1                       0x1c
 179 #define AGPINIT                         0x20
 180 #define TMUGBEINIT                      0x24
 181 #define VGAINIT0                        0x28
 182 #define VGAINIT1                        0x2c
 183 #define DRAMCOMMAND                     0x30
 184 #define DRAMDATA                        0x34
 185 /* reserved                     0x38 */
 186 /* reserved                     0x3c */
 187 #define PLLCTRL0                        0x40
 188 #define PLLCTRL1                        0x44
 189 #define PLLCTRL2                        0x48
 190 #define DACMODE                         0x4c
 191 #define DACADDR                         0x50
 192 #define DACDATA                         0x54
 193 #define RGBMAXDELTA                     0x58
 194 #define VIDPROCCFG                      0x5c
 195 #define HWCURPATADDR            0x60
 196 #define HWCURLOC                        0x64
 197 #define HWCURC0                         0x68
 198 #define HWCURC1                         0x6c
 199 #define VIDINFORMAT                     0x70
 200 #define VIDINSTATUS                     0x74
 201 #define VIDSERPARPORT           0x78
 202 #define VIDINXDELTA                     0x7c
 203 #define VIDININITERR            0x80
 204 #define VIDINYDELTA                     0x84
 205 #define VIDPIXBUFTHOLD          0x88
 206 #define VIDCHRMIN                       0x8c
 207 #define VIDCHRMAX                       0x90
 208 #define VIDCURLIN                       0x94
 209 #define VIDSCREENSIZE           0x98
 210 #define VIDOVRSTARTCRD          0x9c
 211 #define VIDOVRENDCRD            0xa0
 212 #define VIDOVRDUDX                      0xa4
 213 #define VIDOVRDUDXOFF           0xa8
 214 #define VIDOVRDVDY                      0xac
 215 /*  ... */
 216 #define VIDOVRDVDYOFF           0xe0
 217 #define VIDDESKSTART            0xe4
 218 #define VIDDESKSTRIDE           0xe8
 219 #define VIDINADDR0                      0xec
 220 #define VIDINADDR1                      0xf0
 221 #define VIDINADDR2                      0xf4
 222 #define VIDINSTRIDE                     0xf8
 223 #define VIDCUROVRSTART          0xfc
 224
 225 #define INTCTRL                 (0x00100000 + 0x04)
 226 #define CLIP0MIN                (0x00100000 + 0x08)
 227 #define CLIP0MAX                (0x00100000 + 0x0c)
 228 #define DSTBASE                 (0x00100000 + 0x10)
 229 #define DSTFORMAT               (0x00100000 + 0x14)
 230 #define SRCCOLORKEYMIN          (0x00100000 + 0x18)
 231 #define SRCCOLORKEYMAX          (0x00100000 + 0x1c)
 232 #define DSTCOLORKEYMIN          (0x00100000 + 0x20)
 233 #define DSTCOLORKEYMAX          (0x00100000 + 0x24)
 234 #define ROP123                  (0x00100000 + 0x30)
 235 #define SRCBASE                 (0x00100000 + 0x34)
 236 #define COMMANDEXTRA_2D (0x00100000 + 0x38)
 237 #define CLIP1MIN                (0x00100000 + 0x4c)
 238 #define CLIP1MAX                (0x00100000 + 0x50)
 239 #define SRCFORMAT               (0x00100000 + 0x54)
 240 #define SRCSIZE                 (0x00100000 + 0x58)
 241 #define SRCXY                   (0x00100000 + 0x5c)
 242 #define COLORBACK               (0x00100000 + 0x60)
 243 #define COLORFORE               (0x00100000 + 0x64)
 244 #define DSTSIZE                 (0x00100000 + 0x68)
 245 #define DSTXY                   (0x00100000 + 0x6c)
 246 #define COMMAND_2D              (0x00100000 + 0x70)
 247 #define LAUNCH_2D               (0x00100000 + 0x80)
 248
 249 #define COMMAND_3D              (0x00200000 + 0x120)
 250
 251 #define SWAPBUFCMD              (0x00200000 + 0x128)
 252 #define SWAPPENDING             (0x00200000 + 0x24C)
 253 #define LEFTOVBUF               (0x00200000 + 0x250)
 254 #define RIGHTOVBUF              (0x00200000 + 0x254)
 255 #define FBISWAPBUFHIST          (0x00200000 + 0x258)
 256
 257 /* register bitfields (not all, only as needed) */
 258
 259 #define BIT(x) (1UL << (x))
 260
 261 /* COMMAND_2D reg. values */
 262 #define TDFXFB_ROP_COPY         0xcc     // src
 263 #define TDFXFB_ROP_INVERT       0x55     // NOT dst
 264 #define TDFXFB_ROP_XOR          0x66     // src XOR dst
 265 #define TDFXFB_ROP_OR           0xee     // src | dst
 266
 267 #define AUTOINC_DSTX                    BIT(10)
 268 #define AUTOINC_DSTY                    BIT(11)
 269
 270
 271 #define COMMAND_2D_S2S_BITBLT                   0x01      // screen to screen
 272 #define COMMAND_2D_S2S_STRECH_BLT               0x02 // BLT + Strech
 273 #define COMMAND_2D_H2S_BITBLT                   0x03       // host to screen
 274 #define COMMAND_2D_FILLRECT                     0x05
 275
 276 #define COMMAND_2D_DO_IMMED                     BIT(8) // Do it immediatly
 277
 278
 279
 280 #define COMMAND_3D_NOP                          0x00
 281 #define STATUS_RETRACE                          BIT(6)
 282 #define STATUS_BUSY                                     BIT(9)
 283 #define MISCINIT1_CLUT_INV                      BIT(0)
 284 #define MISCINIT1_2DBLOCK_DIS           BIT(15)
 285 #define DRAMINIT0_SGRAM_NUM                     BIT(26)
 286 #define DRAMINIT0_SGRAM_TYPE            BIT(27)
 287 #define DRAMINIT1_MEM_SDRAM                     BIT(30)
 288 #define VGAINIT0_VGA_DISABLE            BIT(0)
 289 #define VGAINIT0_EXT_TIMING                     BIT(1)
 290 #define VGAINIT0_8BIT_DAC                       BIT(2)
 291 #define VGAINIT0_EXT_ENABLE                     BIT(6)
 292 #define VGAINIT0_WAKEUP_3C3                     BIT(8)
 293 #define VGAINIT0_LEGACY_DISABLE         BIT(9)
 294 #define VGAINIT0_ALT_READBACK           BIT(10)
 295 #define VGAINIT0_FAST_BLINK                     BIT(11)
 296 #define VGAINIT0_EXTSHIFTOUT            BIT(12)
 297 #define VGAINIT0_DECODE_3C6                     BIT(13)
 298 #define VGAINIT0_SGRAM_HBLANK_DISABLE   BIT(22)
 299 #define VGAINIT1_MASK                           0x1fffff
 300 #define VIDCFG_VIDPROC_ENABLE           BIT(0)
 301 #define VIDCFG_CURS_X11                         BIT(1)
 302 #define VIDCFG_HALF_MODE                        BIT(4)
 303 #define VIDCFG_DESK_ENABLE                      BIT(7)
 304 #define VIDCFG_CLUT_BYPASS                      BIT(10)
 305 #define VIDCFG_2X                                       BIT(26)
 306 #define VIDCFG_HWCURSOR_ENABLE          BIT(27)
 307 #define VIDCFG_PIXFMT_SHIFT                             18
 308 #define DACMODE_2X                                      BIT(0)
 309
 310 /* AGP registers */
 311 #define AGPREQSIZE          (0x0080000 + 0x00)
 312 #define AGPHOSTADDRESSLOW   (0x0080000 + 0x04)
 313 #define AGPHOSTADDRESSHIGH  (0x0080000 + 0x08)
 314 #define AGPGRAPHICSADDRESS  (0x0080000 + 0x0C)
 315 #define AGPGRAPHICSSTRIDE   (0x0080000 + 0x10)
 316 #define AGPMOVECMD          (0x0080000 + 0x14)
 317
 318 /* FIFO registers */
 319 #define CMDBASEADDR0        (0x0080000 + 0x20)
 320 #define CMDBASESIZE0        (0x0080000 + 0x24)
 321 #define CMDBUMP0            (0x0080000 + 0x28)
 322 #define CMDRDPTRL0          (0x0080000 + 0x2C)
 323 #define CMDRDPTRH0          (0x0080000 + 0x30)
 324 #define CMDAMIN0            (0x0080000 + 0x34)
 325 #define CMDAMAX0            (0x0080000 + 0x38)
 326 #define CMDFIFODEPTH0       (0x0080000 + 0x44)
 327 #define CMDHOLECNT0         (0x0080000 + 0x48)
 328
 329
 330 /* YUV reisters */
 331 #define YUVBASEADDRESS (0x0080000 + 0x100)
 332 #define YUVSTRIDE      (0x0080000 + 0x104)
 333
 334 /* VGA rubbish, need to change this for multihead support */
 335 #define MISC_W  0x3c2
 336 #define MISC_R  0x3cc
 337 #define SEQ_I   0x3c4
 338 #define SEQ_D   0x3c5
 339 #define CRT_I   0x3d4
 340 #define CRT_D   0x3d5
 341 #define ATT_IW  0x3c0
 342 #define RAMDAC_R 0x3c7
 343 #define RAMDAC_W 0x3c8
 344 #define RAMDAC_D 0x3c9
 345 #define IS1_R   0x3da
 346 #define GRA_I   0x3ce
 347 #define GRA_D   0x3cf
 348
 349 #ifndef FB_ACCEL_3DFX_BANSHEE
 350 #define FB_ACCEL_3DFX_BANSHEE 31
 351 #endif
 352
 353 #define TDFXF_HSYNC_ACT_HIGH    0x01
 354 #define TDFXF_HSYNC_ACT_LOW             0x02
 355 #define TDFXF_VSYNC_ACT_HIGH    0x04
 356 #define TDFXF_VSYNC_ACT_LOW             0x08
 357 #define TDFXF_LINE_DOUBLE               0x10
 358 #define TDFXF_VIDEO_ENABLE              0x20
 359
 360 #define TDFXF_HSYNC_MASK                0x03
 361 #define TDFXF_VSYNC_MASK                0x0c
 362
 363 #define XYREG(x,y)              (((((unsigned long)y) & 0x1FFF) << 16) | (((unsigned long)x) & 0x1FFF))
 364
 365 //#define TDFXFB_DEBUG
 366 #ifdef TDFXFB_DEBUG
 367 #define DPRINTK(a,b...) printk(KERN_DEBUG "fb: %s: " a, __FUNCTION__ , ## b)
 368 #else
 369 #define DPRINTK(a,b...)
 370 #endif
 371
 372 /* ------------------------------------------------------------------------- */
 373
 374 #endif /* MPLAYER_3DFX_H */