firmware/target/coldfire/iriver/h300/lcd-h300.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2004 by Linus Nielsen Feltzing
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21 #include "config.h"
  22
  23 #include "cpu.h"
  24 #include "lcd.h"
  25 #include "kernel.h"
  26 #include "thread.h"
  27 #include <string.h>
  28 #include <stdlib.h>
  29 #include "file.h"
  30 #include "debug.h"
  31 #include "system.h"
  32 #include "font.h"
  33 #include "bidi.h"
  34
  35 static bool display_on = false; /* Is the display turned on? */
  36 static bool display_flipped = false;
  37 static int xoffset = 0;         /* Needed for flip */
  38 static struct mutex lcd_mtx;    /* The update functions use DMA and yield */
  39
  40 unsigned long dma_addr IBSS_ATTR;
  41 unsigned int dma_len IBSS_ATTR;
  42 volatile int dma_count IBSS_ATTR;
  43
  44 /* register defines */
  45 #define R_START_OSC             0x00
  46 #define R_DRV_OUTPUT_CONTROL    0x01
  47 #define R_DRV_WAVEFORM_CONTROL  0x02
  48 #define R_ENTRY_MODE            0x03
  49 #define R_COMPARE_REG1          0x04
  50 #define R_COMPARE_REG2          0x05
  51
  52 #define R_DISP_CONTROL1     0x07
  53 #define R_DISP_CONTROL2     0x08
  54 #define R_DISP_CONTROL3     0x09
  55
  56 #define R_FRAME_CYCLE_CONTROL 0x0b
  57 #define R_EXT_DISP_IF_CONTROL 0x0c
  58
  59 #define R_POWER_CONTROL1    0x10
  60 #define R_POWER_CONTROL2    0x11
  61 #define R_POWER_CONTROL3    0x12
  62 #define R_POWER_CONTROL4    0x13
  63
  64 #define R_RAM_ADDR_SET  0x21
  65 #define R_WRITE_DATA_2_GRAM 0x22
  66
  67 #define R_GAMMA_FINE_ADJ_POS1   0x30
  68 #define R_GAMMA_FINE_ADJ_POS2   0x31
  69 #define R_GAMMA_FINE_ADJ_POS3   0x32
  70 #define R_GAMMA_GRAD_ADJ_POS    0x33
  71
  72 #define R_GAMMA_FINE_ADJ_NEG1   0x34
  73 #define R_GAMMA_FINE_ADJ_NEG2   0x35
  74 #define R_GAMMA_FINE_ADJ_NEG3   0x36
  75 #define R_GAMMA_GRAD_ADJ_NEG    0x37
  76
  77 #define R_GAMMA_AMP_ADJ_RES_POS     0x38
  78 #define R_GAMMA_AMP_AVG_ADJ_RES_NEG 0x39
  79
  80 #define R_GATE_SCAN_POS         0x40
  81 #define R_VERT_SCROLL_CONTROL   0x41
  82 #define R_1ST_SCR_DRV_POS       0x42
  83 #define R_2ND_SCR_DRV_POS       0x43
  84 #define R_HORIZ_RAM_ADDR_POS    0x44
  85 #define R_VERT_RAM_ADDR_POS     0x45
  86
  87 #define LCD_CMD  (*(volatile unsigned short *)0xf0000000)
  88 #define LCD_DATA (*(volatile unsigned short *)0xf0000002)
  89
  90 #define R_ENTRY_MODE_HORZ 0x7030
  91 #define R_ENTRY_MODE_VERT 0x7038
  92
  93 /* called very frequently - inline! */
  94 static inline void lcd_write_reg(int reg, int val)
  95 {
  96     LCD_CMD = reg;
  97     LCD_DATA = val;
  98 }
  99
 100 /* called very frequently - inline! */
 101 static inline void lcd_begin_write_gram(void)
 102 {
 103     LCD_CMD = R_WRITE_DATA_2_GRAM;
 104 }
 105
 106 /*** hardware configuration ***/
 107
 108 void lcd_set_contrast(int val)
 109 {
 110     (void)val;
 111 }
 112
 113 void lcd_set_invert_display(bool yesno)
 114 {
 115     (void)yesno;
 116 }
 117
 118 static void flip_lcd(bool yesno)
 119 {
 120     if (yesno)
 121     {
 122         lcd_write_reg(R_DRV_OUTPUT_CONTROL, 0x031b); /* 224 lines, GS=SS=1 */
 123         lcd_write_reg(R_GATE_SCAN_POS, 0x0002);      /* 16 lines offset */
 124         lcd_write_reg(R_1ST_SCR_DRV_POS, 0xdf04);    /* 4..223 */
 125     }
 126     else
 127     {
 128         lcd_write_reg(R_DRV_OUTPUT_CONTROL, 0x001b); /* 224 lines, GS=SS=0 */
 129         lcd_write_reg(R_GATE_SCAN_POS, 0x0000);
 130         lcd_write_reg(R_1ST_SCR_DRV_POS, 0xdb00);    /* 0..219 */
 131     }
 132 }
 133
 134 /* turn the display upside down (call lcd_update() afterwards) */
 135 void lcd_set_flip(bool yesno)
 136 {
 137     display_flipped = yesno;
 138     xoffset = yesno ? 4 : 0;
 139
 140     if (display_on)
 141     {
 142         mutex_lock(&lcd_mtx);
 143         flip_lcd(yesno);
 144         mutex_unlock(&lcd_mtx);
 145     }
 146 }
 147
 148 static void _display_on(void)
 149 {
 150     /** Sequence according to datasheet, p. 132 **/
 151
 152     lcd_write_reg(R_START_OSC, 0x0001); /* Start Oscilation */
 153     sleep(1);
 154
 155     /* zero everything*/
 156     lcd_write_reg(R_POWER_CONTROL1, 0x0000); /* STB = 0, SLP = 0 */
 157     lcd_write_reg(R_DISP_CONTROL1, 0x0000);  /* GON = 0, DTE = 0, D1-0 = 00b */
 158     lcd_write_reg(R_POWER_CONTROL3, 0x0000); /* PON = 0 */
 159     lcd_write_reg(R_POWER_CONTROL4, 0x0000); /* VCOMG = 0 */
 160     sleep(1);
 161
 162     /* initialise power supply */
 163
 164     /* DC12-10 = 000b: Step-up1 = clock/8,
 165      * DC02-00 = 000b: Step-up2 = clock/16,
 166      * VC2-0   = 010b: VciOUT = 0.87 * VciLVL */
 167     lcd_write_reg(R_POWER_CONTROL2, 0x0002);
 168
 169     /* VRH3-0 = 1000b: Vreg1OUT = REGP * 1.90 */
 170     lcd_write_reg(R_POWER_CONTROL3, 0x0008);
 171
 172     /* VDV4-0 = 00110b: VcomA = Vreg1OUT * 0.76,
 173      * VCM4-0 = 10000b: VcomH = Vreg1OUT * 0.70*/
 174     lcd_write_reg(R_POWER_CONTROL4, 0x0610);
 175
 176     lcd_write_reg(R_POWER_CONTROL1, 0x0044); /* AP2-0 = 100b, DK = 1 */
 177     lcd_write_reg(R_POWER_CONTROL3, 0x0018); /* PON = 1 */
 178
 179     sleep(4); /* Step-up circuit stabilising time */
 180
 181     /* start power supply */
 182
 183     lcd_write_reg(R_POWER_CONTROL1, 0x0540); /* BT2-0 = 101b, DK = 0 */
 184     lcd_write_reg(R_POWER_CONTROL4, 0x2610); /* VCOMG = 1 */
 185
 186     /* other settings */
 187
 188     /* B/C = 1: n-line inversion form
 189      * EOR = 1: polarity inversion occurs by applying an EOR to odd/even
 190      *          frame select signal and an n-line inversion signal.
 191      * FLD = 01b: 1 field interlaced scan, external display iface */
 192     lcd_write_reg(R_DRV_WAVEFORM_CONTROL, 0x0700);
 193
 194     /* Address counter updated in vertical direction; left to right;
 195      * vertical increment horizontal increment.
 196      * data format for 8bit transfer or spi = 65k (5,6,5)
 197      * Reverse order of RGB to BGR for 18bit data written to GRAM
 198      * Replace data on writing to GRAM */
 199     lcd_write_reg(R_ENTRY_MODE, 0x7038);
 200
 201     flip_lcd(display_flipped);
 202
 203     lcd_write_reg(R_2ND_SCR_DRV_POS, 0x0000);
 204     lcd_write_reg(R_VERT_SCROLL_CONTROL, 0x0000);
 205
 206     /* 19 clocks,no equalization */
 207     lcd_write_reg(R_FRAME_CYCLE_CONTROL, 0x0002);
 208
 209     /* Transfer mode for RGB interface disabled
 210      * internal clock operation;
 211      * System interface/VSYNC interface */
 212     lcd_write_reg(R_EXT_DISP_IF_CONTROL, 0x0003);
 213
 214     /* Front porch lines: 8; Back porch lines: 8; */
 215     lcd_write_reg(R_DISP_CONTROL2, 0x0808);
 216
 217     /* Scan mode by the gate driver in the non-display area: disabled;
 218      * Cycle of scan by the gate driver - set to 31frames(518ms),
 219      * disabled by above setting */
 220     lcd_write_reg(R_DISP_CONTROL3, 0x003f);
 221
 222     lcd_write_reg(R_GAMMA_FINE_ADJ_POS1, 0x0003);
 223     lcd_write_reg(R_GAMMA_FINE_ADJ_POS2, 0x0707);
 224     lcd_write_reg(R_GAMMA_FINE_ADJ_POS3, 0x0007);
 225     lcd_write_reg(R_GAMMA_GRAD_ADJ_POS, 0x0705);
 226     lcd_write_reg(R_GAMMA_FINE_ADJ_NEG1, 0x0007);
 227     lcd_write_reg(R_GAMMA_FINE_ADJ_NEG2, 0x0000);
 228     lcd_write_reg(R_GAMMA_FINE_ADJ_NEG3, 0x0407);
 229     lcd_write_reg(R_GAMMA_GRAD_ADJ_NEG, 0x0507);
 230     lcd_write_reg(R_GAMMA_AMP_ADJ_RES_POS, 0x1d09);
 231     lcd_write_reg(R_GAMMA_AMP_AVG_ADJ_RES_NEG, 0x0303);
 232
 233     display_on=true;  /* must be done before calling lcd_update() */
 234     lcd_update();
 235
 236     sleep(4); /* op-amp stabilising time */
 237
 238     /** Sequence according to datasheet, p. 130 **/
 239
 240     lcd_write_reg(R_POWER_CONTROL1, 0x4540); /* SAP2-0=100, BT2-0=101, AP2-0=100 */
 241     lcd_write_reg(R_DISP_CONTROL1, 0x0005);  /* GON=0, DTE=0, REV=1, D1-0=01 */
 242     sleep(2);
 243
 244     lcd_write_reg(R_DISP_CONTROL1, 0x0025);  /* GON=1, DTE=0, REV=1, D1-0=01 */
 245     lcd_write_reg(R_DISP_CONTROL1, 0x0027);  /* GON=1, DTE=0, REV=1, D1-0=11 */
 246     sleep(2);
 247
 248     lcd_write_reg(R_DISP_CONTROL1, 0x0037);  /* GON=1, DTE=1, REV=1, D1-0=11 */
 249 }
 250
 251 /* LCD init */
 252 void lcd_init_device(void)
 253 {
 254     /* GPO46 is LCD RESET */
 255     or_l(0x00004000, &GPIO1_OUT);
 256     or_l(0x00004000, &GPIO1_ENABLE);
 257     or_l(0x00004000, &GPIO1_FUNCTION);
 258
 259     /* Reset LCD */
 260     and_l(~0x00004000, &GPIO1_OUT);
 261     sleep(1);
 262     or_l(0x00004000, &GPIO1_OUT);
 263     sleep(1);
 264
 265     DAR3 = 0xf0000002; /* Configure DMA channel 3 */
 266     DSR3 = 1;
 267     DIVR3 = 57;        /* DMA3 is mapped into vector 57 in system.c */
 268     ICR9 = (6 << 2);   /* Enable DMA3 interrupt at level 6, priority 0 */
 269     coldfire_imr_mod(0, 1 << 17);
 270
 271     mutex_init(&lcd_mtx);
 272     _display_on();
 273 }
 274
 275 void lcd_enable(bool on)
 276 {
 277     if (display_on != on)
 278     {
 279         mutex_lock(&lcd_mtx);
 280         if (on)
 281         {
 282             _display_on();
 283             send_event(LCD_EVENT_ACTIVATION, NULL);
 284         }
 285         else
 286         {
 287             /** Off sequence according to datasheet, p. 130 **/
 288
 289             lcd_write_reg(R_FRAME_CYCLE_CONTROL, 0x0002); /* EQ=0, 18 clks/line */
 290             lcd_write_reg(R_DISP_CONTROL1, 0x0036);  /* GON=1, DTE=1, REV=1, D1-0=10 */
 291             sleep(2);
 292
 293             lcd_write_reg(R_DISP_CONTROL1, 0x0026);  /* GON=1, DTE=0, REV=1, D1-0=10 */
 294             sleep(2);
 295
 296             lcd_write_reg(R_DISP_CONTROL1, 0x0000);  /* GON=0, DTE=0, D1-0=00 */
 297
 298             lcd_write_reg(R_POWER_CONTROL1, 0x0000); /* SAP2-0=000, AP2-0=000 */
 299             lcd_write_reg(R_POWER_CONTROL3, 0x0000); /* PON=0 */
 300             lcd_write_reg(R_POWER_CONTROL4, 0x0000); /* VCOMG=0 */
 301
 302             /* datasheet p. 131 */
 303             lcd_write_reg(R_POWER_CONTROL1, 0x0001); /* STB=1: standby mode */
 304
 305             display_on=false;
 306         }
 307         mutex_unlock(&lcd_mtx);
 308     }
 309 }
 310
 311 bool lcd_active(void)
 312 {
 313     return display_on;
 314 }
 315
 316 /*** update functions ***/
 317
 318 /* Line write helper function for lcd_yuv_blit. Write two lines of yuv420.
 319  * y should have two lines of Y back to back, 2nd line first.
 320  * c should contain the Cb and Cr data for the two lines of Y back to back.
 321  * Needs EMAC set to saturated, signed integer mode.
 322  */
 323 extern void lcd_write_yuv420_lines(const unsigned char *y,
 324                                    const unsigned char *c, int cwidth);
 325
 326 /* Performance function to blit a YUV bitmap directly to the LCD
 327  * src_x, src_y, width and height should be even
 328  * x, y, width and height have to be within LCD bounds
 329  */
 330 void lcd_blit_yuv(unsigned char * const src[3],
 331                   int src_x, int src_y, int stride,
 332                   int x, int y, int width, int height)
 333 {
 334     /* IRAM Y, Cb and Cb buffers. */
 335     unsigned char y_ibuf[LCD_WIDTH*2];
 336     unsigned char c_ibuf[LCD_WIDTH];
 337     const unsigned char *ysrc, *usrc, *vsrc;
 338     const unsigned char *ysrc_max;
 339
 340     if (!display_on)
 341         return;
 342
 343     mutex_lock(&lcd_mtx);
 344     width &= ~1;  /* stay on the safe side */
 345     height &= ~1;
 346
 347     lcd_write_reg(R_ENTRY_MODE, R_ENTRY_MODE_HORZ);
 348     /* Set start position and window */
 349     lcd_write_reg(R_VERT_RAM_ADDR_POS, ((xoffset + 219) << 8) | xoffset);
 350
 351     ysrc = src[0] + src_y * stride + src_x;
 352     usrc = src[1] + (src_y * stride >> 2) + (src_x >> 1);
 353     vsrc = src[2] + (src_y * stride >> 2) + (src_x >> 1);
 354     ysrc_max = ysrc + height * stride;
 355
 356     coldfire_set_macsr(EMAC_SATURATE);
 357     do
 358     {
 359         lcd_write_reg(R_HORIZ_RAM_ADDR_POS, ((y + 1) << 8) | y);
 360         lcd_write_reg(R_RAM_ADDR_SET, ((x+xoffset) << 8) | y);
 361         lcd_begin_write_gram();
 362
 363         memcpy(y_ibuf + width, ysrc, width);
 364         memcpy(y_ibuf, ysrc + stride, width);
 365         memcpy(c_ibuf, usrc, width >> 1);
 366         memcpy(c_ibuf + (width >> 1), vsrc, width >> 1);
 367         lcd_write_yuv420_lines(y_ibuf, c_ibuf, width >> 1);
 368
 369         y += 2;
 370         ysrc += 2 * stride;
 371         usrc += stride >> 1;
 372         vsrc += stride >> 1;
 373     }
 374     while (ysrc < ysrc_max);
 375     mutex_unlock(&lcd_mtx);
 376 }
 377
 378 /* LCD DMA ISR */
 379 void DMA3(void) __attribute__ ((interrupt_handler, section(".icode")));
 380 void DMA3(void)
 381 {
 382     DSR3 = 1;
 383     if (--dma_count > 0)
 384     {
 385         dma_addr += LCD_WIDTH*sizeof(fb_data);
 386         SAR3 = dma_addr;
 387         BCR3 = dma_len;
 388         DCR3 = DMA_INT | DMA_AA | DMA_BWC(1)
 389              | DMA_SINC | DMA_SSIZE(DMA_SIZE_LINE)
 390              | DMA_DSIZE(DMA_SIZE_WORD) | DMA_START;
 391     }
 392 }
 393
 394 /* Update the display.
 395    This must be called after all other LCD functions that change the display. */
 396 void lcd_update(void)
 397 {
 398     if (display_on)
 399     {
 400         mutex_lock(&lcd_mtx);
 401
 402         lcd_write_reg(R_ENTRY_MODE, R_ENTRY_MODE_VERT);
 403         /* set start position window */
 404         lcd_write_reg(R_HORIZ_RAM_ADDR_POS, 175 << 8);
 405         lcd_write_reg(R_VERT_RAM_ADDR_POS,((xoffset+219)<<8) | xoffset);
 406         lcd_write_reg(R_RAM_ADDR_SET, xoffset << 8);
 407
 408         lcd_begin_write_gram();
 409
 410         dma_count = 1;
 411         SAR3 = (unsigned long)lcd_framebuffer;
 412         BCR3 = LCD_WIDTH*LCD_HEIGHT*sizeof(fb_data);
 413         DCR3 = DMA_INT | DMA_AA | DMA_BWC(1)
 414              | DMA_SINC | DMA_SSIZE(DMA_SIZE_LINE)
 415              | DMA_DSIZE(DMA_SIZE_WORD) | DMA_START;
 416
 417         while (dma_count > 0)
 418             yield();
 419
 420         mutex_unlock(&lcd_mtx);
 421     }
 422 }
 423
 424 /* Update a fraction of the display. */
 425 void lcd_update_rect(int x, int y, int width, int height)
 426 {
 427     if (display_on)
 428     {
 429         if (x + width > LCD_WIDTH)
 430             width = LCD_WIDTH - x;
 431         if (y + height > LCD_HEIGHT)
 432             height = LCD_HEIGHT - y;
 433
 434         if (width <= 0 || height <= 0) /* nothing to do */
 435             return;
 436
 437         mutex_lock(&lcd_mtx);
 438
 439         lcd_write_reg(R_ENTRY_MODE, R_ENTRY_MODE_VERT);
 440         /* set update window */
 441         lcd_write_reg(R_HORIZ_RAM_ADDR_POS, 175 << 8);
 442         lcd_write_reg(R_VERT_RAM_ADDR_POS,((x+xoffset+width-1) << 8) | (x+xoffset));
 443         lcd_write_reg(R_RAM_ADDR_SET, ((x+xoffset) << 8) | y);
 444
 445         lcd_begin_write_gram();
 446
 447         if (width == LCD_WIDTH)
 448         {
 449             dma_count = 1;
 450             SAR3 = (unsigned long)FBADDR(0, y);
 451             BCR3 = (LCD_WIDTH*sizeof(fb_data)) * height;
 452         }
 453         else
 454         {
 455             dma_count = height;
 456             SAR3 = dma_addr = (unsigned long)FBADDR(x,y);
 457             BCR3 = dma_len  = width * sizeof(fb_data);
 458         }
 459         DCR3 = DMA_INT | DMA_AA | DMA_BWC(1)
 460              | DMA_SINC | DMA_SSIZE(DMA_SIZE_LINE)
 461              | DMA_DSIZE(DMA_SIZE_WORD) | DMA_START;
 462
 463         while (dma_count > 0)
 464             yield();
 465
 466         mutex_unlock(&lcd_mtx);
 467     }
 468 }