arch/arm/mach-mx5/mm.c

   1 /*
   2  * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License.  You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  *
  11  * Create static mapping between physical to virtual memory.
  12  */
  13
  14 #include <linux/mm.h>
  15 #include <linux/init.h>
  16
  17 #include <asm/mach/map.h>
  18
  19 #include <mach/hardware.h>
  20 #include <mach/common.h>
  21 #include <mach/devices-common.h>
  22 #include <mach/iomux-v3.h>
  23
  24 /*
  25  * Define the MX51 memory map.
  26  */
  27 static struct map_desc mx51_io_desc[] __initdata = {
  28         imx_map_entry(MX51, IRAM, MT_DEVICE),
  29         imx_map_entry(MX51, DEBUG, MT_DEVICE),
  30         imx_map_entry(MX51, AIPS1, MT_DEVICE),
  31         imx_map_entry(MX51, SPBA0, MT_DEVICE),
  32         imx_map_entry(MX51, AIPS2, MT_DEVICE),
  33 };
  34
  35 /*
  36  * Define the MX53 memory map.
  37  */
  38 static struct map_desc mx53_io_desc[] __initdata = {
  39         imx_map_entry(MX53, AIPS1, MT_DEVICE),
  40         imx_map_entry(MX53, SPBA0, MT_DEVICE),
  41         imx_map_entry(MX53, AIPS2, MT_DEVICE),
  42 };
  43
  44 /*
  45  * This function initializes the memory map. It is called during the
  46  * system startup to create static physical to virtual memory mappings
  47  * for the IO modules.
  48  */
  49 void __init mx51_map_io(void)
  50 {
  51         iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc));
  52 }
  53
  54 void __init imx51_init_early(void)
  55 {
  56         mxc_set_cpu_type(MXC_CPU_MX51);
  57         mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
  58         mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
  59 }
  60
  61 void __init mx53_map_io(void)
  62 {
  63         iotable_init(mx53_io_desc, ARRAY_SIZE(mx53_io_desc));
  64 }
  65
  66 void __init imx53_init_early(void)
  67 {
  68         mxc_set_cpu_type(MXC_CPU_MX53);
  69         mxc_iomux_v3_init(MX53_IO_ADDRESS(MX53_IOMUXC_BASE_ADDR));
  70         mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR));
  71 }
  72
  73 void __init mx51_init_irq(void)
  74 {
  75         unsigned long tzic_addr;
  76         void __iomem *tzic_virt;
  77
  78         if (mx51_revision() < IMX_CHIP_REVISION_2_0)
  79                 tzic_addr = MX51_TZIC_BASE_ADDR_TO1;
  80         else
  81                 tzic_addr = MX51_TZIC_BASE_ADDR;
  82
  83         tzic_virt = ioremap(tzic_addr, SZ_16K);
  84         if (!tzic_virt)
  85                 panic("unable to map TZIC interrupt controller\n");
  86
  87         tzic_init_irq(tzic_virt);
  88 }
  89
  90 void __init mx53_init_irq(void)
  91 {
  92         unsigned long tzic_addr;
  93         void __iomem *tzic_virt;
  94
  95         tzic_addr = MX53_TZIC_BASE_ADDR;
  96
  97         tzic_virt = ioremap(tzic_addr, SZ_16K);
  98         if (!tzic_virt)
  99                 panic("unable to map TZIC interrupt controller\n");
 100
 101         tzic_init_irq(tzic_virt);
 102 }
 103
 104 static struct sdma_script_start_addrs imx51_sdma_script __initdata = {
 105         .ap_2_ap_addr = 642,
 106         .uart_2_mcu_addr = 817,
 107         .mcu_2_app_addr = 747,
 108         .mcu_2_shp_addr = 961,
 109         .ata_2_mcu_addr = 1473,
 110         .mcu_2_ata_addr = 1392,
 111         .app_2_per_addr = 1033,
 112         .app_2_mcu_addr = 683,
 113         .shp_2_per_addr = 1251,
 114         .shp_2_mcu_addr = 892,
 115 };
 116
 117 static struct sdma_platform_data imx51_sdma_pdata __initdata = {
 118         .sdma_version = 2,
 119         .fw_name = "sdma-imx51.bin",
 120         .script_addrs = &imx51_sdma_script,
 121 };
 122
 123 static struct sdma_script_start_addrs imx53_sdma_script __initdata = {
 124         .ap_2_ap_addr = 642,
 125         .app_2_mcu_addr = 683,
 126         .mcu_2_app_addr = 747,
 127         .uart_2_mcu_addr = 817,
 128         .shp_2_mcu_addr = 891,
 129         .mcu_2_shp_addr = 960,
 130         .uartsh_2_mcu_addr = 1032,
 131         .spdif_2_mcu_addr = 1100,
 132         .mcu_2_spdif_addr = 1134,
 133         .firi_2_mcu_addr = 1193,
 134         .mcu_2_firi_addr = 1290,
 135 };
 136
 137 static struct sdma_platform_data imx53_sdma_pdata __initdata = {
 138         .sdma_version = 2,
 139         .fw_name = "sdma-imx53.bin",
 140         .script_addrs = &imx53_sdma_script,
 141 };
 142
 143 void __init imx51_soc_init(void)
 144 {
 145         /* i.mx51 has the i.mx31 type gpio */
 146         mxc_register_gpio("imx31-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO1_LOW, MX51_MXC_INT_GPIO1_HIGH);
 147         mxc_register_gpio("imx31-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO2_LOW, MX51_MXC_INT_GPIO2_HIGH);
 148         mxc_register_gpio("imx31-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO3_LOW, MX51_MXC_INT_GPIO3_HIGH);
 149         mxc_register_gpio("imx31-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO4_LOW, MX51_MXC_INT_GPIO4_HIGH);
 150
 151         imx_add_imx_sdma(MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata);
 152 }
 153
 154 void __init imx53_soc_init(void)
 155 {
 156         /* i.mx53 has the i.mx31 type gpio */
 157         mxc_register_gpio("imx31-gpio", 0, MX53_GPIO1_BASE_ADDR, SZ_16K, MX53_INT_GPIO1_LOW, MX53_INT_GPIO1_HIGH);
 158         mxc_register_gpio("imx31-gpio", 1, MX53_GPIO2_BASE_ADDR, SZ_16K, MX53_INT_GPIO2_LOW, MX53_INT_GPIO2_HIGH);
 159         mxc_register_gpio("imx31-gpio", 2, MX53_GPIO3_BASE_ADDR, SZ_16K, MX53_INT_GPIO3_LOW, MX53_INT_GPIO3_HIGH);
 160         mxc_register_gpio("imx31-gpio", 3, MX53_GPIO4_BASE_ADDR, SZ_16K, MX53_INT_GPIO4_LOW, MX53_INT_GPIO4_HIGH);
 161         mxc_register_gpio("imx31-gpio", 4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH);
 162         mxc_register_gpio("imx31-gpio", 5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH);
 163         mxc_register_gpio("imx31-gpio", 6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH);
 164
 165         imx_add_imx_sdma(MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata);
 166 }