arch/arm/mach-exynos4/mach-smdkv310.c

   1 /* linux/arch/arm/mach-exynos4/mach-smdkv310.c
   2  *
   3  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9 */
  10
  11 #include <linux/serial_core.h>
  12 #include <linux/gpio.h>
  13 #include <linux/mmc/host.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/smsc911x.h>
  16 #include <linux/io.h>
  17 #include <linux/i2c.h>
  18 #include <linux/input.h>
  19 #include <linux/pwm_backlight.h>
  20
  21 #include <asm/mach/arch.h>
  22 #include <asm/mach-types.h>
  23
  24 #include <plat/regs-serial.h>
  25 #include <plat/regs-srom.h>
  26 #include <plat/exynos4.h>
  27 #include <plat/cpu.h>
  28 #include <plat/devs.h>
  29 #include <plat/keypad.h>
  30 #include <plat/sdhci.h>
  31 #include <plat/iic.h>
  32 #include <plat/pd.h>
  33 #include <plat/gpio-cfg.h>
  34 #include <plat/backlight.h>
  35
  36 #include <mach/map.h>
  37
  38 /* Following are default values for UCON, ULCON and UFCON UART registers */
  39 #define SMDKV310_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
  40                                  S3C2410_UCON_RXILEVEL |        \
  41                                  S3C2410_UCON_TXIRQMODE |       \
  42                                  S3C2410_UCON_RXIRQMODE |       \
  43                                  S3C2410_UCON_RXFIFO_TOI |      \
  44                                  S3C2443_UCON_RXERR_IRQEN)
  45
  46 #define SMDKV310_ULCON_DEFAULT  S3C2410_LCON_CS8
  47
  48 #define SMDKV310_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
  49                                  S5PV210_UFCON_TXTRIG4 |        \
  50                                  S5PV210_UFCON_RXTRIG4)
  51
  52 static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
  53         [0] = {
  54                 .hwport         = 0,
  55                 .flags          = 0,
  56                 .ucon           = SMDKV310_UCON_DEFAULT,
  57                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  58                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  59         },
  60         [1] = {
  61                 .hwport         = 1,
  62                 .flags          = 0,
  63                 .ucon           = SMDKV310_UCON_DEFAULT,
  64                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  65                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  66         },
  67         [2] = {
  68                 .hwport         = 2,
  69                 .flags          = 0,
  70                 .ucon           = SMDKV310_UCON_DEFAULT,
  71                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  72                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  73         },
  74         [3] = {
  75                 .hwport         = 3,
  76                 .flags          = 0,
  77                 .ucon           = SMDKV310_UCON_DEFAULT,
  78                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  79                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  80         },
  81 };
  82
  83 static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
  84         .cd_type                = S3C_SDHCI_CD_INTERNAL,
  85         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
  86 #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
  87         .max_width              = 8,
  88         .host_caps              = MMC_CAP_8_BIT_DATA,
  89 #endif
  90 };
  91
  92 static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
  93         .cd_type                = S3C_SDHCI_CD_GPIO,
  94         .ext_cd_gpio            = EXYNOS4_GPK0(2),
  95         .ext_cd_gpio_invert     = 1,
  96         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
  97 };
  98
  99 static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
 100         .cd_type                = S3C_SDHCI_CD_INTERNAL,
 101         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
 102 #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
 103         .max_width              = 8,
 104         .host_caps              = MMC_CAP_8_BIT_DATA,
 105 #endif
 106 };
 107
 108 static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
 109         .cd_type                = S3C_SDHCI_CD_GPIO,
 110         .ext_cd_gpio            = EXYNOS4_GPK2(2),
 111         .ext_cd_gpio_invert     = 1,
 112         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
 113 };
 114
 115 static struct resource smdkv310_smsc911x_resources[] = {
 116         [0] = {
 117                 .start  = EXYNOS4_PA_SROM_BANK(1),
 118                 .end    = EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,
 119                 .flags  = IORESOURCE_MEM,
 120         },
 121         [1] = {
 122                 .start  = IRQ_EINT(5),
 123                 .end    = IRQ_EINT(5),
 124                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
 125         },
 126 };
 127
 128 static struct smsc911x_platform_config smsc9215_config = {
 129         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
 130         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
 131         .flags          = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
 132         .phy_interface  = PHY_INTERFACE_MODE_MII,
 133         .mac            = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
 134 };
 135
 136 static struct platform_device smdkv310_smsc911x = {
 137         .name           = "smsc911x",
 138         .id             = -1,
 139         .num_resources  = ARRAY_SIZE(smdkv310_smsc911x_resources),
 140         .resource       = smdkv310_smsc911x_resources,
 141         .dev            = {
 142                 .platform_data  = &smsc9215_config,
 143         },
 144 };
 145
 146 static uint32_t smdkv310_keymap[] __initdata = {
 147         /* KEY(row, col, keycode) */
 148         KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
 149         KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
 150         KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
 151         KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
 152 };
 153
 154 static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
 155         .keymap         = smdkv310_keymap,
 156         .keymap_size    = ARRAY_SIZE(smdkv310_keymap),
 157 };
 158
 159 static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
 160         .keymap_data    = &smdkv310_keymap_data,
 161         .rows           = 2,
 162         .cols           = 8,
 163 };
 164
 165 static struct i2c_board_info i2c_devs1[] __initdata = {
 166         {I2C_BOARD_INFO("wm8994", 0x1a),},
 167 };
 168
 169 static struct platform_device *smdkv310_devices[] __initdata = {
 170         &s3c_device_hsmmc0,
 171         &s3c_device_hsmmc1,
 172         &s3c_device_hsmmc2,
 173         &s3c_device_hsmmc3,
 174         &s3c_device_i2c1,
 175         &s3c_device_rtc,
 176         &s3c_device_wdt,
 177         &exynos4_device_ac97,
 178         &exynos4_device_i2s0,
 179         &samsung_device_keypad,
 180         &exynos4_device_pd[PD_MFC],
 181         &exynos4_device_pd[PD_G3D],
 182         &exynos4_device_pd[PD_LCD0],
 183         &exynos4_device_pd[PD_LCD1],
 184         &exynos4_device_pd[PD_CAM],
 185         &exynos4_device_pd[PD_TV],
 186         &exynos4_device_pd[PD_GPS],
 187         &exynos4_device_spdif,
 188         &exynos4_device_sysmmu,
 189         &samsung_asoc_dma,
 190         &samsung_asoc_idma,
 191         &smdkv310_smsc911x,
 192         &exynos4_device_ahci,
 193 };
 194
 195 static void __init smdkv310_smsc911x_init(void)
 196 {
 197         u32 cs1;
 198
 199         /* configure nCS1 width to 16 bits */
 200         cs1 = __raw_readl(S5P_SROM_BW) &
 201                 ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
 202         cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
 203                 (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
 204                 (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
 205                 S5P_SROM_BW__NCS1__SHIFT;
 206         __raw_writel(cs1, S5P_SROM_BW);
 207
 208         /* set timing for nCS1 suitable for ethernet chip */
 209         __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
 210                      (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
 211                      (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
 212                      (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
 213                      (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
 214                      (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
 215                      (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
 216 }
 217
 218 /* LCD Backlight data */
 219 static struct samsung_bl_gpio_info smdkv310_bl_gpio_info = {
 220         .no = EXYNOS4_GPD0(1),
 221         .func = S3C_GPIO_SFN(2),
 222 };
 223
 224 static struct platform_pwm_backlight_data smdkv310_bl_data = {
 225         .pwm_id = 1,
 226         .pwm_period_ns  = 1000,
 227 };
 228
 229 static void __init smdkv310_map_io(void)
 230 {
 231         s5p_init_io(NULL, 0, S5P_VA_CHIPID);
 232         s3c24xx_init_clocks(24000000);
 233         s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
 234 }
 235
 236 static void __init smdkv310_machine_init(void)
 237 {
 238         s3c_i2c1_set_platdata(NULL);
 239         i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
 240
 241         smdkv310_smsc911x_init();
 242
 243         s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
 244         s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
 245         s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
 246         s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
 247
 248         samsung_keypad_set_platdata(&smdkv310_keypad_data);
 249
 250         samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
 251
 252         platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
 253 }
 254
 255 MACHINE_START(SMDKV310, "SMDKV310")
 256         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
 257         /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
 258         .boot_params    = S5P_PA_SDRAM + 0x100,
 259         .init_irq       = exynos4_init_irq,
 260         .map_io         = smdkv310_map_io,
 261         .init_machine   = smdkv310_machine_init,
 262         .timer          = &exynos4_timer,
 263 MACHINE_END