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e1000: Add enabled Jumbo frame support for 82573L
[linux-2.6/zen-sources.git] / drivers / net / e1000 / e1000_main.c
blob58561a4955e3bc6140c6f906942bc883074477a2
1 /*******************************************************************************
2
3
4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30
31 /* Change Log
32 * 6.3.9 12/16/2005
33 * o incorporate fix for recycled skbs from IBM LTC
34 * 6.3.7 11/18/2005
35 * o Honor eeprom setting for enabling/disabling Wake On Lan
36 * 6.3.5 11/17/2005
37 * o Fix memory leak in rx ring handling for PCI Express adapters
38 * 6.3.4 11/8/05
39 * o Patch from Jesper Juhl to remove redundant NULL checks for kfree
40 * 6.3.2 9/20/05
41 * o Render logic that sets/resets DRV_LOAD as inline functions to
42 * avoid code replication. If f/w is AMT then set DRV_LOAD only when
43 * network interface is open.
44 * o Handle DRV_LOAD set/reset in cases where AMT uses VLANs.
45 * o Adjust PBA partioning for Jumbo frames using MTU size and not
46 * rx_buffer_len
47 * 6.3.1 9/19/05
48 * o Use adapter->tx_timeout_factor in Tx Hung Detect logic
49 (e1000_clean_tx_irq)
50 * o Support for 8086:10B5 device (Quad Port)
51 * 6.2.14 9/15/05
52 * o In AMT enabled configurations, set/reset DRV_LOAD bit on interface
53 * open/close
54 * 6.2.13 9/14/05
55 * o Invoke e1000_check_mng_mode only for 8257x controllers since it
56 * accesses the FWSM that is not supported in other controllers
57 * 6.2.12 9/9/05
58 * o Add support for device id E1000_DEV_ID_82546GB_QUAD_COPPER
59 * o set RCTL:SECRC only for controllers newer than 82543.
60 * o When the n/w interface comes down reset DRV_LOAD bit to notify f/w.
61 * This code was moved from e1000_remove to e1000_close
62 * 6.2.10 9/6/05
63 * o Fix error in updating RDT in el1000_alloc_rx_buffers[_ps] -- one off.
64 * o Enable fc by default on 82573 controllers (do not read eeprom)
65 * o Fix rx_errors statistic not to include missed_packet_count
66 * o Fix rx_dropped statistic not to include missed_packet_count
67 (Padraig Brady)
68 * 6.2.9 8/30/05
69 * o Remove call to update statistics from the controller ib e1000_get_stats
70 * 6.2.8 8/30/05
71 * o Improved algorithm for rx buffer allocation/rdt update
72 * o Flow control watermarks relative to rx PBA size
73 * o Simplified 'Tx Hung' detect logic
74 * 6.2.7 8/17/05
75 * o Report rx buffer allocation failures and tx timeout counts in stats
76 * 6.2.6 8/16/05
77 * o Implement workaround for controller erratum -- linear non-tso packet
78 * following a TSO gets written back prematurely
79 * 6.2.5 8/15/05
80 * o Set netdev->tx_queue_len based on link speed/duplex settings.
81 * o Fix net_stats.rx_fifo_errors <p@draigBrady.com>
82 * o Do not power off PHY if SoL/IDER session is active
83 * 6.2.4 8/10/05
84 * o Fix loopback test setup/cleanup for 82571/3 controllers
85 * o Fix parsing of outgoing packets (e1000_transfer_dhcp_info) to treat
86 * all packets as raw
87 * o Prevent operations that will cause the PHY to be reset if SoL/IDER
88 * sessions are active and log a message
89 * 6.2.2 7/21/05
90 * o used fixed size descriptors for all MTU sizes, reduces memory load
91 * 6.1.2 4/13/05
92 * o Fixed ethtool diagnostics
93 * o Enabled flow control to take default eeprom settings
94 * o Added stats_lock around e1000_read_phy_reg commands to avoid concurrent
95 * calls, one from mii_ioctl and other from within update_stats while
96 * processing MIIREG ioctl.
97 */
98
99 char e1000_driver_name[] = "e1000";
100 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
101 #ifndef CONFIG_E1000_NAPI
102 #define DRIVERNAPI
103 #else
104 #define DRIVERNAPI "-NAPI"
105 #endif
106 #define DRV_VERSION "7.0.33-k2"DRIVERNAPI
107 char e1000_driver_version[] = DRV_VERSION;
108 static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
109
110 /* e1000_pci_tbl - PCI Device ID Table
111 *
112 * Last entry must be all 0s
113 *
114 * Macro expands to...
115 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
116 */
117 static struct pci_device_id e1000_pci_tbl[] = {
118 INTEL_E1000_ETHERNET_DEVICE(0x1000),
119 INTEL_E1000_ETHERNET_DEVICE(0x1001),
120 INTEL_E1000_ETHERNET_DEVICE(0x1004),
121 INTEL_E1000_ETHERNET_DEVICE(0x1008),
122 INTEL_E1000_ETHERNET_DEVICE(0x1009),
123 INTEL_E1000_ETHERNET_DEVICE(0x100C),
124 INTEL_E1000_ETHERNET_DEVICE(0x100D),
125 INTEL_E1000_ETHERNET_DEVICE(0x100E),
126 INTEL_E1000_ETHERNET_DEVICE(0x100F),
127 INTEL_E1000_ETHERNET_DEVICE(0x1010),
128 INTEL_E1000_ETHERNET_DEVICE(0x1011),
129 INTEL_E1000_ETHERNET_DEVICE(0x1012),
130 INTEL_E1000_ETHERNET_DEVICE(0x1013),
131 INTEL_E1000_ETHERNET_DEVICE(0x1014),
132 INTEL_E1000_ETHERNET_DEVICE(0x1015),
133 INTEL_E1000_ETHERNET_DEVICE(0x1016),
134 INTEL_E1000_ETHERNET_DEVICE(0x1017),
135 INTEL_E1000_ETHERNET_DEVICE(0x1018),
136 INTEL_E1000_ETHERNET_DEVICE(0x1019),
137 INTEL_E1000_ETHERNET_DEVICE(0x101A),
138 INTEL_E1000_ETHERNET_DEVICE(0x101D),
139 INTEL_E1000_ETHERNET_DEVICE(0x101E),
140 INTEL_E1000_ETHERNET_DEVICE(0x1026),
141 INTEL_E1000_ETHERNET_DEVICE(0x1027),
142 INTEL_E1000_ETHERNET_DEVICE(0x1028),
143 INTEL_E1000_ETHERNET_DEVICE(0x105E),
144 INTEL_E1000_ETHERNET_DEVICE(0x105F),
145 INTEL_E1000_ETHERNET_DEVICE(0x1060),
146 INTEL_E1000_ETHERNET_DEVICE(0x1075),
147 INTEL_E1000_ETHERNET_DEVICE(0x1076),
148 INTEL_E1000_ETHERNET_DEVICE(0x1077),
149 INTEL_E1000_ETHERNET_DEVICE(0x1078),
150 INTEL_E1000_ETHERNET_DEVICE(0x1079),
151 INTEL_E1000_ETHERNET_DEVICE(0x107A),
152 INTEL_E1000_ETHERNET_DEVICE(0x107B),
153 INTEL_E1000_ETHERNET_DEVICE(0x107C),
154 INTEL_E1000_ETHERNET_DEVICE(0x107D),
155 INTEL_E1000_ETHERNET_DEVICE(0x107E),
156 INTEL_E1000_ETHERNET_DEVICE(0x107F),
157 INTEL_E1000_ETHERNET_DEVICE(0x108A),
158 INTEL_E1000_ETHERNET_DEVICE(0x108B),
159 INTEL_E1000_ETHERNET_DEVICE(0x108C),
160 INTEL_E1000_ETHERNET_DEVICE(0x1099),
161 INTEL_E1000_ETHERNET_DEVICE(0x109A),
162 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
163 /* required last entry */
164 {0,}
165 };
166
167 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
168
169 int e1000_up(struct e1000_adapter *adapter);
170 void e1000_down(struct e1000_adapter *adapter);
171 void e1000_reset(struct e1000_adapter *adapter);
172 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
173 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
174 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
175 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
176 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
177 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
178 struct e1000_tx_ring *txdr);
179 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
180 struct e1000_rx_ring *rxdr);
181 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
182 struct e1000_tx_ring *tx_ring);
183 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
184 struct e1000_rx_ring *rx_ring);
185 void e1000_update_stats(struct e1000_adapter *adapter);
186
187 /* Local Function Prototypes */
188
189 static int e1000_init_module(void);
190 static void e1000_exit_module(void);
191 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
192 static void __devexit e1000_remove(struct pci_dev *pdev);
193 static int e1000_alloc_queues(struct e1000_adapter *adapter);
194 static int e1000_sw_init(struct e1000_adapter *adapter);
195 static int e1000_open(struct net_device *netdev);
196 static int e1000_close(struct net_device *netdev);
197 static void e1000_configure_tx(struct e1000_adapter *adapter);
198 static void e1000_configure_rx(struct e1000_adapter *adapter);
199 static void e1000_setup_rctl(struct e1000_adapter *adapter);
200 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
201 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
202 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
203 struct e1000_tx_ring *tx_ring);
204 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
205 struct e1000_rx_ring *rx_ring);
206 static void e1000_set_multi(struct net_device *netdev);
207 static void e1000_update_phy_info(unsigned long data);
208 static void e1000_watchdog(unsigned long data);
209 static void e1000_watchdog_task(struct e1000_adapter *adapter);
210 static void e1000_82547_tx_fifo_stall(unsigned long data);
211 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
212 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
213 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
214 static int e1000_set_mac(struct net_device *netdev, void *p);
215 static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
216 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
217 struct e1000_tx_ring *tx_ring);
218 #ifdef CONFIG_E1000_NAPI
219 static int e1000_clean(struct net_device *poll_dev, int *budget);
220 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
221 struct e1000_rx_ring *rx_ring,
222 int *work_done, int work_to_do);
223 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
224 struct e1000_rx_ring *rx_ring,
225 int *work_done, int work_to_do);
226 #else
227 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
228 struct e1000_rx_ring *rx_ring);
229 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
230 struct e1000_rx_ring *rx_ring);
231 #endif
232 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
233 struct e1000_rx_ring *rx_ring,
234 int cleaned_count);
235 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
236 struct e1000_rx_ring *rx_ring,
237 int cleaned_count);
238 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
239 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
240 int cmd);
241 void e1000_set_ethtool_ops(struct net_device *netdev);
242 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
243 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
244 static void e1000_tx_timeout(struct net_device *dev);
245 static void e1000_tx_timeout_task(struct net_device *dev);
246 static void e1000_smartspeed(struct e1000_adapter *adapter);
247 static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
248 struct sk_buff *skb);
249
250 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
251 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
252 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
253 static void e1000_restore_vlan(struct e1000_adapter *adapter);
254
255 #ifdef CONFIG_PM
256 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
257 static int e1000_resume(struct pci_dev *pdev);
258 #endif
259
260 #ifdef CONFIG_NET_POLL_CONTROLLER
261 /* for netdump / net console */
262 static void e1000_netpoll (struct net_device *netdev);
263 #endif
264
265
266 /* Exported from other modules */
267
268 extern void e1000_check_options(struct e1000_adapter *adapter);
269
270 static struct pci_driver e1000_driver = {
271 .name = e1000_driver_name,
272 .id_table = e1000_pci_tbl,
273 .probe = e1000_probe,
274 .remove = __devexit_p(e1000_remove),
275 /* Power Managment Hooks */
276 #ifdef CONFIG_PM
277 .suspend = e1000_suspend,
278 .resume = e1000_resume
279 #endif
280 };
281
282 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
283 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
284 MODULE_LICENSE("GPL");
285 MODULE_VERSION(DRV_VERSION);
286
287 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
288 module_param(debug, int, 0);
289 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
290
291 /**
292 * e1000_init_module - Driver Registration Routine
293 *
294 * e1000_init_module is the first routine called when the driver is
295 * loaded. All it does is register with the PCI subsystem.
296 **/
297
298 static int __init
299 e1000_init_module(void)
300 {
301 int ret;
302 printk(KERN_INFO "%s - version %s\n",
303 e1000_driver_string, e1000_driver_version);
304
305 printk(KERN_INFO "%s\n", e1000_copyright);
306
307 ret = pci_module_init(&e1000_driver);
308
309 return ret;
310 }
311
312 module_init(e1000_init_module);
313
314 /**
315 * e1000_exit_module - Driver Exit Cleanup Routine
316 *
317 * e1000_exit_module is called just before the driver is removed
318 * from memory.
319 **/
320
321 static void __exit
322 e1000_exit_module(void)
323 {
324 pci_unregister_driver(&e1000_driver);
325 }
326
327 module_exit(e1000_exit_module);
328
329 /**
330 * e1000_irq_disable - Mask off interrupt generation on the NIC
331 * @adapter: board private structure
332 **/
333
334 static inline void
335 e1000_irq_disable(struct e1000_adapter *adapter)
336 {
337 atomic_inc(&adapter->irq_sem);
338 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
339 E1000_WRITE_FLUSH(&adapter->hw);
340 synchronize_irq(adapter->pdev->irq);
341 }
342
343 /**
344 * e1000_irq_enable - Enable default interrupt generation settings
345 * @adapter: board private structure
346 **/
347
348 static inline void
349 e1000_irq_enable(struct e1000_adapter *adapter)
350 {
351 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
352 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
353 E1000_WRITE_FLUSH(&adapter->hw);
354 }
355 }
356
357 static void
358 e1000_update_mng_vlan(struct e1000_adapter *adapter)
359 {
360 struct net_device *netdev = adapter->netdev;
361 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
362 uint16_t old_vid = adapter->mng_vlan_id;
363 if (adapter->vlgrp) {
364 if (!adapter->vlgrp->vlan_devices[vid]) {
365 if (adapter->hw.mng_cookie.status &
366 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
367 e1000_vlan_rx_add_vid(netdev, vid);
368 adapter->mng_vlan_id = vid;
369 } else
370 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
371
372 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
373 (vid != old_vid) &&
374 !adapter->vlgrp->vlan_devices[old_vid])
375 e1000_vlan_rx_kill_vid(netdev, old_vid);
376 } else
377 adapter->mng_vlan_id = vid;
378 }
379 }
380
381 /**
382 * e1000_release_hw_control - release control of the h/w to f/w
383 * @adapter: address of board private structure
384 *
385 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
386 * For ASF and Pass Through versions of f/w this means that the
387 * driver is no longer loaded. For AMT version (only with 82573) i
388 * of the f/w this means that the netowrk i/f is closed.
389 *
390 **/
391
392 static inline void
393 e1000_release_hw_control(struct e1000_adapter *adapter)
394 {
395 uint32_t ctrl_ext;
396 uint32_t swsm;
397
398 /* Let firmware taken over control of h/w */
399 switch (adapter->hw.mac_type) {
400 case e1000_82571:
401 case e1000_82572:
402 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
403 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
404 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
405 break;
406 case e1000_82573:
407 swsm = E1000_READ_REG(&adapter->hw, SWSM);
408 E1000_WRITE_REG(&adapter->hw, SWSM,
409 swsm & ~E1000_SWSM_DRV_LOAD);
410 default:
411 break;
412 }
413 }
414
415 /**
416 * e1000_get_hw_control - get control of the h/w from f/w
417 * @adapter: address of board private structure
418 *
419 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
420 * For ASF and Pass Through versions of f/w this means that
421 * the driver is loaded. For AMT version (only with 82573)
422 * of the f/w this means that the netowrk i/f is open.
423 *
424 **/
425
426 static inline void
427 e1000_get_hw_control(struct e1000_adapter *adapter)
428 {
429 uint32_t ctrl_ext;
430 uint32_t swsm;
431 /* Let firmware know the driver has taken over */
432 switch (adapter->hw.mac_type) {
433 case e1000_82571:
434 case e1000_82572:
435 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
436 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
437 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
438 break;
439 case e1000_82573:
440 swsm = E1000_READ_REG(&adapter->hw, SWSM);
441 E1000_WRITE_REG(&adapter->hw, SWSM,
442 swsm | E1000_SWSM_DRV_LOAD);
443 break;
444 default:
445 break;
446 }
447 }
448
449 int
450 e1000_up(struct e1000_adapter *adapter)
451 {
452 struct net_device *netdev = adapter->netdev;
453 int i, err;
454
455 /* hardware has been reset, we need to reload some things */
456
457 /* Reset the PHY if it was previously powered down */
458 if (adapter->hw.media_type == e1000_media_type_copper) {
459 uint16_t mii_reg;
460 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
461 if (mii_reg & MII_CR_POWER_DOWN)
462 e1000_phy_reset(&adapter->hw);
463 }
464
465 e1000_set_multi(netdev);
466
467 e1000_restore_vlan(adapter);
468
469 e1000_configure_tx(adapter);
470 e1000_setup_rctl(adapter);
471 e1000_configure_rx(adapter);
472 /* call E1000_DESC_UNUSED which always leaves
473 * at least 1 descriptor unused to make sure
474 * next_to_use != next_to_clean */
475 for (i = 0; i < adapter->num_rx_queues; i++) {
476 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
477 adapter->alloc_rx_buf(adapter, ring,
478 E1000_DESC_UNUSED(ring));
479 }
480
481 #ifdef CONFIG_PCI_MSI
482 if (adapter->hw.mac_type > e1000_82547_rev_2) {
483 adapter->have_msi = TRUE;
484 if ((err = pci_enable_msi(adapter->pdev))) {
485 DPRINTK(PROBE, ERR,
486 "Unable to allocate MSI interrupt Error: %d\n", err);
487 adapter->have_msi = FALSE;
488 }
489 }
490 #endif
491 if ((err = request_irq(adapter->pdev->irq, &e1000_intr,
492 SA_SHIRQ | SA_SAMPLE_RANDOM,
493 netdev->name, netdev))) {
494 DPRINTK(PROBE, ERR,
495 "Unable to allocate interrupt Error: %d\n", err);
496 return err;
497 }
498
499 adapter->tx_queue_len = netdev->tx_queue_len;
500
501 mod_timer(&adapter->watchdog_timer, jiffies);
502
503 #ifdef CONFIG_E1000_NAPI
504 netif_poll_enable(netdev);
505 #endif
506 e1000_irq_enable(adapter);
507
508 return 0;
509 }
510
511 void
512 e1000_down(struct e1000_adapter *adapter)
513 {
514 struct net_device *netdev = adapter->netdev;
515 boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
516 e1000_check_mng_mode(&adapter->hw);
517
518 e1000_irq_disable(adapter);
519
520 free_irq(adapter->pdev->irq, netdev);
521 #ifdef CONFIG_PCI_MSI
522 if (adapter->hw.mac_type > e1000_82547_rev_2 &&
523 adapter->have_msi == TRUE)
524 pci_disable_msi(adapter->pdev);
525 #endif
526 del_timer_sync(&adapter->tx_fifo_stall_timer);
527 del_timer_sync(&adapter->watchdog_timer);
528 del_timer_sync(&adapter->phy_info_timer);
529
530 #ifdef CONFIG_E1000_NAPI
531 netif_poll_disable(netdev);
532 #endif
533 netdev->tx_queue_len = adapter->tx_queue_len;
534 adapter->link_speed = 0;
535 adapter->link_duplex = 0;
536 netif_carrier_off(netdev);
537 netif_stop_queue(netdev);
538
539 e1000_reset(adapter);
540 e1000_clean_all_tx_rings(adapter);
541 e1000_clean_all_rx_rings(adapter);
542
543 /* Power down the PHY so no link is implied when interface is down *
544 * The PHY cannot be powered down if any of the following is TRUE *
545 * (a) WoL is enabled
546 * (b) AMT is active
547 * (c) SoL/IDER session is active */
548 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
549 adapter->hw.media_type == e1000_media_type_copper &&
550 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
551 !mng_mode_enabled &&
552 !e1000_check_phy_reset_block(&adapter->hw)) {
553 uint16_t mii_reg;
554 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
555 mii_reg |= MII_CR_POWER_DOWN;
556 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
557 mdelay(1);
558 }
559 }
560
561 void
562 e1000_reset(struct e1000_adapter *adapter)
563 {
564 uint32_t pba, manc;
565 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
566
567 /* Repartition Pba for greater than 9k mtu
568 * To take effect CTRL.RST is required.
569 */
570
571 switch (adapter->hw.mac_type) {
572 case e1000_82547:
573 case e1000_82547_rev_2:
574 pba = E1000_PBA_30K;
575 break;
576 case e1000_82571:
577 case e1000_82572:
578 pba = E1000_PBA_38K;
579 break;
580 case e1000_82573:
581 pba = E1000_PBA_12K;
582 break;
583 default:
584 pba = E1000_PBA_48K;
585 break;
586 }
587
588 if ((adapter->hw.mac_type != e1000_82573) &&
589 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
590 pba -= 8; /* allocate more FIFO for Tx */
591
592
593 if (adapter->hw.mac_type == e1000_82547) {
594 adapter->tx_fifo_head = 0;
595 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
596 adapter->tx_fifo_size =
597 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
598 atomic_set(&adapter->tx_fifo_stall, 0);
599 }
600
601 E1000_WRITE_REG(&adapter->hw, PBA, pba);
602
603 /* flow control settings */
604 /* Set the FC high water mark to 90% of the FIFO size.
605 * Required to clear last 3 LSB */
606 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
607
608 adapter->hw.fc_high_water = fc_high_water_mark;
609 adapter->hw.fc_low_water = fc_high_water_mark - 8;
610 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
611 adapter->hw.fc_send_xon = 1;
612 adapter->hw.fc = adapter->hw.original_fc;
613
614 /* Allow time for pending master requests to run */
615 e1000_reset_hw(&adapter->hw);
616 if (adapter->hw.mac_type >= e1000_82544)
617 E1000_WRITE_REG(&adapter->hw, WUC, 0);
618 if (e1000_init_hw(&adapter->hw))
619 DPRINTK(PROBE, ERR, "Hardware Error\n");
620 e1000_update_mng_vlan(adapter);
621 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
622 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
623
624 e1000_reset_adaptive(&adapter->hw);
625 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
626 if (adapter->en_mng_pt) {
627 manc = E1000_READ_REG(&adapter->hw, MANC);
628 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
629 E1000_WRITE_REG(&adapter->hw, MANC, manc);
630 }
631 }
632
633 /**
634 * e1000_probe - Device Initialization Routine
635 * @pdev: PCI device information struct
636 * @ent: entry in e1000_pci_tbl
637 *
638 * Returns 0 on success, negative on failure
639 *
640 * e1000_probe initializes an adapter identified by a pci_dev structure.
641 * The OS initialization, configuring of the adapter private structure,
642 * and a hardware reset occur.
643 **/
644
645 static int __devinit
646 e1000_probe(struct pci_dev *pdev,
647 const struct pci_device_id *ent)
648 {
649 struct net_device *netdev;
650 struct e1000_adapter *adapter;
651 unsigned long mmio_start, mmio_len;
652
653 static int cards_found = 0;
654 static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
655 int i, err, pci_using_dac;
656 uint16_t eeprom_data;
657 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
658 if ((err = pci_enable_device(pdev)))
659 return err;
660
661 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
662 pci_using_dac = 1;
663 } else {
664 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
665 E1000_ERR("No usable DMA configuration, aborting\n");
666 return err;
667 }
668 pci_using_dac = 0;
669 }
670
671 if ((err = pci_request_regions(pdev, e1000_driver_name)))
672 return err;
673
674 pci_set_master(pdev);
675
676 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
677 if (!netdev) {
678 err = -ENOMEM;
679 goto err_alloc_etherdev;
680 }
681
682 SET_MODULE_OWNER(netdev);
683 SET_NETDEV_DEV(netdev, &pdev->dev);
684
685 pci_set_drvdata(pdev, netdev);
686 adapter = netdev_priv(netdev);
687 adapter->netdev = netdev;
688 adapter->pdev = pdev;
689 adapter->hw.back = adapter;
690 adapter->msg_enable = (1 << debug) - 1;
691
692 mmio_start = pci_resource_start(pdev, BAR_0);
693 mmio_len = pci_resource_len(pdev, BAR_0);
694
695 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
696 if (!adapter->hw.hw_addr) {
697 err = -EIO;
698 goto err_ioremap;
699 }
700
701 for (i = BAR_1; i <= BAR_5; i++) {
702 if (pci_resource_len(pdev, i) == 0)
703 continue;
704 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
705 adapter->hw.io_base = pci_resource_start(pdev, i);
706 break;
707 }
708 }
709
710 netdev->open = &e1000_open;
711 netdev->stop = &e1000_close;
712 netdev->hard_start_xmit = &e1000_xmit_frame;
713 netdev->get_stats = &e1000_get_stats;
714 netdev->set_multicast_list = &e1000_set_multi;
715 netdev->set_mac_address = &e1000_set_mac;
716 netdev->change_mtu = &e1000_change_mtu;
717 netdev->do_ioctl = &e1000_ioctl;
718 e1000_set_ethtool_ops(netdev);
719 netdev->tx_timeout = &e1000_tx_timeout;
720 netdev->watchdog_timeo = 5 * HZ;
721 #ifdef CONFIG_E1000_NAPI
722 netdev->poll = &e1000_clean;
723 netdev->weight = 64;
724 #endif
725 netdev->vlan_rx_register = e1000_vlan_rx_register;
726 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
727 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
728 #ifdef CONFIG_NET_POLL_CONTROLLER
729 netdev->poll_controller = e1000_netpoll;
730 #endif
731 strcpy(netdev->name, pci_name(pdev));
732
733 netdev->mem_start = mmio_start;
734 netdev->mem_end = mmio_start + mmio_len;
735 netdev->base_addr = adapter->hw.io_base;
736
737 adapter->bd_number = cards_found;
738
739 /* setup the private structure */
740
741 if ((err = e1000_sw_init(adapter)))
742 goto err_sw_init;
743
744 if ((err = e1000_check_phy_reset_block(&adapter->hw)))
745 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
746
747 /* if ksp3, indicate if it's port a being setup */
748 if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
749 e1000_ksp3_port_a == 0)
750 adapter->ksp3_port_a = 1;
751 e1000_ksp3_port_a++;
752 /* Reset for multiple KP3 adapters */
753 if (e1000_ksp3_port_a == 4)
754 e1000_ksp3_port_a = 0;
755
756 if (adapter->hw.mac_type >= e1000_82543) {
757 netdev->features = NETIF_F_SG |
758 NETIF_F_HW_CSUM |
759 NETIF_F_HW_VLAN_TX |
760 NETIF_F_HW_VLAN_RX |
761 NETIF_F_HW_VLAN_FILTER;
762 }
763
764 #ifdef NETIF_F_TSO
765 if ((adapter->hw.mac_type >= e1000_82544) &&
766 (adapter->hw.mac_type != e1000_82547))
767 netdev->features |= NETIF_F_TSO;
768
769 #ifdef NETIF_F_TSO_IPV6
770 if (adapter->hw.mac_type > e1000_82547_rev_2)
771 netdev->features |= NETIF_F_TSO_IPV6;
772 #endif
773 #endif
774 if (pci_using_dac)
775 netdev->features |= NETIF_F_HIGHDMA;
776
777 /* hard_start_xmit is safe against parallel locking */
778 netdev->features |= NETIF_F_LLTX;
779
780 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
781
782 /* before reading the EEPROM, reset the controller to
783 * put the device in a known good starting state */
784
785 e1000_reset_hw(&adapter->hw);
786
787 /* make sure the EEPROM is good */
788
789 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
790 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
791 err = -EIO;
792 goto err_eeprom;
793 }
794
795 /* copy the MAC address out of the EEPROM */
796
797 if (e1000_read_mac_addr(&adapter->hw))
798 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
799 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
800 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
801
802 if (!is_valid_ether_addr(netdev->perm_addr)) {
803 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
804 err = -EIO;
805 goto err_eeprom;
806 }
807
808 e1000_read_part_num(&adapter->hw, &(adapter->part_num));
809
810 e1000_get_bus_info(&adapter->hw);
811
812 init_timer(&adapter->tx_fifo_stall_timer);
813 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
814 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
815
816 init_timer(&adapter->watchdog_timer);
817 adapter->watchdog_timer.function = &e1000_watchdog;
818 adapter->watchdog_timer.data = (unsigned long) adapter;
819
820 INIT_WORK(&adapter->watchdog_task,
821 (void (*)(void *))e1000_watchdog_task, adapter);
822
823 init_timer(&adapter->phy_info_timer);
824 adapter->phy_info_timer.function = &e1000_update_phy_info;
825 adapter->phy_info_timer.data = (unsigned long) adapter;
826
827 INIT_WORK(&adapter->tx_timeout_task,
828 (void (*)(void *))e1000_tx_timeout_task, netdev);
829
830 /* we're going to reset, so assume we have no link for now */
831
832 netif_carrier_off(netdev);
833 netif_stop_queue(netdev);
834
835 e1000_check_options(adapter);
836
837 /* Initial Wake on LAN setting
838 * If APM wake is enabled in the EEPROM,
839 * enable the ACPI Magic Packet filter
840 */
841
842 switch (adapter->hw.mac_type) {
843 case e1000_82542_rev2_0:
844 case e1000_82542_rev2_1:
845 case e1000_82543:
846 break;
847 case e1000_82544:
848 e1000_read_eeprom(&adapter->hw,
849 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
850 eeprom_apme_mask = E1000_EEPROM_82544_APM;
851 break;
852 case e1000_82546:
853 case e1000_82546_rev_3:
854 case e1000_82571:
855 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
856 e1000_read_eeprom(&adapter->hw,
857 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
858 break;
859 }
860 /* Fall Through */
861 default:
862 e1000_read_eeprom(&adapter->hw,
863 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
864 break;
865 }
866 if (eeprom_data & eeprom_apme_mask)
867 adapter->wol |= E1000_WUFC_MAG;
868
869 /* print bus type/speed/width info */
870 {
871 struct e1000_hw *hw = &adapter->hw;
872 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
873 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
874 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
875 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
876 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
877 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
878 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
879 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
880 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
881 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
882 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
883 "32-bit"));
884 }
885
886 for (i = 0; i < 6; i++)
887 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
888
889 /* reset the hardware with the new settings */
890 e1000_reset(adapter);
891
892 /* If the controller is 82573 and f/w is AMT, do not set
893 * DRV_LOAD until the interface is up. For all other cases,
894 * let the f/w know that the h/w is now under the control
895 * of the driver. */
896 if (adapter->hw.mac_type != e1000_82573 ||
897 !e1000_check_mng_mode(&adapter->hw))
898 e1000_get_hw_control(adapter);
899
900 strcpy(netdev->name, "eth%d");
901 if ((err = register_netdev(netdev)))
902 goto err_register;
903
904 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
905
906 cards_found++;
907 return 0;
908
909 err_register:
910 err_sw_init:
911 err_eeprom:
912 iounmap(adapter->hw.hw_addr);
913 err_ioremap:
914 free_netdev(netdev);
915 err_alloc_etherdev:
916 pci_release_regions(pdev);
917 return err;
918 }
919
920 /**
921 * e1000_remove - Device Removal Routine
922 * @pdev: PCI device information struct
923 *
924 * e1000_remove is called by the PCI subsystem to alert the driver
925 * that it should release a PCI device. The could be caused by a
926 * Hot-Plug event, or because the driver is going to be removed from
927 * memory.
928 **/
929
930 static void __devexit
931 e1000_remove(struct pci_dev *pdev)
932 {
933 struct net_device *netdev = pci_get_drvdata(pdev);
934 struct e1000_adapter *adapter = netdev_priv(netdev);
935 uint32_t manc;
936 #ifdef CONFIG_E1000_NAPI
937 int i;
938 #endif
939
940 flush_scheduled_work();
941
942 if (adapter->hw.mac_type >= e1000_82540 &&
943 adapter->hw.media_type == e1000_media_type_copper) {
944 manc = E1000_READ_REG(&adapter->hw, MANC);
945 if (manc & E1000_MANC_SMBUS_EN) {
946 manc |= E1000_MANC_ARP_EN;
947 E1000_WRITE_REG(&adapter->hw, MANC, manc);
948 }
949 }
950
951 /* Release control of h/w to f/w. If f/w is AMT enabled, this
952 * would have already happened in close and is redundant. */
953 e1000_release_hw_control(adapter);
954
955 unregister_netdev(netdev);
956 #ifdef CONFIG_E1000_NAPI
957 for (i = 0; i < adapter->num_rx_queues; i++)
958 __dev_put(&adapter->polling_netdev[i]);
959 #endif
960
961 if (!e1000_check_phy_reset_block(&adapter->hw))
962 e1000_phy_hw_reset(&adapter->hw);
963
964 kfree(adapter->tx_ring);
965 kfree(adapter->rx_ring);
966 #ifdef CONFIG_E1000_NAPI
967 kfree(adapter->polling_netdev);
968 #endif
969
970 iounmap(adapter->hw.hw_addr);
971 pci_release_regions(pdev);
972
973 free_netdev(netdev);
974
975 pci_disable_device(pdev);
976 }
977
978 /**
979 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
980 * @adapter: board private structure to initialize
981 *
982 * e1000_sw_init initializes the Adapter private data structure.
983 * Fields are initialized based on PCI device information and
984 * OS network device settings (MTU size).
985 **/
986
987 static int __devinit
988 e1000_sw_init(struct e1000_adapter *adapter)
989 {
990 struct e1000_hw *hw = &adapter->hw;
991 struct net_device *netdev = adapter->netdev;
992 struct pci_dev *pdev = adapter->pdev;
993 #ifdef CONFIG_E1000_NAPI
994 int i;
995 #endif
996
997 /* PCI config space info */
998
999 hw->vendor_id = pdev->vendor;
1000 hw->device_id = pdev->device;
1001 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1002 hw->subsystem_id = pdev->subsystem_device;
1003
1004 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1005
1006 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1007
1008 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
1009 adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
1010 hw->max_frame_size = netdev->mtu +
1011 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1012 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1013
1014 /* identify the MAC */
1015
1016 if (e1000_set_mac_type(hw)) {
1017 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1018 return -EIO;
1019 }
1020
1021 /* initialize eeprom parameters */
1022
1023 if (e1000_init_eeprom_params(hw)) {
1024 E1000_ERR("EEPROM initialization failed\n");
1025 return -EIO;
1026 }
1027
1028 switch (hw->mac_type) {
1029 default:
1030 break;
1031 case e1000_82541:
1032 case e1000_82547:
1033 case e1000_82541_rev_2:
1034 case e1000_82547_rev_2:
1035 hw->phy_init_script = 1;
1036 break;
1037 }
1038
1039 e1000_set_media_type(hw);
1040
1041 hw->wait_autoneg_complete = FALSE;
1042 hw->tbi_compatibility_en = TRUE;
1043 hw->adaptive_ifs = TRUE;
1044
1045 /* Copper options */
1046
1047 if (hw->media_type == e1000_media_type_copper) {
1048 hw->mdix = AUTO_ALL_MODES;
1049 hw->disable_polarity_correction = FALSE;
1050 hw->master_slave = E1000_MASTER_SLAVE;
1051 }
1052
1053 adapter->num_tx_queues = 1;
1054 adapter->num_rx_queues = 1;
1055
1056 if (e1000_alloc_queues(adapter)) {
1057 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1058 return -ENOMEM;
1059 }
1060
1061 #ifdef CONFIG_E1000_NAPI
1062 for (i = 0; i < adapter->num_rx_queues; i++) {
1063 adapter->polling_netdev[i].priv = adapter;
1064 adapter->polling_netdev[i].poll = &e1000_clean;
1065 adapter->polling_netdev[i].weight = 64;
1066 dev_hold(&adapter->polling_netdev[i]);
1067 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1068 }
1069 spin_lock_init(&adapter->tx_queue_lock);
1070 #endif
1071
1072 atomic_set(&adapter->irq_sem, 1);
1073 spin_lock_init(&adapter->stats_lock);
1074
1075 return 0;
1076 }
1077
1078 /**
1079 * e1000_alloc_queues - Allocate memory for all rings
1080 * @adapter: board private structure to initialize
1081 *
1082 * We allocate one ring per queue at run-time since we don't know the
1083 * number of queues at compile-time. The polling_netdev array is
1084 * intended for Multiqueue, but should work fine with a single queue.
1085 **/
1086
1087 static int __devinit
1088 e1000_alloc_queues(struct e1000_adapter *adapter)
1089 {
1090 int size;
1091
1092 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
1093 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1094 if (!adapter->tx_ring)
1095 return -ENOMEM;
1096 memset(adapter->tx_ring, 0, size);
1097
1098 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
1099 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1100 if (!adapter->rx_ring) {
1101 kfree(adapter->tx_ring);
1102 return -ENOMEM;
1103 }
1104 memset(adapter->rx_ring, 0, size);
1105
1106 #ifdef CONFIG_E1000_NAPI
1107 size = sizeof(struct net_device) * adapter->num_rx_queues;
1108 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1109 if (!adapter->polling_netdev) {
1110 kfree(adapter->tx_ring);
1111 kfree(adapter->rx_ring);
1112 return -ENOMEM;
1113 }
1114 memset(adapter->polling_netdev, 0, size);
1115 #endif
1116
1117 return E1000_SUCCESS;
1118 }
1119
1120 /**
1121 * e1000_open - Called when a network interface is made active
1122 * @netdev: network interface device structure
1123 *
1124 * Returns 0 on success, negative value on failure
1125 *
1126 * The open entry point is called when a network interface is made
1127 * active by the system (IFF_UP). At this point all resources needed
1128 * for transmit and receive operations are allocated, the interrupt
1129 * handler is registered with the OS, the watchdog timer is started,
1130 * and the stack is notified that the interface is ready.
1131 **/
1132
1133 static int
1134 e1000_open(struct net_device *netdev)
1135 {
1136 struct e1000_adapter *adapter = netdev_priv(netdev);
1137 int err;
1138
1139 /* allocate transmit descriptors */
1140
1141 if ((err = e1000_setup_all_tx_resources(adapter)))
1142 goto err_setup_tx;
1143
1144 /* allocate receive descriptors */
1145
1146 if ((err = e1000_setup_all_rx_resources(adapter)))
1147 goto err_setup_rx;
1148
1149 if ((err = e1000_up(adapter)))
1150 goto err_up;
1151 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1152 if ((adapter->hw.mng_cookie.status &
1153 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1154 e1000_update_mng_vlan(adapter);
1155 }
1156
1157 /* If AMT is enabled, let the firmware know that the network
1158 * interface is now open */
1159 if (adapter->hw.mac_type == e1000_82573 &&
1160 e1000_check_mng_mode(&adapter->hw))
1161 e1000_get_hw_control(adapter);
1162
1163 return E1000_SUCCESS;
1164
1165 err_up:
1166 e1000_free_all_rx_resources(adapter);
1167 err_setup_rx:
1168 e1000_free_all_tx_resources(adapter);
1169 err_setup_tx:
1170 e1000_reset(adapter);
1171
1172 return err;
1173 }
1174
1175 /**
1176 * e1000_close - Disables a network interface
1177 * @netdev: network interface device structure
1178 *
1179 * Returns 0, this is not allowed to fail
1180 *
1181 * The close entry point is called when an interface is de-activated
1182 * by the OS. The hardware is still under the drivers control, but
1183 * needs to be disabled. A global MAC reset is issued to stop the
1184 * hardware, and all transmit and receive resources are freed.
1185 **/
1186
1187 static int
1188 e1000_close(struct net_device *netdev)
1189 {
1190 struct e1000_adapter *adapter = netdev_priv(netdev);
1191
1192 e1000_down(adapter);
1193
1194 e1000_free_all_tx_resources(adapter);
1195 e1000_free_all_rx_resources(adapter);
1196
1197 if ((adapter->hw.mng_cookie.status &
1198 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1199 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1200 }
1201
1202 /* If AMT is enabled, let the firmware know that the network
1203 * interface is now closed */
1204 if (adapter->hw.mac_type == e1000_82573 &&
1205 e1000_check_mng_mode(&adapter->hw))
1206 e1000_release_hw_control(adapter);
1207
1208 return 0;
1209 }
1210
1211 /**
1212 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1213 * @adapter: address of board private structure
1214 * @start: address of beginning of memory
1215 * @len: length of memory
1216 **/
1217 static inline boolean_t
1218 e1000_check_64k_bound(struct e1000_adapter *adapter,
1219 void *start, unsigned long len)
1220 {
1221 unsigned long begin = (unsigned long) start;
1222 unsigned long end = begin + len;
1223
1224 /* First rev 82545 and 82546 need to not allow any memory
1225 * write location to cross 64k boundary due to errata 23 */
1226 if (adapter->hw.mac_type == e1000_82545 ||
1227 adapter->hw.mac_type == e1000_82546) {
1228 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1229 }
1230
1231 return TRUE;
1232 }
1233
1234 /**
1235 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1236 * @adapter: board private structure
1237 * @txdr: tx descriptor ring (for a specific queue) to setup
1238 *
1239 * Return 0 on success, negative on failure
1240 **/
1241
1242 static int
1243 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1244 struct e1000_tx_ring *txdr)
1245 {
1246 struct pci_dev *pdev = adapter->pdev;
1247 int size;
1248
1249 size = sizeof(struct e1000_buffer) * txdr->count;
1250
1251 txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
1252 if (!txdr->buffer_info) {
1253 DPRINTK(PROBE, ERR,
1254 "Unable to allocate memory for the transmit descriptor ring\n");
1255 return -ENOMEM;
1256 }
1257 memset(txdr->buffer_info, 0, size);
1258
1259 /* round up to nearest 4K */
1260
1261 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1262 E1000_ROUNDUP(txdr->size, 4096);
1263
1264 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1265 if (!txdr->desc) {
1266 setup_tx_desc_die:
1267 vfree(txdr->buffer_info);
1268 DPRINTK(PROBE, ERR,
1269 "Unable to allocate memory for the transmit descriptor ring\n");
1270 return -ENOMEM;
1271 }
1272
1273 /* Fix for errata 23, can't cross 64kB boundary */
1274 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1275 void *olddesc = txdr->desc;
1276 dma_addr_t olddma = txdr->dma;
1277 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1278 "at %p\n", txdr->size, txdr->desc);
1279 /* Try again, without freeing the previous */
1280 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1281 /* Failed allocation, critical failure */
1282 if (!txdr->desc) {
1283 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1284 goto setup_tx_desc_die;
1285 }
1286
1287 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1288 /* give up */
1289 pci_free_consistent(pdev, txdr->size, txdr->desc,
1290 txdr->dma);
1291 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1292 DPRINTK(PROBE, ERR,
1293 "Unable to allocate aligned memory "
1294 "for the transmit descriptor ring\n");
1295 vfree(txdr->buffer_info);
1296 return -ENOMEM;
1297 } else {
1298 /* Free old allocation, new allocation was successful */
1299 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1300 }
1301 }
1302 memset(txdr->desc, 0, txdr->size);
1303
1304 txdr->next_to_use = 0;
1305 txdr->next_to_clean = 0;
1306 spin_lock_init(&txdr->tx_lock);
1307
1308 return 0;
1309 }
1310
1311 /**
1312 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1313 * (Descriptors) for all queues
1314 * @adapter: board private structure
1315 *
1316 * If this function returns with an error, then it's possible one or
1317 * more of the rings is populated (while the rest are not). It is the
1318 * callers duty to clean those orphaned rings.
1319 *
1320 * Return 0 on success, negative on failure
1321 **/
1322
1323 int
1324 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1325 {
1326 int i, err = 0;
1327
1328 for (i = 0; i < adapter->num_tx_queues; i++) {
1329 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1330 if (err) {
1331 DPRINTK(PROBE, ERR,
1332 "Allocation for Tx Queue %u failed\n", i);
1333 break;
1334 }
1335 }
1336
1337 return err;
1338 }
1339
1340 /**
1341 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1342 * @adapter: board private structure
1343 *
1344 * Configure the Tx unit of the MAC after a reset.
1345 **/
1346
1347 static void
1348 e1000_configure_tx(struct e1000_adapter *adapter)
1349 {
1350 uint64_t tdba;
1351 struct e1000_hw *hw = &adapter->hw;
1352 uint32_t tdlen, tctl, tipg, tarc;
1353 uint32_t ipgr1, ipgr2;
1354
1355 /* Setup the HW Tx Head and Tail descriptor pointers */
1356
1357 switch (adapter->num_tx_queues) {
1358 case 1:
1359 default:
1360 tdba = adapter->tx_ring[0].dma;
1361 tdlen = adapter->tx_ring[0].count *
1362 sizeof(struct e1000_tx_desc);
1363 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1364 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1365 E1000_WRITE_REG(hw, TDLEN, tdlen);
1366 E1000_WRITE_REG(hw, TDH, 0);
1367 E1000_WRITE_REG(hw, TDT, 0);
1368 adapter->tx_ring[0].tdh = E1000_TDH;
1369 adapter->tx_ring[0].tdt = E1000_TDT;
1370 break;
1371 }
1372
1373 /* Set the default values for the Tx Inter Packet Gap timer */
1374
1375 if (hw->media_type == e1000_media_type_fiber ||
1376 hw->media_type == e1000_media_type_internal_serdes)
1377 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1378 else
1379 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1380
1381 switch (hw->mac_type) {
1382 case e1000_82542_rev2_0:
1383 case e1000_82542_rev2_1:
1384 tipg = DEFAULT_82542_TIPG_IPGT;
1385 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1386 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1387 break;
1388 default:
1389 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1390 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1391 break;
1392 }
1393 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1394 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1395 E1000_WRITE_REG(hw, TIPG, tipg);
1396
1397 /* Set the Tx Interrupt Delay register */
1398
1399 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1400 if (hw->mac_type >= e1000_82540)
1401 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1402
1403 /* Program the Transmit Control Register */
1404
1405 tctl = E1000_READ_REG(hw, TCTL);
1406
1407 tctl &= ~E1000_TCTL_CT;
1408 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1409 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1410
1411 #ifdef DISABLE_MULR
1412 /* disable Multiple Reads for debugging */
1413 tctl &= ~E1000_TCTL_MULR;
1414 #endif
1415
1416 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1417 tarc = E1000_READ_REG(hw, TARC0);
1418 tarc |= ((1 << 25) | (1 << 21));
1419 E1000_WRITE_REG(hw, TARC0, tarc);
1420 tarc = E1000_READ_REG(hw, TARC1);
1421 tarc |= (1 << 25);
1422 if (tctl & E1000_TCTL_MULR)
1423 tarc &= ~(1 << 28);
1424 else
1425 tarc |= (1 << 28);
1426 E1000_WRITE_REG(hw, TARC1, tarc);
1427 }
1428
1429 e1000_config_collision_dist(hw);
1430
1431 /* Setup Transmit Descriptor Settings for eop descriptor */
1432 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1433 E1000_TXD_CMD_IFCS;
1434
1435 if (hw->mac_type < e1000_82543)
1436 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1437 else
1438 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1439
1440 /* Cache if we're 82544 running in PCI-X because we'll
1441 * need this to apply a workaround later in the send path. */
1442 if (hw->mac_type == e1000_82544 &&
1443 hw->bus_type == e1000_bus_type_pcix)
1444 adapter->pcix_82544 = 1;
1445
1446 E1000_WRITE_REG(hw, TCTL, tctl);
1447
1448 }
1449
1450 /**
1451 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1452 * @adapter: board private structure
1453 * @rxdr: rx descriptor ring (for a specific queue) to setup
1454 *
1455 * Returns 0 on success, negative on failure
1456 **/
1457
1458 static int
1459 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1460 struct e1000_rx_ring *rxdr)
1461 {
1462 struct pci_dev *pdev = adapter->pdev;
1463 int size, desc_len;
1464
1465 size = sizeof(struct e1000_buffer) * rxdr->count;
1466 rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
1467 if (!rxdr->buffer_info) {
1468 DPRINTK(PROBE, ERR,
1469 "Unable to allocate memory for the receive descriptor ring\n");
1470 return -ENOMEM;
1471 }
1472 memset(rxdr->buffer_info, 0, size);
1473
1474 size = sizeof(struct e1000_ps_page) * rxdr->count;
1475 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
1476 if (!rxdr->ps_page) {
1477 vfree(rxdr->buffer_info);
1478 DPRINTK(PROBE, ERR,
1479 "Unable to allocate memory for the receive descriptor ring\n");
1480 return -ENOMEM;
1481 }
1482 memset(rxdr->ps_page, 0, size);
1483
1484 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1485 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
1486 if (!rxdr->ps_page_dma) {
1487 vfree(rxdr->buffer_info);
1488 kfree(rxdr->ps_page);
1489 DPRINTK(PROBE, ERR,
1490 "Unable to allocate memory for the receive descriptor ring\n");
1491 return -ENOMEM;
1492 }
1493 memset(rxdr->ps_page_dma, 0, size);
1494
1495 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1496 desc_len = sizeof(struct e1000_rx_desc);
1497 else
1498 desc_len = sizeof(union e1000_rx_desc_packet_split);
1499
1500 /* Round up to nearest 4K */
1501
1502 rxdr->size = rxdr->count * desc_len;
1503 E1000_ROUNDUP(rxdr->size, 4096);
1504
1505 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1506
1507 if (!rxdr->desc) {
1508 DPRINTK(PROBE, ERR,
1509 "Unable to allocate memory for the receive descriptor ring\n");
1510 setup_rx_desc_die:
1511 vfree(rxdr->buffer_info);
1512 kfree(rxdr->ps_page);
1513 kfree(rxdr->ps_page_dma);
1514 return -ENOMEM;
1515 }
1516
1517 /* Fix for errata 23, can't cross 64kB boundary */
1518 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1519 void *olddesc = rxdr->desc;
1520 dma_addr_t olddma = rxdr->dma;
1521 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1522 "at %p\n", rxdr->size, rxdr->desc);
1523 /* Try again, without freeing the previous */
1524 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1525 /* Failed allocation, critical failure */
1526 if (!rxdr->desc) {
1527 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1528 DPRINTK(PROBE, ERR,
1529 "Unable to allocate memory "
1530 "for the receive descriptor ring\n");
1531 goto setup_rx_desc_die;
1532 }
1533
1534 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1535 /* give up */
1536 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1537 rxdr->dma);
1538 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1539 DPRINTK(PROBE, ERR,
1540 "Unable to allocate aligned memory "
1541 "for the receive descriptor ring\n");
1542 goto setup_rx_desc_die;
1543 } else {
1544 /* Free old allocation, new allocation was successful */
1545 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1546 }
1547 }
1548 memset(rxdr->desc, 0, rxdr->size);
1549
1550 rxdr->next_to_clean = 0;
1551 rxdr->next_to_use = 0;
1552
1553 return 0;
1554 }
1555
1556 /**
1557 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1558 * (Descriptors) for all queues
1559 * @adapter: board private structure
1560 *
1561 * If this function returns with an error, then it's possible one or
1562 * more of the rings is populated (while the rest are not). It is the
1563 * callers duty to clean those orphaned rings.
1564 *
1565 * Return 0 on success, negative on failure
1566 **/
1567
1568 int
1569 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1570 {
1571 int i, err = 0;
1572
1573 for (i = 0; i < adapter->num_rx_queues; i++) {
1574 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1575 if (err) {
1576 DPRINTK(PROBE, ERR,
1577 "Allocation for Rx Queue %u failed\n", i);
1578 break;
1579 }
1580 }
1581
1582 return err;
1583 }
1584
1585 /**
1586 * e1000_setup_rctl - configure the receive control registers
1587 * @adapter: Board private structure
1588 **/
1589 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1590 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1591 static void
1592 e1000_setup_rctl(struct e1000_adapter *adapter)
1593 {
1594 uint32_t rctl, rfctl;
1595 uint32_t psrctl = 0;
1596 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1597 uint32_t pages = 0;
1598 #endif
1599
1600 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1601
1602 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1603
1604 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1605 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1606 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1607
1608 if (adapter->hw.mac_type > e1000_82543)
1609 rctl |= E1000_RCTL_SECRC;
1610
1611 if (adapter->hw.tbi_compatibility_on == 1)
1612 rctl |= E1000_RCTL_SBP;
1613 else
1614 rctl &= ~E1000_RCTL_SBP;
1615
1616 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1617 rctl &= ~E1000_RCTL_LPE;
1618 else
1619 rctl |= E1000_RCTL_LPE;
1620
1621 /* Setup buffer sizes */
1622 if (adapter->hw.mac_type >= e1000_82571) {
1623 /* We can now specify buffers in 1K increments.
1624 * BSIZE and BSEX are ignored in this case. */
1625 rctl |= adapter->rx_buffer_len << 0x11;
1626 } else {
1627 rctl &= ~E1000_RCTL_SZ_4096;
1628 rctl |= E1000_RCTL_BSEX;
1629 switch (adapter->rx_buffer_len) {
1630 case E1000_RXBUFFER_2048:
1631 default:
1632 rctl |= E1000_RCTL_SZ_2048;
1633 rctl &= ~E1000_RCTL_BSEX;
1634 break;
1635 case E1000_RXBUFFER_4096:
1636 rctl |= E1000_RCTL_SZ_4096;
1637 break;
1638 case E1000_RXBUFFER_8192:
1639 rctl |= E1000_RCTL_SZ_8192;
1640 break;
1641 case E1000_RXBUFFER_16384:
1642 rctl |= E1000_RCTL_SZ_16384;
1643 break;
1644 }
1645 }
1646
1647 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1648 /* 82571 and greater support packet-split where the protocol
1649 * header is placed in skb->data and the packet data is
1650 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1651 * In the case of a non-split, skb->data is linearly filled,
1652 * followed by the page buffers. Therefore, skb->data is
1653 * sized to hold the largest protocol header.
1654 */
1655 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1656 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1657 PAGE_SIZE <= 16384)
1658 adapter->rx_ps_pages = pages;
1659 else
1660 adapter->rx_ps_pages = 0;
1661 #endif
1662 if (adapter->rx_ps_pages) {
1663 /* Configure extra packet-split registers */
1664 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1665 rfctl |= E1000_RFCTL_EXTEN;
1666 /* disable IPv6 packet split support */
1667 rfctl |= E1000_RFCTL_IPV6_DIS;
1668 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1669
1670 rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
1671
1672 psrctl |= adapter->rx_ps_bsize0 >>
1673 E1000_PSRCTL_BSIZE0_SHIFT;
1674
1675 switch (adapter->rx_ps_pages) {
1676 case 3:
1677 psrctl |= PAGE_SIZE <<
1678 E1000_PSRCTL_BSIZE3_SHIFT;
1679 case 2:
1680 psrctl |= PAGE_SIZE <<
1681 E1000_PSRCTL_BSIZE2_SHIFT;
1682 case 1:
1683 psrctl |= PAGE_SIZE >>
1684 E1000_PSRCTL_BSIZE1_SHIFT;
1685 break;
1686 }
1687
1688 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1689 }
1690
1691 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1692 }
1693
1694 /**
1695 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1696 * @adapter: board private structure
1697 *
1698 * Configure the Rx unit of the MAC after a reset.
1699 **/
1700
1701 static void
1702 e1000_configure_rx(struct e1000_adapter *adapter)
1703 {
1704 uint64_t rdba;
1705 struct e1000_hw *hw = &adapter->hw;
1706 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
1707
1708 if (adapter->rx_ps_pages) {
1709 rdlen = adapter->rx_ring[0].count *
1710 sizeof(union e1000_rx_desc_packet_split);
1711 adapter->clean_rx = e1000_clean_rx_irq_ps;
1712 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1713 } else {
1714 rdlen = adapter->rx_ring[0].count *
1715 sizeof(struct e1000_rx_desc);
1716 adapter->clean_rx = e1000_clean_rx_irq;
1717 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1718 }
1719
1720 /* disable receives while setting up the descriptors */
1721 rctl = E1000_READ_REG(hw, RCTL);
1722 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1723
1724 /* set the Receive Delay Timer Register */
1725 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1726
1727 if (hw->mac_type >= e1000_82540) {
1728 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
1729 if (adapter->itr > 1)
1730 E1000_WRITE_REG(hw, ITR,
1731 1000000000 / (adapter->itr * 256));
1732 }
1733
1734 if (hw->mac_type >= e1000_82571) {
1735 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1736 /* Reset delay timers after every interrupt */
1737 ctrl_ext |= E1000_CTRL_EXT_CANC;
1738 #ifdef CONFIG_E1000_NAPI
1739 /* Auto-Mask interrupts upon ICR read. */
1740 ctrl_ext |= E1000_CTRL_EXT_IAME;
1741 #endif
1742 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1743 E1000_WRITE_REG(hw, IAM, ~0);
1744 E1000_WRITE_FLUSH(hw);
1745 }
1746
1747 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1748 * the Base and Length of the Rx Descriptor Ring */
1749 switch (adapter->num_rx_queues) {
1750 case 1:
1751 default:
1752 rdba = adapter->rx_ring[0].dma;
1753 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1754 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1755 E1000_WRITE_REG(hw, RDLEN, rdlen);
1756 E1000_WRITE_REG(hw, RDH, 0);
1757 E1000_WRITE_REG(hw, RDT, 0);
1758 adapter->rx_ring[0].rdh = E1000_RDH;
1759 adapter->rx_ring[0].rdt = E1000_RDT;
1760 break;
1761 }
1762
1763 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
1764 if (hw->mac_type >= e1000_82543) {
1765 rxcsum = E1000_READ_REG(hw, RXCSUM);
1766 if (adapter->rx_csum == TRUE) {
1767 rxcsum |= E1000_RXCSUM_TUOFL;
1768
1769 /* Enable 82571 IPv4 payload checksum for UDP fragments
1770 * Must be used in conjunction with packet-split. */
1771 if ((hw->mac_type >= e1000_82571) &&
1772 (adapter->rx_ps_pages)) {
1773 rxcsum |= E1000_RXCSUM_IPPCSE;
1774 }
1775 } else {
1776 rxcsum &= ~E1000_RXCSUM_TUOFL;
1777 /* don't need to clear IPPCSE as it defaults to 0 */
1778 }
1779 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1780 }
1781
1782 if (hw->mac_type == e1000_82573)
1783 E1000_WRITE_REG(hw, ERT, 0x0100);
1784
1785 /* Enable Receives */
1786 E1000_WRITE_REG(hw, RCTL, rctl);
1787 }
1788
1789 /**
1790 * e1000_free_tx_resources - Free Tx Resources per Queue
1791 * @adapter: board private structure
1792 * @tx_ring: Tx descriptor ring for a specific queue
1793 *
1794 * Free all transmit software resources
1795 **/
1796
1797 static void
1798 e1000_free_tx_resources(struct e1000_adapter *adapter,
1799 struct e1000_tx_ring *tx_ring)
1800 {
1801 struct pci_dev *pdev = adapter->pdev;
1802
1803 e1000_clean_tx_ring(adapter, tx_ring);
1804
1805 vfree(tx_ring->buffer_info);
1806 tx_ring->buffer_info = NULL;
1807
1808 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1809
1810 tx_ring->desc = NULL;
1811 }
1812
1813 /**
1814 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1815 * @adapter: board private structure
1816 *
1817 * Free all transmit software resources
1818 **/
1819
1820 void
1821 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1822 {
1823 int i;
1824
1825 for (i = 0; i < adapter->num_tx_queues; i++)
1826 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1827 }
1828
1829 static inline void
1830 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1831 struct e1000_buffer *buffer_info)
1832 {
1833 if (buffer_info->dma) {
1834 pci_unmap_page(adapter->pdev,
1835 buffer_info->dma,
1836 buffer_info->length,
1837 PCI_DMA_TODEVICE);
1838 }
1839 if (buffer_info->skb)
1840 dev_kfree_skb_any(buffer_info->skb);
1841 memset(buffer_info, 0, sizeof(struct e1000_buffer));
1842 }
1843
1844 /**
1845 * e1000_clean_tx_ring - Free Tx Buffers
1846 * @adapter: board private structure
1847 * @tx_ring: ring to be cleaned
1848 **/
1849
1850 static void
1851 e1000_clean_tx_ring(struct e1000_adapter *adapter,
1852 struct e1000_tx_ring *tx_ring)
1853 {
1854 struct e1000_buffer *buffer_info;
1855 unsigned long size;
1856 unsigned int i;
1857
1858 /* Free all the Tx ring sk_buffs */
1859
1860 for (i = 0; i < tx_ring->count; i++) {
1861 buffer_info = &tx_ring->buffer_info[i];
1862 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1863 }
1864
1865 size = sizeof(struct e1000_buffer) * tx_ring->count;
1866 memset(tx_ring->buffer_info, 0, size);
1867
1868 /* Zero out the descriptor ring */
1869
1870 memset(tx_ring->desc, 0, tx_ring->size);
1871
1872 tx_ring->next_to_use = 0;
1873 tx_ring->next_to_clean = 0;
1874 tx_ring->last_tx_tso = 0;
1875
1876 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1877 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1878 }
1879
1880 /**
1881 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1882 * @adapter: board private structure
1883 **/
1884
1885 static void
1886 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
1887 {
1888 int i;
1889
1890 for (i = 0; i < adapter->num_tx_queues; i++)
1891 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1892 }
1893
1894 /**
1895 * e1000_free_rx_resources - Free Rx Resources
1896 * @adapter: board private structure
1897 * @rx_ring: ring to clean the resources from
1898 *
1899 * Free all receive software resources
1900 **/
1901
1902 static void
1903 e1000_free_rx_resources(struct e1000_adapter *adapter,
1904 struct e1000_rx_ring *rx_ring)
1905 {
1906 struct pci_dev *pdev = adapter->pdev;
1907
1908 e1000_clean_rx_ring(adapter, rx_ring);
1909
1910 vfree(rx_ring->buffer_info);
1911 rx_ring->buffer_info = NULL;
1912 kfree(rx_ring->ps_page);
1913 rx_ring->ps_page = NULL;
1914 kfree(rx_ring->ps_page_dma);
1915 rx_ring->ps_page_dma = NULL;
1916
1917 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1918
1919 rx_ring->desc = NULL;
1920 }
1921
1922 /**
1923 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1924 * @adapter: board private structure
1925 *
1926 * Free all receive software resources
1927 **/
1928
1929 void
1930 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
1931 {
1932 int i;
1933
1934 for (i = 0; i < adapter->num_rx_queues; i++)
1935 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
1936 }
1937
1938 /**
1939 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1940 * @adapter: board private structure
1941 * @rx_ring: ring to free buffers from
1942 **/
1943
1944 static void
1945 e1000_clean_rx_ring(struct e1000_adapter *adapter,
1946 struct e1000_rx_ring *rx_ring)
1947 {
1948 struct e1000_buffer *buffer_info;
1949 struct e1000_ps_page *ps_page;
1950 struct e1000_ps_page_dma *ps_page_dma;
1951 struct pci_dev *pdev = adapter->pdev;
1952 unsigned long size;
1953 unsigned int i, j;
1954
1955 /* Free all the Rx ring sk_buffs */
1956 for (i = 0; i < rx_ring->count; i++) {
1957 buffer_info = &rx_ring->buffer_info[i];
1958 if (buffer_info->skb) {
1959 pci_unmap_single(pdev,
1960 buffer_info->dma,
1961 buffer_info->length,
1962 PCI_DMA_FROMDEVICE);
1963
1964 dev_kfree_skb(buffer_info->skb);
1965 buffer_info->skb = NULL;
1966 }
1967 ps_page = &rx_ring->ps_page[i];
1968 ps_page_dma = &rx_ring->ps_page_dma[i];
1969 for (j = 0; j < adapter->rx_ps_pages; j++) {
1970 if (!ps_page->ps_page[j]) break;
1971 pci_unmap_page(pdev,
1972 ps_page_dma->ps_page_dma[j],
1973 PAGE_SIZE, PCI_DMA_FROMDEVICE);
1974 ps_page_dma->ps_page_dma[j] = 0;
1975 put_page(ps_page->ps_page[j]);
1976 ps_page->ps_page[j] = NULL;
1977 }
1978 }
1979
1980 size = sizeof(struct e1000_buffer) * rx_ring->count;
1981 memset(rx_ring->buffer_info, 0, size);
1982 size = sizeof(struct e1000_ps_page) * rx_ring->count;
1983 memset(rx_ring->ps_page, 0, size);
1984 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
1985 memset(rx_ring->ps_page_dma, 0, size);
1986
1987 /* Zero out the descriptor ring */
1988
1989 memset(rx_ring->desc, 0, rx_ring->size);
1990
1991 rx_ring->next_to_clean = 0;
1992 rx_ring->next_to_use = 0;
1993
1994 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
1995 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
1996 }
1997
1998 /**
1999 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2000 * @adapter: board private structure
2001 **/
2002
2003 static void
2004 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2005 {
2006 int i;
2007
2008 for (i = 0; i < adapter->num_rx_queues; i++)
2009 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2010 }
2011
2012 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2013 * and memory write and invalidate disabled for certain operations
2014 */
2015 static void
2016 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2017 {
2018 struct net_device *netdev = adapter->netdev;
2019 uint32_t rctl;
2020
2021 e1000_pci_clear_mwi(&adapter->hw);
2022
2023 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2024 rctl |= E1000_RCTL_RST;
2025 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2026 E1000_WRITE_FLUSH(&adapter->hw);
2027 mdelay(5);
2028
2029 if (netif_running(netdev))
2030 e1000_clean_all_rx_rings(adapter);
2031 }
2032
2033 static void
2034 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2035 {
2036 struct net_device *netdev = adapter->netdev;
2037 uint32_t rctl;
2038
2039 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2040 rctl &= ~E1000_RCTL_RST;
2041 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2042 E1000_WRITE_FLUSH(&adapter->hw);
2043 mdelay(5);
2044
2045 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2046 e1000_pci_set_mwi(&adapter->hw);
2047
2048 if (netif_running(netdev)) {
2049 /* No need to loop, because 82542 supports only 1 queue */
2050 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2051 e1000_configure_rx(adapter);
2052 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2053 }
2054 }
2055
2056 /**
2057 * e1000_set_mac - Change the Ethernet Address of the NIC
2058 * @netdev: network interface device structure
2059 * @p: pointer to an address structure
2060 *
2061 * Returns 0 on success, negative on failure
2062 **/
2063
2064 static int
2065 e1000_set_mac(struct net_device *netdev, void *p)
2066 {
2067 struct e1000_adapter *adapter = netdev_priv(netdev);
2068 struct sockaddr *addr = p;
2069
2070 if (!is_valid_ether_addr(addr->sa_data))
2071 return -EADDRNOTAVAIL;
2072
2073 /* 82542 2.0 needs to be in reset to write receive address registers */
2074
2075 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2076 e1000_enter_82542_rst(adapter);
2077
2078 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2079 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2080
2081 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2082
2083 /* With 82571 controllers, LAA may be overwritten (with the default)
2084 * due to controller reset from the other port. */
2085 if (adapter->hw.mac_type == e1000_82571) {
2086 /* activate the work around */
2087 adapter->hw.laa_is_present = 1;
2088
2089 /* Hold a copy of the LAA in RAR[14] This is done so that
2090 * between the time RAR[0] gets clobbered and the time it
2091 * gets fixed (in e1000_watchdog), the actual LAA is in one
2092 * of the RARs and no incoming packets directed to this port
2093 * are dropped. Eventaully the LAA will be in RAR[0] and
2094 * RAR[14] */
2095 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2096 E1000_RAR_ENTRIES - 1);
2097 }
2098
2099 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2100 e1000_leave_82542_rst(adapter);
2101
2102 return 0;
2103 }
2104
2105 /**
2106 * e1000_set_multi - Multicast and Promiscuous mode set
2107 * @netdev: network interface device structure
2108 *
2109 * The set_multi entry point is called whenever the multicast address
2110 * list or the network interface flags are updated. This routine is
2111 * responsible for configuring the hardware for proper multicast,
2112 * promiscuous mode, and all-multi behavior.
2113 **/
2114
2115 static void
2116 e1000_set_multi(struct net_device *netdev)
2117 {
2118 struct e1000_adapter *adapter = netdev_priv(netdev);
2119 struct e1000_hw *hw = &adapter->hw;
2120 struct dev_mc_list *mc_ptr;
2121 uint32_t rctl;
2122 uint32_t hash_value;
2123 int i, rar_entries = E1000_RAR_ENTRIES;
2124
2125 /* reserve RAR[14] for LAA over-write work-around */
2126 if (adapter->hw.mac_type == e1000_82571)
2127 rar_entries--;
2128
2129 /* Check for Promiscuous and All Multicast modes */
2130
2131 rctl = E1000_READ_REG(hw, RCTL);
2132
2133 if (netdev->flags & IFF_PROMISC) {
2134 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2135 } else if (netdev->flags & IFF_ALLMULTI) {
2136 rctl |= E1000_RCTL_MPE;
2137 rctl &= ~E1000_RCTL_UPE;
2138 } else {
2139 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2140 }
2141
2142 E1000_WRITE_REG(hw, RCTL, rctl);
2143
2144 /* 82542 2.0 needs to be in reset to write receive address registers */
2145
2146 if (hw->mac_type == e1000_82542_rev2_0)
2147 e1000_enter_82542_rst(adapter);
2148
2149 /* load the first 14 multicast address into the exact filters 1-14
2150 * RAR 0 is used for the station MAC adddress
2151 * if there are not 14 addresses, go ahead and clear the filters
2152 * -- with 82571 controllers only 0-13 entries are filled here
2153 */
2154 mc_ptr = netdev->mc_list;
2155
2156 for (i = 1; i < rar_entries; i++) {
2157 if (mc_ptr) {
2158 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2159 mc_ptr = mc_ptr->next;
2160 } else {
2161 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2162 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2163 }
2164 }
2165
2166 /* clear the old settings from the multicast hash table */
2167
2168 for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
2169 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2170
2171 /* load any remaining addresses into the hash table */
2172
2173 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2174 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2175 e1000_mta_set(hw, hash_value);
2176 }
2177
2178 if (hw->mac_type == e1000_82542_rev2_0)
2179 e1000_leave_82542_rst(adapter);
2180 }
2181
2182 /* Need to wait a few seconds after link up to get diagnostic information from
2183 * the phy */
2184
2185 static void
2186 e1000_update_phy_info(unsigned long data)
2187 {
2188 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2189 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2190 }
2191
2192 /**
2193 * e1000_82547_tx_fifo_stall - Timer Call-back
2194 * @data: pointer to adapter cast into an unsigned long
2195 **/
2196
2197 static void
2198 e1000_82547_tx_fifo_stall(unsigned long data)
2199 {
2200 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2201 struct net_device *netdev = adapter->netdev;
2202 uint32_t tctl;
2203
2204 if (atomic_read(&adapter->tx_fifo_stall)) {
2205 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2206 E1000_READ_REG(&adapter->hw, TDH)) &&
2207 (E1000_READ_REG(&adapter->hw, TDFT) ==
2208 E1000_READ_REG(&adapter->hw, TDFH)) &&
2209 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2210 E1000_READ_REG(&adapter->hw, TDFHS))) {
2211 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2212 E1000_WRITE_REG(&adapter->hw, TCTL,
2213 tctl & ~E1000_TCTL_EN);
2214 E1000_WRITE_REG(&adapter->hw, TDFT,
2215 adapter->tx_head_addr);
2216 E1000_WRITE_REG(&adapter->hw, TDFH,
2217 adapter->tx_head_addr);
2218 E1000_WRITE_REG(&adapter->hw, TDFTS,
2219 adapter->tx_head_addr);
2220 E1000_WRITE_REG(&adapter->hw, TDFHS,
2221 adapter->tx_head_addr);
2222 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2223 E1000_WRITE_FLUSH(&adapter->hw);
2224
2225 adapter->tx_fifo_head = 0;
2226 atomic_set(&adapter->tx_fifo_stall, 0);
2227 netif_wake_queue(netdev);
2228 } else {
2229 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2230 }
2231 }
2232 }
2233
2234 /**
2235 * e1000_watchdog - Timer Call-back
2236 * @data: pointer to adapter cast into an unsigned long
2237 **/
2238 static void
2239 e1000_watchdog(unsigned long data)
2240 {
2241 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2242
2243 /* Do the rest outside of interrupt context */
2244 schedule_work(&adapter->watchdog_task);
2245 }
2246
2247 static void
2248 e1000_watchdog_task(struct e1000_adapter *adapter)
2249 {
2250 struct net_device *netdev = adapter->netdev;
2251 struct e1000_tx_ring *txdr = adapter->tx_ring;
2252 uint32_t link, tctl;
2253
2254 e1000_check_for_link(&adapter->hw);
2255 if (adapter->hw.mac_type == e1000_82573) {
2256 e1000_enable_tx_pkt_filtering(&adapter->hw);
2257 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2258 e1000_update_mng_vlan(adapter);
2259 }
2260
2261 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2262 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2263 link = !adapter->hw.serdes_link_down;
2264 else
2265 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2266
2267 if (link) {
2268 if (!netif_carrier_ok(netdev)) {
2269 e1000_get_speed_and_duplex(&adapter->hw,
2270 &adapter->link_speed,
2271 &adapter->link_duplex);
2272
2273 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2274 adapter->link_speed,
2275 adapter->link_duplex == FULL_DUPLEX ?
2276 "Full Duplex" : "Half Duplex");
2277
2278 /* tweak tx_queue_len according to speed/duplex
2279 * and adjust the timeout factor */
2280 netdev->tx_queue_len = adapter->tx_queue_len;
2281 adapter->tx_timeout_factor = 1;
2282 adapter->txb2b = 1;
2283 switch (adapter->link_speed) {
2284 case SPEED_10:
2285 adapter->txb2b = 0;
2286 netdev->tx_queue_len = 10;
2287 adapter->tx_timeout_factor = 8;
2288 break;
2289 case SPEED_100:
2290 adapter->txb2b = 0;
2291 netdev->tx_queue_len = 100;
2292 /* maybe add some timeout factor ? */
2293 break;
2294 }
2295
2296 if ((adapter->hw.mac_type == e1000_82571 ||
2297 adapter->hw.mac_type == e1000_82572) &&
2298 adapter->txb2b == 0) {
2299 #define SPEED_MODE_BIT (1 << 21)
2300 uint32_t tarc0;
2301 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2302 tarc0 &= ~SPEED_MODE_BIT;
2303 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2304 }
2305
2306 #ifdef NETIF_F_TSO
2307 /* disable TSO for pcie and 10/100 speeds, to avoid
2308 * some hardware issues */
2309 if (!adapter->tso_force &&
2310 adapter->hw.bus_type == e1000_bus_type_pci_express){
2311 switch (adapter->link_speed) {
2312 case SPEED_10:
2313 case SPEED_100:
2314 DPRINTK(PROBE,INFO,
2315 "10/100 speed: disabling TSO\n");
2316 netdev->features &= ~NETIF_F_TSO;
2317 break;
2318 case SPEED_1000:
2319 netdev->features |= NETIF_F_TSO;
2320 break;
2321 default:
2322 /* oops */
2323 break;
2324 }
2325 }
2326 #endif
2327
2328 /* enable transmits in the hardware, need to do this
2329 * after setting TARC0 */
2330 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2331 tctl |= E1000_TCTL_EN;
2332 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2333
2334 netif_carrier_on(netdev);
2335 netif_wake_queue(netdev);
2336 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2337 adapter->smartspeed = 0;
2338 }
2339 } else {
2340 if (netif_carrier_ok(netdev)) {
2341 adapter->link_speed = 0;
2342 adapter->link_duplex = 0;
2343 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2344 netif_carrier_off(netdev);
2345 netif_stop_queue(netdev);
2346 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2347 }
2348
2349 e1000_smartspeed(adapter);
2350 }
2351
2352 e1000_update_stats(adapter);
2353
2354 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2355 adapter->tpt_old = adapter->stats.tpt;
2356 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2357 adapter->colc_old = adapter->stats.colc;
2358
2359 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2360 adapter->gorcl_old = adapter->stats.gorcl;
2361 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2362 adapter->gotcl_old = adapter->stats.gotcl;
2363
2364 e1000_update_adaptive(&adapter->hw);
2365
2366 if (!netif_carrier_ok(netdev)) {
2367 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2368 /* We've lost link, so the controller stops DMA,
2369 * but we've got queued Tx work that's never going
2370 * to get done, so reset controller to flush Tx.
2371 * (Do the reset outside of interrupt context). */
2372 schedule_work(&adapter->tx_timeout_task);
2373 }
2374 }
2375
2376 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
2377 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
2378 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2379 * asymmetrical Tx or Rx gets ITR=8000; everyone
2380 * else is between 2000-8000. */
2381 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
2382 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
2383 adapter->gotcl - adapter->gorcl :
2384 adapter->gorcl - adapter->gotcl) / 10000;
2385 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2386 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2387 }
2388
2389 /* Cause software interrupt to ensure rx ring is cleaned */
2390 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2391
2392 /* Force detection of hung controller every watchdog period */
2393 adapter->detect_tx_hung = TRUE;
2394
2395 /* With 82571 controllers, LAA may be overwritten due to controller
2396 * reset from the other port. Set the appropriate LAA in RAR[0] */
2397 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2398 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2399
2400 /* Reset the timer */
2401 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2402 }
2403
2404 #define E1000_TX_FLAGS_CSUM 0x00000001
2405 #define E1000_TX_FLAGS_VLAN 0x00000002
2406 #define E1000_TX_FLAGS_TSO 0x00000004
2407 #define E1000_TX_FLAGS_IPV4 0x00000008
2408 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2409 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2410
2411 static inline int
2412 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2413 struct sk_buff *skb)
2414 {
2415 #ifdef NETIF_F_TSO
2416 struct e1000_context_desc *context_desc;
2417 struct e1000_buffer *buffer_info;
2418 unsigned int i;
2419 uint32_t cmd_length = 0;
2420 uint16_t ipcse = 0, tucse, mss;
2421 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2422 int err;
2423
2424 if (skb_shinfo(skb)->tso_size) {
2425 if (skb_header_cloned(skb)) {
2426 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2427 if (err)
2428 return err;
2429 }
2430
2431 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2432 mss = skb_shinfo(skb)->tso_size;
2433 if (skb->protocol == ntohs(ETH_P_IP)) {
2434 skb->nh.iph->tot_len = 0;
2435 skb->nh.iph->check = 0;
2436 skb->h.th->check =
2437 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2438 skb->nh.iph->daddr,
2439 0,
2440 IPPROTO_TCP,
2441 0);
2442 cmd_length = E1000_TXD_CMD_IP;
2443 ipcse = skb->h.raw - skb->data - 1;
2444 #ifdef NETIF_F_TSO_IPV6
2445 } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
2446 skb->nh.ipv6h->payload_len = 0;
2447 skb->h.th->check =
2448 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2449 &skb->nh.ipv6h->daddr,
2450 0,
2451 IPPROTO_TCP,
2452 0);
2453 ipcse = 0;
2454 #endif
2455 }
2456 ipcss = skb->nh.raw - skb->data;
2457 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
2458 tucss = skb->h.raw - skb->data;
2459 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2460 tucse = 0;
2461
2462 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2463 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2464
2465 i = tx_ring->next_to_use;
2466 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2467 buffer_info = &tx_ring->buffer_info[i];
2468
2469 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2470 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2471 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2472 context_desc->upper_setup.tcp_fields.tucss = tucss;
2473 context_desc->upper_setup.tcp_fields.tucso = tucso;
2474 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2475 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2476 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2477 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2478
2479 buffer_info->time_stamp = jiffies;
2480
2481 if (++i == tx_ring->count) i = 0;
2482 tx_ring->next_to_use = i;
2483
2484 return TRUE;
2485 }
2486 #endif
2487
2488 return FALSE;
2489 }
2490
2491 static inline boolean_t
2492 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2493 struct sk_buff *skb)
2494 {
2495 struct e1000_context_desc *context_desc;
2496 struct e1000_buffer *buffer_info;
2497 unsigned int i;
2498 uint8_t css;
2499
2500 if (likely(skb->ip_summed == CHECKSUM_HW)) {
2501 css = skb->h.raw - skb->data;
2502
2503 i = tx_ring->next_to_use;
2504 buffer_info = &tx_ring->buffer_info[i];
2505 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2506
2507 context_desc->upper_setup.tcp_fields.tucss = css;
2508 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2509 context_desc->upper_setup.tcp_fields.tucse = 0;
2510 context_desc->tcp_seg_setup.data = 0;
2511 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2512
2513 buffer_info->time_stamp = jiffies;
2514
2515 if (unlikely(++i == tx_ring->count)) i = 0;
2516 tx_ring->next_to_use = i;
2517
2518 return TRUE;
2519 }
2520
2521 return FALSE;
2522 }
2523
2524 #define E1000_MAX_TXD_PWR 12
2525 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2526
2527 static inline int
2528 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2529 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2530 unsigned int nr_frags, unsigned int mss)
2531 {
2532 struct e1000_buffer *buffer_info;
2533 unsigned int len = skb->len;
2534 unsigned int offset = 0, size, count = 0, i;
2535 unsigned int f;
2536 len -= skb->data_len;
2537
2538 i = tx_ring->next_to_use;
2539
2540 while (len) {
2541 buffer_info = &tx_ring->buffer_info[i];
2542 size = min(len, max_per_txd);
2543 #ifdef NETIF_F_TSO
2544 /* Workaround for Controller erratum --
2545 * descriptor for non-tso packet in a linear SKB that follows a
2546 * tso gets written back prematurely before the data is fully
2547 * DMAd to the controller */
2548 if (!skb->data_len && tx_ring->last_tx_tso &&
2549 !skb_shinfo(skb)->tso_size) {
2550 tx_ring->last_tx_tso = 0;
2551 size -= 4;
2552 }
2553
2554 /* Workaround for premature desc write-backs
2555 * in TSO mode. Append 4-byte sentinel desc */
2556 if (unlikely(mss && !nr_frags && size == len && size > 8))
2557 size -= 4;
2558 #endif
2559 /* work-around for errata 10 and it applies
2560 * to all controllers in PCI-X mode
2561 * The fix is to make sure that the first descriptor of a
2562 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2563 */
2564 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2565 (size > 2015) && count == 0))
2566 size = 2015;
2567
2568 /* Workaround for potential 82544 hang in PCI-X. Avoid
2569 * terminating buffers within evenly-aligned dwords. */
2570 if (unlikely(adapter->pcix_82544 &&
2571 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2572 size > 4))
2573 size -= 4;
2574
2575 buffer_info->length = size;
2576 buffer_info->dma =
2577 pci_map_single(adapter->pdev,
2578 skb->data + offset,
2579 size,
2580 PCI_DMA_TODEVICE);
2581 buffer_info->time_stamp = jiffies;
2582
2583 len -= size;
2584 offset += size;
2585 count++;
2586 if (unlikely(++i == tx_ring->count)) i = 0;
2587 }
2588
2589 for (f = 0; f < nr_frags; f++) {
2590 struct skb_frag_struct *frag;
2591
2592 frag = &skb_shinfo(skb)->frags[f];
2593 len = frag->size;
2594 offset = frag->page_offset;
2595
2596 while (len) {
2597 buffer_info = &tx_ring->buffer_info[i];
2598 size = min(len, max_per_txd);
2599 #ifdef NETIF_F_TSO
2600 /* Workaround for premature desc write-backs
2601 * in TSO mode. Append 4-byte sentinel desc */
2602 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
2603 size -= 4;
2604 #endif
2605 /* Workaround for potential 82544 hang in PCI-X.
2606 * Avoid terminating buffers within evenly-aligned
2607 * dwords. */
2608 if (unlikely(adapter->pcix_82544 &&
2609 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2610 size > 4))
2611 size -= 4;
2612
2613 buffer_info->length = size;
2614 buffer_info->dma =
2615 pci_map_page(adapter->pdev,
2616 frag->page,
2617 offset,
2618 size,
2619 PCI_DMA_TODEVICE);
2620 buffer_info->time_stamp = jiffies;
2621
2622 len -= size;
2623 offset += size;
2624 count++;
2625 if (unlikely(++i == tx_ring->count)) i = 0;
2626 }
2627 }
2628
2629 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2630 tx_ring->buffer_info[i].skb = skb;
2631 tx_ring->buffer_info[first].next_to_watch = i;
2632
2633 return count;
2634 }
2635
2636 static inline void
2637 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2638 int tx_flags, int count)
2639 {
2640 struct e1000_tx_desc *tx_desc = NULL;
2641 struct e1000_buffer *buffer_info;
2642 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2643 unsigned int i;
2644
2645 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
2646 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2647 E1000_TXD_CMD_TSE;
2648 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2649
2650 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2651 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2652 }
2653
2654 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
2655 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2656 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2657 }
2658
2659 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
2660 txd_lower |= E1000_TXD_CMD_VLE;
2661 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2662 }
2663
2664 i = tx_ring->next_to_use;
2665
2666 while (count--) {
2667 buffer_info = &tx_ring->buffer_info[i];
2668 tx_desc = E1000_TX_DESC(*tx_ring, i);
2669 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2670 tx_desc->lower.data =
2671 cpu_to_le32(txd_lower | buffer_info->length);
2672 tx_desc->upper.data = cpu_to_le32(txd_upper);
2673 if (unlikely(++i == tx_ring->count)) i = 0;
2674 }
2675
2676 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2677
2678 /* Force memory writes to complete before letting h/w
2679 * know there are new descriptors to fetch. (Only
2680 * applicable for weak-ordered memory model archs,
2681 * such as IA-64). */
2682 wmb();
2683
2684 tx_ring->next_to_use = i;
2685 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
2686 }
2687
2688 /**
2689 * 82547 workaround to avoid controller hang in half-duplex environment.
2690 * The workaround is to avoid queuing a large packet that would span
2691 * the internal Tx FIFO ring boundary by notifying the stack to resend
2692 * the packet at a later time. This gives the Tx FIFO an opportunity to
2693 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2694 * to the beginning of the Tx FIFO.
2695 **/
2696
2697 #define E1000_FIFO_HDR 0x10
2698 #define E1000_82547_PAD_LEN 0x3E0
2699
2700 static inline int
2701 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2702 {
2703 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2704 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2705
2706 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2707
2708 if (adapter->link_duplex != HALF_DUPLEX)
2709 goto no_fifo_stall_required;
2710
2711 if (atomic_read(&adapter->tx_fifo_stall))
2712 return 1;
2713
2714 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
2715 atomic_set(&adapter->tx_fifo_stall, 1);
2716 return 1;
2717 }
2718
2719 no_fifo_stall_required:
2720 adapter->tx_fifo_head += skb_fifo_len;
2721 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
2722 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2723 return 0;
2724 }
2725
2726 #define MINIMUM_DHCP_PACKET_SIZE 282
2727 static inline int
2728 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2729 {
2730 struct e1000_hw *hw = &adapter->hw;
2731 uint16_t length, offset;
2732 if (vlan_tx_tag_present(skb)) {
2733 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2734 ( adapter->hw.mng_cookie.status &
2735 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2736 return 0;
2737 }
2738 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2739 struct ethhdr *eth = (struct ethhdr *) skb->data;
2740 if ((htons(ETH_P_IP) == eth->h_proto)) {
2741 const struct iphdr *ip =
2742 (struct iphdr *)((uint8_t *)skb->data+14);
2743 if (IPPROTO_UDP == ip->protocol) {
2744 struct udphdr *udp =
2745 (struct udphdr *)((uint8_t *)ip +
2746 (ip->ihl << 2));
2747 if (ntohs(udp->dest) == 67) {
2748 offset = (uint8_t *)udp + 8 - skb->data;
2749 length = skb->len - offset;
2750
2751 return e1000_mng_write_dhcp_info(hw,
2752 (uint8_t *)udp + 8,
2753 length);
2754 }
2755 }
2756 }
2757 }
2758 return 0;
2759 }
2760
2761 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2762 static int
2763 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2764 {
2765 struct e1000_adapter *adapter = netdev_priv(netdev);
2766 struct e1000_tx_ring *tx_ring;
2767 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2768 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2769 unsigned int tx_flags = 0;
2770 unsigned int len = skb->len;
2771 unsigned long flags;
2772 unsigned int nr_frags = 0;
2773 unsigned int mss = 0;
2774 int count = 0;
2775 int tso;
2776 unsigned int f;
2777 len -= skb->data_len;
2778
2779 tx_ring = adapter->tx_ring;
2780
2781 if (unlikely(skb->len <= 0)) {
2782 dev_kfree_skb_any(skb);
2783 return NETDEV_TX_OK;
2784 }
2785
2786 #ifdef NETIF_F_TSO
2787 mss = skb_shinfo(skb)->tso_size;
2788 /* The controller does a simple calculation to
2789 * make sure there is enough room in the FIFO before
2790 * initiating the DMA for each buffer. The calc is:
2791 * 4 = ceil(buffer len/mss). To make sure we don't
2792 * overrun the FIFO, adjust the max buffer len if mss
2793 * drops. */
2794 if (mss) {
2795 uint8_t hdr_len;
2796 max_per_txd = min(mss << 2, max_per_txd);
2797 max_txd_pwr = fls(max_per_txd) - 1;
2798
2799 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
2800 * points to just header, pull a few bytes of payload from
2801 * frags into skb->data */
2802 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2803 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
2804 switch (adapter->hw.mac_type) {
2805 unsigned int pull_size;
2806 case e1000_82571:
2807 case e1000_82572:
2808 case e1000_82573:
2809 pull_size = min((unsigned int)4, skb->data_len);
2810 if (!__pskb_pull_tail(skb, pull_size)) {
2811 printk(KERN_ERR
2812 "__pskb_pull_tail failed.\n");
2813 dev_kfree_skb_any(skb);
2814 return -EFAULT;
2815 }
2816 len = skb->len - skb->data_len;
2817 break;
2818 default:
2819 /* do nothing */
2820 break;
2821 }
2822 }
2823 }
2824
2825 /* reserve a descriptor for the offload context */
2826 if ((mss) || (skb->ip_summed == CHECKSUM_HW))
2827 count++;
2828 count++;
2829 #else
2830 if (skb->ip_summed == CHECKSUM_HW)
2831 count++;
2832 #endif
2833
2834 #ifdef NETIF_F_TSO
2835 /* Controller Erratum workaround */
2836 if (!skb->data_len && tx_ring->last_tx_tso &&
2837 !skb_shinfo(skb)->tso_size)
2838 count++;
2839 #endif
2840
2841 count += TXD_USE_COUNT(len, max_txd_pwr);
2842
2843 if (adapter->pcix_82544)
2844 count++;
2845
2846 /* work-around for errata 10 and it applies to all controllers
2847 * in PCI-X mode, so add one more descriptor to the count
2848 */
2849 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2850 (len > 2015)))
2851 count++;
2852
2853 nr_frags = skb_shinfo(skb)->nr_frags;
2854 for (f = 0; f < nr_frags; f++)
2855 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2856 max_txd_pwr);
2857 if (adapter->pcix_82544)
2858 count += nr_frags;
2859
2860 if (adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
2861 e1000_transfer_dhcp_info(adapter, skb);
2862
2863 local_irq_save(flags);
2864 if (!spin_trylock(&tx_ring->tx_lock)) {
2865 /* Collision - tell upper layer to requeue */
2866 local_irq_restore(flags);
2867 return NETDEV_TX_LOCKED;
2868 }
2869
2870 /* need: count + 2 desc gap to keep tail from touching
2871 * head, otherwise try next time */
2872 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
2873 netif_stop_queue(netdev);
2874 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2875 return NETDEV_TX_BUSY;
2876 }
2877
2878 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
2879 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
2880 netif_stop_queue(netdev);
2881 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
2882 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2883 return NETDEV_TX_BUSY;
2884 }
2885 }
2886
2887 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
2888 tx_flags |= E1000_TX_FLAGS_VLAN;
2889 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2890 }
2891
2892 first = tx_ring->next_to_use;
2893
2894 tso = e1000_tso(adapter, tx_ring, skb);
2895 if (tso < 0) {
2896 dev_kfree_skb_any(skb);
2897 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2898 return NETDEV_TX_OK;
2899 }
2900
2901 if (likely(tso)) {
2902 tx_ring->last_tx_tso = 1;
2903 tx_flags |= E1000_TX_FLAGS_TSO;
2904 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
2905 tx_flags |= E1000_TX_FLAGS_CSUM;
2906
2907 /* Old method was to assume IPv4 packet by default if TSO was enabled.
2908 * 82571 hardware supports TSO capabilities for IPv6 as well...
2909 * no longer assume, we must. */
2910 if (likely(skb->protocol == ntohs(ETH_P_IP)))
2911 tx_flags |= E1000_TX_FLAGS_IPV4;
2912
2913 e1000_tx_queue(adapter, tx_ring, tx_flags,
2914 e1000_tx_map(adapter, tx_ring, skb, first,
2915 max_per_txd, nr_frags, mss));
2916
2917 netdev->trans_start = jiffies;
2918
2919 /* Make sure there is space in the ring for the next send. */
2920 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
2921 netif_stop_queue(netdev);
2922
2923 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2924 return NETDEV_TX_OK;
2925 }
2926
2927 /**
2928 * e1000_tx_timeout - Respond to a Tx Hang
2929 * @netdev: network interface device structure
2930 **/
2931
2932 static void
2933 e1000_tx_timeout(struct net_device *netdev)
2934 {
2935 struct e1000_adapter *adapter = netdev_priv(netdev);
2936
2937 /* Do the reset outside of interrupt context */
2938 schedule_work(&adapter->tx_timeout_task);
2939 }
2940
2941 static void
2942 e1000_tx_timeout_task(struct net_device *netdev)
2943 {
2944 struct e1000_adapter *adapter = netdev_priv(netdev);
2945
2946 adapter->tx_timeout_count++;
2947 e1000_down(adapter);
2948 e1000_up(adapter);
2949 }
2950
2951 /**
2952 * e1000_get_stats - Get System Network Statistics
2953 * @netdev: network interface device structure
2954 *
2955 * Returns the address of the device statistics structure.
2956 * The statistics are actually updated from the timer callback.
2957 **/
2958
2959 static struct net_device_stats *
2960 e1000_get_stats(struct net_device *netdev)
2961 {
2962 struct e1000_adapter *adapter = netdev_priv(netdev);
2963
2964 /* only return the current stats */
2965 return &adapter->net_stats;
2966 }
2967
2968 /**
2969 * e1000_change_mtu - Change the Maximum Transfer Unit
2970 * @netdev: network interface device structure
2971 * @new_mtu: new value for maximum frame size
2972 *
2973 * Returns 0 on success, negative on failure
2974 **/
2975
2976 static int
2977 e1000_change_mtu(struct net_device *netdev, int new_mtu)
2978 {
2979 struct e1000_adapter *adapter = netdev_priv(netdev);
2980 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
2981 uint16_t eeprom_data = 0;
2982
2983 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
2984 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
2985 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
2986 return -EINVAL;
2987 }
2988
2989 /* Adapter-specific max frame size limits. */
2990 switch (adapter->hw.mac_type) {
2991 case e1000_82542_rev2_0:
2992 case e1000_82542_rev2_1:
2993 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
2994 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2995 return -EINVAL;
2996 }
2997 break;
2998 case e1000_82573:
2999 /* only enable jumbo frames if ASPM is disabled completely
3000 * this means both bits must be zero in 0x1A bits 3:2 */
3001 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3002 &eeprom_data);
3003 if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
3004 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3005 DPRINTK(PROBE, ERR,
3006 "Jumbo Frames not supported.\n");
3007 return -EINVAL;
3008 }
3009 break;
3010 }
3011 /* fall through to get support */
3012 case e1000_82571:
3013 case e1000_82572:
3014 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3015 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3016 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3017 return -EINVAL;
3018 }
3019 break;
3020 default:
3021 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3022 break;
3023 }
3024
3025
3026 if (adapter->hw.mac_type > e1000_82547_rev_2) {
3027 adapter->rx_buffer_len = max_frame;
3028 E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
3029 } else {
3030 if(unlikely((adapter->hw.mac_type < e1000_82543) &&
3031 (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
3032 DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
3033 "on 82542\n");
3034 return -EINVAL;
3035 } else {
3036 if(max_frame <= E1000_RXBUFFER_2048)
3037 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3038 else if(max_frame <= E1000_RXBUFFER_4096)
3039 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3040 else if(max_frame <= E1000_RXBUFFER_8192)
3041 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3042 else if(max_frame <= E1000_RXBUFFER_16384)
3043 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3044 }
3045 }
3046
3047 netdev->mtu = new_mtu;
3048
3049 if (netif_running(netdev)) {
3050 e1000_down(adapter);
3051 e1000_up(adapter);
3052 }
3053
3054 adapter->hw.max_frame_size = max_frame;
3055
3056 return 0;
3057 }
3058
3059 /**
3060 * e1000_update_stats - Update the board statistics counters
3061 * @adapter: board private structure
3062 **/
3063
3064 void
3065 e1000_update_stats(struct e1000_adapter *adapter)
3066 {
3067 struct e1000_hw *hw = &adapter->hw;
3068 unsigned long flags;
3069 uint16_t phy_tmp;
3070
3071 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3072
3073 spin_lock_irqsave(&adapter->stats_lock, flags);
3074
3075 /* these counters are modified from e1000_adjust_tbi_stats,
3076 * called from the interrupt context, so they must only
3077 * be written while holding adapter->stats_lock
3078 */
3079
3080 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3081 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3082 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3083 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3084 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3085 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3086 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3087 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3088 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3089 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3090 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3091 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3092 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3093
3094 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3095 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3096 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3097 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3098 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3099 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3100 adapter->stats.dc += E1000_READ_REG(hw, DC);
3101 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3102 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3103 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3104 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3105 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3106 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3107 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3108 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3109 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3110 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3111 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3112 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3113 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3114 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3115 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3116 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3117 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3118 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3119 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3120 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3121 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3122 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3123 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3124 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3125 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3126 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3127 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3128
3129 /* used for adaptive IFS */
3130
3131 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3132 adapter->stats.tpt += hw->tx_packet_delta;
3133 hw->collision_delta = E1000_READ_REG(hw, COLC);
3134 adapter->stats.colc += hw->collision_delta;
3135
3136 if (hw->mac_type >= e1000_82543) {
3137 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3138 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3139 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3140 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3141 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3142 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3143 }
3144 if (hw->mac_type > e1000_82547_rev_2) {
3145 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3146 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3147 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3148 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3149 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3150 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3151 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3152 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3153 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3154 }
3155
3156 /* Fill out the OS statistics structure */
3157
3158 adapter->net_stats.rx_packets = adapter->stats.gprc;
3159 adapter->net_stats.tx_packets = adapter->stats.gptc;
3160 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3161 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3162 adapter->net_stats.multicast = adapter->stats.mprc;
3163 adapter->net_stats.collisions = adapter->stats.colc;
3164
3165 /* Rx Errors */
3166
3167 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3168 adapter->stats.crcerrs + adapter->stats.algnerrc +
3169 adapter->stats.rlec + adapter->stats.cexterr;
3170 adapter->net_stats.rx_dropped = 0;
3171 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3172 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3173 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3174 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3175
3176 /* Tx Errors */
3177
3178 adapter->net_stats.tx_errors = adapter->stats.ecol +
3179 adapter->stats.latecol;
3180 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3181 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3182 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3183
3184 /* Tx Dropped needs to be maintained elsewhere */
3185
3186 /* Phy Stats */
3187
3188 if (hw->media_type == e1000_media_type_copper) {
3189 if ((adapter->link_speed == SPEED_1000) &&
3190 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3191 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3192 adapter->phy_stats.idle_errors += phy_tmp;
3193 }
3194
3195 if ((hw->mac_type <= e1000_82546) &&
3196 (hw->phy_type == e1000_phy_m88) &&
3197 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3198 adapter->phy_stats.receive_errors += phy_tmp;
3199 }
3200
3201 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3202 }
3203
3204 /**
3205 * e1000_intr - Interrupt Handler
3206 * @irq: interrupt number
3207 * @data: pointer to a network interface device structure
3208 * @pt_regs: CPU registers structure
3209 **/
3210
3211 static irqreturn_t
3212 e1000_intr(int irq, void *data, struct pt_regs *regs)
3213 {
3214 struct net_device *netdev = data;
3215 struct e1000_adapter *adapter = netdev_priv(netdev);
3216 struct e1000_hw *hw = &adapter->hw;
3217 uint32_t icr = E1000_READ_REG(hw, ICR);
3218 #ifndef CONFIG_E1000_NAPI
3219 int i;
3220 #else
3221 /* Interrupt Auto-Mask...upon reading ICR,
3222 * interrupts are masked. No need for the
3223 * IMC write, but it does mean we should
3224 * account for it ASAP. */
3225 if (likely(hw->mac_type >= e1000_82571))
3226 atomic_inc(&adapter->irq_sem);
3227 #endif
3228
3229 if (unlikely(!icr)) {
3230 #ifdef CONFIG_E1000_NAPI
3231 if (hw->mac_type >= e1000_82571)
3232 e1000_irq_enable(adapter);
3233 #endif
3234 return IRQ_NONE; /* Not our interrupt */
3235 }
3236
3237 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3238 hw->get_link_status = 1;
3239 mod_timer(&adapter->watchdog_timer, jiffies);
3240 }
3241
3242 #ifdef CONFIG_E1000_NAPI
3243 if (unlikely(hw->mac_type < e1000_82571)) {
3244 atomic_inc(&adapter->irq_sem);
3245 E1000_WRITE_REG(hw, IMC, ~0);
3246 E1000_WRITE_FLUSH(hw);
3247 }
3248 if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
3249 __netif_rx_schedule(&adapter->polling_netdev[0]);
3250 else
3251 e1000_irq_enable(adapter);
3252 #else
3253 /* Writing IMC and IMS is needed for 82547.
3254 * Due to Hub Link bus being occupied, an interrupt
3255 * de-assertion message is not able to be sent.
3256 * When an interrupt assertion message is generated later,
3257 * two messages are re-ordered and sent out.
3258 * That causes APIC to think 82547 is in de-assertion
3259 * state, while 82547 is in assertion state, resulting
3260 * in dead lock. Writing IMC forces 82547 into
3261 * de-assertion state.
3262 */
3263 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3264 atomic_inc(&adapter->irq_sem);
3265 E1000_WRITE_REG(hw, IMC, ~0);
3266 }
3267
3268 for (i = 0; i < E1000_MAX_INTR; i++)
3269 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3270 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3271 break;
3272
3273 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3274 e1000_irq_enable(adapter);
3275
3276 #endif
3277
3278 return IRQ_HANDLED;
3279 }
3280
3281 #ifdef CONFIG_E1000_NAPI
3282 /**
3283 * e1000_clean - NAPI Rx polling callback
3284 * @adapter: board private structure
3285 **/
3286
3287 static int
3288 e1000_clean(struct net_device *poll_dev, int *budget)
3289 {
3290 struct e1000_adapter *adapter;
3291 int work_to_do = min(*budget, poll_dev->quota);
3292 int tx_cleaned = 0, i = 0, work_done = 0;
3293
3294 /* Must NOT use netdev_priv macro here. */
3295 adapter = poll_dev->priv;
3296
3297 /* Keep link state information with original netdev */
3298 if (!netif_carrier_ok(adapter->netdev))
3299 goto quit_polling;
3300
3301 while (poll_dev != &adapter->polling_netdev[i]) {
3302 i++;
3303 if (unlikely(i == adapter->num_rx_queues))
3304 BUG();
3305 }
3306
3307 if (likely(adapter->num_tx_queues == 1)) {
3308 /* e1000_clean is called per-cpu. This lock protects
3309 * tx_ring[0] from being cleaned by multiple cpus
3310 * simultaneously. A failure obtaining the lock means
3311 * tx_ring[0] is currently being cleaned anyway. */
3312 if (spin_trylock(&adapter->tx_queue_lock)) {
3313 tx_cleaned = e1000_clean_tx_irq(adapter,
3314 &adapter->tx_ring[0]);
3315 spin_unlock(&adapter->tx_queue_lock);
3316 }
3317 } else
3318 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
3319
3320 adapter->clean_rx(adapter, &adapter->rx_ring[i],
3321 &work_done, work_to_do);
3322
3323 *budget -= work_done;
3324 poll_dev->quota -= work_done;
3325
3326 /* If no Tx and not enough Rx work done, exit the polling mode */
3327 if ((!tx_cleaned && (work_done == 0)) ||
3328 !netif_running(adapter->netdev)) {
3329 quit_polling:
3330 netif_rx_complete(poll_dev);
3331 e1000_irq_enable(adapter);
3332 return 0;
3333 }
3334
3335 return 1;
3336 }
3337
3338 #endif
3339 /**
3340 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3341 * @adapter: board private structure
3342 **/
3343
3344 static boolean_t
3345 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3346 struct e1000_tx_ring *tx_ring)
3347 {
3348 struct net_device *netdev = adapter->netdev;
3349 struct e1000_tx_desc *tx_desc, *eop_desc;
3350 struct e1000_buffer *buffer_info;
3351 unsigned int i, eop;
3352 boolean_t cleaned = FALSE;
3353
3354 i = tx_ring->next_to_clean;
3355 eop = tx_ring->buffer_info[i].next_to_watch;
3356 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3357
3358 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3359 for (cleaned = FALSE; !cleaned; ) {
3360 tx_desc = E1000_TX_DESC(*tx_ring, i);
3361 buffer_info = &tx_ring->buffer_info[i];
3362 cleaned = (i == eop);
3363
3364 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
3365 memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
3366
3367 if (unlikely(++i == tx_ring->count)) i = 0;
3368 }
3369
3370
3371 eop = tx_ring->buffer_info[i].next_to_watch;
3372 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3373 }
3374
3375 tx_ring->next_to_clean = i;
3376
3377 spin_lock(&tx_ring->tx_lock);
3378
3379 if (unlikely(cleaned && netif_queue_stopped(netdev) &&
3380 netif_carrier_ok(netdev)))
3381 netif_wake_queue(netdev);
3382
3383 spin_unlock(&tx_ring->tx_lock);
3384
3385 if (adapter->detect_tx_hung) {
3386 /* Detect a transmit hang in hardware, this serializes the
3387 * check with the clearing of time_stamp and movement of i */
3388 adapter->detect_tx_hung = FALSE;
3389 if (tx_ring->buffer_info[eop].dma &&
3390 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
3391 (adapter->tx_timeout_factor * HZ))
3392 && !(E1000_READ_REG(&adapter->hw, STATUS) &
3393 E1000_STATUS_TXOFF)) {
3394
3395 /* detected Tx unit hang */
3396 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
3397 " Tx Queue <%lu>\n"
3398 " TDH <%x>\n"
3399 " TDT <%x>\n"
3400 " next_to_use <%x>\n"
3401 " next_to_clean <%x>\n"
3402 "buffer_info[next_to_clean]\n"
3403 " time_stamp <%lx>\n"
3404 " next_to_watch <%x>\n"
3405 " jiffies <%lx>\n"
3406 " next_to_watch.status <%x>\n",
3407 (unsigned long)((tx_ring - adapter->tx_ring) /
3408 sizeof(struct e1000_tx_ring)),
3409 readl(adapter->hw.hw_addr + tx_ring->tdh),
3410 readl(adapter->hw.hw_addr + tx_ring->tdt),
3411 tx_ring->next_to_use,
3412 tx_ring->next_to_clean,
3413 tx_ring->buffer_info[eop].time_stamp,
3414 eop,
3415 jiffies,
3416 eop_desc->upper.fields.status);
3417 netif_stop_queue(netdev);
3418 }
3419 }
3420 return cleaned;
3421 }
3422
3423 /**
3424 * e1000_rx_checksum - Receive Checksum Offload for 82543
3425 * @adapter: board private structure
3426 * @status_err: receive descriptor status and error fields
3427 * @csum: receive descriptor csum field
3428 * @sk_buff: socket buffer with received data
3429 **/
3430
3431 static inline void
3432 e1000_rx_checksum(struct e1000_adapter *adapter,
3433 uint32_t status_err, uint32_t csum,
3434 struct sk_buff *skb)
3435 {
3436 uint16_t status = (uint16_t)status_err;
3437 uint8_t errors = (uint8_t)(status_err >> 24);
3438 skb->ip_summed = CHECKSUM_NONE;
3439
3440 /* 82543 or newer only */
3441 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
3442 /* Ignore Checksum bit is set */
3443 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
3444 /* TCP/UDP checksum error bit is set */
3445 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
3446 /* let the stack verify checksum errors */
3447 adapter->hw_csum_err++;
3448 return;
3449 }
3450 /* TCP/UDP Checksum has not been calculated */
3451 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3452 if (!(status & E1000_RXD_STAT_TCPCS))
3453 return;
3454 } else {
3455 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
3456 return;
3457 }
3458 /* It must be a TCP or UDP packet with a valid checksum */
3459 if (likely(status & E1000_RXD_STAT_TCPCS)) {
3460 /* TCP checksum is good */
3461 skb->ip_summed = CHECKSUM_UNNECESSARY;
3462 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3463 /* IP fragment with UDP payload */
3464 /* Hardware complements the payload checksum, so we undo it
3465 * and then put the value in host order for further stack use.
3466 */
3467 csum = ntohl(csum ^ 0xFFFF);
3468 skb->csum = csum;
3469 skb->ip_summed = CHECKSUM_HW;
3470 }
3471 adapter->hw_csum_good++;
3472 }
3473
3474 /**
3475 * e1000_clean_rx_irq - Send received data up the network stack; legacy
3476 * @adapter: board private structure
3477 **/
3478
3479 static boolean_t
3480 #ifdef CONFIG_E1000_NAPI
3481 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3482 struct e1000_rx_ring *rx_ring,
3483 int *work_done, int work_to_do)
3484 #else
3485 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3486 struct e1000_rx_ring *rx_ring)
3487 #endif
3488 {
3489 struct net_device *netdev = adapter->netdev;
3490 struct pci_dev *pdev = adapter->pdev;
3491 struct e1000_rx_desc *rx_desc, *next_rxd;
3492 struct e1000_buffer *buffer_info, *next_buffer;
3493 unsigned long flags;
3494 uint32_t length;
3495 uint8_t last_byte;
3496 unsigned int i;
3497 int cleaned_count = 0;
3498 boolean_t cleaned = FALSE;
3499
3500 i = rx_ring->next_to_clean;
3501 rx_desc = E1000_RX_DESC(*rx_ring, i);
3502 buffer_info = &rx_ring->buffer_info[i];
3503
3504 while (rx_desc->status & E1000_RXD_STAT_DD) {
3505 struct sk_buff *skb, *next_skb;
3506 u8 status;
3507 #ifdef CONFIG_E1000_NAPI
3508 if (*work_done >= work_to_do)
3509 break;
3510 (*work_done)++;
3511 #endif
3512 status = rx_desc->status;
3513 skb = buffer_info->skb;
3514 buffer_info->skb = NULL;
3515
3516 if (++i == rx_ring->count) i = 0;
3517 next_rxd = E1000_RX_DESC(*rx_ring, i);
3518 next_buffer = &rx_ring->buffer_info[i];
3519 next_skb = next_buffer->skb;
3520
3521 cleaned = TRUE;
3522 cleaned_count++;
3523 pci_unmap_single(pdev,
3524 buffer_info->dma,
3525 buffer_info->length,
3526 PCI_DMA_FROMDEVICE);
3527
3528 length = le16_to_cpu(rx_desc->length);
3529
3530 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3531 /* All receives must fit into a single buffer */
3532 E1000_DBG("%s: Receive packet consumed multiple"
3533 " buffers\n", netdev->name);
3534 dev_kfree_skb_irq(skb);
3535 goto next_desc;
3536 }
3537
3538 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
3539 last_byte = *(skb->data + length - 1);
3540 if (TBI_ACCEPT(&adapter->hw, status,
3541 rx_desc->errors, length, last_byte)) {
3542 spin_lock_irqsave(&adapter->stats_lock, flags);
3543 e1000_tbi_adjust_stats(&adapter->hw,
3544 &adapter->stats,
3545 length, skb->data);
3546 spin_unlock_irqrestore(&adapter->stats_lock,
3547 flags);
3548 length--;
3549 } else {
3550 dev_kfree_skb_irq(skb);
3551 goto next_desc;
3552 }
3553 }
3554
3555 /* code added for copybreak, this should improve
3556 * performance for small packets with large amounts
3557 * of reassembly being done in the stack */
3558 #define E1000_CB_LENGTH 256
3559 if (length < E1000_CB_LENGTH) {
3560 struct sk_buff *new_skb =
3561 dev_alloc_skb(length + NET_IP_ALIGN);
3562 if (new_skb) {
3563 skb_reserve(new_skb, NET_IP_ALIGN);
3564 new_skb->dev = netdev;
3565 memcpy(new_skb->data - NET_IP_ALIGN,
3566 skb->data - NET_IP_ALIGN,
3567 length + NET_IP_ALIGN);
3568 /* save the skb in buffer_info as good */
3569 buffer_info->skb = skb;
3570 skb = new_skb;
3571 skb_put(skb, length);
3572 }
3573 } else
3574 skb_put(skb, length);
3575
3576 /* end copybreak code */
3577
3578 /* Receive Checksum Offload */
3579 e1000_rx_checksum(adapter,
3580 (uint32_t)(status) |
3581 ((uint32_t)(rx_desc->errors) << 24),
3582 rx_desc->csum, skb);
3583
3584 skb->protocol = eth_type_trans(skb, netdev);
3585 #ifdef CONFIG_E1000_NAPI
3586 if (unlikely(adapter->vlgrp &&
3587 (status & E1000_RXD_STAT_VP))) {
3588 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3589 le16_to_cpu(rx_desc->special) &
3590 E1000_RXD_SPC_VLAN_MASK);
3591 } else {
3592 netif_receive_skb(skb);
3593 }
3594 #else /* CONFIG_E1000_NAPI */
3595 if (unlikely(adapter->vlgrp &&
3596 (status & E1000_RXD_STAT_VP))) {
3597 vlan_hwaccel_rx(skb, adapter->vlgrp,
3598 le16_to_cpu(rx_desc->special) &
3599 E1000_RXD_SPC_VLAN_MASK);
3600 } else {
3601 netif_rx(skb);
3602 }
3603 #endif /* CONFIG_E1000_NAPI */
3604 netdev->last_rx = jiffies;
3605
3606 next_desc:
3607 rx_desc->status = 0;
3608
3609 /* return some buffers to hardware, one at a time is too slow */
3610 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3611 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3612 cleaned_count = 0;
3613 }
3614
3615 rx_desc = next_rxd;
3616 buffer_info = next_buffer;
3617 }
3618 rx_ring->next_to_clean = i;
3619
3620 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3621 if (cleaned_count)
3622 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3623
3624 return cleaned;
3625 }
3626
3627 /**
3628 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3629 * @adapter: board private structure
3630 **/
3631
3632 static boolean_t
3633 #ifdef CONFIG_E1000_NAPI
3634 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3635 struct e1000_rx_ring *rx_ring,
3636 int *work_done, int work_to_do)
3637 #else
3638 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3639 struct e1000_rx_ring *rx_ring)
3640 #endif
3641 {
3642 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
3643 struct net_device *netdev = adapter->netdev;
3644 struct pci_dev *pdev = adapter->pdev;
3645 struct e1000_buffer *buffer_info, *next_buffer;
3646 struct e1000_ps_page *ps_page;
3647 struct e1000_ps_page_dma *ps_page_dma;
3648 struct sk_buff *skb, *next_skb;
3649 unsigned int i, j;
3650 uint32_t length, staterr;
3651 int cleaned_count = 0;
3652 boolean_t cleaned = FALSE;
3653
3654 i = rx_ring->next_to_clean;
3655 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3656 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
3657 buffer_info = &rx_ring->buffer_info[i];
3658
3659 while (staterr & E1000_RXD_STAT_DD) {
3660 ps_page = &rx_ring->ps_page[i];
3661 ps_page_dma = &rx_ring->ps_page_dma[i];
3662 #ifdef CONFIG_E1000_NAPI
3663 if (unlikely(*work_done >= work_to_do))
3664 break;
3665 (*work_done)++;
3666 #endif
3667 skb = buffer_info->skb;
3668
3669 if (++i == rx_ring->count) i = 0;
3670 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
3671 next_buffer = &rx_ring->buffer_info[i];
3672 next_skb = next_buffer->skb;
3673
3674 cleaned = TRUE;
3675 cleaned_count++;
3676 pci_unmap_single(pdev, buffer_info->dma,
3677 buffer_info->length,
3678 PCI_DMA_FROMDEVICE);
3679
3680 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
3681 E1000_DBG("%s: Packet Split buffers didn't pick up"
3682 " the full packet\n", netdev->name);
3683 dev_kfree_skb_irq(skb);
3684 goto next_desc;
3685 }
3686
3687 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
3688 dev_kfree_skb_irq(skb);
3689 goto next_desc;
3690 }
3691
3692 length = le16_to_cpu(rx_desc->wb.middle.length0);
3693
3694 if (unlikely(!length)) {
3695 E1000_DBG("%s: Last part of the packet spanning"
3696 " multiple descriptors\n", netdev->name);
3697 dev_kfree_skb_irq(skb);
3698 goto next_desc;
3699 }
3700
3701 /* Good Receive */
3702 skb_put(skb, length);
3703
3704 for (j = 0; j < adapter->rx_ps_pages; j++) {
3705 if (!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
3706 break;
3707
3708 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3709 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3710 ps_page_dma->ps_page_dma[j] = 0;
3711 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
3712 length);
3713 ps_page->ps_page[j] = NULL;
3714 skb->len += length;
3715 skb->data_len += length;
3716 }
3717
3718 e1000_rx_checksum(adapter, staterr,
3719 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
3720 skb->protocol = eth_type_trans(skb, netdev);
3721
3722 if (likely(rx_desc->wb.upper.header_status &
3723 E1000_RXDPS_HDRSTAT_HDRSP))
3724 adapter->rx_hdr_split++;
3725 #ifdef CONFIG_E1000_NAPI
3726 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3727 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3728 le16_to_cpu(rx_desc->wb.middle.vlan) &
3729 E1000_RXD_SPC_VLAN_MASK);
3730 } else {
3731 netif_receive_skb(skb);
3732 }
3733 #else /* CONFIG_E1000_NAPI */
3734 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3735 vlan_hwaccel_rx(skb, adapter->vlgrp,
3736 le16_to_cpu(rx_desc->wb.middle.vlan) &
3737 E1000_RXD_SPC_VLAN_MASK);
3738 } else {
3739 netif_rx(skb);
3740 }
3741 #endif /* CONFIG_E1000_NAPI */
3742 netdev->last_rx = jiffies;
3743
3744 next_desc:
3745 rx_desc->wb.middle.status_error &= ~0xFF;
3746 buffer_info->skb = NULL;
3747
3748 /* return some buffers to hardware, one at a time is too slow */
3749 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3750 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3751 cleaned_count = 0;
3752 }
3753
3754 rx_desc = next_rxd;
3755 buffer_info = next_buffer;
3756
3757 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
3758 }
3759 rx_ring->next_to_clean = i;
3760
3761 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3762 if (cleaned_count)
3763 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3764
3765 return cleaned;
3766 }
3767
3768 /**
3769 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
3770 * @adapter: address of board private structure
3771 **/
3772
3773 static void
3774 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
3775 struct e1000_rx_ring *rx_ring,
3776 int cleaned_count)
3777 {
3778 struct net_device *netdev = adapter->netdev;
3779 struct pci_dev *pdev = adapter->pdev;
3780 struct e1000_rx_desc *rx_desc;
3781 struct e1000_buffer *buffer_info;
3782 struct sk_buff *skb;
3783 unsigned int i;
3784 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
3785
3786 i = rx_ring->next_to_use;
3787 buffer_info = &rx_ring->buffer_info[i];
3788
3789 while (cleaned_count--) {
3790 if (!(skb = buffer_info->skb))
3791 skb = dev_alloc_skb(bufsz);
3792 else {
3793 skb_trim(skb, 0);
3794 goto map_skb;
3795 }
3796
3797
3798 if (unlikely(!skb)) {
3799 /* Better luck next round */
3800 adapter->alloc_rx_buff_failed++;
3801 break;
3802 }
3803
3804 /* Fix for errata 23, can't cross 64kB boundary */
3805 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3806 struct sk_buff *oldskb = skb;
3807 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
3808 "at %p\n", bufsz, skb->data);
3809 /* Try again, without freeing the previous */
3810 skb = dev_alloc_skb(bufsz);
3811 /* Failed allocation, critical failure */
3812 if (!skb) {
3813 dev_kfree_skb(oldskb);
3814 break;
3815 }
3816
3817 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3818 /* give up */
3819 dev_kfree_skb(skb);
3820 dev_kfree_skb(oldskb);
3821 break; /* while !buffer_info->skb */
3822 } else {
3823 /* Use new allocation */
3824 dev_kfree_skb(oldskb);
3825 }
3826 }
3827 /* Make buffer alignment 2 beyond a 16 byte boundary
3828 * this will result in a 16 byte aligned IP header after
3829 * the 14 byte MAC header is removed
3830 */
3831 skb_reserve(skb, NET_IP_ALIGN);
3832
3833 skb->dev = netdev;
3834
3835 buffer_info->skb = skb;
3836 buffer_info->length = adapter->rx_buffer_len;
3837 map_skb:
3838 buffer_info->dma = pci_map_single(pdev,
3839 skb->data,
3840 adapter->rx_buffer_len,
3841 PCI_DMA_FROMDEVICE);
3842
3843 /* Fix for errata 23, can't cross 64kB boundary */
3844 if (!e1000_check_64k_bound(adapter,
3845 (void *)(unsigned long)buffer_info->dma,
3846 adapter->rx_buffer_len)) {
3847 DPRINTK(RX_ERR, ERR,
3848 "dma align check failed: %u bytes at %p\n",
3849 adapter->rx_buffer_len,
3850 (void *)(unsigned long)buffer_info->dma);
3851 dev_kfree_skb(skb);
3852 buffer_info->skb = NULL;
3853
3854 pci_unmap_single(pdev, buffer_info->dma,
3855 adapter->rx_buffer_len,
3856 PCI_DMA_FROMDEVICE);
3857
3858 break; /* while !buffer_info->skb */
3859 }
3860 rx_desc = E1000_RX_DESC(*rx_ring, i);
3861 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3862
3863 if (unlikely(++i == rx_ring->count))
3864 i = 0;
3865 buffer_info = &rx_ring->buffer_info[i];
3866 }
3867
3868 if (likely(rx_ring->next_to_use != i)) {
3869 rx_ring->next_to_use = i;
3870 if (unlikely(i-- == 0))
3871 i = (rx_ring->count - 1);
3872
3873 /* Force memory writes to complete before letting h/w
3874 * know there are new descriptors to fetch. (Only
3875 * applicable for weak-ordered memory model archs,
3876 * such as IA-64). */
3877 wmb();
3878 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
3879 }
3880 }
3881
3882 /**
3883 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
3884 * @adapter: address of board private structure
3885 **/
3886
3887 static void
3888 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
3889 struct e1000_rx_ring *rx_ring,
3890 int cleaned_count)
3891 {
3892 struct net_device *netdev = adapter->netdev;
3893 struct pci_dev *pdev = adapter->pdev;
3894 union e1000_rx_desc_packet_split *rx_desc;
3895 struct e1000_buffer *buffer_info;
3896 struct e1000_ps_page *ps_page;
3897 struct e1000_ps_page_dma *ps_page_dma;
3898 struct sk_buff *skb;
3899 unsigned int i, j;
3900
3901 i = rx_ring->next_to_use;
3902 buffer_info = &rx_ring->buffer_info[i];
3903 ps_page = &rx_ring->ps_page[i];
3904 ps_page_dma = &rx_ring->ps_page_dma[i];
3905
3906 while (cleaned_count--) {
3907 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3908
3909 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
3910 if (j < adapter->rx_ps_pages) {
3911 if (likely(!ps_page->ps_page[j])) {
3912 ps_page->ps_page[j] =
3913 alloc_page(GFP_ATOMIC);
3914 if (unlikely(!ps_page->ps_page[j])) {
3915 adapter->alloc_rx_buff_failed++;
3916 goto no_buffers;
3917 }
3918 ps_page_dma->ps_page_dma[j] =
3919 pci_map_page(pdev,
3920 ps_page->ps_page[j],
3921 0, PAGE_SIZE,
3922 PCI_DMA_FROMDEVICE);
3923 }
3924 /* Refresh the desc even if buffer_addrs didn't
3925 * change because each write-back erases
3926 * this info.
3927 */
3928 rx_desc->read.buffer_addr[j+1] =
3929 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
3930 } else
3931 rx_desc->read.buffer_addr[j+1] = ~0;
3932 }
3933
3934 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
3935
3936 if (unlikely(!skb)) {
3937 adapter->alloc_rx_buff_failed++;
3938 break;
3939 }
3940
3941 /* Make buffer alignment 2 beyond a 16 byte boundary
3942 * this will result in a 16 byte aligned IP header after
3943 * the 14 byte MAC header is removed
3944 */
3945 skb_reserve(skb, NET_IP_ALIGN);
3946
3947 skb->dev = netdev;
3948
3949 buffer_info->skb = skb;
3950 buffer_info->length = adapter->rx_ps_bsize0;
3951 buffer_info->dma = pci_map_single(pdev, skb->data,
3952 adapter->rx_ps_bsize0,
3953 PCI_DMA_FROMDEVICE);
3954
3955 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
3956
3957 if (unlikely(++i == rx_ring->count)) i = 0;
3958 buffer_info = &rx_ring->buffer_info[i];
3959 ps_page = &rx_ring->ps_page[i];
3960 ps_page_dma = &rx_ring->ps_page_dma[i];
3961 }
3962
3963 no_buffers:
3964 if (likely(rx_ring->next_to_use != i)) {
3965 rx_ring->next_to_use = i;
3966 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
3967
3968 /* Force memory writes to complete before letting h/w
3969 * know there are new descriptors to fetch. (Only
3970 * applicable for weak-ordered memory model archs,
3971 * such as IA-64). */
3972 wmb();
3973 /* Hardware increments by 16 bytes, but packet split
3974 * descriptors are 32 bytes...so we increment tail
3975 * twice as much.
3976 */
3977 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
3978 }
3979 }
3980
3981 /**
3982 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
3983 * @adapter:
3984 **/
3985
3986 static void
3987 e1000_smartspeed(struct e1000_adapter *adapter)
3988 {
3989 uint16_t phy_status;
3990 uint16_t phy_ctrl;
3991
3992 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
3993 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
3994 return;
3995
3996 if (adapter->smartspeed == 0) {
3997 /* If Master/Slave config fault is asserted twice,
3998 * we assume back-to-back */
3999 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4000 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4001 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4002 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4003 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4004 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4005 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4006 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4007 phy_ctrl);
4008 adapter->smartspeed++;
4009 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4010 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4011 &phy_ctrl)) {
4012 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4013 MII_CR_RESTART_AUTO_NEG);
4014 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4015 phy_ctrl);
4016 }
4017 }
4018 return;
4019 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4020 /* If still no link, perhaps using 2/3 pair cable */
4021 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4022 phy_ctrl |= CR_1000T_MS_ENABLE;
4023 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4024 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4025 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4026 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4027 MII_CR_RESTART_AUTO_NEG);
4028 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4029 }
4030 }
4031 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4032 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4033 adapter->smartspeed = 0;
4034 }
4035
4036 /**
4037 * e1000_ioctl -
4038 * @netdev:
4039 * @ifreq:
4040 * @cmd:
4041 **/
4042
4043 static int
4044 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4045 {
4046 switch (cmd) {
4047 case SIOCGMIIPHY:
4048 case SIOCGMIIREG:
4049 case SIOCSMIIREG:
4050 return e1000_mii_ioctl(netdev, ifr, cmd);
4051 default:
4052 return -EOPNOTSUPP;
4053 }
4054 }
4055
4056 /**
4057 * e1000_mii_ioctl -
4058 * @netdev:
4059 * @ifreq:
4060 * @cmd:
4061 **/
4062
4063 static int
4064 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4065 {
4066 struct e1000_adapter *adapter = netdev_priv(netdev);
4067 struct mii_ioctl_data *data = if_mii(ifr);
4068 int retval;
4069 uint16_t mii_reg;
4070 uint16_t spddplx;
4071 unsigned long flags;
4072
4073 if (adapter->hw.media_type != e1000_media_type_copper)
4074 return -EOPNOTSUPP;
4075
4076 switch (cmd) {
4077 case SIOCGMIIPHY:
4078 data->phy_id = adapter->hw.phy_addr;
4079 break;
4080 case SIOCGMIIREG:
4081 if (!capable(CAP_NET_ADMIN))
4082 return -EPERM;
4083 spin_lock_irqsave(&adapter->stats_lock, flags);
4084 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4085 &data->val_out)) {
4086 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4087 return -EIO;
4088 }
4089 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4090 break;
4091 case SIOCSMIIREG:
4092 if (!capable(CAP_NET_ADMIN))
4093 return -EPERM;
4094 if (data->reg_num & ~(0x1F))
4095 return -EFAULT;
4096 mii_reg = data->val_in;
4097 spin_lock_irqsave(&adapter->stats_lock, flags);
4098 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4099 mii_reg)) {
4100 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4101 return -EIO;
4102 }
4103 if (adapter->hw.phy_type == e1000_phy_m88) {
4104 switch (data->reg_num) {
4105 case PHY_CTRL:
4106 if (mii_reg & MII_CR_POWER_DOWN)
4107 break;
4108 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4109 adapter->hw.autoneg = 1;
4110 adapter->hw.autoneg_advertised = 0x2F;
4111 } else {
4112 if (mii_reg & 0x40)
4113 spddplx = SPEED_1000;
4114 else if (mii_reg & 0x2000)
4115 spddplx = SPEED_100;
4116 else
4117 spddplx = SPEED_10;
4118 spddplx += (mii_reg & 0x100)
4119 ? FULL_DUPLEX :
4120 HALF_DUPLEX;
4121 retval = e1000_set_spd_dplx(adapter,
4122 spddplx);
4123 if (retval) {
4124 spin_unlock_irqrestore(
4125 &adapter->stats_lock,
4126 flags);
4127 return retval;
4128 }
4129 }
4130 if (netif_running(adapter->netdev)) {
4131 e1000_down(adapter);
4132 e1000_up(adapter);
4133 } else
4134 e1000_reset(adapter);
4135 break;
4136 case M88E1000_PHY_SPEC_CTRL:
4137 case M88E1000_EXT_PHY_SPEC_CTRL:
4138 if (e1000_phy_reset(&adapter->hw)) {
4139 spin_unlock_irqrestore(
4140 &adapter->stats_lock, flags);
4141 return -EIO;
4142 }
4143 break;
4144 }
4145 } else {
4146 switch (data->reg_num) {
4147 case PHY_CTRL:
4148 if (mii_reg & MII_CR_POWER_DOWN)
4149 break;
4150 if (netif_running(adapter->netdev)) {
4151 e1000_down(adapter);
4152 e1000_up(adapter);
4153 } else
4154 e1000_reset(adapter);
4155 break;
4156 }
4157 }
4158 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4159 break;
4160 default:
4161 return -EOPNOTSUPP;
4162 }
4163 return E1000_SUCCESS;
4164 }
4165
4166 void
4167 e1000_pci_set_mwi(struct e1000_hw *hw)
4168 {
4169 struct e1000_adapter *adapter = hw->back;
4170 int ret_val = pci_set_mwi(adapter->pdev);
4171
4172 if (ret_val)
4173 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4174 }
4175
4176 void
4177 e1000_pci_clear_mwi(struct e1000_hw *hw)
4178 {
4179 struct e1000_adapter *adapter = hw->back;
4180
4181 pci_clear_mwi(adapter->pdev);
4182 }
4183
4184 void
4185 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4186 {
4187 struct e1000_adapter *adapter = hw->back;
4188
4189 pci_read_config_word(adapter->pdev, reg, value);
4190 }
4191
4192 void
4193 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4194 {
4195 struct e1000_adapter *adapter = hw->back;
4196
4197 pci_write_config_word(adapter->pdev, reg, *value);
4198 }
4199
4200 uint32_t
4201 e1000_io_read(struct e1000_hw *hw, unsigned long port)
4202 {
4203 return inl(port);
4204 }
4205
4206 void
4207 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4208 {
4209 outl(value, port);
4210 }
4211
4212 static void
4213 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4214 {
4215 struct e1000_adapter *adapter = netdev_priv(netdev);
4216 uint32_t ctrl, rctl;
4217
4218 e1000_irq_disable(adapter);
4219 adapter->vlgrp = grp;
4220
4221 if (grp) {
4222 /* enable VLAN tag insert/strip */
4223 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4224 ctrl |= E1000_CTRL_VME;
4225 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4226
4227 /* enable VLAN receive filtering */
4228 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4229 rctl |= E1000_RCTL_VFE;
4230 rctl &= ~E1000_RCTL_CFIEN;
4231 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4232 e1000_update_mng_vlan(adapter);
4233 } else {
4234 /* disable VLAN tag insert/strip */
4235 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4236 ctrl &= ~E1000_CTRL_VME;
4237 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4238
4239 /* disable VLAN filtering */
4240 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4241 rctl &= ~E1000_RCTL_VFE;
4242 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4243 if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
4244 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4245 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4246 }
4247 }
4248
4249 e1000_irq_enable(adapter);
4250 }
4251
4252 static void
4253 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4254 {
4255 struct e1000_adapter *adapter = netdev_priv(netdev);
4256 uint32_t vfta, index;
4257
4258 if ((adapter->hw.mng_cookie.status &
4259 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4260 (vid == adapter->mng_vlan_id))
4261 return;
4262 /* add VID to filter table */
4263 index = (vid >> 5) & 0x7F;
4264 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4265 vfta |= (1 << (vid & 0x1F));
4266 e1000_write_vfta(&adapter->hw, index, vfta);
4267 }
4268
4269 static void
4270 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4271 {
4272 struct e1000_adapter *adapter = netdev_priv(netdev);
4273 uint32_t vfta, index;
4274
4275 e1000_irq_disable(adapter);
4276
4277 if (adapter->vlgrp)
4278 adapter->vlgrp->vlan_devices[vid] = NULL;
4279
4280 e1000_irq_enable(adapter);
4281
4282 if ((adapter->hw.mng_cookie.status &
4283 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4284 (vid == adapter->mng_vlan_id)) {
4285 /* release control to f/w */
4286 e1000_release_hw_control(adapter);
4287 return;
4288 }
4289
4290 /* remove VID from filter table */
4291 index = (vid >> 5) & 0x7F;
4292 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4293 vfta &= ~(1 << (vid & 0x1F));
4294 e1000_write_vfta(&adapter->hw, index, vfta);
4295 }
4296
4297 static void
4298 e1000_restore_vlan(struct e1000_adapter *adapter)
4299 {
4300 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4301
4302 if (adapter->vlgrp) {
4303 uint16_t vid;
4304 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4305 if (!adapter->vlgrp->vlan_devices[vid])
4306 continue;
4307 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4308 }
4309 }
4310 }
4311
4312 int
4313 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4314 {
4315 adapter->hw.autoneg = 0;
4316
4317 /* Fiber NICs only allow 1000 gbps Full duplex */
4318 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
4319 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4320 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4321 return -EINVAL;
4322 }
4323
4324 switch (spddplx) {
4325 case SPEED_10 + DUPLEX_HALF:
4326 adapter->hw.forced_speed_duplex = e1000_10_half;
4327 break;
4328 case SPEED_10 + DUPLEX_FULL:
4329 adapter->hw.forced_speed_duplex = e1000_10_full;
4330 break;
4331 case SPEED_100 + DUPLEX_HALF:
4332 adapter->hw.forced_speed_duplex = e1000_100_half;
4333 break;
4334 case SPEED_100 + DUPLEX_FULL:
4335 adapter->hw.forced_speed_duplex = e1000_100_full;
4336 break;
4337 case SPEED_1000 + DUPLEX_FULL:
4338 adapter->hw.autoneg = 1;
4339 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4340 break;
4341 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4342 default:
4343 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4344 return -EINVAL;
4345 }
4346 return 0;
4347 }
4348
4349 #ifdef CONFIG_PM
4350 /* these functions save and restore 16 or 64 dwords (64-256 bytes) of config
4351 * space versus the 64 bytes that pci_[save|restore]_state handle
4352 */
4353 #define PCIE_CONFIG_SPACE_LEN 256
4354 #define PCI_CONFIG_SPACE_LEN 64
4355 static int
4356 e1000_pci_save_state(struct e1000_adapter *adapter)
4357 {
4358 struct pci_dev *dev = adapter->pdev;
4359 int size;
4360 int i;
4361 if (adapter->hw.mac_type >= e1000_82571)
4362 size = PCIE_CONFIG_SPACE_LEN;
4363 else
4364 size = PCI_CONFIG_SPACE_LEN;
4365
4366 WARN_ON(adapter->config_space != NULL);
4367
4368 adapter->config_space = kmalloc(size, GFP_KERNEL);
4369 if (!adapter->config_space) {
4370 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4371 return -ENOMEM;
4372 }
4373 for (i = 0; i < (size / 4); i++)
4374 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4375 return 0;
4376 }
4377
4378 static void
4379 e1000_pci_restore_state(struct e1000_adapter *adapter)
4380 {
4381 struct pci_dev *dev = adapter->pdev;
4382 int size;
4383 int i;
4384 if (adapter->config_space == NULL)
4385 return;
4386 if (adapter->hw.mac_type >= e1000_82571)
4387 size = PCIE_CONFIG_SPACE_LEN;
4388 else
4389 size = PCI_CONFIG_SPACE_LEN;
4390 for (i = 0; i < (size / 4); i++)
4391 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4392 kfree(adapter->config_space);
4393 adapter->config_space = NULL;
4394 return;
4395 }
4396 #endif /* CONFIG_PM */
4397
4398 static int
4399 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4400 {
4401 struct net_device *netdev = pci_get_drvdata(pdev);
4402 struct e1000_adapter *adapter = netdev_priv(netdev);
4403 uint32_t ctrl, ctrl_ext, rctl, manc, status;
4404 uint32_t wufc = adapter->wol;
4405 int retval = 0;
4406
4407 netif_device_detach(netdev);
4408
4409 if (netif_running(netdev))
4410 e1000_down(adapter);
4411
4412 #ifdef CONFIG_PM
4413 /* implement our own version of pci_save_state(pdev) because pci
4414 * express adapters have larger 256 byte config spaces */
4415 retval = e1000_pci_save_state(adapter);
4416 if (retval)
4417 return retval;
4418 #endif
4419
4420 status = E1000_READ_REG(&adapter->hw, STATUS);
4421 if (status & E1000_STATUS_LU)
4422 wufc &= ~E1000_WUFC_LNKC;
4423
4424 if (wufc) {
4425 e1000_setup_rctl(adapter);
4426 e1000_set_multi(netdev);
4427
4428 /* turn on all-multi mode if wake on multicast is enabled */
4429 if (adapter->wol & E1000_WUFC_MC) {
4430 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4431 rctl |= E1000_RCTL_MPE;
4432 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4433 }
4434
4435 if (adapter->hw.mac_type >= e1000_82540) {
4436 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4437 /* advertise wake from D3Cold */
4438 #define E1000_CTRL_ADVD3WUC 0x00100000
4439 /* phy power management enable */
4440 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4441 ctrl |= E1000_CTRL_ADVD3WUC |
4442 E1000_CTRL_EN_PHY_PWR_MGMT;
4443 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4444 }
4445
4446 if (adapter->hw.media_type == e1000_media_type_fiber ||
4447 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4448 /* keep the laser running in D3 */
4449 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4450 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4451 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4452 }
4453
4454 /* Allow time for pending master requests to run */
4455 e1000_disable_pciex_master(&adapter->hw);
4456
4457 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4458 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
4459 retval = pci_enable_wake(pdev, PCI_D3hot, 1);
4460 if (retval)
4461 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4462 retval = pci_enable_wake(pdev, PCI_D3cold, 1);
4463 if (retval)
4464 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
4465 } else {
4466 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4467 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
4468 retval = pci_enable_wake(pdev, PCI_D3hot, 0);
4469 if (retval)
4470 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4471 retval = pci_enable_wake(pdev, PCI_D3cold, 0); /* 4 == D3 cold */
4472 if (retval)
4473 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
4474 }
4475
4476 if (adapter->hw.mac_type >= e1000_82540 &&
4477 adapter->hw.media_type == e1000_media_type_copper) {
4478 manc = E1000_READ_REG(&adapter->hw, MANC);
4479 if (manc & E1000_MANC_SMBUS_EN) {
4480 manc |= E1000_MANC_ARP_EN;
4481 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4482 retval = pci_enable_wake(pdev, PCI_D3hot, 1);
4483 if (retval)
4484 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4485 retval = pci_enable_wake(pdev, PCI_D3cold, 1);
4486 if (retval)
4487 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
4488 }
4489 }
4490
4491 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4492 * would have already happened in close and is redundant. */
4493 e1000_release_hw_control(adapter);
4494
4495 pci_disable_device(pdev);
4496
4497 retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
4498 if (retval)
4499 DPRINTK(PROBE, ERR, "Error in setting power state\n");
4500
4501 return 0;
4502 }
4503
4504 #ifdef CONFIG_PM
4505 static int
4506 e1000_resume(struct pci_dev *pdev)
4507 {
4508 struct net_device *netdev = pci_get_drvdata(pdev);
4509 struct e1000_adapter *adapter = netdev_priv(netdev);
4510 int retval;
4511 uint32_t manc, ret_val;
4512
4513 retval = pci_set_power_state(pdev, PCI_D0);
4514 if (retval)
4515 DPRINTK(PROBE, ERR, "Error in setting power state\n");
4516 e1000_pci_restore_state(adapter);
4517 ret_val = pci_enable_device(pdev);
4518 pci_set_master(pdev);
4519
4520 retval = pci_enable_wake(pdev, PCI_D3hot, 0);
4521 if (retval)
4522 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4523 retval = pci_enable_wake(pdev, PCI_D3cold, 0);
4524 if (retval)
4525 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
4526
4527 e1000_reset(adapter);
4528 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4529
4530 if (netif_running(netdev))
4531 e1000_up(adapter);
4532
4533 netif_device_attach(netdev);
4534
4535 if (adapter->hw.mac_type >= e1000_82540 &&
4536 adapter->hw.media_type == e1000_media_type_copper) {
4537 manc = E1000_READ_REG(&adapter->hw, MANC);
4538 manc &= ~(E1000_MANC_ARP_EN);
4539 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4540 }
4541
4542 /* If the controller is 82573 and f/w is AMT, do not set
4543 * DRV_LOAD until the interface is up. For all other cases,
4544 * let the f/w know that the h/w is now under the control
4545 * of the driver. */
4546 if (adapter->hw.mac_type != e1000_82573 ||
4547 !e1000_check_mng_mode(&adapter->hw))
4548 e1000_get_hw_control(adapter);
4549
4550 return 0;
4551 }
4552 #endif
4553 #ifdef CONFIG_NET_POLL_CONTROLLER
4554 /*
4555 * Polling 'interrupt' - used by things like netconsole to send skbs
4556 * without having to re-enable interrupts. It's not called while
4557 * the interrupt routine is executing.
4558 */
4559 static void
4560 e1000_netpoll(struct net_device *netdev)
4561 {
4562 struct e1000_adapter *adapter = netdev_priv(netdev);
4563 disable_irq(adapter->pdev->irq);
4564 e1000_intr(adapter->pdev->irq, netdev, NULL);
4565 e1000_clean_tx_irq(adapter, adapter->tx_ring);
4566 #ifndef CONFIG_E1000_NAPI
4567 adapter->clean_rx(adapter, adapter->rx_ring);
4568 #endif
4569 enable_irq(adapter->pdev->irq);
4570 }
4571 #endif
4572
4573 /* e1000_main.c */
Stable & featurefull patchset based on Linus's git branch