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update madwifi
[linux-2.6/zen-sources.git] / drivers / net / wireless / madwifi / ath_hal / ah_os.c
blob272d2f963717c6feafa69b4d4d0b86fcb26fbde4
1 /*-
2 * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13 * redistribution must be conditioned upon including a substantially
14 * similar Disclaimer requirement for further binary redistribution.
15 * 3. Neither the names of the above-listed copyright holders nor the names
16 * of any contributors may be used to endorse or promote products derived
17 * from this software without specific prior written permission.
18 *
19 * Alternatively, this software may be distributed under the terms of the
20 * GNU General Public License ("GPL") version 2 as published by the Free
21 * Software Foundation.
22 *
23 * NO WARRANTY
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
27 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
28 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
29 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
32 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
34 * THE POSSIBILITY OF SUCH DAMAGES.
35 *
36 * $Id: ah_os.c 3780 2008-07-17 02:48:19Z proski $
37 */
38 #include "opt_ah.h"
39
40 #ifndef EXPORT_SYMTAB
41 #define EXPORT_SYMTAB
42 #endif /* EXPORT_SYMTAB */
43
44 /* Don't use virtualized timer in Linux 2.6.20+ */
45 #define USE_REAL_TIME_DELAY
46
47 #ifndef AUTOCONF_INCLUDED
48 #include <linux/config.h>
49 #endif /* AUTOCONF_INCLUDED */
50 #include <linux/version.h>
51 #include <linux/module.h>
52 #include <linux/init.h>
53
54 #include <linux/kernel.h>
55 #include <linux/slab.h>
56 #include <linux/delay.h>
57 #include <linux/sched.h>
58
59 #include <linux/sysctl.h>
60 #include <linux/proc_fs.h>
61
62 #include <asm/io.h>
63
64 #include <ah.h>
65 #include <ah_os.h>
66
67 #ifdef AH_DEBUG
68 int ath_hal_debug = 0;
69 EXPORT_SYMBOL(ath_hal_debug);
70 #endif /* AH_DEBUG */
71
72 #define MSG_MAXLEN 161
73
74 #define REGOP_NONE 0
75 #define REGOP_READ 1
76 #define REGOP_WRITE 2
77
78
79 int ath_hal_dma_beacon_response_time = 2; /* in TUs */
80 int ath_hal_sw_beacon_response_time = 10; /* in TUs */
81 int ath_hal_additional_swba_backoff = 0; /* in TUs */
82
83 struct ath_hal *
84 _ath_hal_attach(u_int16_t devid, HAL_SOFTC sc,
85 HAL_BUS_TAG t, HAL_BUS_HANDLE h, HAL_STATUS *s)
86 {
87 struct ath_hal *ah = ath_hal_attach(devid, sc, t, h, s);
88
89 if (ah)
90 #ifndef __MOD_INC_USE_COUNT
91 if (!try_module_get(THIS_MODULE)) {
92 printk(KERN_WARNING "%s: try_module_get failed\n",
93 __func__);
94 _ath_hal_detach(ah);
95 return NULL;
96 }
97 #else /* __MOD_INC_USE_COUNT */
98 MOD_INC_USE_COUNT;
99 #endif /* __MOD_INC_USE_COUNT */
100 return ah;
101 }
102
103 void
104 _ath_hal_detach(struct ath_hal *ah)
105 {
106 (*ah->ah_detach)(ah);
107 #ifndef __MOD_INC_USE_COUNT
108 module_put(THIS_MODULE);
109 #else /* __MOD_INC_USE_COUNT */
110 MOD_DEC_USE_COUNT;
111 #endif /* __MOD_INC_USE_COUNT */
112 }
113
114 /*
115 * Print/log message support.
116 */
117
118 #ifdef AH_ASSERT
119 void __ahdecl
120 ath_hal_assert_failed(const char *filename, int lineno, const char *msg)
121 {
122 printk(KERN_ERR "Atheros HAL assertion failure: %s: line %u: %s\n",
123 filename, lineno, msg);
124 panic("ath_hal_assert");
125 }
126 #endif /* AH_ASSERT */
127
128 /* Store the current function name (should be called by wrapper functions)
129 * useful for debugging and figuring out, which hal function sets which
130 * registers */
131 const char *ath_hal_func = NULL;
132 const char *ath_hal_device = NULL;
133 EXPORT_SYMBOL(ath_hal_func);
134 EXPORT_SYMBOL(ath_hal_device);
135
136 #ifdef AH_DEBUG_ALQ
137 /*
138 * ALQ register tracing support.
139 *
140 * Setting hw.ath.hal.alq=1 enables tracing of all register reads and
141 * writes to the file /var/log/ath_hal.log. The file format is a simple
142 * fixed-size array of records. When done logging set hw.ath.hal.alq=0
143 * and then decode the file with the ardecode program (that is part of the
144 * HAL). If you start+stop tracing the data will be appended to an
145 * existing file.
146 *
147 * NB: doesn't handle multiple devices properly; only one DEVICE record
148 * is emitted and the different devices are not identified.
149 */
150 #include "alq.h"
151
152 static struct alq *ath_hal_alq = NULL;
153 static u_int ath_hal_alq_lost; /* count of lost records */
154 static const char *ath_hal_logfile = "/var/log/ath_hal.log";
155 static u_int ath_hal_alq_qsize = 8 * 1024;
156
157
158 static int
159 ath_hal_setlogging(int enable)
160 {
161 int error;
162
163 if (enable) {
164 if (!capable(CAP_NET_ADMIN))
165 return -EPERM;
166 error = alq_open(&ath_hal_alq, ath_hal_logfile,
167 MSG_MAXLEN, ath_hal_alq_qsize, (enable == 1 ? 0x7fffffff : enable));
168 ath_hal_alq_lost = 0;
169 printk(KERN_INFO "ath_hal: logging to %s %s\n", ath_hal_logfile,
170 error == 0 ? "enabled" : "could not be setup");
171 } else {
172 if (ath_hal_alq)
173 alq_close(ath_hal_alq);
174 ath_hal_alq = NULL;
175 printk(KERN_INFO "ath_hal: logging disabled\n");
176 error = 0;
177 }
178 return error;
179 }
180
181 /*
182 * Deal with the sysctl handler api changing.
183 */
184 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,8)
185 #define AH_SYSCTL_ARGS_DECL \
186 ctl_table *ctl, int write, struct file *filp, void *buffer, \
187 size_t *lenp
188 #define AH_SYSCTL_ARGS ctl, write, filp, buffer, lenp
189 #else /* LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,8) */
190 #define AH_SYSCTL_ARGS_DECL \
191 ctl_table *ctl, int write, struct file *filp, void *buffer,\
192 size_t *lenp, loff_t *ppos
193 #define AH_SYSCTL_ARGS ctl, write, filp, buffer, lenp, ppos
194 #endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,8) */
195
196 static int
197 sysctl_hw_ath_hal_log(AH_SYSCTL_ARGS_DECL)
198 {
199 int error, enable;
200
201 ctl->data = &enable;
202 ctl->maxlen = sizeof(enable);
203 enable = (ath_hal_alq != NULL);
204 error = proc_dointvec(AH_SYSCTL_ARGS);
205 if (error || !write)
206 return error;
207 else
208 return ath_hal_setlogging(enable);
209 }
210
211 static inline void
212 ath_hal_logvprintf(struct ath_hal *ah, const char *fmt, va_list ap)
213 {
214 struct ale *ale;
215 if (!ath_hal_alq) {
216 ath_hal_alq_lost++;
217 return;
218 }
219
220 ale = alq_get(ath_hal_alq, ALQ_NOWAIT);
221 if (!ale) {
222 ath_hal_alq_lost++;
223 return;
224 }
225
226 memset(ale->ae_data, 0, MSG_MAXLEN);
227 vsnprintf(ale->ae_data, MSG_MAXLEN, fmt, ap);
228 alq_post(ath_hal_alq, ale);
229 }
230
231 void __ahdecl
232 ath_hal_logprintf(struct ath_hal *ah, const char *fmt, ...)
233 {
234 va_list ap;
235 va_start(ap, fmt);
236 ath_hal_logvprintf(ah, fmt, ap);
237 va_end(ap);
238 }
239 EXPORT_SYMBOL(ath_hal_logprintf);
240
241 #endif /* AH_DEBUG_ALQ */
242
243 static inline void
244 _hal_vprintf(struct ath_hal *ah, HAL_BOOL prefer_alq, const char *fmt, va_list ap)
245 {
246 char buf[MSG_MAXLEN];
247 #ifdef AH_DEBUG_ALQ
248 if (prefer_alq && ath_hal_alq) {
249 ath_hal_logvprintf(ah, fmt, ap);
250 return;
251 }
252 #endif /* AH_DEBUG_ALQ */
253 vsnprintf(buf, sizeof(buf), fmt, ap);
254 printk("%s", buf);
255 }
256
257 void __ahdecl
258 ath_hal_printf(struct ath_hal *ah, HAL_BOOL prefer_alq, const char *fmt, ...)
259 {
260 va_list ap;
261 va_start(ap, fmt);
262 _hal_vprintf(ah, prefer_alq, fmt, ap);
263 va_end(ap);
264 }
265 EXPORT_SYMBOL(ath_hal_printf);
266
267 /* Lookup a friendly name for a register address (for any we have nicknames
268 * for). Names were taken from openhal ar5212regs.h. Return AH_TRUE if the
269 * name is a known ar5212 register, and AH_FALSE otherwise. */
270 HAL_BOOL
271 ath_hal_lookup_register_name(struct ath_hal *ah, char *buf, int buflen,
272 u_int32_t address) {
273 const char *static_label = NULL;
274 memset(buf, 0, buflen);
275 #if 0 /* Enable once for each new board/magic type */
276 printk("MAGIC: %x\n", ah->ah_magic);
277 #endif
278 if (ah->ah_magic == 0x19541014 /* AR5212 compatible HAL magic */ ) {
279 /* Handle Static Register Labels (unique stuff we know about) */
280 switch (address) {
281 case 0x0008: static_label = "AR5K_CR"; break;
282 case 0x000c: static_label = "AR5K_RXDP"; break;
283 case 0x0014: static_label = "AR5K_CFG"; break;
284 case 0x0024: static_label = "AR5K_IER"; break;
285 case 0x0030: static_label = "AR5K_TXCFG"; break;
286 case 0x0034: static_label = "AR5K_RXCFG"; break;
287 case 0x0040: static_label = "AR5K_MIBC"; break;
288 case 0x0044: static_label = "AR5K_TOPS"; break;
289 case 0x0048: static_label = "AR5K_RXNOFRM"; break;
290 case 0x004c: static_label = "AR5K_TXNOFRM"; break;
291 case 0x0050: static_label = "AR5K_RPGTO"; break;
292 case 0x0054: static_label = "AR5K_RFCNT"; break;
293 case 0x0058: static_label = "AR5K_MISC"; break;
294 case 0x0080: static_label = "AR5K_PISR"; break;
295 case 0x0084: static_label = "AR5K_SISR0"; break;
296 case 0x0088: static_label = "AR5K_SISR1"; break;
297 case 0x008c: static_label = "AR5K_SISR2"; break;
298 case 0x0090: static_label = "AR5K_SISR3"; break;
299 case 0x0094: static_label = "AR5K_SISR4"; break;
300 case 0x00a0: static_label = "AR5K_PIMR"; break;
301 case 0x00a4: static_label = "AR5K_SIMR0"; break;
302 case 0x00a8: static_label = "AR5K_SIMR1"; break;
303 case 0x00ac: static_label = "AR5K_SIMR2"; break;
304 case 0x00b0: static_label = "AR5K_SIMR3"; break;
305 case 0x00b4: static_label = "AR5K_SIMR4"; break;
306 case 0x00c0: static_label = "AR5K_RAC_PISR"; break;
307 case 0x00c4: static_label = "AR5K_RAC_SISR0"; break;
308 case 0x00c8: static_label = "AR5K_RAC_SISR1"; break;
309 case 0x00cc: static_label = "AR5K_RAC_SISR2"; break;
310 case 0x00d0: static_label = "AR5K_RAC_SISR3"; break;
311 case 0x00d4: static_label = "AR5K_RAC_SISR4"; break;
312 case 0x0400: static_label = "AR5K_DCM_ADDR"; break;
313 case 0x0404: static_label = "AR5K_DCM_DATA"; break;
314 case 0x0420: static_label = "AR5K_DCCFG"; break;
315 case 0x0600: static_label = "AR5K_CCFG"; break;
316 case 0x0604: static_label = "AR5K_CCFG_CUP"; break;
317 case 0x0610: static_label = "AR5K_CPC0"; break;
318 case 0x0614: static_label = "AR5K_CPC1"; break;
319 case 0x0618: static_label = "AR5K_CPC2"; break;
320 case 0x061c: static_label = "AR5K_CPC3"; break;
321 case 0x0620: static_label = "AR5K_CPCORN"; break;
322 case 0x0840: static_label = "AR5K_QCU_TXE"; break;
323 case 0x0880: static_label = "AR5K_QCU_TXD"; break;
324 case 0x0940: static_label = "AR5K_QCU_ONESHOTARM_SET"; break;
325 case 0x0980: static_label = "AR5K_QCU_ONESHOTARM_CLEAR"; break;
326 case 0xa200: static_label = "AR5K_PHY_MODE"; break;
327 case 0x0a40: static_label = "AR5K_QCU_RDYTIMESHDN"; break;
328 case 0x0b00: static_label = "AR5K_QCU_CBB_SELECT"; break;
329 case 0x0b04: static_label = "AR5K_QCU_CBB_ADDR"; break;
330 case 0x0b08: static_label = "AR5K_QCU_CBCFG"; break;
331 case 0x1030: static_label = "AR5K_DCU_GBL_IFS_SIFS"; break;
332 case 0x1038: static_label = "AR5K_DCU_TX_FILTER"; break;
333 case 0x1070: static_label = "AR5K_DCU_GBL_IFS_SLOT"; break;
334 case 0x10b0: static_label = "AR5K_DCU_GBL_IFS_EIFS"; break;
335 case 0x10f0: static_label = "AR5K_DCU_GBL_IFS_MISC"; break;
336 case 0x1230: static_label = "AR5K_DCU_FP"; break;
337 case 0x1270: static_label = "AR5K_DCU_TXP"; break;
338 case 0x143c: static_label = "AR5K_DCU_TX_FILTER_CLR"; break;
339 case 0x147c: static_label = "AR5K_DCU_TX_FILTER_SET"; break;
340 case 0x4000: static_label = "AR5K_RESET_CTL"; break;
341 case 0x4004: static_label = "AR5K_SLEEP_CTL"; break;
342 case 0x4008: static_label = "AR5K_INTPEND"; break;
343 case 0x400c: static_label = "AR5K_SFR"; break;
344 case 0x4010: static_label = "AR5K_PCICFG"; break;
345 case 0x4014: static_label = "AR5K_GPIOCR"; break;
346 case 0x4018: static_label = "AR5K_GPIODO"; break;
347 case 0x401c: static_label = "AR5K_GPIODI"; break;
348 case 0x4020: static_label = "AR5K_SREV"; break;
349 case 0x6000: static_label = "AR5K_EEPROM_BASE"; break;
350 case 0x6004: static_label = "AR5K_EEPROM_DATA_5211"; break;
351 case 0x6008: static_label = "AR5K_EEPROM_CMD"; break;
352 case 0x600c: static_label = "AR5K_EEPROM_STAT_5211"; break;
353 case 0x6010: static_label = "AR5K_EEPROM_CFG"; break;
354 case 0x8000: static_label = "AR5K_STA_ID0"; break;
355 case 0x8004: static_label = "AR5K_STA_ID1"; break;
356 case 0x8008: static_label = "AR5K_BSS_ID0"; break;
357 case 0x800c: static_label = "AR5K_BSS_ID1"; break;
358 case 0x8010: static_label = "AR5K_SLOT_TIME"; break;
359 case 0x8014: static_label = "AR5K_TIME_OUT"; break;
360 case 0x8018: static_label = "AR5K_RSSI_THR"; break;
361 case 0x801c: static_label = "AR5K_USEC_5211"; break;
362 case 0x8020: static_label = "AR5K_BEACON_5211"; break;
363 case 0x8024: static_label = "AR5K_CFP_PERIOD_5211"; break;
364 case 0x8028: static_label = "AR5K_TIMER0_5211"; break;
365 case 0x802c: static_label = "AR5K_TIMER1_5211"; break;
366 case 0x8030: static_label = "AR5K_TIMER2_5211"; break;
367 case 0x8034: static_label = "AR5K_TIMER3_5211"; break;
368 case 0x8038: static_label = "AR5K_CFP_DUR_5211"; break;
369 case 0x803c: static_label = "AR5K_RX_FILTER_5211"; break;
370 case 0x8040: static_label = "AR5K_MCAST_FILTER0_5211"; break;
371 case 0x8044: static_label = "AR5K_MCAST_FILTER1_5211"; break;
372 case 0x8048: static_label = "AR5K_DIAG_SW_5211"; break;
373 case 0x804c: static_label = "AR5K_TSF_L32_5211"; break;
374 case 0x8050: static_label = "AR5K_TSF_U32_5211"; break;
375 case 0x8054: static_label = "AR5K_ADDAC_TEST"; break;
376 case 0x8058: static_label = "AR5K_DEFAULT_ANTENNA"; break;
377 case 0x8080: static_label = "AR5K_LAST_TSTP"; break;
378 case 0x8084: static_label = "AR5K_NAV_5211"; break;
379 case 0x8088: static_label = "AR5K_RTS_OK_5211"; break;
380 case 0x808c: static_label = "AR5K_RTS_FAIL_5211"; break;
381 case 0x8090: static_label = "AR5K_ACK_FAIL_5211"; break;
382 case 0x8094: static_label = "AR5K_FCS_FAIL_5211"; break;
383 case 0x8098: static_label = "AR5K_BEACON_CNT_5211"; break;
384 case 0x80c0: static_label = "AR5K_XRMODE"; break;
385 case 0x80c4: static_label = "AR5K_XRDELAY"; break;
386 case 0x80c8: static_label = "AR5K_XRTIMEOUT"; break;
387 case 0x80cc: static_label = "AR5K_XRCHIRP"; break;
388 case 0x80d0: static_label = "AR5K_XRSTOMP"; break;
389 case 0x80d4: static_label = "AR5K_SLEEP0"; break;
390 case 0x80d8: static_label = "AR5K_SLEEP1"; break;
391 case 0x80dc: static_label = "AR5K_SLEEP2"; break;
392 case 0x80e0: static_label = "AR5K_BSS_IDM0"; break;
393 case 0x80e4: static_label = "AR5K_BSS_IDM1"; break;
394 case 0x80e8: static_label = "AR5K_TXPC"; break;
395 case 0x80ec: static_label = "AR5K_PROFCNT_TX"; break;
396 case 0x80f0: static_label = "AR5K_PROFCNT_RX"; break;
397 case 0x80f4: static_label = "AR5K_PROFCNT_RXCLR"; break;
398 case 0x80f8: static_label = "AR5K_PROFCNT_CYCLE"; break;
399 case 0x8104: static_label = "AR5K_TSF_PARM"; break;
400 case 0x810c: static_label = "AR5K_PHY_ERR_FIL"; break;
401 case 0x9800: static_label = "AR5K_PHY"; break;
402 case 0x9804: static_label = "AR5K_PHY_TURBO"; break;
403 case 0x9808: static_label = "AR5K_PHY_AGC"; break;
404 case 0x9814: static_label = "AR5K_PHY_TIMING_3"; break;
405 case 0x9818: static_label = "AR5K_PHY_CHIP_ID"; break;
406 case 0x981c: static_label = "AR5K_PHY_ACT"; break;
407 case 0x9858: static_label = "AR5K_PHY_SIG"; break;
408 case 0x985c: static_label = "AR5K_PHY_AGCCOARSE"; break;
409 case 0x9860: static_label = "AR5K_PHY_AGCCTL"; break;
410 case 0x9864: static_label = "AR5K_PHY_NF"; break;
411 case 0x9870: static_label = "AR5K_PHY_SCR"; break;
412 case 0x9874: static_label = "AR5K_PHY_SLMT"; break;
413 case 0x9878: static_label = "AR5K_PHY_SCAL"; break;
414 case 0x987c: static_label = "AR5K_PHY_PLL"; break;
415 case 0x989c: static_label = "AR5K_RF_BUFFER"; break;
416 case 0x98c0: static_label = "AR5K_RF_BUFFER_CONTROL_0"; break;
417 case 0x98c4: static_label = "AR5K_RF_BUFFER_CONTROL_1"; break;
418 case 0x98cc: static_label = "AR5K_RF_BUFFER_CONTROL_2"; break;
419 case 0x98d0: static_label = "AR5K_RF_BUFFER_CONTROL_3"; break;
420 case 0x98d4: static_label = "AR5K_RF_BUFFER_CONTROL_4"; break;
421 case 0x98d8: static_label = "AR5K_RF_BUFFER_CONTROL_5"; break;
422 case 0x98dc: static_label = "AR5K_RF_BUFFER_CONTROL_6"; break;
423 case 0x9914: static_label = "AR5K_PHY_RX_DELAY"; break;
424 case 0x9920: static_label = "AR5K_PHY_IQ"; break;
425 case 0x9930: static_label = "AR5K_PHY_PAPD_PROBE"; break;
426 case 0x9934: static_label = "AR5K_PHY_TXPOWER_RATE1"; break;
427 case 0x9938: static_label = "AR5K_PHY_TXPOWER_RATE2"; break;
428 case 0x993c: static_label = "AR5K_PHY_TXPOWER_RATE_MAX"; break;
429 case 0x9944: static_label = "AR5K_PHY_FRAME_CTL_5211"; break;
430 case 0x9954: static_label = "AR5K_PHY_RADAR"; break;
431 case 0x99f0: static_label = "AR5K_PHY_SCLOCK"; break;
432 case 0x99f4: static_label = "AR5K_PHY_SDELAY"; break;
433 case 0x99f8: static_label = "AR5K_PHY_SPENDING"; break;
434 case 0x9c10: static_label = "AR5K_PHY_IQRES_CAL_PWR_I"; break;
435 case 0x9c14: static_label = "AR5K_PHY_IQRES_CAL_PWR_Q"; break;
436 case 0x9c18: static_label = "AR5K_PHY_IQRES_CAL_CORR"; break;
437 case 0x9c1c: static_label = "AR5K_PHY_CURRENT_RSSI"; break;
438 case 0xa204: static_label = "AR5K_PHY_CCKTXCTL"; break;
439 case 0xa20c: static_label = "AR5K_PHY_GAIN_2GHZ"; break;
440 case 0xa234: static_label = "AR5K_PHY_TXPOWER_RATE3"; break;
441 case 0xa238: static_label = "AR5K_PHY_TXPOWER_RATE4"; break;
442 case 0x9850: static_label = "AR5K_PHY_AGCSIZE"; break;
443 case 0x9924: static_label = "AR5K_PHY_SPUR"; break;
444 default:
445 break;
446 }
447
448 if (static_label) {
449 if (strncmp(static_label, "ATH5K_", 6) == 0)
450 static_label += 6;
451 snprintf(buf, buflen, "%s", static_label);
452 return AH_TRUE;
453 }
454
455 /* Handle Key Table */
456 if ((address >= 0x8800) && (address < 0x9800)) {
457 #define keytable_entry_reg_count (8)
458 #define keytable_entry_size (keytable_entry_reg_count * sizeof(u_int32_t))
459 int key = ((address - 0x8800) / keytable_entry_size);
460 int reg = ((address - 0x8800) % keytable_entry_size) /
461 sizeof(u_int32_t);
462 char *format = NULL;
463 switch (reg) {
464 case 0: format = "KEY(%3d).KEYBITS[031:000]"; break;
465 case 1: format = "KEY(%3d).KEYBITS[047:032]"; break;
466 case 2: format = "KEY(%3d).KEYBITS[079:048]"; break;
467 case 3: format = "KEY(%3d).KEYBITS[095:080]"; break;
468 case 4: format = "KEY(%3d).KEYBITS[127:096]"; break;
469 case 5: format = "KEY(%3d).TYPE............"; break;
470 case 6: format = "KEY(%3d).MAC[32:01]......"; break;
471 case 7: format = "KEY(%3d).MAC[47:33]......"; break;
472 default:
473 BUG();
474 }
475 snprintf(buf, buflen, format, key);
476 #undef keytable_entry_reg_count
477 #undef keytable_entry_size
478 return AH_TRUE;
479 }
480
481 if (address >= 0x0800 && address <= 0x082c) {
482 snprintf(buf, buflen, "AR5K_QUEUE_TXDP_%d",
483 (u_int32_t)((address - 0x0800) / sizeof(u_int32_t)));
484 return AH_TRUE;
485 }
486 if (address >= 0x08c0 && address <= 0x08ec) {
487 snprintf(buf, buflen, "AR5K_QUEUE_CBRCFG_%d",
488 (u_int32_t)((address - 0x08c0) / sizeof(u_int32_t)));
489 return AH_TRUE;
490 }
491 if (address >= 0x0900 && address <= 0x092c) {
492 snprintf(buf, buflen, "AR5K_QUEUE_RDYTIMECFG_%d",
493 (u_int32_t)((address - 0x0900) / sizeof(u_int32_t)));
494 return AH_TRUE;
495 }
496 if (address >= 0x09c0 && address <= 0x09ec) {
497 snprintf(buf, buflen, "AR5K_QUEUE_MISC_%d",
498 (u_int32_t)((address - 0x09c0) / sizeof(u_int32_t)));
499 return AH_TRUE;
500 }
501 if (address >= 0x0a00 && address <= 0x0a2c) {
502 snprintf(buf, buflen, "AR5K_QUEUE_STATUS_%d",
503 (u_int32_t)((address - 0x0a00) / sizeof(u_int32_t)));
504 return AH_TRUE;
505 }
506 if (address >= 0x1000 && address <= 0x102c) {
507 snprintf(buf, buflen, "AR5K_QUEUE_QCUMASK_%d",
508 (u_int32_t)((address - 0x1000) / sizeof(u_int32_t)));
509 return AH_TRUE;
510 }
511 if (address >= 0x1040 && address <= 0x106c) {
512 snprintf(buf, buflen, "AR5K_QUEUE_DFS_LOCAL_IFS_%d",
513 (u_int32_t)((address - 0x1040) / sizeof(u_int32_t)));
514 return AH_TRUE;
515 }
516 if (address >= 0x1080 && address <= 0x10ac) {
517 snprintf(buf, buflen, "AR5K_QUEUE_DFS_RETRY_LIMIT_%d",
518 (u_int32_t)((address - 0x1080) / sizeof(u_int32_t)));
519 return AH_TRUE;
520 }
521 if (address >= 0x10c0 && address <= 0x10ec) {
522 snprintf(buf, buflen, "AR5K_QUEUE_DFS_CHANNEL_TIME_%d",
523 (u_int32_t)((address - 0x10c0) / sizeof(u_int32_t)));
524 return AH_TRUE;
525 }
526 if (address >= 0x1100 && address <= 0x112c) {
527 snprintf(buf, buflen, "AR5K_QUEUE_DFS_MISC_%d",
528 (u_int32_t)((address - 0x1100) / sizeof(u_int32_t)));
529 return AH_TRUE;
530 }
531 if (address >= 0x1140 && address <= 0x116c) {
532 snprintf(buf, buflen, "AR5K_QUEUE_DFS_SEQNUM_%d",
533 (u_int32_t)((address - 0x1140) / sizeof(u_int32_t)));
534 return AH_TRUE;
535 }
536 if (address >= 0x4000 && address <= 0x5000) {
537 snprintf(buf, buflen, "(PCI_TIMING)_%d",
538 (u_int32_t)((address - 0x4000) / sizeof(u_int32_t)));
539 return AH_TRUE;
540 }
541 if (address >= 0x8700 && address <= 0x877c) {
542 snprintf(buf, buflen, "AR5K_RATE_DUR_%d",
543 (u_int32_t)((address - 0x8700) / sizeof(u_int32_t)));
544 return AH_TRUE;
545 }
546 if (address >= 0x8800 && address <= 0x9800) {
547 snprintf(buf, buflen, "AR5K_KEYTABLE_0_5211_%d",
548 (u_int32_t)((address - 0x8800) / sizeof(u_int32_t)));
549 return AH_TRUE;
550 }
551 if (address >= 0x9a00 && address <= 0x9afc) {
552 snprintf(buf, buflen, "AR5K_RF_GAIN_%d",
553 (u_int32_t)((address - 0x9a00) / sizeof(u_int32_t)));
554 return AH_TRUE;
555 }
556 if (address >= 0x9b00 && address <= 0x9bfc) {
557 snprintf(buf, buflen, "AR5K_BB_GAIN_%d",
558 (u_int32_t)((address - 0x9b00) / sizeof(u_int32_t)));
559 return AH_TRUE;
560 }
561 if (address >= 0xa180 && address <= 0xa1fc) {
562 snprintf(buf, buflen, "AR5K_PHY_PCDAC_TXPOWER_%d",
563 (u_int32_t)((address - 0xa180) / sizeof(u_int32_t)));
564 return AH_TRUE;
565 }
566 }
567
568 /* Everything else... */
569 snprintf(buf, buflen, "(unknown)");
570 return AH_FALSE;
571 }
572 EXPORT_SYMBOL(ath_hal_lookup_register_name);
573
574 static void
575 _print_decoded_register_delta(struct ath_hal *ah, const char *device_name,
576 HAL_BOOL prefer_alq, int regop,
577 u_int32_t address, u_int32_t v_old, u_int32_t v_new,
578 HAL_BOOL verbose)
579 {
580 #define BIT_UNCHANGED_ON "1"
581 #define BIT_UNCHANGED_OFF "."
582 #define BIT_CHANGED_ON "+"
583 #define BIT_CHANGED_OFF "-"
584 #define NYBBLE_SEPARATOR ""
585 #define BYTE_SEPARATOR " "
586 #define BIT_STATUS(_shift) \
587 (((v_old & (1 << _shift)) == (v_new & (1 << _shift))) ? \
588 (v_new & (1 << _shift) ? \
589 BIT_UNCHANGED_ON : BIT_UNCHANGED_OFF) : \
590 (v_new & (1 << _shift) ? \
591 BIT_CHANGED_ON : BIT_CHANGED_OFF))
592 char name[64] = "";
593 ath_hal_lookup_register_name(ah, name, sizeof(name), address);
594 ath_hal_printf(ah, prefer_alq,
595 "%s%s%s%23s:0x%04x:0x%08x:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s"
596 "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s:%s\n",
597 device_name ? device_name : "",
598 device_name ? ":" : "",
599 (regop == REGOP_READ ? "R:" :
600 (regop == REGOP_WRITE ? "W:" : "")),
601 (0 < strlen(name)) ? name : "(unknown)",
602 address,
603 v_new,
604 BIT_STATUS(31),
605 BIT_STATUS(30),
606 BIT_STATUS(29),
607 BIT_STATUS(28),
608 NYBBLE_SEPARATOR,
609 BIT_STATUS(27),
610 BIT_STATUS(26),
611 BIT_STATUS(25),
612 BIT_STATUS(24),
613 BYTE_SEPARATOR,
614 BIT_STATUS(23),
615 BIT_STATUS(22),
616 BIT_STATUS(21),
617 BIT_STATUS(20),
618 NYBBLE_SEPARATOR,
619 BIT_STATUS(19),
620 BIT_STATUS(18),
621 BIT_STATUS(17),
622 BIT_STATUS(16),
623 BYTE_SEPARATOR,
624 BIT_STATUS(15),
625 BIT_STATUS(14),
626 BIT_STATUS(13),
627 BIT_STATUS(12),
628 NYBBLE_SEPARATOR,
629 BIT_STATUS(11),
630 BIT_STATUS(10),
631 BIT_STATUS( 9),
632 BIT_STATUS( 8),
633 BYTE_SEPARATOR,
634 BIT_STATUS( 7),
635 BIT_STATUS( 6),
636 BIT_STATUS( 5),
637 BIT_STATUS( 4),
638 NYBBLE_SEPARATOR,
639 BIT_STATUS( 3),
640 BIT_STATUS( 2),
641 BIT_STATUS( 1),
642 BIT_STATUS( 0),
643 (ath_hal_func ?: "unknown")
644 );
645 #undef BIT_UNCHANGED_ON
646 #undef BIT_UNCHANGED_OFF
647 #undef BIT_CHANGED_ON
648 #undef BIT_CHANGED_OFF
649 #undef NYBBLE_SEPARATOR
650 #undef BYTE_SEPARATOR
651 #undef BIT_STATUS
652 }
653
654 /* For any addresses we wish to get a symbolic representation of (i.e. flag
655 * names) we can add it to this helper function and a subsequent line is
656 * printed with the status in symbolic form. */
657 static void
658 _print_decoded_register_bitfields(struct ath_hal *ah, const char *device_name,
659 HAL_BOOL prefer_alq, int regop,
660 u_int32_t address, u_int32_t old_v,
661 u_int32_t v, HAL_BOOL verbose)
662 {
663 /* constants from openhal ar5212reg.h */
664 #define AR5K_AR5212_PHY_ERR_FIL 0x810c
665 #define AR5K_AR5212_PHY_ERR_FIL_RADAR 0x00000020
666 #define AR5K_AR5212_PHY_ERR_FIL_OFDM 0x00020000
667 #define AR5K_AR5212_PHY_ERR_FIL_CCK 0x02000000
668 #define AR5K_AR5212_PIMR 0x00a0
669 #define AR5K_AR5212_PISR 0x0080
670 #define AR5K_AR5212_PIMR_RXOK 0x00000001
671 #define AR5K_AR5212_PIMR_RXDESC 0x00000002
672 #define AR5K_AR5212_PIMR_RXERR 0x00000004
673 #define AR5K_AR5212_PIMR_RXNOFRM 0x00000008
674 #define AR5K_AR5212_PIMR_RXEOL 0x00000010
675 #define AR5K_AR5212_PIMR_RXORN 0x00000020
676 #define AR5K_AR5212_PIMR_TXOK 0x00000040
677 #define AR5K_AR5212_PIMR_TXDESC 0x00000080
678 #define AR5K_AR5212_PIMR_TXERR 0x00000100
679 #define AR5K_AR5212_PIMR_TXNOFRM 0x00000200
680 #define AR5K_AR5212_PIMR_TXEOL 0x00000400
681 #define AR5K_AR5212_PIMR_TXURN 0x00000800
682 #define AR5K_AR5212_PIMR_MIB 0x00001000
683 #define AR5K_AR5212_PIMR_SWI 0x00002000
684 #define AR5K_AR5212_PIMR_RXPHY 0x00004000
685 #define AR5K_AR5212_PIMR_RXKCM 0x00008000
686 #define AR5K_AR5212_PIMR_SWBA 0x00010000
687 #define AR5K_AR5212_PIMR_BRSSI 0x00020000
688 #define AR5K_AR5212_PIMR_BMISS 0x00040000
689 #define AR5K_AR5212_PIMR_HIUERR 0x00080000
690 #define AR5K_AR5212_PIMR_BNR 0x00100000
691 #define AR5K_AR5212_PIMR_RXCHIRP 0x00200000
692 #define AR5K_AR5212_PIMR_TIM 0x00800000
693 #define AR5K_AR5212_PIMR_BCNMISC 0x00800000
694 #define AR5K_AR5212_PIMR_GPIO 0x01000000
695 #define AR5K_AR5212_PIMR_QCBRORN 0x02000000
696 #define AR5K_AR5212_PIMR_QCBRURN 0x04000000
697 #define AR5K_AR5212_PIMR_QTRIG 0x08000000
698 char name[128];
699 ath_hal_lookup_register_name(ah, name, sizeof(name), address);
700
701 if (address == AR5K_AR5212_PHY_ERR_FIL) {
702 ath_hal_printf(ah, prefer_alq,
703 "%s%s%s%18s info:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s"
704 "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s:%s\n",
705 device_name ? device_name : "",
706 device_name ? ":" : "",
707 (regop == REGOP_READ ? "R:" :
708 (regop == REGOP_WRITE ? "W:" : "")),
709 (0 < strlen(name)) ? name : "(unknown)",
710 (v & (1 << 31) ? " (1 << 31)" : ""),
711 (v & (1 << 30) ? " (1 << 30)" : ""),
712 (v & (1 << 29) ? " (1 << 29)" : ""),
713 (v & (1 << 28) ? " (1 << 28)" : ""),
714 (v & (1 << 27) ? " (1 << 27)" : ""),
715 (v & (1 << 26) ? " (1 << 26)" : ""),
716 (v & AR5K_AR5212_PHY_ERR_FIL_CCK ? " CCK" : ""),
717 (v & (1 << 24) ? " (1 << 24)" : ""),
718 (v & (1 << 23) ? " (1 << 23)" : ""),
719 (v & (1 << 22) ? " (1 << 22)" : ""),
720 (v & (1 << 21) ? " (1 << 21)" : ""),
721 (v & (1 << 20) ? " (1 << 20)" : ""),
722 (v & (1 << 19) ? " (1 << 19)" : ""),
723 (v & (1 << 18) ? " (1 << 18)" : ""),
724 (v & AR5K_AR5212_PHY_ERR_FIL_OFDM ? " OFDM" : ""),
725 (v & (1 << 16) ? " (1 << 16)" : ""),
726 (v & (1 << 15) ? " (1 << 15)" : ""),
727 (v & (1 << 14) ? " (1 << 14)" : ""),
728 (v & (1 << 13) ? " (1 << 13)" : ""),
729 (v & (1 << 12) ? " (1 << 12)" : ""),
730 (v & (1 << 11) ? " (1 << 11)" : ""),
731 (v & (1 << 10) ? " (1 << 10)" : ""),
732 (v & (1 << 9) ? " (1 << 9)" : ""),
733 (v & (1 << 8) ? " (1 << 8)" : ""),
734 (v & (1 << 7) ? " (1 << 7)" : ""),
735 (v & (1 << 6) ? " (1 << 6)" : ""),
736 (v & AR5K_AR5212_PHY_ERR_FIL_RADAR ? " RADAR" : ""),
737 (v & (1 << 4) ? " (1 << 4)" : ""),
738 (v & (1 << 3) ? " (1 << 3)" : ""),
739 (v & (1 << 2) ? " (1 << 2)" : ""),
740 (v & (1 << 1) ? " (1 << 1)" : ""),
741 (v & (1 << 0) ? " (1 << 0)" : ""),
742 (ath_hal_func ?: "unknown")
743 );
744 }
745 if (address == AR5K_AR5212_PISR || address == AR5K_AR5212_PIMR) {
746 ath_hal_printf(ah, prefer_alq,
747 "%s%s%s%18s info:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s"
748 "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s:%s\n",
749 device_name ? device_name : "",
750 device_name ? ":" : "",
751 (regop == REGOP_READ ? "R:" :
752 (regop == REGOP_WRITE ? "W:" : "")),
753 (0 < strlen(name)) ? name : "(unknown)",
754 (v & HAL_INT_GLOBAL ? " HAL_INT_GLOBAL" : ""),
755 (v & HAL_INT_FATAL ? " HAL_INT_FATAL" : ""),
756 (v & (1 << 29) ? " (1 << 29)" : ""),
757 (v & (1 << 28) ? " (1 << 28)" : ""),
758 (v & AR5K_AR5212_PIMR_RXOK ? " RXOK" : ""),
759 (v & AR5K_AR5212_PIMR_RXDESC ? " RXDESC" : ""),
760 (v & AR5K_AR5212_PIMR_RXERR ? " RXERR" : ""),
761 (v & AR5K_AR5212_PIMR_RXNOFRM ? " RXNOFRM" : ""),
762 (v & AR5K_AR5212_PIMR_RXEOL ? " RXEOL" : ""),
763 (v & AR5K_AR5212_PIMR_RXORN ? " RXORN" : ""),
764 (v & AR5K_AR5212_PIMR_TXOK ? " TXOK" : ""),
765 (v & AR5K_AR5212_PIMR_TXDESC ? " TXDESC" : ""),
766 (v & AR5K_AR5212_PIMR_TXERR ? " TXERR" : ""),
767 (v & AR5K_AR5212_PIMR_TXNOFRM ? " TXNOFRM" : ""),
768 (v & AR5K_AR5212_PIMR_TXEOL ? " TXEOL" : ""),
769 (v & AR5K_AR5212_PIMR_TXURN ? " TXURN" : ""),
770 (v & AR5K_AR5212_PIMR_MIB ? " MIB" : ""),
771 (v & AR5K_AR5212_PIMR_SWI ? " SWI" : ""),
772 (v & AR5K_AR5212_PIMR_RXPHY ? " RXPHY" : ""),
773 (v & AR5K_AR5212_PIMR_RXKCM ? " RXKCM" : ""),
774 (v & AR5K_AR5212_PIMR_SWBA ? " SWBA" : ""),
775 (v & AR5K_AR5212_PIMR_BRSSI ? " BRSSI" : ""),
776 (v & AR5K_AR5212_PIMR_BMISS ? " BMISS" : ""),
777 (v & AR5K_AR5212_PIMR_HIUERR ? " HIUERR" : ""),
778 (v & AR5K_AR5212_PIMR_BNR ? " BNR" : ""),
779 (v & AR5K_AR5212_PIMR_RXCHIRP ? " RXCHIRP" : ""),
780 (v & AR5K_AR5212_PIMR_TIM ? " TIM" : ""),
781 (v & AR5K_AR5212_PIMR_BCNMISC ? " BCNMISC" : ""),
782 (v & AR5K_AR5212_PIMR_GPIO ? " GPIO" : ""),
783 (v & AR5K_AR5212_PIMR_QCBRORN ? " QCBRORN" : ""),
784 (v & AR5K_AR5212_PIMR_QCBRURN ? " QCBRURN" : ""),
785 (v & AR5K_AR5212_PIMR_QTRIG ? " QTRIG" : ""),
786 (ath_hal_func ?: "unknown")
787 );
788 }
789 #undef AR5K_AR5212_PHY_ERR_FIL
790 #undef AR5K_AR5212_PHY_ERR_FIL_RADAR
791 #undef AR5K_AR5212_PHY_ERR_FIL_OFDM
792 #undef AR5K_AR5212_PHY_ERR_FIL_CCK
793 #undef AR5K_AR5212_PIMR
794 #undef AR5K_AR5212_PISR
795 #undef AR5K_AR5212_PIMR_RXOK
796 #undef AR5K_AR5212_PIMR_RXDESC
797 #undef AR5K_AR5212_PIMR_RXERR
798 #undef AR5K_AR5212_PIMR_RXNOFRM
799 #undef AR5K_AR5212_PIMR_RXEOL
800 #undef AR5K_AR5212_PIMR_RXORN
801 #undef AR5K_AR5212_PIMR_TXOK
802 #undef AR5K_AR5212_PIMR_TXDESC
803 #undef AR5K_AR5212_PIMR_TXERR
804 #undef AR5K_AR5212_PIMR_TXNOFRM
805 #undef AR5K_AR5212_PIMR_TXEOL
806 #undef AR5K_AR5212_PIMR_TXURN
807 #undef AR5K_AR5212_PIMR_MIB
808 #undef AR5K_AR5212_PIMR_SWI
809 #undef AR5K_AR5212_PIMR_RXPHY
810 #undef AR5K_AR5212_PIMR_RXKCM
811 #undef AR5K_AR5212_PIMR_SWBA
812 #undef AR5K_AR5212_PIMR_BRSSI
813 #undef AR5K_AR5212_PIMR_BMISS
814 #undef AR5K_AR5212_PIMR_HIUERR
815 #undef AR5K_AR5212_PIMR_BNR
816 #undef AR5K_AR5212_PIMR_RXCHIRP
817 #undef AR5K_AR5212_PIMR_TIM
818 #undef AR5K_AR5212_PIMR_BCNMISC
819 #undef AR5K_AR5212_PIMR_GPIO
820 #undef AR5K_AR5212_PIMR_QCBRORN
821 #undef AR5K_AR5212_PIMR_QCBRURN
822 #undef AR5K_AR5212_PIMR_QTRIG
823 }
824
825 /* Print out a single register name/address/value in hex and binary */
826 static inline void
827 _print_decoded_register(struct ath_hal *ah, const char *device_name,
828 HAL_BOOL prefer_alq, int regop,
829 u_int32_t address, u_int32_t oldval,
830 u_int32_t newval, HAL_BOOL verbose)
831 {
832 _print_decoded_register_delta(ah, device_name, prefer_alq, regop,
833 address, oldval, newval, verbose);
834 _print_decoded_register_bitfields(ah, device_name, prefer_alq, regop,
835 address, oldval, newval, verbose);
836 }
837
838 /* Print out a single register name/address/value in hex and binary */
839 static inline void
840 _print_undecoded_register(struct ath_hal *ah, const char *device_name,
841 HAL_BOOL prefer_alq, int regop,
842 u_int32_t address, u_int32_t newval)
843 {
844 ath_hal_printf(ah, prefer_alq, "%s%s%s0x%05x = 0x%08x - %s\n",
845 device_name ? device_name : "",
846 device_name ? ":" : "",
847 (regop == REGOP_READ ? "R:" :
848 (regop == REGOP_WRITE ? "W:" : "")),
849 address,
850 newval,
851 (ath_hal_func ?: "unknown")
852 );
853 }
854
855 /* Print out a single register name/address/value in hex and binary */
856 void
857 ath_hal_print_decoded_register(struct ath_hal *ah,
858 const char *device_name,
859 u_int32_t address, u_int32_t oldval,
860 u_int32_t newval, HAL_BOOL bitfields)
861 {
862 _print_decoded_register(ah, device_name, AH_FALSE /* don't use alq */,
863 REGOP_NONE, address, oldval, newval, bitfields);
864 }
865 EXPORT_SYMBOL(ath_hal_print_decoded_register);
866
867 /* Print out a single register in simple undecoded form */
868 void
869 ath_hal_print_register(struct ath_hal *ah,
870 const char *device_name,
871 u_int32_t address, u_int32_t newval)
872 {
873 _print_undecoded_register(ah, device_name, AH_FALSE /* don't use alq */,
874 REGOP_NONE, address,
875 newval);
876 }
877 EXPORT_SYMBOL(ath_hal_print_register);
878
879 static inline void
880 _trace_regop(struct ath_hal *ah, int regop, u_int address, u_int32_t value)
881 {
882 #ifdef AH_DEBUG
883 switch (ath_hal_debug) {
884 case HAL_DEBUG_OFF:
885 break;
886 case HAL_DEBUG_REGOPS:
887 /* XXX: Identify wifiX */
888 _print_undecoded_register(ah, ath_hal_device, AH_TRUE /* prefer alq */,
889 regop, address,
890 value);
891 break;
892 default:
893 /* XXX: Identify wifiX */
894 _print_decoded_register(ah, ath_hal_device, AH_TRUE /* prefer alq */,
895 regop, address,
896 ((regop == REGOP_WRITE && ath_hal_debug >= HAL_DEBUG_REGOPS_DELTAS) ?
897 _OS_REG_READ(ah, address) :
898 value),
899 value,
900 (ath_hal_debug >= HAL_DEBUG_REGOPS_BITFIELDS));
901 break;
902 }
903
904 #endif /* AH_DEBUG */
905 }
906
907 #if defined(AH_DEBUG) || defined(AH_REGOPS_FUNC) || defined(AH_DEBUG_ALQ)
908 /*
909 * Memory-mapped device register read/write. These are here
910 * as routines when debugging support is enabled and/or when
911 * explicitly configured to use function calls. The latter is
912 * for architectures that might need to do something before
913 * referencing memory (e.g. remap an i/o window).
914 *
915 * This should only be called while holding the lock, sc->sc_hal_lock.
916 *
917 * NB: see the comments in ah_osdep.h about byte-swapping register
918 * reads and writes to understand what's going on below.
919 */
920 void __ahdecl
921 ath_hal_reg_write(struct ath_hal *ah, u_int address, u_int32_t value)
922 {
923 _trace_regop(ah, REGOP_WRITE, address, value);
924 _OS_REG_WRITE(ah, address, value);
925 }
926 EXPORT_SYMBOL(ath_hal_reg_write);
927
928 /* This should only be called while holding the lock, sc->sc_hal_lock. */
929 u_int32_t __ahdecl
930 ath_hal_reg_read(struct ath_hal *ah, u_int address)
931 {
932 u_int32_t val = _OS_REG_READ(ah, address);
933 _trace_regop(ah, REGOP_READ, address, val);
934 return val;
935 }
936 EXPORT_SYMBOL(ath_hal_reg_read);
937 #endif
938
939 /*
940 * Delay n microseconds.
941 */
942 void __ahdecl
943 ath_hal_delay(int n)
944 {
945 udelay(n);
946 }
947
948 /*
949 * Allocate/free memory.
950 */
951
952 void * __ahdecl
953 ath_hal_malloc(size_t size)
954 {
955 return kzalloc(size, GFP_KERNEL);
956 }
957
958 void __ahdecl
959 ath_hal_free(void *p)
960 {
961 kfree(p);
962 }
963
964 void __ahdecl
965 ath_hal_memzero(void *dst, size_t n)
966 {
967 memset(dst, 0, n);
968 }
969 EXPORT_SYMBOL(ath_hal_memzero);
970
971 void * __ahdecl
972 ath_hal_memcpy(void *dst, const void *src, size_t n)
973 {
974 return memcpy(dst, src, n);
975 }
976 EXPORT_SYMBOL(ath_hal_memcpy);
977
978 int __ahdecl
979 ath_hal_memcmp(const void *a, const void *b, size_t n)
980 {
981 return memcmp(a, b, n);
982 }
983 EXPORT_SYMBOL(ath_hal_memcmp);
984
985 static ctl_table ath_hal_sysctls[] = {
986 #ifdef AH_DEBUG
987 { .ctl_name = CTL_AUTO,
988 .procname = "debug",
989 .mode = 0644,
990 .data = &ath_hal_debug,
991 .maxlen = sizeof(ath_hal_debug),
992 .proc_handler = proc_dointvec
993 },
994 #endif /* AH_DEBUG */
995 { .ctl_name = CTL_AUTO,
996 .procname = "dma_beacon_response_time",
997 .data = &ath_hal_dma_beacon_response_time,
998 .maxlen = sizeof(ath_hal_dma_beacon_response_time),
999 .mode = 0644,
1000 .proc_handler = proc_dointvec
1001 },
1002 { .ctl_name = CTL_AUTO,
1003 .procname = "sw_beacon_response_time",
1004 .mode = 0644,
1005 .data = &ath_hal_sw_beacon_response_time,
1006 .maxlen = sizeof(ath_hal_sw_beacon_response_time),
1007 .proc_handler = proc_dointvec
1008 },
1009 { .ctl_name = CTL_AUTO,
1010 .procname = "swba_backoff",
1011 .mode = 0644,
1012 .data = &ath_hal_additional_swba_backoff,
1013 .maxlen = sizeof(ath_hal_additional_swba_backoff),
1014 .proc_handler = proc_dointvec
1015 },
1016 #ifdef AH_DEBUG_ALQ
1017 { .ctl_name = CTL_AUTO,
1018 .procname = "alq",
1019 .mode = 0644,
1020 .proc_handler = sysctl_hw_ath_hal_log
1021 },
1022 { .ctl_name = CTL_AUTO,
1023 .procname = "alq_size",
1024 .mode = 0644,
1025 .data = &ath_hal_alq_qsize,
1026 .maxlen = sizeof(ath_hal_alq_qsize),
1027 .proc_handler = proc_dointvec
1028 },
1029 { .ctl_name = CTL_AUTO,
1030 .procname = "alq_lost",
1031 .mode = 0644,
1032 .data = &ath_hal_alq_lost,
1033 .maxlen = sizeof(ath_hal_alq_lost),
1034 .proc_handler = proc_dointvec
1035 },
1036 #endif /* AH_DEBUG_ALQ */
1037 { 0 }
1038 };
1039 static ctl_table ath_hal_table[] = {
1040 { .ctl_name = CTL_AUTO,
1041 .procname = "hal",
1042 .mode = 0555,
1043 .child = ath_hal_sysctls
1044 }, { 0 }
1045 };
1046 static ctl_table ath_ath_table[] = {
1047 { .ctl_name = DEV_ATH,
1048 .procname = "ath",
1049 .mode = 0555,
1050 .child = ath_hal_table
1051 }, { 0 }
1052 };
1053 static ctl_table ath_root_table[] = {
1054 { .ctl_name = CTL_DEV,
1055 .procname = "dev",
1056 .mode = 0555,
1057 .child = ath_ath_table
1058 }, { 0 }
1059 };
1060 static struct ctl_table_header *ath_hal_sysctl_header;
1061
1062 static void
1063 ath_hal_sysctl_register(void)
1064 {
1065 static int initialized = 0;
1066
1067 if (!initialized) {
1068 ath_hal_sysctl_header =
1069 ATH_REGISTER_SYSCTL_TABLE(ath_root_table);
1070 initialized = 1;
1071 }
1072 }
1073
1074 static void
1075 ath_hal_sysctl_unregister(void)
1076 {
1077 if (ath_hal_sysctl_header)
1078 unregister_sysctl_table(ath_hal_sysctl_header);
1079 }
1080
1081 /*
1082 * Module glue.
1083 */
1084 #include "version.h"
1085 #if 0
1086 static char *dev_info = "ath_hal";
1087 #endif
1088
1089 MODULE_AUTHOR("Errno Consulting, Sam Leffler");
1090 MODULE_DESCRIPTION("Atheros Hardware Access Layer (HAL)");
1091 MODULE_SUPPORTED_DEVICE("Atheros WLAN devices");
1092 #ifdef MODULE_VERSION
1093 MODULE_VERSION(TARGET ": " ATH_HAL_VERSION);
1094 #endif
1095 #ifdef MODULE_LICENSE
1096 MODULE_LICENSE("Proprietary");
1097 #endif
1098
1099 EXPORT_SYMBOL(ath_hal_probe);
1100 EXPORT_SYMBOL(_ath_hal_attach);
1101 EXPORT_SYMBOL(_ath_hal_detach);
1102 EXPORT_SYMBOL(ath_hal_init_channels);
1103 EXPORT_SYMBOL(ath_hal_getwirelessmodes);
1104 EXPORT_SYMBOL(ath_hal_computetxtime);
1105 EXPORT_SYMBOL(ath_hal_mhz2ieee);
1106 EXPORT_SYMBOL(ath_hal_process_noisefloor);
1107
1108 #ifdef MMIOTRACE
1109 extern void (*kmmio_logmsg)(struct ath_hal *ah, u8 write, u_int address, u_int32_t val);
1110
1111 void _trace_regop(struct ath_hal *ah, int regop, u_int address, u_int32_t newval);
1112 static void _kmmio_logmsg(struct ath_hal *ah, u8 write, u_int address, u_int32_t val) {
1113 _trace_regop(ah, write ? REGOP_WRITE : REGOP_READ, address, val);
1114 }
1115 #endif /* MMIOTRACE */
1116
1117
1118 static int __init
1119 init_ath_hal(void)
1120 {
1121 const char *sep;
1122 int i;
1123 #ifdef MMIOTRACE
1124 kmmio_logmsg = _kmmio_logmsg;
1125 #endif
1126
1127 sep = "";
1128 for (i = 0; ath_hal_buildopts[i] != NULL; i++) {
1129 printk("%s%s", sep, ath_hal_buildopts[i]);
1130 sep = ", ";
1131 }
1132 printk(")\n");
1133 ath_hal_sysctl_register();
1134 return (0);
1135 }
1136 module_init(init_ath_hal);
1137
1138 static void __exit
1139 exit_ath_hal(void)
1140 {
1141 #ifdef MMIOTRACE
1142 kmmio_logmsg = NULL;
1143 #endif
1144 ath_hal_sysctl_unregister();
1145 }
1146 module_exit(exit_ath_hal);
Stable & featurefull patchset based on Linus's git branch