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[linux-2.6/zen-sources.git] / drivers / net / sis900.c
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1 /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
2 Copyright 1999 Silicon Integrated System Corporation
3 Revision: 1.08.10 Apr. 2 2006
5 Modified from the driver which is originally written by Donald Becker.
7 This software may be used and distributed according to the terms
8 of the GNU General Public License (GPL), incorporated herein by reference.
9 Drivers based on this skeleton fall under the GPL and must retain
10 the authorship (implicit copyright) notice.
12 References:
13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
14 preliminary Rev. 1.0 Jan. 14, 1998
15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
16 preliminary Rev. 1.0 Nov. 10, 1998
17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
18 preliminary Rev. 1.0 Jan. 18, 1998
20 Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support
21 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support
22 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages
23 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support
24 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
26 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support
27 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function
28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
31 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
33 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup
34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
35 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
36 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning
37 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig
38 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support
39 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E eqaulizer workaround rule
40 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
41 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
42 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4
43 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
44 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
45 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com)
46 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release
47 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx
48 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support
49 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
52 #include <linux/module.h>
53 #include <linux/moduleparam.h>
54 #include <linux/kernel.h>
55 #include <linux/string.h>
56 #include <linux/timer.h>
57 #include <linux/errno.h>
58 #include <linux/ioport.h>
59 #include <linux/slab.h>
60 #include <linux/interrupt.h>
61 #include <linux/pci.h>
62 #include <linux/netdevice.h>
63 #include <linux/init.h>
64 #include <linux/mii.h>
65 #include <linux/etherdevice.h>
66 #include <linux/skbuff.h>
67 #include <linux/delay.h>
68 #include <linux/ethtool.h>
69 #include <linux/crc32.h>
70 #include <linux/bitops.h>
71 #include <linux/dma-mapping.h>
73 #include <asm/processor.h> /* Processor type for cache alignment. */
74 #include <asm/io.h>
75 #include <asm/irq.h>
76 #include <asm/uaccess.h> /* User space memory access functions */
78 #include "sis900.h"
80 #define SIS900_MODULE_NAME "sis900"
81 #define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006"
83 static char version[] __devinitdata =
84 KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
86 static int max_interrupt_work = 40;
87 static int multicast_filter_limit = 128;
89 static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */
91 #define SIS900_DEF_MSG \
92 (NETIF_MSG_DRV | \
93 NETIF_MSG_LINK | \
94 NETIF_MSG_RX_ERR | \
95 NETIF_MSG_TX_ERR)
97 /* Time in jiffies before concluding the transmitter is hung. */
98 #define TX_TIMEOUT (4*HZ)
100 enum {
101 SIS_900 = 0,
102 SIS_7016
104 static const char * card_names[] = {
105 "SiS 900 PCI Fast Ethernet",
106 "SiS 7016 PCI Fast Ethernet"
108 static struct pci_device_id sis900_pci_tbl [] = {
109 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
110 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
111 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
112 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
113 {0,}
115 MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
117 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
119 static const struct mii_chip_info {
120 const char * name;
121 u16 phy_id0;
122 u16 phy_id1;
123 u8 phy_types;
124 #define HOME 0x0001
125 #define LAN 0x0002
126 #define MIX 0x0003
127 #define UNKNOWN 0x0
128 } mii_chip_table[] = {
129 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
130 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
131 { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN },
132 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN },
133 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN },
134 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
135 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
136 { "ICS LAN PHY", 0x0015, 0xF440, LAN },
137 { "ICS LAN PHY", 0x0143, 0xBC70, LAN },
138 { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
139 { "NS 83847 PHY", 0x2000, 0x5C30, MIX },
140 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
141 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
142 {NULL,},
145 struct mii_phy {
146 struct mii_phy * next;
147 int phy_addr;
148 u16 phy_id0;
149 u16 phy_id1;
150 u16 status;
151 u8 phy_types;
154 typedef struct _BufferDesc {
155 u32 link;
156 u32 cmdsts;
157 u32 bufptr;
158 } BufferDesc;
160 struct sis900_private {
161 struct pci_dev * pci_dev;
163 spinlock_t lock;
165 struct mii_phy * mii;
166 struct mii_phy * first_mii; /* record the first mii structure */
167 unsigned int cur_phy;
168 struct mii_if_info mii_info;
170 struct timer_list timer; /* Link status detection timer. */
171 u8 autong_complete; /* 1: auto-negotiate complete */
173 u32 msg_enable;
175 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
176 unsigned int cur_tx, dirty_tx;
178 /* The saved address of a sent/receive-in-place packet buffer */
179 struct sk_buff *tx_skbuff[NUM_TX_DESC];
180 struct sk_buff *rx_skbuff[NUM_RX_DESC];
181 BufferDesc *tx_ring;
182 BufferDesc *rx_ring;
184 dma_addr_t tx_ring_dma;
185 dma_addr_t rx_ring_dma;
187 unsigned int tx_full; /* The Tx queue is full. */
188 u8 host_bridge_rev;
189 u8 chipset_rev;
192 MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
193 MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
194 MODULE_LICENSE("GPL");
196 module_param(multicast_filter_limit, int, 0444);
197 module_param(max_interrupt_work, int, 0444);
198 module_param(sis900_debug, int, 0444);
199 MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
200 MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
201 MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
203 #ifdef CONFIG_NET_POLL_CONTROLLER
204 static void sis900_poll(struct net_device *dev);
205 #endif
206 static int sis900_open(struct net_device *net_dev);
207 static int sis900_mii_probe (struct net_device * net_dev);
208 static void sis900_init_rxfilter (struct net_device * net_dev);
209 static u16 read_eeprom(long ioaddr, int location);
210 static int mdio_read(struct net_device *net_dev, int phy_id, int location);
211 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
212 static void sis900_timer(unsigned long data);
213 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
214 static void sis900_tx_timeout(struct net_device *net_dev);
215 static void sis900_init_tx_ring(struct net_device *net_dev);
216 static void sis900_init_rx_ring(struct net_device *net_dev);
217 static int sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
218 static int sis900_rx(struct net_device *net_dev);
219 static void sis900_finish_xmit (struct net_device *net_dev);
220 static irqreturn_t sis900_interrupt(int irq, void *dev_instance);
221 static int sis900_close(struct net_device *net_dev);
222 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
223 static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
224 static void set_rx_mode(struct net_device *net_dev);
225 static void sis900_reset(struct net_device *net_dev);
226 static void sis630_set_eq(struct net_device *net_dev, u8 revision);
227 static int sis900_set_config(struct net_device *dev, struct ifmap *map);
228 static u16 sis900_default_phy(struct net_device * net_dev);
229 static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
230 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
231 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
232 static void sis900_set_mode (long ioaddr, int speed, int duplex);
233 static const struct ethtool_ops sis900_ethtool_ops;
236 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
237 * @pci_dev: the sis900 pci device
238 * @net_dev: the net device to get address for
240 * Older SiS900 and friends, use EEPROM to store MAC address.
241 * MAC address is read from read_eeprom() into @net_dev->dev_addr.
244 static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
246 long ioaddr = pci_resource_start(pci_dev, 0);
247 u16 signature;
248 int i;
250 /* check to see if we have sane EEPROM */
251 signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
252 if (signature == 0xffff || signature == 0x0000) {
253 printk (KERN_WARNING "%s: Error EERPOM read %x\n",
254 pci_name(pci_dev), signature);
255 return 0;
258 /* get MAC address from EEPROM */
259 for (i = 0; i < 3; i++)
260 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
262 return 1;
266 * sis630e_get_mac_addr - Get MAC address for SiS630E model
267 * @pci_dev: the sis900 pci device
268 * @net_dev: the net device to get address for
270 * SiS630E model, use APC CMOS RAM to store MAC address.
271 * APC CMOS RAM is accessed through ISA bridge.
272 * MAC address is read into @net_dev->dev_addr.
275 static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev,
276 struct net_device *net_dev)
278 struct pci_dev *isa_bridge = NULL;
279 u8 reg;
280 int i;
282 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
283 if (!isa_bridge)
284 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
285 if (!isa_bridge) {
286 printk(KERN_WARNING "%s: Can not find ISA bridge\n",
287 pci_name(pci_dev));
288 return 0;
290 pci_read_config_byte(isa_bridge, 0x48, &reg);
291 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
293 for (i = 0; i < 6; i++) {
294 outb(0x09 + i, 0x70);
295 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
297 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
298 pci_dev_put(isa_bridge);
300 return 1;
305 * sis635_get_mac_addr - Get MAC address for SIS635 model
306 * @pci_dev: the sis900 pci device
307 * @net_dev: the net device to get address for
309 * SiS635 model, set MAC Reload Bit to load Mac address from APC
310 * to rfdr. rfdr is accessed through rfcr. MAC address is read into
311 * @net_dev->dev_addr.
314 static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,
315 struct net_device *net_dev)
317 long ioaddr = net_dev->base_addr;
318 u32 rfcrSave;
319 u32 i;
321 rfcrSave = inl(rfcr + ioaddr);
323 outl(rfcrSave | RELOAD, ioaddr + cr);
324 outl(0, ioaddr + cr);
326 /* disable packet filtering before setting filter */
327 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
329 /* load MAC addr to filter data register */
330 for (i = 0 ; i < 3 ; i++) {
331 outl((i << RFADDR_shift), ioaddr + rfcr);
332 *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr);
335 /* enable packet filtering */
336 outl(rfcrSave | RFEN, rfcr + ioaddr);
338 return 1;
342 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
343 * @pci_dev: the sis900 pci device
344 * @net_dev: the net device to get address for
346 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
347 * is shared by
348 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
349 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
350 * by LAN, otherwise is not. After MAC address is read from EEPROM, send
351 * EEDONE signal to refuse EEPROM access by LAN.
352 * The EEPROM map of SiS962 or SiS963 is different to SiS900.
353 * The signature field in SiS962 or SiS963 spec is meaningless.
354 * MAC address is read into @net_dev->dev_addr.
357 static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,
358 struct net_device *net_dev)
360 long ioaddr = net_dev->base_addr;
361 long ee_addr = ioaddr + mear;
362 u32 waittime = 0;
363 int i;
365 outl(EEREQ, ee_addr);
366 while(waittime < 2000) {
367 if(inl(ee_addr) & EEGNT) {
369 /* get MAC address from EEPROM */
370 for (i = 0; i < 3; i++)
371 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
373 outl(EEDONE, ee_addr);
374 return 1;
375 } else {
376 udelay(1);
377 waittime ++;
380 outl(EEDONE, ee_addr);
381 return 0;
385 * sis900_probe - Probe for sis900 device
386 * @pci_dev: the sis900 pci device
387 * @pci_id: the pci device ID
389 * Check and probe sis900 net device for @pci_dev.
390 * Get mac address according to the chip revision,
391 * and assign SiS900-specific entries in the device structure.
392 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
395 static int __devinit sis900_probe(struct pci_dev *pci_dev,
396 const struct pci_device_id *pci_id)
398 struct sis900_private *sis_priv;
399 struct net_device *net_dev;
400 struct pci_dev *dev;
401 dma_addr_t ring_dma;
402 void *ring_space;
403 long ioaddr;
404 int i, ret;
405 const char *card_name = card_names[pci_id->driver_data];
406 const char *dev_name = pci_name(pci_dev);
407 DECLARE_MAC_BUF(mac);
409 /* when built into the kernel, we only print version if device is found */
410 #ifndef MODULE
411 static int printed_version;
412 if (!printed_version++)
413 printk(version);
414 #endif
416 /* setup various bits in PCI command register */
417 ret = pci_enable_device(pci_dev);
418 if(ret) return ret;
420 i = pci_set_dma_mask(pci_dev, DMA_32BIT_MASK);
421 if(i){
422 printk(KERN_ERR "sis900.c: architecture does not support "
423 "32bit PCI busmaster DMA\n");
424 return i;
427 pci_set_master(pci_dev);
429 net_dev = alloc_etherdev(sizeof(struct sis900_private));
430 if (!net_dev)
431 return -ENOMEM;
432 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
434 /* We do a request_region() to register /proc/ioports info. */
435 ioaddr = pci_resource_start(pci_dev, 0);
436 ret = pci_request_regions(pci_dev, "sis900");
437 if (ret)
438 goto err_out;
440 sis_priv = net_dev->priv;
441 net_dev->base_addr = ioaddr;
442 net_dev->irq = pci_dev->irq;
443 sis_priv->pci_dev = pci_dev;
444 spin_lock_init(&sis_priv->lock);
446 pci_set_drvdata(pci_dev, net_dev);
448 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
449 if (!ring_space) {
450 ret = -ENOMEM;
451 goto err_out_cleardev;
453 sis_priv->tx_ring = (BufferDesc *)ring_space;
454 sis_priv->tx_ring_dma = ring_dma;
456 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
457 if (!ring_space) {
458 ret = -ENOMEM;
459 goto err_unmap_tx;
461 sis_priv->rx_ring = (BufferDesc *)ring_space;
462 sis_priv->rx_ring_dma = ring_dma;
464 /* The SiS900-specific entries in the device structure. */
465 net_dev->open = &sis900_open;
466 net_dev->hard_start_xmit = &sis900_start_xmit;
467 net_dev->stop = &sis900_close;
468 net_dev->set_config = &sis900_set_config;
469 net_dev->set_multicast_list = &set_rx_mode;
470 net_dev->do_ioctl = &mii_ioctl;
471 net_dev->tx_timeout = sis900_tx_timeout;
472 net_dev->watchdog_timeo = TX_TIMEOUT;
473 net_dev->ethtool_ops = &sis900_ethtool_ops;
475 #ifdef CONFIG_NET_POLL_CONTROLLER
476 net_dev->poll_controller = &sis900_poll;
477 #endif
479 if (sis900_debug > 0)
480 sis_priv->msg_enable = sis900_debug;
481 else
482 sis_priv->msg_enable = SIS900_DEF_MSG;
484 sis_priv->mii_info.dev = net_dev;
485 sis_priv->mii_info.mdio_read = mdio_read;
486 sis_priv->mii_info.mdio_write = mdio_write;
487 sis_priv->mii_info.phy_id_mask = 0x1f;
488 sis_priv->mii_info.reg_num_mask = 0x1f;
490 /* Get Mac address according to the chip revision */
491 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &(sis_priv->chipset_rev));
492 if(netif_msg_probe(sis_priv))
493 printk(KERN_DEBUG "%s: detected revision %2.2x, "
494 "trying to get MAC address...\n",
495 dev_name, sis_priv->chipset_rev);
497 ret = 0;
498 if (sis_priv->chipset_rev == SIS630E_900_REV)
499 ret = sis630e_get_mac_addr(pci_dev, net_dev);
500 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
501 ret = sis635_get_mac_addr(pci_dev, net_dev);
502 else if (sis_priv->chipset_rev == SIS96x_900_REV)
503 ret = sis96x_get_mac_addr(pci_dev, net_dev);
504 else
505 ret = sis900_get_mac_addr(pci_dev, net_dev);
507 if (ret == 0) {
508 printk(KERN_WARNING "%s: Cannot read MAC address.\n", dev_name);
509 ret = -ENODEV;
510 goto err_unmap_rx;
513 /* 630ET : set the mii access mode as software-mode */
514 if (sis_priv->chipset_rev == SIS630ET_900_REV)
515 outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr);
517 /* probe for mii transceiver */
518 if (sis900_mii_probe(net_dev) == 0) {
519 printk(KERN_WARNING "%s: Error probing MII device.\n",
520 dev_name);
521 ret = -ENODEV;
522 goto err_unmap_rx;
525 /* save our host bridge revision */
526 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
527 if (dev) {
528 pci_read_config_byte(dev, PCI_CLASS_REVISION, &sis_priv->host_bridge_rev);
529 pci_dev_put(dev);
532 ret = register_netdev(net_dev);
533 if (ret)
534 goto err_unmap_rx;
536 /* print some information about our NIC */
537 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, %s\n",
538 net_dev->name, card_name, ioaddr, net_dev->irq,
539 print_mac(mac, net_dev->dev_addr));
541 /* Detect Wake on Lan support */
542 ret = (inl(net_dev->base_addr + CFGPMC) & PMESP) >> 27;
543 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
544 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
546 return 0;
548 err_unmap_rx:
549 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
550 sis_priv->rx_ring_dma);
551 err_unmap_tx:
552 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
553 sis_priv->tx_ring_dma);
554 err_out_cleardev:
555 pci_set_drvdata(pci_dev, NULL);
556 pci_release_regions(pci_dev);
557 err_out:
558 free_netdev(net_dev);
559 return ret;
563 * sis900_mii_probe - Probe MII PHY for sis900
564 * @net_dev: the net device to probe for
566 * Search for total of 32 possible mii phy addresses.
567 * Identify and set current phy if found one,
568 * return error if it failed to found.
571 static int __devinit sis900_mii_probe(struct net_device * net_dev)
573 struct sis900_private * sis_priv = net_dev->priv;
574 const char *dev_name = pci_name(sis_priv->pci_dev);
575 u16 poll_bit = MII_STAT_LINK, status = 0;
576 unsigned long timeout = jiffies + 5 * HZ;
577 int phy_addr;
579 sis_priv->mii = NULL;
581 /* search for total of 32 possible mii phy addresses */
582 for (phy_addr = 0; phy_addr < 32; phy_addr++) {
583 struct mii_phy * mii_phy = NULL;
584 u16 mii_status;
585 int i;
587 mii_phy = NULL;
588 for(i = 0; i < 2; i++)
589 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
591 if (mii_status == 0xffff || mii_status == 0x0000) {
592 if (netif_msg_probe(sis_priv))
593 printk(KERN_DEBUG "%s: MII at address %d"
594 " not accessible\n",
595 dev_name, phy_addr);
596 continue;
599 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
600 printk(KERN_WARNING "Cannot allocate mem for struct mii_phy\n");
601 mii_phy = sis_priv->first_mii;
602 while (mii_phy) {
603 struct mii_phy *phy;
604 phy = mii_phy;
605 mii_phy = mii_phy->next;
606 kfree(phy);
608 return 0;
611 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
612 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
613 mii_phy->phy_addr = phy_addr;
614 mii_phy->status = mii_status;
615 mii_phy->next = sis_priv->mii;
616 sis_priv->mii = mii_phy;
617 sis_priv->first_mii = mii_phy;
619 for (i = 0; mii_chip_table[i].phy_id1; i++)
620 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
621 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
622 mii_phy->phy_types = mii_chip_table[i].phy_types;
623 if (mii_chip_table[i].phy_types == MIX)
624 mii_phy->phy_types =
625 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
626 printk(KERN_INFO "%s: %s transceiver found "
627 "at address %d.\n",
628 dev_name,
629 mii_chip_table[i].name,
630 phy_addr);
631 break;
634 if( !mii_chip_table[i].phy_id1 ) {
635 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
636 dev_name, phy_addr);
637 mii_phy->phy_types = UNKNOWN;
641 if (sis_priv->mii == NULL) {
642 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
643 return 0;
646 /* select default PHY for mac */
647 sis_priv->mii = NULL;
648 sis900_default_phy( net_dev );
650 /* Reset phy if default phy is internal sis900 */
651 if ((sis_priv->mii->phy_id0 == 0x001D) &&
652 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
653 status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
655 /* workaround for ICS1893 PHY */
656 if ((sis_priv->mii->phy_id0 == 0x0015) &&
657 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
658 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
660 if(status & MII_STAT_LINK){
661 while (poll_bit) {
662 yield();
664 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
665 if (time_after_eq(jiffies, timeout)) {
666 printk(KERN_WARNING "%s: reset phy and link down now\n",
667 dev_name);
668 return -ETIME;
673 if (sis_priv->chipset_rev == SIS630E_900_REV) {
674 /* SiS 630E has some bugs on default value of PHY registers */
675 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
676 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
677 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
678 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
679 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
682 if (sis_priv->mii->status & MII_STAT_LINK)
683 netif_carrier_on(net_dev);
684 else
685 netif_carrier_off(net_dev);
687 return 1;
691 * sis900_default_phy - Select default PHY for sis900 mac.
692 * @net_dev: the net device to probe for
694 * Select first detected PHY with link as default.
695 * If no one is link on, select PHY whose types is HOME as default.
696 * If HOME doesn't exist, select LAN.
699 static u16 sis900_default_phy(struct net_device * net_dev)
701 struct sis900_private * sis_priv = net_dev->priv;
702 struct mii_phy *phy = NULL, *phy_home = NULL,
703 *default_phy = NULL, *phy_lan = NULL;
704 u16 status;
706 for (phy=sis_priv->first_mii; phy; phy=phy->next) {
707 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
708 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
710 /* Link ON & Not select default PHY & not ghost PHY */
711 if ((status & MII_STAT_LINK) && !default_phy &&
712 (phy->phy_types != UNKNOWN))
713 default_phy = phy;
714 else {
715 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
716 mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
717 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
718 if (phy->phy_types == HOME)
719 phy_home = phy;
720 else if(phy->phy_types == LAN)
721 phy_lan = phy;
725 if (!default_phy && phy_home)
726 default_phy = phy_home;
727 else if (!default_phy && phy_lan)
728 default_phy = phy_lan;
729 else if (!default_phy)
730 default_phy = sis_priv->first_mii;
732 if (sis_priv->mii != default_phy) {
733 sis_priv->mii = default_phy;
734 sis_priv->cur_phy = default_phy->phy_addr;
735 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
736 pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
739 sis_priv->mii_info.phy_id = sis_priv->cur_phy;
741 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
742 status &= (~MII_CNTL_ISOLATE);
744 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
745 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
746 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
748 return status;
753 * sis900_set_capability - set the media capability of network adapter.
754 * @net_dev : the net device to probe for
755 * @phy : default PHY
757 * Set the media capability of network adapter according to
758 * mii status register. It's necessary before auto-negotiate.
761 static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
763 u16 cap;
764 u16 status;
766 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
767 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
769 cap = MII_NWAY_CSMA_CD |
770 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
771 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
772 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
773 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
775 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
779 /* Delay between EEPROM clock transitions. */
780 #define eeprom_delay() inl(ee_addr)
783 * read_eeprom - Read Serial EEPROM
784 * @ioaddr: base i/o address
785 * @location: the EEPROM location to read
787 * Read Serial EEPROM through EEPROM Access Register.
788 * Note that location is in word (16 bits) unit
791 static u16 __devinit read_eeprom(long ioaddr, int location)
793 int i;
794 u16 retval = 0;
795 long ee_addr = ioaddr + mear;
796 u32 read_cmd = location | EEread;
798 outl(0, ee_addr);
799 eeprom_delay();
800 outl(EECS, ee_addr);
801 eeprom_delay();
803 /* Shift the read command (9) bits out. */
804 for (i = 8; i >= 0; i--) {
805 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
806 outl(dataval, ee_addr);
807 eeprom_delay();
808 outl(dataval | EECLK, ee_addr);
809 eeprom_delay();
811 outl(EECS, ee_addr);
812 eeprom_delay();
814 /* read the 16-bits data in */
815 for (i = 16; i > 0; i--) {
816 outl(EECS, ee_addr);
817 eeprom_delay();
818 outl(EECS | EECLK, ee_addr);
819 eeprom_delay();
820 retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
821 eeprom_delay();
824 /* Terminate the EEPROM access. */
825 outl(0, ee_addr);
826 eeprom_delay();
828 return (retval);
831 /* Read and write the MII management registers using software-generated
832 serial MDIO protocol. Note that the command bits and data bits are
833 send out separately */
834 #define mdio_delay() inl(mdio_addr)
836 static void mdio_idle(long mdio_addr)
838 outl(MDIO | MDDIR, mdio_addr);
839 mdio_delay();
840 outl(MDIO | MDDIR | MDC, mdio_addr);
843 /* Syncronize the MII management interface by shifting 32 one bits out. */
844 static void mdio_reset(long mdio_addr)
846 int i;
848 for (i = 31; i >= 0; i--) {
849 outl(MDDIR | MDIO, mdio_addr);
850 mdio_delay();
851 outl(MDDIR | MDIO | MDC, mdio_addr);
852 mdio_delay();
854 return;
858 * mdio_read - read MII PHY register
859 * @net_dev: the net device to read
860 * @phy_id: the phy address to read
861 * @location: the phy regiester id to read
863 * Read MII registers through MDIO and MDC
864 * using MDIO management frame structure and protocol(defined by ISO/IEC).
865 * Please see SiS7014 or ICS spec
868 static int mdio_read(struct net_device *net_dev, int phy_id, int location)
870 long mdio_addr = net_dev->base_addr + mear;
871 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
872 u16 retval = 0;
873 int i;
875 mdio_reset(mdio_addr);
876 mdio_idle(mdio_addr);
878 for (i = 15; i >= 0; i--) {
879 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
880 outl(dataval, mdio_addr);
881 mdio_delay();
882 outl(dataval | MDC, mdio_addr);
883 mdio_delay();
886 /* Read the 16 data bits. */
887 for (i = 16; i > 0; i--) {
888 outl(0, mdio_addr);
889 mdio_delay();
890 retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
891 outl(MDC, mdio_addr);
892 mdio_delay();
894 outl(0x00, mdio_addr);
896 return retval;
900 * mdio_write - write MII PHY register
901 * @net_dev: the net device to write
902 * @phy_id: the phy address to write
903 * @location: the phy regiester id to write
904 * @value: the register value to write with
906 * Write MII registers with @value through MDIO and MDC
907 * using MDIO management frame structure and protocol(defined by ISO/IEC)
908 * please see SiS7014 or ICS spec
911 static void mdio_write(struct net_device *net_dev, int phy_id, int location,
912 int value)
914 long mdio_addr = net_dev->base_addr + mear;
915 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
916 int i;
918 mdio_reset(mdio_addr);
919 mdio_idle(mdio_addr);
921 /* Shift the command bits out. */
922 for (i = 15; i >= 0; i--) {
923 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
924 outb(dataval, mdio_addr);
925 mdio_delay();
926 outb(dataval | MDC, mdio_addr);
927 mdio_delay();
929 mdio_delay();
931 /* Shift the value bits out. */
932 for (i = 15; i >= 0; i--) {
933 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
934 outl(dataval, mdio_addr);
935 mdio_delay();
936 outl(dataval | MDC, mdio_addr);
937 mdio_delay();
939 mdio_delay();
941 /* Clear out extra bits. */
942 for (i = 2; i > 0; i--) {
943 outb(0, mdio_addr);
944 mdio_delay();
945 outb(MDC, mdio_addr);
946 mdio_delay();
948 outl(0x00, mdio_addr);
950 return;
955 * sis900_reset_phy - reset sis900 mii phy.
956 * @net_dev: the net device to write
957 * @phy_addr: default phy address
959 * Some specific phy can't work properly without reset.
960 * This function will be called during initialization and
961 * link status change from ON to DOWN.
964 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
966 int i;
967 u16 status;
969 for (i = 0; i < 2; i++)
970 status = mdio_read(net_dev, phy_addr, MII_STATUS);
972 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
974 return status;
977 #ifdef CONFIG_NET_POLL_CONTROLLER
979 * Polling 'interrupt' - used by things like netconsole to send skbs
980 * without having to re-enable interrupts. It's not called while
981 * the interrupt routine is executing.
983 static void sis900_poll(struct net_device *dev)
985 disable_irq(dev->irq);
986 sis900_interrupt(dev->irq, dev);
987 enable_irq(dev->irq);
989 #endif
992 * sis900_open - open sis900 device
993 * @net_dev: the net device to open
995 * Do some initialization and start net interface.
996 * enable interrupts and set sis900 timer.
999 static int
1000 sis900_open(struct net_device *net_dev)
1002 struct sis900_private *sis_priv = net_dev->priv;
1003 long ioaddr = net_dev->base_addr;
1004 int ret;
1006 /* Soft reset the chip. */
1007 sis900_reset(net_dev);
1009 /* Equalizer workaround Rule */
1010 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1012 ret = request_irq(net_dev->irq, &sis900_interrupt, IRQF_SHARED,
1013 net_dev->name, net_dev);
1014 if (ret)
1015 return ret;
1017 sis900_init_rxfilter(net_dev);
1019 sis900_init_tx_ring(net_dev);
1020 sis900_init_rx_ring(net_dev);
1022 set_rx_mode(net_dev);
1024 netif_start_queue(net_dev);
1026 /* Workaround for EDB */
1027 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
1029 /* Enable all known interrupts by setting the interrupt mask. */
1030 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1031 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
1032 outl(IE, ioaddr + ier);
1034 sis900_check_mode(net_dev, sis_priv->mii);
1036 /* Set the timer to switch to check for link beat and perhaps switch
1037 to an alternate media type. */
1038 init_timer(&sis_priv->timer);
1039 sis_priv->timer.expires = jiffies + HZ;
1040 sis_priv->timer.data = (unsigned long)net_dev;
1041 sis_priv->timer.function = &sis900_timer;
1042 add_timer(&sis_priv->timer);
1044 return 0;
1048 * sis900_init_rxfilter - Initialize the Rx filter
1049 * @net_dev: the net device to initialize for
1051 * Set receive filter address to our MAC address
1052 * and enable packet filtering.
1055 static void
1056 sis900_init_rxfilter (struct net_device * net_dev)
1058 struct sis900_private *sis_priv = net_dev->priv;
1059 long ioaddr = net_dev->base_addr;
1060 u32 rfcrSave;
1061 u32 i;
1063 rfcrSave = inl(rfcr + ioaddr);
1065 /* disable packet filtering before setting filter */
1066 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
1068 /* load MAC addr to filter data register */
1069 for (i = 0 ; i < 3 ; i++) {
1070 u32 w;
1072 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
1073 outl((i << RFADDR_shift), ioaddr + rfcr);
1074 outl(w, ioaddr + rfdr);
1076 if (netif_msg_hw(sis_priv)) {
1077 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
1078 net_dev->name, i, inl(ioaddr + rfdr));
1082 /* enable packet filtering */
1083 outl(rfcrSave | RFEN, rfcr + ioaddr);
1087 * sis900_init_tx_ring - Initialize the Tx descriptor ring
1088 * @net_dev: the net device to initialize for
1090 * Initialize the Tx descriptor ring,
1093 static void
1094 sis900_init_tx_ring(struct net_device *net_dev)
1096 struct sis900_private *sis_priv = net_dev->priv;
1097 long ioaddr = net_dev->base_addr;
1098 int i;
1100 sis_priv->tx_full = 0;
1101 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1103 for (i = 0; i < NUM_TX_DESC; i++) {
1104 sis_priv->tx_skbuff[i] = NULL;
1106 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1107 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1108 sis_priv->tx_ring[i].cmdsts = 0;
1109 sis_priv->tx_ring[i].bufptr = 0;
1112 /* load Transmit Descriptor Register */
1113 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1114 if (netif_msg_hw(sis_priv))
1115 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",
1116 net_dev->name, inl(ioaddr + txdp));
1120 * sis900_init_rx_ring - Initialize the Rx descriptor ring
1121 * @net_dev: the net device to initialize for
1123 * Initialize the Rx descriptor ring,
1124 * and pre-allocate recevie buffers (socket buffer)
1127 static void
1128 sis900_init_rx_ring(struct net_device *net_dev)
1130 struct sis900_private *sis_priv = net_dev->priv;
1131 long ioaddr = net_dev->base_addr;
1132 int i;
1134 sis_priv->cur_rx = 0;
1135 sis_priv->dirty_rx = 0;
1137 /* init RX descriptor */
1138 for (i = 0; i < NUM_RX_DESC; i++) {
1139 sis_priv->rx_skbuff[i] = NULL;
1141 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1142 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1143 sis_priv->rx_ring[i].cmdsts = 0;
1144 sis_priv->rx_ring[i].bufptr = 0;
1147 /* allocate sock buffers */
1148 for (i = 0; i < NUM_RX_DESC; i++) {
1149 struct sk_buff *skb;
1151 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1152 /* not enough memory for skbuff, this makes a "hole"
1153 on the buffer ring, it is not clear how the
1154 hardware will react to this kind of degenerated
1155 buffer */
1156 break;
1158 sis_priv->rx_skbuff[i] = skb;
1159 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1160 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
1161 skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1163 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1165 /* load Receive Descriptor Register */
1166 outl(sis_priv->rx_ring_dma, ioaddr + rxdp);
1167 if (netif_msg_hw(sis_priv))
1168 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",
1169 net_dev->name, inl(ioaddr + rxdp));
1173 * sis630_set_eq - set phy equalizer value for 630 LAN
1174 * @net_dev: the net device to set equalizer value
1175 * @revision: 630 LAN revision number
1177 * 630E equalizer workaround rule(Cyrus Huang 08/15)
1178 * PHY register 14h(Test)
1179 * Bit 14: 0 -- Automatically dectect (default)
1180 * 1 -- Manually set Equalizer filter
1181 * Bit 13: 0 -- (Default)
1182 * 1 -- Speed up convergence of equalizer setting
1183 * Bit 9 : 0 -- (Default)
1184 * 1 -- Disable Baseline Wander
1185 * Bit 3~7 -- Equalizer filter setting
1186 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0
1187 * Then calculate equalizer value
1188 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0
1189 * Link Off:Set Bit 13 to 1, Bit 14 to 0
1190 * Calculate Equalizer value:
1191 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-dectect proper equalizer value.
1192 * When the equalizer is stable, this value is not a fixed value. It will be within
1193 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9)
1194 * 0 <= max <= 4 --> set equalizer to max
1195 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min
1196 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min
1199 static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1201 struct sis900_private *sis_priv = net_dev->priv;
1202 u16 reg14h, eq_value=0, max_value=0, min_value=0;
1203 int i, maxcount=10;
1205 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1206 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
1207 return;
1209 if (netif_carrier_ok(net_dev)) {
1210 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1211 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1212 (0x2200 | reg14h) & 0xBFFF);
1213 for (i=0; i < maxcount; i++) {
1214 eq_value = (0x00F8 & mdio_read(net_dev,
1215 sis_priv->cur_phy, MII_RESV)) >> 3;
1216 if (i == 0)
1217 max_value=min_value=eq_value;
1218 max_value = (eq_value > max_value) ?
1219 eq_value : max_value;
1220 min_value = (eq_value < min_value) ?
1221 eq_value : min_value;
1223 /* 630E rule to determine the equalizer value */
1224 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1225 revision == SIS630ET_900_REV) {
1226 if (max_value < 5)
1227 eq_value = max_value;
1228 else if (max_value >= 5 && max_value < 15)
1229 eq_value = (max_value == min_value) ?
1230 max_value+2 : max_value+1;
1231 else if (max_value >= 15)
1232 eq_value=(max_value == min_value) ?
1233 max_value+6 : max_value+5;
1235 /* 630B0&B1 rule to determine the equalizer value */
1236 if (revision == SIS630A_900_REV &&
1237 (sis_priv->host_bridge_rev == SIS630B0 ||
1238 sis_priv->host_bridge_rev == SIS630B1)) {
1239 if (max_value == 0)
1240 eq_value = 3;
1241 else
1242 eq_value = (max_value + min_value + 1)/2;
1244 /* write equalizer value and setting */
1245 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1246 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1247 reg14h = (reg14h | 0x6000) & 0xFDFF;
1248 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1249 } else {
1250 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1251 if (revision == SIS630A_900_REV &&
1252 (sis_priv->host_bridge_rev == SIS630B0 ||
1253 sis_priv->host_bridge_rev == SIS630B1))
1254 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1255 (reg14h | 0x2200) & 0xBFFF);
1256 else
1257 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1258 (reg14h | 0x2000) & 0xBFFF);
1260 return;
1264 * sis900_timer - sis900 timer routine
1265 * @data: pointer to sis900 net device
1267 * On each timer ticks we check two things,
1268 * link status (ON/OFF) and link mode (10/100/Full/Half)
1271 static void sis900_timer(unsigned long data)
1273 struct net_device *net_dev = (struct net_device *)data;
1274 struct sis900_private *sis_priv = net_dev->priv;
1275 struct mii_phy *mii_phy = sis_priv->mii;
1276 static const int next_tick = 5*HZ;
1277 u16 status;
1279 if (!sis_priv->autong_complete){
1280 int speed, duplex = 0;
1282 sis900_read_mode(net_dev, &speed, &duplex);
1283 if (duplex){
1284 sis900_set_mode(net_dev->base_addr, speed, duplex);
1285 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1286 netif_start_queue(net_dev);
1289 sis_priv->timer.expires = jiffies + HZ;
1290 add_timer(&sis_priv->timer);
1291 return;
1294 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1295 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1297 /* Link OFF -> ON */
1298 if (!netif_carrier_ok(net_dev)) {
1299 LookForLink:
1300 /* Search for new PHY */
1301 status = sis900_default_phy(net_dev);
1302 mii_phy = sis_priv->mii;
1304 if (status & MII_STAT_LINK){
1305 sis900_check_mode(net_dev, mii_phy);
1306 netif_carrier_on(net_dev);
1308 } else {
1309 /* Link ON -> OFF */
1310 if (!(status & MII_STAT_LINK)){
1311 netif_carrier_off(net_dev);
1312 if(netif_msg_link(sis_priv))
1313 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1315 /* Change mode issue */
1316 if ((mii_phy->phy_id0 == 0x001D) &&
1317 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1318 sis900_reset_phy(net_dev, sis_priv->cur_phy);
1320 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1322 goto LookForLink;
1326 sis_priv->timer.expires = jiffies + next_tick;
1327 add_timer(&sis_priv->timer);
1331 * sis900_check_mode - check the media mode for sis900
1332 * @net_dev: the net device to be checked
1333 * @mii_phy: the mii phy
1335 * Older driver gets the media mode from mii status output
1336 * register. Now we set our media capability and auto-negotiate
1337 * to get the upper bound of speed and duplex between two ends.
1338 * If the types of mii phy is HOME, it doesn't need to auto-negotiate
1339 * and autong_complete should be set to 1.
1342 static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
1344 struct sis900_private *sis_priv = net_dev->priv;
1345 long ioaddr = net_dev->base_addr;
1346 int speed, duplex;
1348 if (mii_phy->phy_types == LAN) {
1349 outl(~EXD & inl(ioaddr + cfg), ioaddr + cfg);
1350 sis900_set_capability(net_dev , mii_phy);
1351 sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1352 } else {
1353 outl(EXD | inl(ioaddr + cfg), ioaddr + cfg);
1354 speed = HW_SPEED_HOME;
1355 duplex = FDX_CAPABLE_HALF_SELECTED;
1356 sis900_set_mode(ioaddr, speed, duplex);
1357 sis_priv->autong_complete = 1;
1362 * sis900_set_mode - Set the media mode of mac register.
1363 * @ioaddr: the address of the device
1364 * @speed : the transmit speed to be determined
1365 * @duplex: the duplex mode to be determined
1367 * Set the media mode of mac register txcfg/rxcfg according to
1368 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB
1369 * bus is used instead of PCI bus. When this bit is set 1, the
1370 * Max DMA Burst Size for TX/RX DMA should be no larger than 16
1371 * double words.
1374 static void sis900_set_mode (long ioaddr, int speed, int duplex)
1376 u32 tx_flags = 0, rx_flags = 0;
1378 if (inl(ioaddr + cfg) & EDB_MASTER_EN) {
1379 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
1380 (TX_FILL_THRESH << TxFILLT_shift);
1381 rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1382 } else {
1383 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) |
1384 (TX_FILL_THRESH << TxFILLT_shift);
1385 rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1388 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) {
1389 rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1390 tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1391 } else {
1392 rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1393 tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1396 if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1397 tx_flags |= (TxCSI | TxHBI);
1398 rx_flags |= RxATX;
1401 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1402 /* Can accept Jumbo packet */
1403 rx_flags |= RxAJAB;
1404 #endif
1406 outl (tx_flags, ioaddr + txcfg);
1407 outl (rx_flags, ioaddr + rxcfg);
1411 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit.
1412 * @net_dev: the net device to read mode for
1413 * @phy_addr: mii phy address
1415 * If the adapter is link-on, set the auto-negotiate enable/reset bit.
1416 * autong_complete should be set to 0 when starting auto-negotiation.
1417 * autong_complete should be set to 1 if we didn't start auto-negotiation.
1418 * sis900_timer will wait for link on again if autong_complete = 0.
1421 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1423 struct sis900_private *sis_priv = net_dev->priv;
1424 int i = 0;
1425 u32 status;
1427 for (i = 0; i < 2; i++)
1428 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1430 if (!(status & MII_STAT_LINK)){
1431 if(netif_msg_link(sis_priv))
1432 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1433 sis_priv->autong_complete = 1;
1434 netif_carrier_off(net_dev);
1435 return;
1438 /* (Re)start AutoNegotiate */
1439 mdio_write(net_dev, phy_addr, MII_CONTROL,
1440 MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1441 sis_priv->autong_complete = 0;
1446 * sis900_read_mode - read media mode for sis900 internal phy
1447 * @net_dev: the net device to read mode for
1448 * @speed : the transmit speed to be determined
1449 * @duplex : the duplex mode to be determined
1451 * The capability of remote end will be put in mii register autorec
1452 * after auto-negotiation. Use AND operation to get the upper bound
1453 * of speed and duplex between two ends.
1456 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1458 struct sis900_private *sis_priv = net_dev->priv;
1459 struct mii_phy *phy = sis_priv->mii;
1460 int phy_addr = sis_priv->cur_phy;
1461 u32 status;
1462 u16 autoadv, autorec;
1463 int i;
1465 for (i = 0; i < 2; i++)
1466 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1468 if (!(status & MII_STAT_LINK))
1469 return;
1471 /* AutoNegotiate completed */
1472 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1473 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1474 status = autoadv & autorec;
1476 *speed = HW_SPEED_10_MBPS;
1477 *duplex = FDX_CAPABLE_HALF_SELECTED;
1479 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1480 *speed = HW_SPEED_100_MBPS;
1481 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1482 *duplex = FDX_CAPABLE_FULL_SELECTED;
1484 sis_priv->autong_complete = 1;
1486 /* Workaround for Realtek RTL8201 PHY issue */
1487 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
1488 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1489 *duplex = FDX_CAPABLE_FULL_SELECTED;
1490 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1491 *speed = HW_SPEED_100_MBPS;
1494 if(netif_msg_link(sis_priv))
1495 printk(KERN_INFO "%s: Media Link On %s %s-duplex \n",
1496 net_dev->name,
1497 *speed == HW_SPEED_100_MBPS ?
1498 "100mbps" : "10mbps",
1499 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1500 "full" : "half");
1504 * sis900_tx_timeout - sis900 transmit timeout routine
1505 * @net_dev: the net device to transmit
1507 * print transmit timeout status
1508 * disable interrupts and do some tasks
1511 static void sis900_tx_timeout(struct net_device *net_dev)
1513 struct sis900_private *sis_priv = net_dev->priv;
1514 long ioaddr = net_dev->base_addr;
1515 unsigned long flags;
1516 int i;
1518 if(netif_msg_tx_err(sis_priv))
1519 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x \n",
1520 net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr));
1522 /* Disable interrupts by clearing the interrupt mask. */
1523 outl(0x0000, ioaddr + imr);
1525 /* use spinlock to prevent interrupt handler accessing buffer ring */
1526 spin_lock_irqsave(&sis_priv->lock, flags);
1528 /* discard unsent packets */
1529 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1530 for (i = 0; i < NUM_TX_DESC; i++) {
1531 struct sk_buff *skb = sis_priv->tx_skbuff[i];
1533 if (skb) {
1534 pci_unmap_single(sis_priv->pci_dev,
1535 sis_priv->tx_ring[i].bufptr, skb->len,
1536 PCI_DMA_TODEVICE);
1537 dev_kfree_skb_irq(skb);
1538 sis_priv->tx_skbuff[i] = NULL;
1539 sis_priv->tx_ring[i].cmdsts = 0;
1540 sis_priv->tx_ring[i].bufptr = 0;
1541 net_dev->stats.tx_dropped++;
1544 sis_priv->tx_full = 0;
1545 netif_wake_queue(net_dev);
1547 spin_unlock_irqrestore(&sis_priv->lock, flags);
1549 net_dev->trans_start = jiffies;
1551 /* load Transmit Descriptor Register */
1552 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1554 /* Enable all known interrupts by setting the interrupt mask. */
1555 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1556 return;
1560 * sis900_start_xmit - sis900 start transmit routine
1561 * @skb: socket buffer pointer to put the data being transmitted
1562 * @net_dev: the net device to transmit with
1564 * Set the transmit buffer descriptor,
1565 * and write TxENA to enable transmit state machine.
1566 * tell upper layer if the buffer is full
1569 static int
1570 sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1572 struct sis900_private *sis_priv = net_dev->priv;
1573 long ioaddr = net_dev->base_addr;
1574 unsigned int entry;
1575 unsigned long flags;
1576 unsigned int index_cur_tx, index_dirty_tx;
1577 unsigned int count_dirty_tx;
1579 /* Don't transmit data before the complete of auto-negotiation */
1580 if(!sis_priv->autong_complete){
1581 netif_stop_queue(net_dev);
1582 return 1;
1585 spin_lock_irqsave(&sis_priv->lock, flags);
1587 /* Calculate the next Tx descriptor entry. */
1588 entry = sis_priv->cur_tx % NUM_TX_DESC;
1589 sis_priv->tx_skbuff[entry] = skb;
1591 /* set the transmit buffer descriptor and enable Transmit State Machine */
1592 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1593 skb->data, skb->len, PCI_DMA_TODEVICE);
1594 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1595 outl(TxENA | inl(ioaddr + cr), ioaddr + cr);
1597 sis_priv->cur_tx ++;
1598 index_cur_tx = sis_priv->cur_tx;
1599 index_dirty_tx = sis_priv->dirty_tx;
1601 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1602 count_dirty_tx ++;
1604 if (index_cur_tx == index_dirty_tx) {
1605 /* dirty_tx is met in the cycle of cur_tx, buffer full */
1606 sis_priv->tx_full = 1;
1607 netif_stop_queue(net_dev);
1608 } else if (count_dirty_tx < NUM_TX_DESC) {
1609 /* Typical path, tell upper layer that more transmission is possible */
1610 netif_start_queue(net_dev);
1611 } else {
1612 /* buffer full, tell upper layer no more transmission */
1613 sis_priv->tx_full = 1;
1614 netif_stop_queue(net_dev);
1617 spin_unlock_irqrestore(&sis_priv->lock, flags);
1619 net_dev->trans_start = jiffies;
1621 if (netif_msg_tx_queued(sis_priv))
1622 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d "
1623 "to slot %d.\n",
1624 net_dev->name, skb->data, (int)skb->len, entry);
1626 return 0;
1630 * sis900_interrupt - sis900 interrupt handler
1631 * @irq: the irq number
1632 * @dev_instance: the client data object
1634 * The interrupt handler does all of the Rx thread work,
1635 * and cleans up after the Tx thread
1638 static irqreturn_t sis900_interrupt(int irq, void *dev_instance)
1640 struct net_device *net_dev = dev_instance;
1641 struct sis900_private *sis_priv = net_dev->priv;
1642 int boguscnt = max_interrupt_work;
1643 long ioaddr = net_dev->base_addr;
1644 u32 status;
1645 unsigned int handled = 0;
1647 spin_lock (&sis_priv->lock);
1649 do {
1650 status = inl(ioaddr + isr);
1652 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1653 /* nothing intresting happened */
1654 break;
1655 handled = 1;
1657 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
1658 if (status & (RxORN | RxERR | RxOK))
1659 /* Rx interrupt */
1660 sis900_rx(net_dev);
1662 if (status & (TxURN | TxERR | TxIDLE))
1663 /* Tx interrupt */
1664 sis900_finish_xmit(net_dev);
1666 /* something strange happened !!! */
1667 if (status & HIBERR) {
1668 if(netif_msg_intr(sis_priv))
1669 printk(KERN_INFO "%s: Abnormal interrupt, "
1670 "status %#8.8x.\n", net_dev->name, status);
1671 break;
1673 if (--boguscnt < 0) {
1674 if(netif_msg_intr(sis_priv))
1675 printk(KERN_INFO "%s: Too much work at interrupt, "
1676 "interrupt status = %#8.8x.\n",
1677 net_dev->name, status);
1678 break;
1680 } while (1);
1682 if(netif_msg_intr(sis_priv))
1683 printk(KERN_DEBUG "%s: exiting interrupt, "
1684 "interrupt status = 0x%#8.8x.\n",
1685 net_dev->name, inl(ioaddr + isr));
1687 spin_unlock (&sis_priv->lock);
1688 return IRQ_RETVAL(handled);
1692 * sis900_rx - sis900 receive routine
1693 * @net_dev: the net device which receives data
1695 * Process receive interrupt events,
1696 * put buffer to higher layer and refill buffer pool
1697 * Note: This function is called by interrupt handler,
1698 * don't do "too much" work here
1701 static int sis900_rx(struct net_device *net_dev)
1703 struct sis900_private *sis_priv = net_dev->priv;
1704 long ioaddr = net_dev->base_addr;
1705 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1706 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
1707 int rx_work_limit;
1709 if (netif_msg_rx_status(sis_priv))
1710 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1711 "status:0x%8.8x\n",
1712 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
1713 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx;
1715 while (rx_status & OWN) {
1716 unsigned int rx_size;
1717 unsigned int data_size;
1719 if (--rx_work_limit < 0)
1720 break;
1722 data_size = rx_status & DSIZE;
1723 rx_size = data_size - CRC_SIZE;
1725 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1726 /* ``TOOLONG'' flag means jumbo packet recived. */
1727 if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE)
1728 rx_status &= (~ ((unsigned int)TOOLONG));
1729 #endif
1731 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1732 /* corrupted packet received */
1733 if (netif_msg_rx_err(sis_priv))
1734 printk(KERN_DEBUG "%s: Corrupted packet "
1735 "received, buffer status = 0x%8.8x/%d.\n",
1736 net_dev->name, rx_status, data_size);
1737 net_dev->stats.rx_errors++;
1738 if (rx_status & OVERRUN)
1739 net_dev->stats.rx_over_errors++;
1740 if (rx_status & (TOOLONG|RUNT))
1741 net_dev->stats.rx_length_errors++;
1742 if (rx_status & (RXISERR | FAERR))
1743 net_dev->stats.rx_frame_errors++;
1744 if (rx_status & CRCERR)
1745 net_dev->stats.rx_crc_errors++;
1746 /* reset buffer descriptor state */
1747 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1748 } else {
1749 struct sk_buff * skb;
1750 struct sk_buff * rx_skb;
1752 pci_unmap_single(sis_priv->pci_dev,
1753 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1754 PCI_DMA_FROMDEVICE);
1756 /* refill the Rx buffer, what if there is not enought
1757 * memory for new socket buffer ?? */
1758 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1760 * Not enough memory to refill the buffer
1761 * so we need to recycle the old one so
1762 * as to avoid creating a memory hole
1763 * in the rx ring
1765 skb = sis_priv->rx_skbuff[entry];
1766 net_dev->stats.rx_dropped++;
1767 goto refill_rx_ring;
1770 /* This situation should never happen, but due to
1771 some unknow bugs, it is possible that
1772 we are working on NULL sk_buff :-( */
1773 if (sis_priv->rx_skbuff[entry] == NULL) {
1774 if (netif_msg_rx_err(sis_priv))
1775 printk(KERN_WARNING "%s: NULL pointer "
1776 "encountered in Rx ring\n"
1777 "cur_rx:%4.4d, dirty_rx:%4.4d\n",
1778 net_dev->name, sis_priv->cur_rx,
1779 sis_priv->dirty_rx);
1780 break;
1783 /* give the socket buffer to upper layers */
1784 rx_skb = sis_priv->rx_skbuff[entry];
1785 skb_put(rx_skb, rx_size);
1786 rx_skb->protocol = eth_type_trans(rx_skb, net_dev);
1787 netif_rx(rx_skb);
1789 /* some network statistics */
1790 if ((rx_status & BCAST) == MCAST)
1791 net_dev->stats.multicast++;
1792 net_dev->last_rx = jiffies;
1793 net_dev->stats.rx_bytes += rx_size;
1794 net_dev->stats.rx_packets++;
1795 sis_priv->dirty_rx++;
1796 refill_rx_ring:
1797 sis_priv->rx_skbuff[entry] = skb;
1798 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1799 sis_priv->rx_ring[entry].bufptr =
1800 pci_map_single(sis_priv->pci_dev, skb->data,
1801 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1803 sis_priv->cur_rx++;
1804 entry = sis_priv->cur_rx % NUM_RX_DESC;
1805 rx_status = sis_priv->rx_ring[entry].cmdsts;
1806 } // while
1808 /* refill the Rx buffer, what if the rate of refilling is slower
1809 * than consuming ?? */
1810 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) {
1811 struct sk_buff *skb;
1813 entry = sis_priv->dirty_rx % NUM_RX_DESC;
1815 if (sis_priv->rx_skbuff[entry] == NULL) {
1816 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1817 /* not enough memory for skbuff, this makes a
1818 * "hole" on the buffer ring, it is not clear
1819 * how the hardware will react to this kind
1820 * of degenerated buffer */
1821 if (netif_msg_rx_err(sis_priv))
1822 printk(KERN_INFO "%s: Memory squeeze, "
1823 "deferring packet.\n",
1824 net_dev->name);
1825 net_dev->stats.rx_dropped++;
1826 break;
1828 sis_priv->rx_skbuff[entry] = skb;
1829 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1830 sis_priv->rx_ring[entry].bufptr =
1831 pci_map_single(sis_priv->pci_dev, skb->data,
1832 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1835 /* re-enable the potentially idle receive state matchine */
1836 outl(RxENA | inl(ioaddr + cr), ioaddr + cr );
1838 return 0;
1842 * sis900_finish_xmit - finish up transmission of packets
1843 * @net_dev: the net device to be transmitted on
1845 * Check for error condition and free socket buffer etc
1846 * schedule for more transmission as needed
1847 * Note: This function is called by interrupt handler,
1848 * don't do "too much" work here
1851 static void sis900_finish_xmit (struct net_device *net_dev)
1853 struct sis900_private *sis_priv = net_dev->priv;
1855 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1856 struct sk_buff *skb;
1857 unsigned int entry;
1858 u32 tx_status;
1860 entry = sis_priv->dirty_tx % NUM_TX_DESC;
1861 tx_status = sis_priv->tx_ring[entry].cmdsts;
1863 if (tx_status & OWN) {
1864 /* The packet is not transmitted yet (owned by hardware) !
1865 * Note: the interrupt is generated only when Tx Machine
1866 * is idle, so this is an almost impossible case */
1867 break;
1870 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1871 /* packet unsuccessfully transmitted */
1872 if (netif_msg_tx_err(sis_priv))
1873 printk(KERN_DEBUG "%s: Transmit "
1874 "error, Tx status %8.8x.\n",
1875 net_dev->name, tx_status);
1876 net_dev->stats.tx_errors++;
1877 if (tx_status & UNDERRUN)
1878 net_dev->stats.tx_fifo_errors++;
1879 if (tx_status & ABORT)
1880 net_dev->stats.tx_aborted_errors++;
1881 if (tx_status & NOCARRIER)
1882 net_dev->stats.tx_carrier_errors++;
1883 if (tx_status & OWCOLL)
1884 net_dev->stats.tx_window_errors++;
1885 } else {
1886 /* packet successfully transmitted */
1887 net_dev->stats.collisions += (tx_status & COLCNT) >> 16;
1888 net_dev->stats.tx_bytes += tx_status & DSIZE;
1889 net_dev->stats.tx_packets++;
1891 /* Free the original skb. */
1892 skb = sis_priv->tx_skbuff[entry];
1893 pci_unmap_single(sis_priv->pci_dev,
1894 sis_priv->tx_ring[entry].bufptr, skb->len,
1895 PCI_DMA_TODEVICE);
1896 dev_kfree_skb_irq(skb);
1897 sis_priv->tx_skbuff[entry] = NULL;
1898 sis_priv->tx_ring[entry].bufptr = 0;
1899 sis_priv->tx_ring[entry].cmdsts = 0;
1902 if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1903 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1904 /* The ring is no longer full, clear tx_full and schedule
1905 * more transmission by netif_wake_queue(net_dev) */
1906 sis_priv->tx_full = 0;
1907 netif_wake_queue (net_dev);
1912 * sis900_close - close sis900 device
1913 * @net_dev: the net device to be closed
1915 * Disable interrupts, stop the Tx and Rx Status Machine
1916 * free Tx and RX socket buffer
1919 static int sis900_close(struct net_device *net_dev)
1921 long ioaddr = net_dev->base_addr;
1922 struct sis900_private *sis_priv = net_dev->priv;
1923 struct sk_buff *skb;
1924 int i;
1926 netif_stop_queue(net_dev);
1928 /* Disable interrupts by clearing the interrupt mask. */
1929 outl(0x0000, ioaddr + imr);
1930 outl(0x0000, ioaddr + ier);
1932 /* Stop the chip's Tx and Rx Status Machine */
1933 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
1935 del_timer(&sis_priv->timer);
1937 free_irq(net_dev->irq, net_dev);
1939 /* Free Tx and RX skbuff */
1940 for (i = 0; i < NUM_RX_DESC; i++) {
1941 skb = sis_priv->rx_skbuff[i];
1942 if (skb) {
1943 pci_unmap_single(sis_priv->pci_dev,
1944 sis_priv->rx_ring[i].bufptr,
1945 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1946 dev_kfree_skb(skb);
1947 sis_priv->rx_skbuff[i] = NULL;
1950 for (i = 0; i < NUM_TX_DESC; i++) {
1951 skb = sis_priv->tx_skbuff[i];
1952 if (skb) {
1953 pci_unmap_single(sis_priv->pci_dev,
1954 sis_priv->tx_ring[i].bufptr, skb->len,
1955 PCI_DMA_TODEVICE);
1956 dev_kfree_skb(skb);
1957 sis_priv->tx_skbuff[i] = NULL;
1961 /* Green! Put the chip in low-power mode. */
1963 return 0;
1967 * sis900_get_drvinfo - Return information about driver
1968 * @net_dev: the net device to probe
1969 * @info: container for info returned
1971 * Process ethtool command such as "ehtool -i" to show information
1974 static void sis900_get_drvinfo(struct net_device *net_dev,
1975 struct ethtool_drvinfo *info)
1977 struct sis900_private *sis_priv = net_dev->priv;
1979 strcpy (info->driver, SIS900_MODULE_NAME);
1980 strcpy (info->version, SIS900_DRV_VERSION);
1981 strcpy (info->bus_info, pci_name(sis_priv->pci_dev));
1984 static u32 sis900_get_msglevel(struct net_device *net_dev)
1986 struct sis900_private *sis_priv = net_dev->priv;
1987 return sis_priv->msg_enable;
1990 static void sis900_set_msglevel(struct net_device *net_dev, u32 value)
1992 struct sis900_private *sis_priv = net_dev->priv;
1993 sis_priv->msg_enable = value;
1996 static u32 sis900_get_link(struct net_device *net_dev)
1998 struct sis900_private *sis_priv = net_dev->priv;
1999 return mii_link_ok(&sis_priv->mii_info);
2002 static int sis900_get_settings(struct net_device *net_dev,
2003 struct ethtool_cmd *cmd)
2005 struct sis900_private *sis_priv = net_dev->priv;
2006 spin_lock_irq(&sis_priv->lock);
2007 mii_ethtool_gset(&sis_priv->mii_info, cmd);
2008 spin_unlock_irq(&sis_priv->lock);
2009 return 0;
2012 static int sis900_set_settings(struct net_device *net_dev,
2013 struct ethtool_cmd *cmd)
2015 struct sis900_private *sis_priv = net_dev->priv;
2016 int rt;
2017 spin_lock_irq(&sis_priv->lock);
2018 rt = mii_ethtool_sset(&sis_priv->mii_info, cmd);
2019 spin_unlock_irq(&sis_priv->lock);
2020 return rt;
2023 static int sis900_nway_reset(struct net_device *net_dev)
2025 struct sis900_private *sis_priv = net_dev->priv;
2026 return mii_nway_restart(&sis_priv->mii_info);
2030 * sis900_set_wol - Set up Wake on Lan registers
2031 * @net_dev: the net device to probe
2032 * @wol: container for info passed to the driver
2034 * Process ethtool command "wol" to setup wake on lan features.
2035 * SiS900 supports sending WoL events if a correct packet is received,
2036 * but there is no simple way to filter them to only a subset (broadcast,
2037 * multicast, unicast or arp).
2040 static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2042 struct sis900_private *sis_priv = net_dev->priv;
2043 long pmctrl_addr = net_dev->base_addr + pmctrl;
2044 u32 cfgpmcsr = 0, pmctrl_bits = 0;
2046 if (wol->wolopts == 0) {
2047 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2048 cfgpmcsr &= ~PME_EN;
2049 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2050 outl(pmctrl_bits, pmctrl_addr);
2051 if (netif_msg_wol(sis_priv))
2052 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name);
2053 return 0;
2056 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST
2057 | WAKE_BCAST | WAKE_ARP))
2058 return -EINVAL;
2060 if (wol->wolopts & WAKE_MAGIC)
2061 pmctrl_bits |= MAGICPKT;
2062 if (wol->wolopts & WAKE_PHY)
2063 pmctrl_bits |= LINKON;
2065 outl(pmctrl_bits, pmctrl_addr);
2067 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2068 cfgpmcsr |= PME_EN;
2069 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2070 if (netif_msg_wol(sis_priv))
2071 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name);
2073 return 0;
2076 static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2078 long pmctrl_addr = net_dev->base_addr + pmctrl;
2079 u32 pmctrl_bits;
2081 pmctrl_bits = inl(pmctrl_addr);
2082 if (pmctrl_bits & MAGICPKT)
2083 wol->wolopts |= WAKE_MAGIC;
2084 if (pmctrl_bits & LINKON)
2085 wol->wolopts |= WAKE_PHY;
2087 wol->supported = (WAKE_PHY | WAKE_MAGIC);
2090 static const struct ethtool_ops sis900_ethtool_ops = {
2091 .get_drvinfo = sis900_get_drvinfo,
2092 .get_msglevel = sis900_get_msglevel,
2093 .set_msglevel = sis900_set_msglevel,
2094 .get_link = sis900_get_link,
2095 .get_settings = sis900_get_settings,
2096 .set_settings = sis900_set_settings,
2097 .nway_reset = sis900_nway_reset,
2098 .get_wol = sis900_get_wol,
2099 .set_wol = sis900_set_wol
2103 * mii_ioctl - process MII i/o control command
2104 * @net_dev: the net device to command for
2105 * @rq: parameter for command
2106 * @cmd: the i/o command
2108 * Process MII command like read/write MII register
2111 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
2113 struct sis900_private *sis_priv = net_dev->priv;
2114 struct mii_ioctl_data *data = if_mii(rq);
2116 switch(cmd) {
2117 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2118 data->phy_id = sis_priv->mii->phy_addr;
2119 /* Fall Through */
2121 case SIOCGMIIREG: /* Read MII PHY register. */
2122 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2123 return 0;
2125 case SIOCSMIIREG: /* Write MII PHY register. */
2126 if (!capable(CAP_NET_ADMIN))
2127 return -EPERM;
2128 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2129 return 0;
2130 default:
2131 return -EOPNOTSUPP;
2136 * sis900_set_config - Set media type by net_device.set_config
2137 * @dev: the net device for media type change
2138 * @map: ifmap passed by ifconfig
2140 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig
2141 * we support only port changes. All other runtime configuration
2142 * changes will be ignored
2145 static int sis900_set_config(struct net_device *dev, struct ifmap *map)
2147 struct sis900_private *sis_priv = dev->priv;
2148 struct mii_phy *mii_phy = sis_priv->mii;
2150 u16 status;
2152 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
2153 /* we switch on the ifmap->port field. I couldn't find anything
2154 * like a definition or standard for the values of that field.
2155 * I think the meaning of those values is device specific. But
2156 * since I would like to change the media type via the ifconfig
2157 * command I use the definition from linux/netdevice.h
2158 * (which seems to be different from the ifport(pcmcia) definition) */
2159 switch(map->port){
2160 case IF_PORT_UNKNOWN: /* use auto here */
2161 dev->if_port = map->port;
2162 /* we are going to change the media type, so the Link
2163 * will be temporary down and we need to reflect that
2164 * here. When the Link comes up again, it will be
2165 * sensed by the sis_timer procedure, which also does
2166 * all the rest for us */
2167 netif_carrier_off(dev);
2169 /* read current state */
2170 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2172 /* enable auto negotiation and reset the negotioation
2173 * (I don't really know what the auto negatiotiation
2174 * reset really means, but it sounds for me right to
2175 * do one here) */
2176 mdio_write(dev, mii_phy->phy_addr,
2177 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
2179 break;
2181 case IF_PORT_10BASET: /* 10BaseT */
2182 dev->if_port = map->port;
2184 /* we are going to change the media type, so the Link
2185 * will be temporary down and we need to reflect that
2186 * here. When the Link comes up again, it will be
2187 * sensed by the sis_timer procedure, which also does
2188 * all the rest for us */
2189 netif_carrier_off(dev);
2191 /* set Speed to 10Mbps */
2192 /* read current state */
2193 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2195 /* disable auto negotiation and force 10MBit mode*/
2196 mdio_write(dev, mii_phy->phy_addr,
2197 MII_CONTROL, status & ~(MII_CNTL_SPEED |
2198 MII_CNTL_AUTO));
2199 break;
2201 case IF_PORT_100BASET: /* 100BaseT */
2202 case IF_PORT_100BASETX: /* 100BaseTx */
2203 dev->if_port = map->port;
2205 /* we are going to change the media type, so the Link
2206 * will be temporary down and we need to reflect that
2207 * here. When the Link comes up again, it will be
2208 * sensed by the sis_timer procedure, which also does
2209 * all the rest for us */
2210 netif_carrier_off(dev);
2212 /* set Speed to 100Mbps */
2213 /* disable auto negotiation and enable 100MBit Mode */
2214 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2215 mdio_write(dev, mii_phy->phy_addr,
2216 MII_CONTROL, (status & ~MII_CNTL_SPEED) |
2217 MII_CNTL_SPEED);
2219 break;
2221 case IF_PORT_10BASE2: /* 10Base2 */
2222 case IF_PORT_AUI: /* AUI */
2223 case IF_PORT_100BASEFX: /* 100BaseFx */
2224 /* These Modes are not supported (are they?)*/
2225 return -EOPNOTSUPP;
2226 break;
2228 default:
2229 return -EINVAL;
2232 return 0;
2236 * sis900_mcast_bitnr - compute hashtable index
2237 * @addr: multicast address
2238 * @revision: revision id of chip
2240 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast
2241 * hash table, which makes this function a little bit different from other drivers
2242 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits
2243 * multicast hash table.
2246 static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2249 u32 crc = ether_crc(6, addr);
2251 /* leave 8 or 7 most siginifant bits */
2252 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2253 return ((int)(crc >> 24));
2254 else
2255 return ((int)(crc >> 25));
2259 * set_rx_mode - Set SiS900 receive mode
2260 * @net_dev: the net device to be set
2262 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode.
2263 * And set the appropriate multicast filter.
2264 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0.
2267 static void set_rx_mode(struct net_device *net_dev)
2269 long ioaddr = net_dev->base_addr;
2270 struct sis900_private * sis_priv = net_dev->priv;
2271 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */
2272 int i, table_entries;
2273 u32 rx_mode;
2275 /* 635 Hash Table entries = 256(2^16) */
2276 if((sis_priv->chipset_rev >= SIS635A_900_REV) ||
2277 (sis_priv->chipset_rev == SIS900B_900_REV))
2278 table_entries = 16;
2279 else
2280 table_entries = 8;
2282 if (net_dev->flags & IFF_PROMISC) {
2283 /* Accept any kinds of packets */
2284 rx_mode = RFPromiscuous;
2285 for (i = 0; i < table_entries; i++)
2286 mc_filter[i] = 0xffff;
2287 } else if ((net_dev->mc_count > multicast_filter_limit) ||
2288 (net_dev->flags & IFF_ALLMULTI)) {
2289 /* too many multicast addresses or accept all multicast packet */
2290 rx_mode = RFAAB | RFAAM;
2291 for (i = 0; i < table_entries; i++)
2292 mc_filter[i] = 0xffff;
2293 } else {
2294 /* Accept Broadcast packet, destination address matchs our
2295 * MAC address, use Receive Filter to reject unwanted MCAST
2296 * packets */
2297 struct dev_mc_list *mclist;
2298 rx_mode = RFAAB;
2299 for (i = 0, mclist = net_dev->mc_list;
2300 mclist && i < net_dev->mc_count;
2301 i++, mclist = mclist->next) {
2302 unsigned int bit_nr =
2303 sis900_mcast_bitnr(mclist->dmi_addr, sis_priv->chipset_rev);
2304 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
2308 /* update Multicast Hash Table in Receive Filter */
2309 for (i = 0; i < table_entries; i++) {
2310 /* why plus 0x04 ??, That makes the correct value for hash table. */
2311 outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr);
2312 outl(mc_filter[i], ioaddr + rfdr);
2315 outl(RFEN | rx_mode, ioaddr + rfcr);
2317 /* sis900 is capable of looping back packets at MAC level for
2318 * debugging purpose */
2319 if (net_dev->flags & IFF_LOOPBACK) {
2320 u32 cr_saved;
2321 /* We must disable Tx/Rx before setting loopback mode */
2322 cr_saved = inl(ioaddr + cr);
2323 outl(cr_saved | TxDIS | RxDIS, ioaddr + cr);
2324 /* enable loopback */
2325 outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg);
2326 outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg);
2327 /* restore cr */
2328 outl(cr_saved, ioaddr + cr);
2331 return;
2335 * sis900_reset - Reset sis900 MAC
2336 * @net_dev: the net device to reset
2338 * reset sis900 MAC and wait until finished
2339 * reset through command register
2340 * change backoff algorithm for 900B0 & 635 M/B
2343 static void sis900_reset(struct net_device *net_dev)
2345 struct sis900_private * sis_priv = net_dev->priv;
2346 long ioaddr = net_dev->base_addr;
2347 int i = 0;
2348 u32 status = TxRCMP | RxRCMP;
2350 outl(0, ioaddr + ier);
2351 outl(0, ioaddr + imr);
2352 outl(0, ioaddr + rfcr);
2354 outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr);
2356 /* Check that the chip has finished the reset. */
2357 while (status && (i++ < 1000)) {
2358 status ^= (inl(isr + ioaddr) & status);
2361 if( (sis_priv->chipset_rev >= SIS635A_900_REV) ||
2362 (sis_priv->chipset_rev == SIS900B_900_REV) )
2363 outl(PESEL | RND_CNT, ioaddr + cfg);
2364 else
2365 outl(PESEL, ioaddr + cfg);
2369 * sis900_remove - Remove sis900 device
2370 * @pci_dev: the pci device to be removed
2372 * remove and release SiS900 net device
2375 static void __devexit sis900_remove(struct pci_dev *pci_dev)
2377 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2378 struct sis900_private * sis_priv = net_dev->priv;
2379 struct mii_phy *phy = NULL;
2381 while (sis_priv->first_mii) {
2382 phy = sis_priv->first_mii;
2383 sis_priv->first_mii = phy->next;
2384 kfree(phy);
2387 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2388 sis_priv->rx_ring_dma);
2389 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2390 sis_priv->tx_ring_dma);
2391 unregister_netdev(net_dev);
2392 free_netdev(net_dev);
2393 pci_release_regions(pci_dev);
2394 pci_set_drvdata(pci_dev, NULL);
2397 #ifdef CONFIG_PM
2399 static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)
2401 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2402 long ioaddr = net_dev->base_addr;
2404 if(!netif_running(net_dev))
2405 return 0;
2407 netif_stop_queue(net_dev);
2408 netif_device_detach(net_dev);
2410 /* Stop the chip's Tx and Rx Status Machine */
2411 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
2413 pci_set_power_state(pci_dev, PCI_D3hot);
2414 pci_save_state(pci_dev);
2416 return 0;
2419 static int sis900_resume(struct pci_dev *pci_dev)
2421 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2422 struct sis900_private *sis_priv = net_dev->priv;
2423 long ioaddr = net_dev->base_addr;
2425 if(!netif_running(net_dev))
2426 return 0;
2427 pci_restore_state(pci_dev);
2428 pci_set_power_state(pci_dev, PCI_D0);
2430 sis900_init_rxfilter(net_dev);
2432 sis900_init_tx_ring(net_dev);
2433 sis900_init_rx_ring(net_dev);
2435 set_rx_mode(net_dev);
2437 netif_device_attach(net_dev);
2438 netif_start_queue(net_dev);
2440 /* Workaround for EDB */
2441 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2443 /* Enable all known interrupts by setting the interrupt mask. */
2444 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
2445 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
2446 outl(IE, ioaddr + ier);
2448 sis900_check_mode(net_dev, sis_priv->mii);
2450 return 0;
2452 #endif /* CONFIG_PM */
2454 static struct pci_driver sis900_pci_driver = {
2455 .name = SIS900_MODULE_NAME,
2456 .id_table = sis900_pci_tbl,
2457 .probe = sis900_probe,
2458 .remove = __devexit_p(sis900_remove),
2459 #ifdef CONFIG_PM
2460 .suspend = sis900_suspend,
2461 .resume = sis900_resume,
2462 #endif /* CONFIG_PM */
2465 static int __init sis900_init_module(void)
2467 /* when a module, this is printed whether or not devices are found in probe */
2468 #ifdef MODULE
2469 printk(version);
2470 #endif
2472 return pci_register_driver(&sis900_pci_driver);
2475 static void __exit sis900_cleanup_module(void)
2477 pci_unregister_driver(&sis900_pci_driver);
2480 module_init(sis900_init_module);
2481 module_exit(sis900_cleanup_module);