Merge branch 'sched/urgent'
[linux-2.6/x86.git] / drivers / ide / tc86c001.c
blobe444d24934b350472eead452b377063d4123c1af
1 /*
2 * Copyright (C) 2002 Toshiba Corporation
3 * Copyright (C) 2005-2006 MontaVista Software, Inc. <source@mvista.com>
5 * This file is licensed under the terms of the GNU General Public
6 * License version 2. This program is licensed "as is" without any
7 * warranty of any kind, whether express or implied.
8 */
10 #include <linux/types.h>
11 #include <linux/pci.h>
12 #include <linux/ide.h>
14 #define DRV_NAME "tc86c001"
16 static void tc86c001_set_mode(ide_hwif_t *hwif, ide_drive_t *drive)
18 unsigned long scr_port = hwif->config_data + (drive->dn ? 0x02 : 0x00);
19 u16 mode, scr = inw(scr_port);
20 const u8 speed = drive->dma_mode;
22 switch (speed) {
23 case XFER_UDMA_4: mode = 0x00c0; break;
24 case XFER_UDMA_3: mode = 0x00b0; break;
25 case XFER_UDMA_2: mode = 0x00a0; break;
26 case XFER_UDMA_1: mode = 0x0090; break;
27 case XFER_UDMA_0: mode = 0x0080; break;
28 case XFER_MW_DMA_2: mode = 0x0070; break;
29 case XFER_MW_DMA_1: mode = 0x0060; break;
30 case XFER_MW_DMA_0: mode = 0x0050; break;
31 case XFER_PIO_4: mode = 0x0400; break;
32 case XFER_PIO_3: mode = 0x0300; break;
33 case XFER_PIO_2: mode = 0x0200; break;
34 case XFER_PIO_1: mode = 0x0100; break;
35 case XFER_PIO_0:
36 default: mode = 0x0000; break;
39 scr &= (speed < XFER_MW_DMA_0) ? 0xf8ff : 0xff0f;
40 scr |= mode;
41 outw(scr, scr_port);
44 static void tc86c001_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
46 drive->dma_mode = drive->pio_mode;
47 tc86c001_set_mode(hwif, drive);
51 * HACKITY HACK
53 * This is a workaround for the limitation 5 of the TC86C001 IDE controller:
54 * if a DMA transfer terminates prematurely, the controller leaves the device's
55 * interrupt request (INTRQ) pending and does not generate a PCI interrupt (or
56 * set the interrupt bit in the DMA status register), thus no PCI interrupt
57 * will occur until a DMA transfer has been successfully completed.
59 * We work around this by initiating dummy, zero-length DMA transfer on
60 * a DMA timeout expiration. I found no better way to do this with the current
61 * IDE core than to temporarily replace a higher level driver's timer expiry
62 * handler with our own backing up to that handler in case our recovery fails.
64 static int tc86c001_timer_expiry(ide_drive_t *drive)
66 ide_hwif_t *hwif = drive->hwif;
67 ide_expiry_t *expiry = ide_get_hwifdata(hwif);
68 u8 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS);
70 /* Restore a higher level driver's expiry handler first. */
71 hwif->expiry = expiry;
73 if ((dma_stat & 5) == 1) { /* DMA active and no interrupt */
74 unsigned long sc_base = hwif->config_data;
75 unsigned long twcr_port = sc_base + (drive->dn ? 0x06 : 0x04);
76 u8 dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);
78 printk(KERN_WARNING "%s: DMA interrupt possibly stuck, "
79 "attempting recovery...\n", drive->name);
81 /* Stop DMA */
82 outb(dma_cmd & ~0x01, hwif->dma_base + ATA_DMA_CMD);
84 /* Setup the dummy DMA transfer */
85 outw(0, sc_base + 0x0a); /* Sector Count */
86 outw(0, twcr_port); /* Transfer Word Count 1 or 2 */
88 /* Start the dummy DMA transfer */
90 /* clear R_OR_WCTR for write */
91 outb(0x00, hwif->dma_base + ATA_DMA_CMD);
92 /* set START_STOPBM */
93 outb(0x01, hwif->dma_base + ATA_DMA_CMD);
96 * If an interrupt was pending, it should come thru shortly.
97 * If not, a higher level driver's expiry handler should
98 * eventually cause some kind of recovery from the DMA stall.
100 return WAIT_MIN_SLEEP;
103 /* Chain to the restored expiry handler if DMA wasn't active. */
104 if (likely(expiry != NULL))
105 return expiry(drive);
107 /* If there was no handler, "emulate" that for ide_timer_expiry()... */
108 return -1;
111 static void tc86c001_dma_start(ide_drive_t *drive)
113 ide_hwif_t *hwif = drive->hwif;
114 unsigned long sc_base = hwif->config_data;
115 unsigned long twcr_port = sc_base + (drive->dn ? 0x06 : 0x04);
116 unsigned long nsectors = blk_rq_sectors(hwif->rq);
119 * We have to manually load the sector count and size into
120 * the appropriate system control registers for DMA to work
121 * with LBA48 and ATAPI devices...
123 outw(nsectors, sc_base + 0x0a); /* Sector Count */
124 outw(SECTOR_SIZE / 2, twcr_port); /* Transfer Word Count 1/2 */
126 /* Install our timeout expiry hook, saving the current handler... */
127 ide_set_hwifdata(hwif, hwif->expiry);
128 hwif->expiry = &tc86c001_timer_expiry;
130 ide_dma_start(drive);
133 static u8 tc86c001_cable_detect(ide_hwif_t *hwif)
135 struct pci_dev *dev = to_pci_dev(hwif->dev);
136 unsigned long sc_base = pci_resource_start(dev, 5);
137 u16 scr1 = inw(sc_base + 0x00);
140 * System Control 1 Register bit 13 (PDIAGN):
141 * 0=80-pin cable, 1=40-pin cable
143 return (scr1 & 0x2000) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
146 static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
148 struct pci_dev *dev = to_pci_dev(hwif->dev);
149 unsigned long sc_base = pci_resource_start(dev, 5);
150 u16 scr1 = inw(sc_base + 0x00);
152 /* System Control 1 Register bit 15 (Soft Reset) set */
153 outw(scr1 | 0x8000, sc_base + 0x00);
155 /* System Control 1 Register bit 14 (FIFO Reset) set */
156 outw(scr1 | 0x4000, sc_base + 0x00);
158 /* System Control 1 Register: reset clear */
159 outw(scr1 & ~0xc000, sc_base + 0x00);
161 /* Store the system control register base for convenience... */
162 hwif->config_data = sc_base;
164 if (!hwif->dma_base)
165 return;
168 * Sector Count Control Register bits 0 and 1 set:
169 * software sets Sector Count Register for master and slave device
171 outw(0x0003, sc_base + 0x0c);
173 /* Sector Count Register limit */
174 hwif->rqsize = 0xffff;
177 static const struct ide_port_ops tc86c001_port_ops = {
178 .set_pio_mode = tc86c001_set_pio_mode,
179 .set_dma_mode = tc86c001_set_mode,
180 .cable_detect = tc86c001_cable_detect,
183 static const struct ide_dma_ops tc86c001_dma_ops = {
184 .dma_host_set = ide_dma_host_set,
185 .dma_setup = ide_dma_setup,
186 .dma_start = tc86c001_dma_start,
187 .dma_end = ide_dma_end,
188 .dma_test_irq = ide_dma_test_irq,
189 .dma_lost_irq = ide_dma_lost_irq,
190 .dma_timer_expiry = ide_dma_sff_timer_expiry,
191 .dma_sff_read_status = ide_dma_sff_read_status,
194 static const struct ide_port_info tc86c001_chipset __devinitdata = {
195 .name = DRV_NAME,
196 .init_hwif = init_hwif_tc86c001,
197 .port_ops = &tc86c001_port_ops,
198 .dma_ops = &tc86c001_dma_ops,
199 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_OFF_BOARD,
200 .pio_mask = ATA_PIO4,
201 .mwdma_mask = ATA_MWDMA2,
202 .udma_mask = ATA_UDMA4,
205 static int __devinit tc86c001_init_one(struct pci_dev *dev,
206 const struct pci_device_id *id)
208 int rc;
210 rc = pci_enable_device(dev);
211 if (rc)
212 goto out;
214 rc = pci_request_region(dev, 5, DRV_NAME);
215 if (rc) {
216 printk(KERN_ERR DRV_NAME ": system control regs already in use");
217 goto out_disable;
220 rc = ide_pci_init_one(dev, &tc86c001_chipset, NULL);
221 if (rc)
222 goto out_release;
224 goto out;
226 out_release:
227 pci_release_region(dev, 5);
228 out_disable:
229 pci_disable_device(dev);
230 out:
231 return rc;
234 static void __devexit tc86c001_remove(struct pci_dev *dev)
236 ide_pci_remove(dev);
237 pci_release_region(dev, 5);
238 pci_disable_device(dev);
241 static const struct pci_device_id tc86c001_pci_tbl[] = {
242 { PCI_VDEVICE(TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_IDE), 0 },
243 { 0, }
245 MODULE_DEVICE_TABLE(pci, tc86c001_pci_tbl);
247 static struct pci_driver tc86c001_pci_driver = {
248 .name = "TC86C001",
249 .id_table = tc86c001_pci_tbl,
250 .probe = tc86c001_init_one,
251 .remove = __devexit_p(tc86c001_remove),
254 static int __init tc86c001_ide_init(void)
256 return ide_pci_register_driver(&tc86c001_pci_driver);
259 static void __exit tc86c001_ide_exit(void)
261 pci_unregister_driver(&tc86c001_pci_driver);
264 module_init(tc86c001_ide_init);
265 module_exit(tc86c001_ide_exit);
267 MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>");
268 MODULE_DESCRIPTION("PCI driver module for TC86C001 IDE");
269 MODULE_LICENSE("GPL");