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MERGE-master-patchset-edits
[linux-2.6/openmoko-kernel.git] / drivers / net / wireless / p54 / p54common.c
blobc6a370fa9bcbf11115fdd9063327356339f4504d
1 /*
2 * Common code for mac80211 Prism54 drivers
3 *
4 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
5 * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
6 * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
7 *
8 * Based on:
9 * - the islsm (softmac prism54) driver, which is:
10 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
11 * - stlc45xx driver
12 * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19 #include <linux/init.h>
20 #include <linux/firmware.h>
21 #include <linux/etherdevice.h>
22
23 #include <net/mac80211.h>
24
25 #include "p54.h"
26 #include "p54common.h"
27
28 static int modparam_nohwcrypt;
29 module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
30 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
31 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
32 MODULE_DESCRIPTION("Softmac Prism54 common code");
33 MODULE_LICENSE("GPL");
34 MODULE_ALIAS("prism54common");
35
36 static struct ieee80211_rate p54_bgrates[] = {
37 { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
38 { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
39 { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
40 { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
41 { .bitrate = 60, .hw_value = 4, },
42 { .bitrate = 90, .hw_value = 5, },
43 { .bitrate = 120, .hw_value = 6, },
44 { .bitrate = 180, .hw_value = 7, },
45 { .bitrate = 240, .hw_value = 8, },
46 { .bitrate = 360, .hw_value = 9, },
47 { .bitrate = 480, .hw_value = 10, },
48 { .bitrate = 540, .hw_value = 11, },
49 };
50
51 static struct ieee80211_channel p54_bgchannels[] = {
52 { .center_freq = 2412, .hw_value = 1, },
53 { .center_freq = 2417, .hw_value = 2, },
54 { .center_freq = 2422, .hw_value = 3, },
55 { .center_freq = 2427, .hw_value = 4, },
56 { .center_freq = 2432, .hw_value = 5, },
57 { .center_freq = 2437, .hw_value = 6, },
58 { .center_freq = 2442, .hw_value = 7, },
59 { .center_freq = 2447, .hw_value = 8, },
60 { .center_freq = 2452, .hw_value = 9, },
61 { .center_freq = 2457, .hw_value = 10, },
62 { .center_freq = 2462, .hw_value = 11, },
63 { .center_freq = 2467, .hw_value = 12, },
64 { .center_freq = 2472, .hw_value = 13, },
65 { .center_freq = 2484, .hw_value = 14, },
66 };
67
68 static struct ieee80211_supported_band band_2GHz = {
69 .channels = p54_bgchannels,
70 .n_channels = ARRAY_SIZE(p54_bgchannels),
71 .bitrates = p54_bgrates,
72 .n_bitrates = ARRAY_SIZE(p54_bgrates),
73 };
74
75 static struct ieee80211_rate p54_arates[] = {
76 { .bitrate = 60, .hw_value = 4, },
77 { .bitrate = 90, .hw_value = 5, },
78 { .bitrate = 120, .hw_value = 6, },
79 { .bitrate = 180, .hw_value = 7, },
80 { .bitrate = 240, .hw_value = 8, },
81 { .bitrate = 360, .hw_value = 9, },
82 { .bitrate = 480, .hw_value = 10, },
83 { .bitrate = 540, .hw_value = 11, },
84 };
85
86 static struct ieee80211_channel p54_achannels[] = {
87 { .center_freq = 4920 },
88 { .center_freq = 4940 },
89 { .center_freq = 4960 },
90 { .center_freq = 4980 },
91 { .center_freq = 5040 },
92 { .center_freq = 5060 },
93 { .center_freq = 5080 },
94 { .center_freq = 5170 },
95 { .center_freq = 5180 },
96 { .center_freq = 5190 },
97 { .center_freq = 5200 },
98 { .center_freq = 5210 },
99 { .center_freq = 5220 },
100 { .center_freq = 5230 },
101 { .center_freq = 5240 },
102 { .center_freq = 5260 },
103 { .center_freq = 5280 },
104 { .center_freq = 5300 },
105 { .center_freq = 5320 },
106 { .center_freq = 5500 },
107 { .center_freq = 5520 },
108 { .center_freq = 5540 },
109 { .center_freq = 5560 },
110 { .center_freq = 5580 },
111 { .center_freq = 5600 },
112 { .center_freq = 5620 },
113 { .center_freq = 5640 },
114 { .center_freq = 5660 },
115 { .center_freq = 5680 },
116 { .center_freq = 5700 },
117 { .center_freq = 5745 },
118 { .center_freq = 5765 },
119 { .center_freq = 5785 },
120 { .center_freq = 5805 },
121 { .center_freq = 5825 },
122 };
123
124 static struct ieee80211_supported_band band_5GHz = {
125 .channels = p54_achannels,
126 .n_channels = ARRAY_SIZE(p54_achannels),
127 .bitrates = p54_arates,
128 .n_bitrates = ARRAY_SIZE(p54_arates),
129 };
130
131 int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
132 {
133 struct p54_common *priv = dev->priv;
134 struct bootrec_exp_if *exp_if;
135 struct bootrec *bootrec;
136 u32 *data = (u32 *)fw->data;
137 u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
138 u8 *fw_version = NULL;
139 size_t len;
140 int i;
141 int maxlen;
142
143 if (priv->rx_start)
144 return 0;
145
146 while (data < end_data && *data)
147 data++;
148
149 while (data < end_data && !*data)
150 data++;
151
152 bootrec = (struct bootrec *) data;
153
154 while (bootrec->data <= end_data &&
155 (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
156 u32 code = le32_to_cpu(bootrec->code);
157 switch (code) {
158 case BR_CODE_COMPONENT_ID:
159 priv->fw_interface = be32_to_cpup((__be32 *)
160 bootrec->data);
161 switch (priv->fw_interface) {
162 case FW_LM86:
163 case FW_LM20:
164 case FW_LM87: {
165 char *iftype = (char *)bootrec->data;
166 printk(KERN_INFO "%s: p54 detected a LM%c%c "
167 "firmware\n",
168 wiphy_name(dev->wiphy),
169 iftype[2], iftype[3]);
170 break;
171 }
172 case FW_FMAC:
173 default:
174 printk(KERN_ERR "%s: unsupported firmware\n",
175 wiphy_name(dev->wiphy));
176 return -ENODEV;
177 }
178 break;
179 case BR_CODE_COMPONENT_VERSION:
180 /* 24 bytes should be enough for all firmwares */
181 if (strnlen((unsigned char*)bootrec->data, 24) < 24)
182 fw_version = (unsigned char*)bootrec->data;
183 break;
184 case BR_CODE_DESCR: {
185 struct bootrec_desc *desc =
186 (struct bootrec_desc *)bootrec->data;
187 priv->rx_start = le32_to_cpu(desc->rx_start);
188 /* FIXME add sanity checking */
189 priv->rx_end = le32_to_cpu(desc->rx_end) - 0x3500;
190 priv->headroom = desc->headroom;
191 priv->tailroom = desc->tailroom;
192 priv->privacy_caps = desc->privacy_caps;
193 priv->rx_keycache_size = desc->rx_keycache_size;
194 if (le32_to_cpu(bootrec->len) == 11)
195 priv->rx_mtu = le16_to_cpu(desc->rx_mtu);
196 else
197 priv->rx_mtu = (size_t)
198 0x620 - priv->tx_hdr_len;
199 maxlen = priv->tx_hdr_len + /* USB devices */
200 sizeof(struct p54_rx_data) +
201 4 + /* rx alignment */
202 IEEE80211_MAX_FRAG_THRESHOLD;
203 if (priv->rx_mtu > maxlen && PAGE_SIZE == 4096) {
204 printk(KERN_INFO "p54: rx_mtu reduced from %d "
205 "to %d\n", priv->rx_mtu,
206 maxlen);
207 priv->rx_mtu = maxlen;
208 }
209 break;
210 }
211 case BR_CODE_EXPOSED_IF:
212 exp_if = (struct bootrec_exp_if *) bootrec->data;
213 for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
214 if (exp_if[i].if_id == cpu_to_le16(0x1a))
215 priv->fw_var = le16_to_cpu(exp_if[i].variant);
216 break;
217 case BR_CODE_DEPENDENT_IF:
218 break;
219 case BR_CODE_END_OF_BRA:
220 case LEGACY_BR_CODE_END_OF_BRA:
221 end_data = NULL;
222 break;
223 default:
224 break;
225 }
226 bootrec = (struct bootrec *)&bootrec->data[len];
227 }
228
229 if (fw_version)
230 printk(KERN_INFO "%s: FW rev %s - Softmac protocol %x.%x\n",
231 wiphy_name(dev->wiphy), fw_version,
232 priv->fw_var >> 8, priv->fw_var & 0xff);
233
234 if (priv->fw_var < 0x500)
235 printk(KERN_INFO "%s: you are using an obsolete firmware. "
236 "visit http://wireless.kernel.org/en/users/Drivers/p54 "
237 "and grab one for \"kernel >= 2.6.28\"!\n",
238 wiphy_name(dev->wiphy));
239
240 if (priv->fw_var >= 0x300) {
241 /* Firmware supports QoS, use it! */
242 priv->tx_stats[4].limit = 3; /* AC_VO */
243 priv->tx_stats[5].limit = 4; /* AC_VI */
244 priv->tx_stats[6].limit = 3; /* AC_BE */
245 priv->tx_stats[7].limit = 2; /* AC_BK */
246 dev->queues = 4;
247 }
248
249 if (!modparam_nohwcrypt)
250 printk(KERN_INFO "%s: cryptographic accelerator "
251 "WEP:%s, TKIP:%s, CCMP:%s\n",
252 wiphy_name(dev->wiphy),
253 (priv->privacy_caps & BR_DESC_PRIV_CAP_WEP) ? "YES" :
254 "no", (priv->privacy_caps & (BR_DESC_PRIV_CAP_TKIP |
255 BR_DESC_PRIV_CAP_MICHAEL)) ? "YES" : "no",
256 (priv->privacy_caps & BR_DESC_PRIV_CAP_AESCCMP) ?
257 "YES" : "no");
258
259 return 0;
260 }
261 EXPORT_SYMBOL_GPL(p54_parse_firmware);
262
263 static int p54_convert_rev0(struct ieee80211_hw *dev,
264 struct pda_pa_curve_data *curve_data)
265 {
266 struct p54_common *priv = dev->priv;
267 struct p54_pa_curve_data_sample *dst;
268 struct pda_pa_curve_data_sample_rev0 *src;
269 size_t cd_len = sizeof(*curve_data) +
270 (curve_data->points_per_channel*sizeof(*dst) + 2) *
271 curve_data->channels;
272 unsigned int i, j;
273 void *source, *target;
274
275 priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
276 if (!priv->curve_data)
277 return -ENOMEM;
278
279 memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
280 source = curve_data->data;
281 target = priv->curve_data->data;
282 for (i = 0; i < curve_data->channels; i++) {
283 __le16 *freq = source;
284 source += sizeof(__le16);
285 *((__le16 *)target) = *freq;
286 target += sizeof(__le16);
287 for (j = 0; j < curve_data->points_per_channel; j++) {
288 dst = target;
289 src = source;
290
291 dst->rf_power = src->rf_power;
292 dst->pa_detector = src->pa_detector;
293 dst->data_64qam = src->pcv;
294 /* "invent" the points for the other modulations */
295 #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
296 dst->data_16qam = SUB(src->pcv, 12);
297 dst->data_qpsk = SUB(dst->data_16qam, 12);
298 dst->data_bpsk = SUB(dst->data_qpsk, 12);
299 dst->data_barker = SUB(dst->data_bpsk, 14);
300 #undef SUB
301 target += sizeof(*dst);
302 source += sizeof(*src);
303 }
304 }
305
306 return 0;
307 }
308
309 static int p54_convert_rev1(struct ieee80211_hw *dev,
310 struct pda_pa_curve_data *curve_data)
311 {
312 struct p54_common *priv = dev->priv;
313 struct p54_pa_curve_data_sample *dst;
314 struct pda_pa_curve_data_sample_rev1 *src;
315 size_t cd_len = sizeof(*curve_data) +
316 (curve_data->points_per_channel*sizeof(*dst) + 2) *
317 curve_data->channels;
318 unsigned int i, j;
319 void *source, *target;
320
321 priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
322 if (!priv->curve_data)
323 return -ENOMEM;
324
325 memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
326 source = curve_data->data;
327 target = priv->curve_data->data;
328 for (i = 0; i < curve_data->channels; i++) {
329 __le16 *freq = source;
330 source += sizeof(__le16);
331 *((__le16 *)target) = *freq;
332 target += sizeof(__le16);
333 for (j = 0; j < curve_data->points_per_channel; j++) {
334 memcpy(target, source, sizeof(*src));
335
336 target += sizeof(*dst);
337 source += sizeof(*src);
338 }
339 source++;
340 }
341
342 return 0;
343 }
344
345 static const char *p54_rf_chips[] = { "NULL", "Duette3", "Duette2",
346 "Frisbee", "Xbow", "Longbow", "NULL", "NULL" };
347 static int p54_init_xbow_synth(struct ieee80211_hw *dev);
348
349 static void p54_parse_rssical(struct ieee80211_hw *dev, void *data, int len,
350 u16 type)
351 {
352 struct p54_common *priv = dev->priv;
353 int offset = (type == PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED) ? 2 : 0;
354 int entry_size = sizeof(struct pda_rssi_cal_entry) + offset;
355 int num_entries = (type == PDR_RSSI_LINEAR_APPROXIMATION) ? 1 : 2;
356 int i;
357
358 if (len != (entry_size * num_entries)) {
359 printk(KERN_ERR "%s: unknown rssi calibration data packing "
360 " type:(%x) len:%d.\n",
361 wiphy_name(dev->wiphy), type, len);
362
363 print_hex_dump_bytes("rssical:", DUMP_PREFIX_NONE,
364 data, len);
365
366 printk(KERN_ERR "%s: please report this issue.\n",
367 wiphy_name(dev->wiphy));
368 return;
369 }
370
371 for (i = 0; i < num_entries; i++) {
372 struct pda_rssi_cal_entry *cal = data +
373 (offset + i * entry_size);
374 priv->rssical_db[i].mul = (s16) le16_to_cpu(cal->mul);
375 priv->rssical_db[i].add = (s16) le16_to_cpu(cal->add);
376 }
377 }
378
379 static int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
380 {
381 struct p54_common *priv = dev->priv;
382 struct eeprom_pda_wrap *wrap = NULL;
383 struct pda_entry *entry;
384 unsigned int data_len, entry_len;
385 void *tmp;
386 int err;
387 u8 *end = (u8 *)eeprom + len;
388 u16 synth = 0;
389
390 wrap = (struct eeprom_pda_wrap *) eeprom;
391 entry = (void *)wrap->data + le16_to_cpu(wrap->len);
392
393 /* verify that at least the entry length/code fits */
394 while ((u8 *)entry <= end - sizeof(*entry)) {
395 entry_len = le16_to_cpu(entry->len);
396 data_len = ((entry_len - 1) << 1);
397
398 /* abort if entry exceeds whole structure */
399 if ((u8 *)entry + sizeof(*entry) + data_len > end)
400 break;
401
402 switch (le16_to_cpu(entry->code)) {
403 case PDR_MAC_ADDRESS:
404 SET_IEEE80211_PERM_ADDR(dev, entry->data);
405 break;
406 case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
407 if (data_len < 2) {
408 err = -EINVAL;
409 goto err;
410 }
411
412 if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
413 err = -EINVAL;
414 goto err;
415 }
416
417 priv->output_limit = kmalloc(entry->data[1] *
418 sizeof(*priv->output_limit), GFP_KERNEL);
419
420 if (!priv->output_limit) {
421 err = -ENOMEM;
422 goto err;
423 }
424
425 memcpy(priv->output_limit, &entry->data[2],
426 entry->data[1]*sizeof(*priv->output_limit));
427 priv->output_limit_len = entry->data[1];
428 break;
429 case PDR_PRISM_PA_CAL_CURVE_DATA: {
430 struct pda_pa_curve_data *curve_data =
431 (struct pda_pa_curve_data *)entry->data;
432 if (data_len < sizeof(*curve_data)) {
433 err = -EINVAL;
434 goto err;
435 }
436
437 switch (curve_data->cal_method_rev) {
438 case 0:
439 err = p54_convert_rev0(dev, curve_data);
440 break;
441 case 1:
442 err = p54_convert_rev1(dev, curve_data);
443 break;
444 default:
445 printk(KERN_ERR "%s: unknown curve data "
446 "revision %d\n",
447 wiphy_name(dev->wiphy),
448 curve_data->cal_method_rev);
449 err = -ENODEV;
450 break;
451 }
452 if (err)
453 goto err;
454
455 }
456 case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
457 priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
458 if (!priv->iq_autocal) {
459 err = -ENOMEM;
460 goto err;
461 }
462
463 memcpy(priv->iq_autocal, entry->data, data_len);
464 priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
465 break;
466 case PDR_INTERFACE_LIST:
467 tmp = entry->data;
468 while ((u8 *)tmp < entry->data + data_len) {
469 struct bootrec_exp_if *exp_if = tmp;
470 if (le16_to_cpu(exp_if->if_id) == 0xf)
471 synth = le16_to_cpu(exp_if->variant);
472 tmp += sizeof(struct bootrec_exp_if);
473 }
474 break;
475 case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
476 priv->version = *(u8 *)(entry->data + 1);
477 break;
478 case PDR_RSSI_LINEAR_APPROXIMATION:
479 case PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND:
480 case PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED:
481 p54_parse_rssical(dev, entry->data, data_len,
482 le16_to_cpu(entry->code));
483 break;
484 case PDR_END:
485 /* make it overrun */
486 entry_len = len;
487 break;
488 case PDR_MANUFACTURING_PART_NUMBER:
489 case PDR_PDA_VERSION:
490 case PDR_NIC_SERIAL_NUMBER:
491 case PDR_REGULATORY_DOMAIN_LIST:
492 case PDR_TEMPERATURE_TYPE:
493 case PDR_PRISM_PCI_IDENTIFIER:
494 case PDR_COUNTRY_INFORMATION:
495 case PDR_OEM_NAME:
496 case PDR_PRODUCT_NAME:
497 case PDR_UTF8_OEM_NAME:
498 case PDR_UTF8_PRODUCT_NAME:
499 case PDR_COUNTRY_LIST:
500 case PDR_DEFAULT_COUNTRY:
501 case PDR_ANTENNA_GAIN:
502 case PDR_PRISM_INDIGO_PA_CALIBRATION_DATA:
503 case PDR_REGULATORY_POWER_LIMITS:
504 case PDR_RADIATED_TRANSMISSION_CORRECTION:
505 case PDR_PRISM_TX_IQ_CALIBRATION:
506 case PDR_BASEBAND_REGISTERS:
507 case PDR_PER_CHANNEL_BASEBAND_REGISTERS:
508 break;
509 default:
510 printk(KERN_INFO "%s: unknown eeprom code : 0x%x\n",
511 wiphy_name(dev->wiphy),
512 le16_to_cpu(entry->code));
513 break;
514 }
515
516 entry = (void *)entry + (entry_len + 1)*2;
517 }
518
519 if (!synth || !priv->iq_autocal || !priv->output_limit ||
520 !priv->curve_data) {
521 printk(KERN_ERR "%s: not all required entries found in eeprom!\n",
522 wiphy_name(dev->wiphy));
523 err = -EINVAL;
524 goto err;
525 }
526
527 priv->rxhw = synth & PDR_SYNTH_FRONTEND_MASK;
528 if (priv->rxhw == 4)
529 p54_init_xbow_synth(dev);
530 if (!(synth & PDR_SYNTH_24_GHZ_DISABLED))
531 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
532 if (!(synth & PDR_SYNTH_5_GHZ_DISABLED))
533 dev->wiphy->bands[IEEE80211_BAND_5GHZ] = &band_5GHz;
534
535 if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
536 u8 perm_addr[ETH_ALEN];
537
538 printk(KERN_WARNING "%s: Invalid hwaddr! Using randomly generated MAC addr\n",
539 wiphy_name(dev->wiphy));
540 random_ether_addr(perm_addr);
541 SET_IEEE80211_PERM_ADDR(dev, perm_addr);
542 }
543
544 printk(KERN_INFO "%s: hwaddr %pM, MAC:isl38%02x RF:%s\n",
545 wiphy_name(dev->wiphy),
546 dev->wiphy->perm_addr,
547 priv->version, p54_rf_chips[priv->rxhw]);
548
549 return 0;
550
551 err:
552 if (priv->iq_autocal) {
553 kfree(priv->iq_autocal);
554 priv->iq_autocal = NULL;
555 }
556
557 if (priv->output_limit) {
558 kfree(priv->output_limit);
559 priv->output_limit = NULL;
560 }
561
562 if (priv->curve_data) {
563 kfree(priv->curve_data);
564 priv->curve_data = NULL;
565 }
566
567 printk(KERN_ERR "%s: eeprom parse failed!\n",
568 wiphy_name(dev->wiphy));
569 return err;
570 }
571
572 static int p54_rssi_to_dbm(struct ieee80211_hw *dev, int rssi)
573 {
574 struct p54_common *priv = dev->priv;
575 int band = dev->conf.channel->band;
576
577 return ((rssi * priv->rssical_db[band].mul) / 64 +
578 priv->rssical_db[band].add) / 4;
579 }
580
581 static int p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
582 {
583 struct p54_common *priv = dev->priv;
584 struct p54_rx_data *hdr = (struct p54_rx_data *) skb->data;
585 struct ieee80211_rx_status rx_status = {0};
586 u16 freq = le16_to_cpu(hdr->freq);
587 size_t header_len = sizeof(*hdr);
588 u32 tsf32;
589 u8 rate = hdr->rate & 0xf;
590
591 /*
592 * If the device is in a unspecified state we have to
593 * ignore all data frames. Else we could end up with a
594 * nasty crash.
595 */
596 if (unlikely(priv->mode == NL80211_IFTYPE_UNSPECIFIED))
597 return 0;
598
599 if (!(hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_IN_FCS_GOOD))) {
600 if (priv->filter_flags & FIF_FCSFAIL)
601 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
602 else
603 return 0;
604 }
605
606 if (hdr->decrypt_status == P54_DECRYPT_OK)
607 rx_status.flag |= RX_FLAG_DECRYPTED;
608 if ((hdr->decrypt_status == P54_DECRYPT_FAIL_MICHAEL) ||
609 (hdr->decrypt_status == P54_DECRYPT_FAIL_TKIP))
610 rx_status.flag |= RX_FLAG_MMIC_ERROR;
611
612 rx_status.signal = p54_rssi_to_dbm(dev, hdr->rssi);
613 rx_status.noise = priv->noise;
614 /* XX correct? */
615 rx_status.qual = (100 * hdr->rssi) / 127;
616 if (hdr->rate & 0x10)
617 rx_status.flag |= RX_FLAG_SHORTPRE;
618 if (dev->conf.channel->band == IEEE80211_BAND_5GHZ)
619 rx_status.rate_idx = (rate < 4) ? 0 : rate - 4;
620 else
621 rx_status.rate_idx = rate;
622
623 rx_status.freq = freq;
624 rx_status.band = dev->conf.channel->band;
625 rx_status.antenna = hdr->antenna;
626
627 tsf32 = le32_to_cpu(hdr->tsf32);
628 if (tsf32 < priv->tsf_low32)
629 priv->tsf_high32++;
630 rx_status.mactime = ((u64)priv->tsf_high32) << 32 | tsf32;
631 priv->tsf_low32 = tsf32;
632
633 rx_status.flag |= RX_FLAG_TSFT;
634
635 if (hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_ALIGN))
636 header_len += hdr->align[0];
637
638 skb_pull(skb, header_len);
639 skb_trim(skb, le16_to_cpu(hdr->len));
640
641 ieee80211_rx_irqsafe(dev, skb, &rx_status);
642
643 queue_delayed_work(dev->workqueue, &priv->work,
644 msecs_to_jiffies(P54_STATISTICS_UPDATE));
645
646 return -1;
647 }
648
649 static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
650 {
651 struct p54_common *priv = dev->priv;
652 int i;
653
654 if (priv->mode == NL80211_IFTYPE_UNSPECIFIED)
655 return ;
656
657 for (i = 0; i < dev->queues; i++)
658 if (priv->tx_stats[i + 4].len < priv->tx_stats[i + 4].limit)
659 ieee80211_wake_queue(dev, i);
660 }
661
662 void p54_free_skb(struct ieee80211_hw *dev, struct sk_buff *skb)
663 {
664 struct p54_common *priv = dev->priv;
665 struct ieee80211_tx_info *info;
666 struct memrecord *range;
667 unsigned long flags;
668 u32 freed = 0, last_addr = priv->rx_start;
669
670 if (unlikely(!skb || !dev || !skb_queue_len(&priv->tx_queue)))
671 return;
672
673 /*
674 * don't try to free an already unlinked skb
675 */
676 if (unlikely((!skb->next) || (!skb->prev)))
677 return;
678
679 spin_lock_irqsave(&priv->tx_queue.lock, flags);
680 info = IEEE80211_SKB_CB(skb);
681 range = (void *)info->rate_driver_data;
682 if (skb->prev != (struct sk_buff *)&priv->tx_queue) {
683 struct ieee80211_tx_info *ni;
684 struct memrecord *mr;
685
686 ni = IEEE80211_SKB_CB(skb->prev);
687 mr = (struct memrecord *)ni->rate_driver_data;
688 last_addr = mr->end_addr;
689 }
690 if (skb->next != (struct sk_buff *)&priv->tx_queue) {
691 struct ieee80211_tx_info *ni;
692 struct memrecord *mr;
693
694 ni = IEEE80211_SKB_CB(skb->next);
695 mr = (struct memrecord *)ni->rate_driver_data;
696 freed = mr->start_addr - last_addr;
697 } else
698 freed = priv->rx_end - last_addr;
699 __skb_unlink(skb, &priv->tx_queue);
700 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
701 dev_kfree_skb_any(skb);
702
703 if (freed >= priv->headroom + sizeof(struct p54_hdr) + 48 +
704 IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
705 p54_wake_free_queues(dev);
706 }
707 EXPORT_SYMBOL_GPL(p54_free_skb);
708
709 static struct sk_buff *p54_find_tx_entry(struct ieee80211_hw *dev,
710 __le32 req_id)
711 {
712 struct p54_common *priv = dev->priv;
713 struct sk_buff *entry = priv->tx_queue.next;
714 unsigned long flags;
715
716 spin_lock_irqsave(&priv->tx_queue.lock, flags);
717 while (entry != (struct sk_buff *)&priv->tx_queue) {
718 struct p54_hdr *hdr = (struct p54_hdr *) entry->data;
719
720 if (hdr->req_id == req_id) {
721 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
722 return entry;
723 }
724 entry = entry->next;
725 }
726 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
727 return NULL;
728 }
729
730 static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
731 {
732 struct p54_common *priv = dev->priv;
733 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
734 struct p54_frame_sent *payload = (struct p54_frame_sent *) hdr->data;
735 struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
736 u32 addr = le32_to_cpu(hdr->req_id) - priv->headroom;
737 struct memrecord *range = NULL;
738 u32 freed = 0;
739 u32 last_addr = priv->rx_start;
740 unsigned long flags;
741 int count, idx;
742
743 spin_lock_irqsave(&priv->tx_queue.lock, flags);
744 while (entry != (struct sk_buff *)&priv->tx_queue) {
745 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
746 struct p54_hdr *entry_hdr;
747 struct p54_tx_data *entry_data;
748 int pad = 0;
749
750 range = (void *)info->rate_driver_data;
751 if (range->start_addr != addr) {
752 last_addr = range->end_addr;
753 entry = entry->next;
754 continue;
755 }
756
757 if (entry->next != (struct sk_buff *)&priv->tx_queue) {
758 struct ieee80211_tx_info *ni;
759 struct memrecord *mr;
760
761 ni = IEEE80211_SKB_CB(entry->next);
762 mr = (struct memrecord *)ni->rate_driver_data;
763 freed = mr->start_addr - last_addr;
764 } else
765 freed = priv->rx_end - last_addr;
766
767 last_addr = range->end_addr;
768 __skb_unlink(entry, &priv->tx_queue);
769 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
770
771 entry_hdr = (struct p54_hdr *) entry->data;
772 entry_data = (struct p54_tx_data *) entry_hdr->data;
773 priv->tx_stats[entry_data->hw_queue].len--;
774 priv->stats.dot11ACKFailureCount += payload->tries - 1;
775
776 if (unlikely(entry == priv->cached_beacon)) {
777 kfree_skb(entry);
778 priv->cached_beacon = NULL;
779 goto out;
780 }
781
782 /*
783 * Clear manually, ieee80211_tx_info_clear_status would
784 * clear the counts too and we need them.
785 */
786 memset(&info->status.ampdu_ack_len, 0,
787 sizeof(struct ieee80211_tx_info) -
788 offsetof(struct ieee80211_tx_info, status.ampdu_ack_len));
789 BUILD_BUG_ON(offsetof(struct ieee80211_tx_info,
790 status.ampdu_ack_len) != 23);
791
792 if (entry_hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_ALIGN))
793 pad = entry_data->align[0];
794
795 /* walk through the rates array and adjust the counts */
796 count = payload->tries;
797 for (idx = 0; idx < 4; idx++) {
798 if (count >= info->status.rates[idx].count) {
799 count -= info->status.rates[idx].count;
800 } else if (count > 0) {
801 info->status.rates[idx].count = count;
802 count = 0;
803 } else {
804 info->status.rates[idx].idx = -1;
805 info->status.rates[idx].count = 0;
806 }
807 }
808
809 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
810 (!payload->status))
811 info->flags |= IEEE80211_TX_STAT_ACK;
812 if (payload->status & P54_TX_PSM_CANCELLED)
813 info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
814 info->status.ack_signal = p54_rssi_to_dbm(dev,
815 (int)payload->ack_rssi);
816
817 if (entry_data->key_type == P54_CRYPTO_TKIPMICHAEL) {
818 u8 *iv = (u8 *)(entry_data->align + pad +
819 entry_data->crypt_offset);
820
821 /* Restore the original TKIP IV. */
822 iv[2] = iv[0];
823 iv[0] = iv[1];
824 iv[1] = (iv[0] | 0x20) & 0x7f; /* WEPSeed - 8.3.2.2 */
825 }
826 skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
827 ieee80211_tx_status_irqsafe(dev, entry);
828 goto out;
829 }
830 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
831
832 out:
833 if (freed >= priv->headroom + sizeof(struct p54_hdr) + 48 +
834 IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
835 p54_wake_free_queues(dev);
836 }
837
838 static void p54_rx_eeprom_readback(struct ieee80211_hw *dev,
839 struct sk_buff *skb)
840 {
841 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
842 struct p54_eeprom_lm86 *eeprom = (struct p54_eeprom_lm86 *) hdr->data;
843 struct p54_common *priv = dev->priv;
844
845 if (!priv->eeprom)
846 return ;
847
848 if (priv->fw_var >= 0x509) {
849 memcpy(priv->eeprom, eeprom->v2.data,
850 le16_to_cpu(eeprom->v2.len));
851 } else {
852 memcpy(priv->eeprom, eeprom->v1.data,
853 le16_to_cpu(eeprom->v1.len));
854 }
855
856 complete(&priv->eeprom_comp);
857 }
858
859 static void p54_rx_stats(struct ieee80211_hw *dev, struct sk_buff *skb)
860 {
861 struct p54_common *priv = dev->priv;
862 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
863 struct p54_statistics *stats = (struct p54_statistics *) hdr->data;
864 u32 tsf32;
865
866 if (unlikely(priv->mode == NL80211_IFTYPE_UNSPECIFIED))
867 return ;
868
869 tsf32 = le32_to_cpu(stats->tsf32);
870 if (tsf32 < priv->tsf_low32)
871 priv->tsf_high32++;
872 priv->tsf_low32 = tsf32;
873
874 priv->stats.dot11RTSFailureCount = le32_to_cpu(stats->rts_fail);
875 priv->stats.dot11RTSSuccessCount = le32_to_cpu(stats->rts_success);
876 priv->stats.dot11FCSErrorCount = le32_to_cpu(stats->rx_bad_fcs);
877
878 priv->noise = p54_rssi_to_dbm(dev, le32_to_cpu(stats->noise));
879
880 p54_free_skb(dev, p54_find_tx_entry(dev, hdr->req_id));
881 }
882
883 static void p54_rx_trap(struct ieee80211_hw *dev, struct sk_buff *skb)
884 {
885 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
886 struct p54_trap *trap = (struct p54_trap *) hdr->data;
887 u16 event = le16_to_cpu(trap->event);
888 u16 freq = le16_to_cpu(trap->frequency);
889
890 switch (event) {
891 case P54_TRAP_BEACON_TX:
892 break;
893 case P54_TRAP_RADAR:
894 printk(KERN_INFO "%s: radar (freq:%d MHz)\n",
895 wiphy_name(dev->wiphy), freq);
896 break;
897 case P54_TRAP_NO_BEACON:
898 break;
899 case P54_TRAP_SCAN:
900 break;
901 case P54_TRAP_TBTT:
902 break;
903 case P54_TRAP_TIMER:
904 break;
905 default:
906 printk(KERN_INFO "%s: received event:%x freq:%d\n",
907 wiphy_name(dev->wiphy), event, freq);
908 break;
909 }
910 }
911
912 static int p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
913 {
914 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
915
916 switch (le16_to_cpu(hdr->type)) {
917 case P54_CONTROL_TYPE_TXDONE:
918 p54_rx_frame_sent(dev, skb);
919 break;
920 case P54_CONTROL_TYPE_TRAP:
921 p54_rx_trap(dev, skb);
922 break;
923 case P54_CONTROL_TYPE_BBP:
924 break;
925 case P54_CONTROL_TYPE_STAT_READBACK:
926 p54_rx_stats(dev, skb);
927 break;
928 case P54_CONTROL_TYPE_EEPROM_READBACK:
929 p54_rx_eeprom_readback(dev, skb);
930 break;
931 default:
932 printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
933 wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
934 break;
935 }
936
937 return 0;
938 }
939
940 /* returns zero if skb can be reused */
941 int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
942 {
943 u16 type = le16_to_cpu(*((__le16 *)skb->data));
944
945 if (type & P54_HDR_FLAG_CONTROL)
946 return p54_rx_control(dev, skb);
947 else
948 return p54_rx_data(dev, skb);
949 }
950 EXPORT_SYMBOL_GPL(p54_rx);
951
952 /*
953 * So, the firmware is somewhat stupid and doesn't know what places in its
954 * memory incoming data should go to. By poking around in the firmware, we
955 * can find some unused memory to upload our packets to. However, data that we
956 * want the card to TX needs to stay intact until the card has told us that
957 * it is done with it. This function finds empty places we can upload to and
958 * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
959 * allocated areas.
960 */
961 static int p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
962 struct p54_hdr *data, u32 len)
963 {
964 struct p54_common *priv = dev->priv;
965 struct sk_buff *entry = priv->tx_queue.next;
966 struct sk_buff *target_skb = NULL;
967 struct ieee80211_tx_info *info;
968 struct memrecord *range;
969 u32 last_addr = priv->rx_start;
970 u32 largest_hole = 0;
971 u32 target_addr = priv->rx_start;
972 unsigned long flags;
973 unsigned int left;
974 len = (len + priv->headroom + priv->tailroom + 3) & ~0x3;
975
976 if (!skb)
977 return -EINVAL;
978
979 spin_lock_irqsave(&priv->tx_queue.lock, flags);
980
981 left = skb_queue_len(&priv->tx_queue);
982 if (unlikely(left >= 28)) {
983 /*
984 * The tx_queue is nearly full!
985 * We have throttle normal data traffic, because we must
986 * have a few spare slots for control frames left.
987 */
988 ieee80211_stop_queues(dev);
989 queue_delayed_work(dev->workqueue, &priv->work,
990 msecs_to_jiffies(P54_TX_TIMEOUT));
991
992 if (unlikely(left == 32)) {
993 /*
994 * The tx_queue is now really full.
995 *
996 * TODO: check if the device has crashed and reset it.
997 */
998 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
999 return -ENOSPC;
1000 }
1001 }
1002
1003 while (left--) {
1004 u32 hole_size;
1005 info = IEEE80211_SKB_CB(entry);
1006 range = (void *)info->rate_driver_data;
1007 hole_size = range->start_addr - last_addr;
1008 if (!target_skb && hole_size >= len) {
1009 target_skb = entry->prev;
1010 hole_size -= len;
1011 target_addr = last_addr;
1012 }
1013 largest_hole = max(largest_hole, hole_size);
1014 last_addr = range->end_addr;
1015 entry = entry->next;
1016 }
1017 if (!target_skb && priv->rx_end - last_addr >= len) {
1018 target_skb = priv->tx_queue.prev;
1019 largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
1020 if (!skb_queue_empty(&priv->tx_queue)) {
1021 info = IEEE80211_SKB_CB(target_skb);
1022 range = (void *)info->rate_driver_data;
1023 target_addr = range->end_addr;
1024 }
1025 } else
1026 largest_hole = max(largest_hole, priv->rx_end - last_addr);
1027
1028 if (!target_skb) {
1029 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
1030 ieee80211_stop_queues(dev);
1031 return -ENOSPC;
1032 }
1033
1034 info = IEEE80211_SKB_CB(skb);
1035 range = (void *)info->rate_driver_data;
1036 range->start_addr = target_addr;
1037 range->end_addr = target_addr + len;
1038 __skb_queue_after(&priv->tx_queue, target_skb, skb);
1039 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
1040
1041 if (largest_hole < priv->headroom + sizeof(struct p54_hdr) +
1042 48 + IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
1043 ieee80211_stop_queues(dev);
1044
1045 data->req_id = cpu_to_le32(target_addr + priv->headroom);
1046 return 0;
1047 }
1048
1049 static struct sk_buff *p54_alloc_skb(struct ieee80211_hw *dev,
1050 u16 hdr_flags, u16 len, u16 type, gfp_t memflags)
1051 {
1052 struct p54_common *priv = dev->priv;
1053 struct p54_hdr *hdr;
1054 struct sk_buff *skb;
1055
1056 skb = __dev_alloc_skb(len + priv->tx_hdr_len, memflags);
1057 if (!skb)
1058 return NULL;
1059 skb_reserve(skb, priv->tx_hdr_len);
1060
1061 hdr = (struct p54_hdr *) skb_put(skb, sizeof(*hdr));
1062 hdr->flags = cpu_to_le16(hdr_flags);
1063 hdr->len = cpu_to_le16(len - sizeof(*hdr));
1064 hdr->type = cpu_to_le16(type);
1065 hdr->tries = hdr->rts_tries = 0;
1066
1067 if (unlikely(p54_assign_address(dev, skb, hdr, len))) {
1068 kfree_skb(skb);
1069 return NULL;
1070 }
1071 return skb;
1072 }
1073
1074 int p54_read_eeprom(struct ieee80211_hw *dev)
1075 {
1076 struct p54_common *priv = dev->priv;
1077 struct p54_hdr *hdr = NULL;
1078 struct p54_eeprom_lm86 *eeprom_hdr;
1079 struct sk_buff *skb;
1080 size_t eeprom_size = 0x2020, offset = 0, blocksize, maxblocksize;
1081 int ret = -ENOMEM;
1082 void *eeprom = NULL;
1083
1084 maxblocksize = EEPROM_READBACK_LEN;
1085 if (priv->fw_var >= 0x509)
1086 maxblocksize -= 0xc;
1087 else
1088 maxblocksize -= 0x4;
1089
1090 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL, sizeof(*hdr) +
1091 sizeof(*eeprom_hdr) + maxblocksize,
1092 P54_CONTROL_TYPE_EEPROM_READBACK, GFP_KERNEL);
1093 if (!skb)
1094 goto free;
1095 priv->eeprom = kzalloc(EEPROM_READBACK_LEN, GFP_KERNEL);
1096 if (!priv->eeprom)
1097 goto free;
1098 eeprom = kzalloc(eeprom_size, GFP_KERNEL);
1099 if (!eeprom)
1100 goto free;
1101
1102 eeprom_hdr = (struct p54_eeprom_lm86 *) skb_put(skb,
1103 sizeof(*eeprom_hdr) + maxblocksize);
1104
1105 while (eeprom_size) {
1106 blocksize = min(eeprom_size, maxblocksize);
1107 if (priv->fw_var < 0x509) {
1108 eeprom_hdr->v1.offset = cpu_to_le16(offset);
1109 eeprom_hdr->v1.len = cpu_to_le16(blocksize);
1110 } else {
1111 eeprom_hdr->v2.offset = cpu_to_le32(offset);
1112 eeprom_hdr->v2.len = cpu_to_le16(blocksize);
1113 eeprom_hdr->v2.magic2 = 0xf;
1114 memcpy(eeprom_hdr->v2.magic, (const char *)"LOCK", 4);
1115 }
1116 priv->tx(dev, skb);
1117
1118 if (!wait_for_completion_interruptible_timeout(&priv->eeprom_comp, HZ)) {
1119 printk(KERN_ERR "%s: device does not respond!\n",
1120 wiphy_name(dev->wiphy));
1121 ret = -EBUSY;
1122 goto free;
1123 }
1124
1125 memcpy(eeprom + offset, priv->eeprom, blocksize);
1126 offset += blocksize;
1127 eeprom_size -= blocksize;
1128 }
1129
1130 ret = p54_parse_eeprom(dev, eeprom, offset);
1131 free:
1132 kfree(priv->eeprom);
1133 priv->eeprom = NULL;
1134 p54_free_skb(dev, skb);
1135 kfree(eeprom);
1136
1137 return ret;
1138 }
1139 EXPORT_SYMBOL_GPL(p54_read_eeprom);
1140
1141 static int p54_set_tim(struct ieee80211_hw *dev, struct ieee80211_sta *sta,
1142 bool set)
1143 {
1144 struct p54_common *priv = dev->priv;
1145 struct sk_buff *skb;
1146 struct p54_tim *tim;
1147
1148 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET,
1149 sizeof(struct p54_hdr) + sizeof(*tim),
1150 P54_CONTROL_TYPE_TIM, GFP_KERNEL);
1151 if (!skb)
1152 return -ENOMEM;
1153
1154 tim = (struct p54_tim *) skb_put(skb, sizeof(*tim));
1155 tim->count = 1;
1156 tim->entry[0] = cpu_to_le16(set ? (sta->aid | 0x8000) : sta->aid);
1157 priv->tx(dev, skb);
1158 return 0;
1159 }
1160
1161 static int p54_sta_unlock(struct ieee80211_hw *dev, u8 *addr)
1162 {
1163 struct p54_common *priv = dev->priv;
1164 struct sk_buff *skb;
1165 struct p54_sta_unlock *sta;
1166
1167 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET,
1168 sizeof(struct p54_hdr) + sizeof(*sta),
1169 P54_CONTROL_TYPE_PSM_STA_UNLOCK, GFP_ATOMIC);
1170 if (!skb)
1171 return -ENOMEM;
1172
1173 sta = (struct p54_sta_unlock *)skb_put(skb, sizeof(*sta));
1174 memcpy(sta->addr, addr, ETH_ALEN);
1175 priv->tx(dev, skb);
1176 return 0;
1177 }
1178
1179 static void p54_sta_notify(struct ieee80211_hw *dev, struct ieee80211_vif *vif,
1180 enum sta_notify_cmd notify_cmd,
1181 struct ieee80211_sta *sta)
1182 {
1183 switch (notify_cmd) {
1184 case STA_NOTIFY_ADD:
1185 case STA_NOTIFY_REMOVE:
1186 /*
1187 * Notify the firmware that we don't want or we don't
1188 * need to buffer frames for this station anymore.
1189 */
1190
1191 p54_sta_unlock(dev, sta->addr);
1192 break;
1193 case STA_NOTIFY_AWAKE:
1194 /* update the firmware's filter table */
1195 p54_sta_unlock(dev, sta->addr);
1196 break;
1197 default:
1198 break;
1199 }
1200 }
1201
1202 static int p54_tx_cancel(struct ieee80211_hw *dev, struct sk_buff *entry)
1203 {
1204 struct p54_common *priv = dev->priv;
1205 struct sk_buff *skb;
1206 struct p54_hdr *hdr;
1207 struct p54_txcancel *cancel;
1208
1209 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET,
1210 sizeof(struct p54_hdr) + sizeof(*cancel),
1211 P54_CONTROL_TYPE_TXCANCEL, GFP_ATOMIC);
1212 if (!skb)
1213 return -ENOMEM;
1214
1215 hdr = (void *)entry->data;
1216 cancel = (struct p54_txcancel *)skb_put(skb, sizeof(*cancel));
1217 cancel->req_id = hdr->req_id;
1218 priv->tx(dev, skb);
1219 return 0;
1220 }
1221
1222 static int p54_tx_fill(struct ieee80211_hw *dev, struct sk_buff *skb,
1223 struct ieee80211_tx_info *info, u8 *queue, size_t *extra_len,
1224 u16 *flags, u16 *aid)
1225 {
1226 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1227 struct p54_common *priv = dev->priv;
1228 int ret = 0;
1229
1230 if (unlikely(ieee80211_is_mgmt(hdr->frame_control))) {
1231 if (ieee80211_is_beacon(hdr->frame_control)) {
1232 *aid = 0;
1233 *queue = 0;
1234 *extra_len = IEEE80211_MAX_TIM_LEN;
1235 *flags = P54_HDR_FLAG_DATA_OUT_TIMESTAMP;
1236 return 0;
1237 } else if (ieee80211_is_probe_resp(hdr->frame_control)) {
1238 *aid = 0;
1239 *queue = 2;
1240 *flags = P54_HDR_FLAG_DATA_OUT_TIMESTAMP |
1241 P54_HDR_FLAG_DATA_OUT_NOCANCEL;
1242 return 0;
1243 } else {
1244 *queue = 2;
1245 ret = 0;
1246 }
1247 } else {
1248 *queue += 4;
1249 ret = 1;
1250 }
1251
1252 switch (priv->mode) {
1253 case NL80211_IFTYPE_STATION:
1254 *aid = 1;
1255 break;
1256 case NL80211_IFTYPE_AP:
1257 case NL80211_IFTYPE_ADHOC:
1258 case NL80211_IFTYPE_MESH_POINT:
1259 if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
1260 *aid = 0;
1261 *queue = 3;
1262 return 0;
1263 }
1264 if (info->control.sta)
1265 *aid = info->control.sta->aid;
1266 else
1267 *flags |= P54_HDR_FLAG_DATA_OUT_NOCANCEL;
1268 }
1269 return ret;
1270 }
1271
1272 static u8 p54_convert_algo(enum ieee80211_key_alg alg)
1273 {
1274 switch (alg) {
1275 case ALG_WEP:
1276 return P54_CRYPTO_WEP;
1277 case ALG_TKIP:
1278 return P54_CRYPTO_TKIPMICHAEL;
1279 case ALG_CCMP:
1280 return P54_CRYPTO_AESCCMP;
1281 default:
1282 return 0;
1283 }
1284 }
1285
1286 static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
1287 {
1288 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1289 struct ieee80211_tx_queue_stats *current_queue = NULL;
1290 struct p54_common *priv = dev->priv;
1291 struct p54_hdr *hdr;
1292 struct p54_tx_data *txhdr;
1293 size_t padding, len, tim_len = 0;
1294 int i, j, ridx, ret;
1295 u16 hdr_flags = 0, aid = 0;
1296 u8 rate, queue, crypt_offset = 0;
1297 u8 cts_rate = 0x20;
1298 u8 rc_flags;
1299 u8 calculated_tries[4];
1300 u8 nrates = 0, nremaining = 8;
1301
1302 queue = skb_get_queue_mapping(skb);
1303
1304 ret = p54_tx_fill(dev, skb, info, &queue, &tim_len, &hdr_flags, &aid);
1305 current_queue = &priv->tx_stats[queue];
1306 if (unlikely((current_queue->len > current_queue->limit) && ret))
1307 return NETDEV_TX_BUSY;
1308 current_queue->len++;
1309 current_queue->count++;
1310 if ((current_queue->len == current_queue->limit) && ret)
1311 ieee80211_stop_queue(dev, skb_get_queue_mapping(skb));
1312
1313 padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
1314 len = skb->len;
1315
1316 if (info->control.hw_key) {
1317 crypt_offset = ieee80211_get_hdrlen_from_skb(skb);
1318 if (info->control.hw_key->alg == ALG_TKIP) {
1319 u8 *iv = (u8 *)(skb->data + crypt_offset);
1320 /*
1321 * The firmware excepts that the IV has to have
1322 * this special format
1323 */
1324 iv[1] = iv[0];
1325 iv[0] = iv[2];
1326 iv[2] = 0;
1327 }
1328 }
1329
1330 txhdr = (struct p54_tx_data *) skb_push(skb, sizeof(*txhdr) + padding);
1331 hdr = (struct p54_hdr *) skb_push(skb, sizeof(*hdr));
1332
1333 if (padding)
1334 hdr_flags |= P54_HDR_FLAG_DATA_ALIGN;
1335 hdr->type = cpu_to_le16(aid);
1336 hdr->rts_tries = info->control.rates[0].count;
1337
1338 /*
1339 * we register the rates in perfect order, and
1340 * RTS/CTS won't happen on 5 GHz
1341 */
1342 cts_rate = info->control.rts_cts_rate_idx;
1343
1344 memset(&txhdr->rateset, 0, sizeof(txhdr->rateset));
1345
1346 /* see how many rates got used */
1347 for (i = 0; i < 4; i++) {
1348 if (info->control.rates[i].idx < 0)
1349 break;
1350 nrates++;
1351 }
1352
1353 /* limit tries to 8/nrates per rate */
1354 for (i = 0; i < nrates; i++) {
1355 /*
1356 * The magic expression here is equivalent to 8/nrates for
1357 * all values that matter, but avoids division and jumps.
1358 * Note that nrates can only take the values 1 through 4.
1359 */
1360 calculated_tries[i] = min_t(int, ((15 >> nrates) | 1) + 1,
1361 info->control.rates[i].count);
1362 nremaining -= calculated_tries[i];
1363 }
1364
1365 /* if there are tries left, distribute from back to front */
1366 for (i = nrates - 1; nremaining > 0 && i >= 0; i--) {
1367 int tmp = info->control.rates[i].count - calculated_tries[i];
1368
1369 if (tmp <= 0)
1370 continue;
1371 /* RC requested more tries at this rate */
1372
1373 tmp = min_t(int, tmp, nremaining);
1374 calculated_tries[i] += tmp;
1375 nremaining -= tmp;
1376 }
1377
1378 ridx = 0;
1379 for (i = 0; i < nrates && ridx < 8; i++) {
1380 /* we register the rates in perfect order */
1381 rate = info->control.rates[i].idx;
1382 if (info->band == IEEE80211_BAND_5GHZ)
1383 rate += 4;
1384
1385 /* store the count we actually calculated for TX status */
1386 info->control.rates[i].count = calculated_tries[i];
1387
1388 rc_flags = info->control.rates[i].flags;
1389 if (rc_flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) {
1390 rate |= 0x10;
1391 cts_rate |= 0x10;
1392 }
1393 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS)
1394 rate |= 0x40;
1395 else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT)
1396 rate |= 0x20;
1397 for (j = 0; j < calculated_tries[i] && ridx < 8; j++) {
1398 txhdr->rateset[ridx] = rate;
1399 ridx++;
1400 }
1401 }
1402
1403 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)
1404 hdr_flags |= P54_HDR_FLAG_DATA_OUT_SEQNR;
1405
1406 /* TODO: enable bursting */
1407 hdr->flags = cpu_to_le16(hdr_flags);
1408 hdr->tries = ridx;
1409 txhdr->rts_rate_idx = 0;
1410 if (info->control.hw_key) {
1411 txhdr->key_type = p54_convert_algo(info->control.hw_key->alg);
1412 txhdr->key_len = min((u8)16, info->control.hw_key->keylen);
1413 memcpy(txhdr->key, info->control.hw_key->key, txhdr->key_len);
1414 if (info->control.hw_key->alg == ALG_TKIP) {
1415 if (unlikely(skb_tailroom(skb) < 12))
1416 goto err;
1417 /* reserve space for the MIC key */
1418 len += 8;
1419 memcpy(skb_put(skb, 8), &(info->control.hw_key->key
1420 [NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY]), 8);
1421 }
1422 /* reserve some space for ICV */
1423 len += info->control.hw_key->icv_len;
1424 memset(skb_put(skb, info->control.hw_key->icv_len), 0,
1425 info->control.hw_key->icv_len);
1426 } else {
1427 txhdr->key_type = 0;
1428 txhdr->key_len = 0;
1429 }
1430 txhdr->crypt_offset = crypt_offset;
1431 txhdr->hw_queue = queue;
1432 if (current_queue)
1433 txhdr->backlog = current_queue->len;
1434 else
1435 txhdr->backlog = 0;
1436 memset(txhdr->durations, 0, sizeof(txhdr->durations));
1437 txhdr->tx_antenna = (info->antenna_sel_tx == 0) ?
1438 2 : info->antenna_sel_tx - 1;
1439 txhdr->output_power = priv->output_power;
1440 txhdr->cts_rate = cts_rate;
1441 if (padding)
1442 txhdr->align[0] = padding;
1443
1444 hdr->len = cpu_to_le16(len);
1445 /* modifies skb->cb and with it info, so must be last! */
1446 if (unlikely(p54_assign_address(dev, skb, hdr, skb->len + tim_len)))
1447 goto err;
1448 priv->tx(dev, skb);
1449
1450 queue_delayed_work(dev->workqueue, &priv->work,
1451 msecs_to_jiffies(P54_TX_FRAME_LIFETIME));
1452
1453 return 0;
1454
1455 err:
1456 skb_pull(skb, sizeof(*hdr) + sizeof(*txhdr) + padding);
1457 if (current_queue) {
1458 current_queue->len--;
1459 current_queue->count--;
1460 }
1461 return NETDEV_TX_BUSY;
1462 }
1463
1464 static int p54_setup_mac(struct ieee80211_hw *dev)
1465 {
1466 struct p54_common *priv = dev->priv;
1467 struct sk_buff *skb;
1468 struct p54_setup_mac *setup;
1469 u16 mode;
1470
1471 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*setup) +
1472 sizeof(struct p54_hdr), P54_CONTROL_TYPE_SETUP,
1473 GFP_ATOMIC);
1474 if (!skb)
1475 return -ENOMEM;
1476
1477 setup = (struct p54_setup_mac *) skb_put(skb, sizeof(*setup));
1478 if (dev->conf.radio_enabled) {
1479 switch (priv->mode) {
1480 case NL80211_IFTYPE_STATION:
1481 mode = P54_FILTER_TYPE_STATION;
1482 break;
1483 case NL80211_IFTYPE_AP:
1484 mode = P54_FILTER_TYPE_AP;
1485 break;
1486 case NL80211_IFTYPE_ADHOC:
1487 case NL80211_IFTYPE_MESH_POINT:
1488 mode = P54_FILTER_TYPE_IBSS;
1489 break;
1490 default:
1491 mode = P54_FILTER_TYPE_NONE;
1492 break;
1493 }
1494 if (priv->filter_flags & FIF_PROMISC_IN_BSS)
1495 mode |= P54_FILTER_TYPE_TRANSPARENT;
1496 } else
1497 mode = P54_FILTER_TYPE_RX_DISABLED;
1498
1499 setup->mac_mode = cpu_to_le16(mode);
1500 memcpy(setup->mac_addr, priv->mac_addr, ETH_ALEN);
1501 memcpy(setup->bssid, priv->bssid, ETH_ALEN);
1502 setup->rx_antenna = 2; /* automatic */
1503 setup->rx_align = 0;
1504 if (priv->fw_var < 0x500) {
1505 setup->v1.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
1506 memset(setup->v1.rts_rates, 0, 8);
1507 setup->v1.rx_addr = cpu_to_le32(priv->rx_end);
1508 setup->v1.max_rx = cpu_to_le16(priv->rx_mtu);
1509 setup->v1.rxhw = cpu_to_le16(priv->rxhw);
1510 setup->v1.wakeup_timer = cpu_to_le16(priv->wakeup_timer);
1511 setup->v1.unalloc0 = cpu_to_le16(0);
1512 } else {
1513 setup->v2.rx_addr = cpu_to_le32(priv->rx_end);
1514 setup->v2.max_rx = cpu_to_le16(priv->rx_mtu);
1515 setup->v2.rxhw = cpu_to_le16(priv->rxhw);
1516 setup->v2.timer = cpu_to_le16(priv->wakeup_timer);
1517 setup->v2.truncate = cpu_to_le16(48896);
1518 setup->v2.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
1519 setup->v2.sbss_offset = 0;
1520 setup->v2.mcast_window = 0;
1521 setup->v2.rx_rssi_threshold = 0;
1522 setup->v2.rx_ed_threshold = 0;
1523 setup->v2.ref_clock = cpu_to_le32(644245094);
1524 setup->v2.lpf_bandwidth = cpu_to_le16(65535);
1525 setup->v2.osc_start_delay = cpu_to_le16(65535);
1526 }
1527 priv->tx(dev, skb);
1528 return 0;
1529 }
1530
1531 static int p54_scan(struct ieee80211_hw *dev, u16 mode, u16 dwell)
1532 {
1533 struct p54_common *priv = dev->priv;
1534 struct sk_buff *skb;
1535 struct p54_scan *chan;
1536 unsigned int i;
1537 void *entry;
1538 __le16 freq = cpu_to_le16(dev->conf.channel->center_freq);
1539 int band = dev->conf.channel->band;
1540
1541 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*chan) +
1542 sizeof(struct p54_hdr), P54_CONTROL_TYPE_SCAN,
1543 GFP_ATOMIC);
1544 if (!skb)
1545 return -ENOMEM;
1546
1547 chan = (struct p54_scan *) skb_put(skb, sizeof(*chan));
1548 memset(chan->padding1, 0, sizeof(chan->padding1));
1549 chan->mode = cpu_to_le16(mode);
1550 chan->dwell = cpu_to_le16(dwell);
1551
1552 for (i = 0; i < priv->iq_autocal_len; i++) {
1553 if (priv->iq_autocal[i].freq != freq)
1554 continue;
1555
1556 memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
1557 sizeof(*priv->iq_autocal));
1558 break;
1559 }
1560 if (i == priv->iq_autocal_len)
1561 goto err;
1562
1563 for (i = 0; i < priv->output_limit_len; i++) {
1564 if (priv->output_limit[i].freq != freq)
1565 continue;
1566
1567 chan->val_barker = 0x38;
1568 chan->val_bpsk = chan->dup_bpsk =
1569 priv->output_limit[i].val_bpsk;
1570 chan->val_qpsk = chan->dup_qpsk =
1571 priv->output_limit[i].val_qpsk;
1572 chan->val_16qam = chan->dup_16qam =
1573 priv->output_limit[i].val_16qam;
1574 chan->val_64qam = chan->dup_64qam =
1575 priv->output_limit[i].val_64qam;
1576 break;
1577 }
1578 if (i == priv->output_limit_len)
1579 goto err;
1580
1581 entry = priv->curve_data->data;
1582 for (i = 0; i < priv->curve_data->channels; i++) {
1583 if (*((__le16 *)entry) != freq) {
1584 entry += sizeof(__le16);
1585 entry += sizeof(struct p54_pa_curve_data_sample) *
1586 priv->curve_data->points_per_channel;
1587 continue;
1588 }
1589
1590 entry += sizeof(__le16);
1591 chan->pa_points_per_curve = 8;
1592 memset(chan->curve_data, 0, sizeof(*chan->curve_data));
1593 memcpy(chan->curve_data, entry,
1594 sizeof(struct p54_pa_curve_data_sample) *
1595 min((u8)8, priv->curve_data->points_per_channel));
1596 break;
1597 }
1598
1599 if (priv->fw_var < 0x500) {
1600 chan->v1_rssi.mul = cpu_to_le16(priv->rssical_db[band].mul);
1601 chan->v1_rssi.add = cpu_to_le16(priv->rssical_db[band].add);
1602 } else {
1603 chan->v2.rssi.mul = cpu_to_le16(priv->rssical_db[band].mul);
1604 chan->v2.rssi.add = cpu_to_le16(priv->rssical_db[band].add);
1605 chan->v2.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
1606 memset(chan->v2.rts_rates, 0, 8);
1607 }
1608 priv->tx(dev, skb);
1609 return 0;
1610
1611 err:
1612 printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
1613 kfree_skb(skb);
1614 return -EINVAL;
1615 }
1616
1617 static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
1618 {
1619 struct p54_common *priv = dev->priv;
1620 struct sk_buff *skb;
1621 struct p54_led *led;
1622
1623 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*led) +
1624 sizeof(struct p54_hdr), P54_CONTROL_TYPE_LED,
1625 GFP_ATOMIC);
1626 if (!skb)
1627 return -ENOMEM;
1628
1629 led = (struct p54_led *)skb_put(skb, sizeof(*led));
1630 led->mode = cpu_to_le16(mode);
1631 led->led_permanent = cpu_to_le16(link);
1632 led->led_temporary = cpu_to_le16(act);
1633 led->duration = cpu_to_le16(1000);
1634 priv->tx(dev, skb);
1635 return 0;
1636 }
1637
1638 #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
1639 do { \
1640 queue.aifs = cpu_to_le16(ai_fs); \
1641 queue.cwmin = cpu_to_le16(cw_min); \
1642 queue.cwmax = cpu_to_le16(cw_max); \
1643 queue.txop = cpu_to_le16(_txop); \
1644 } while(0)
1645
1646 static int p54_set_edcf(struct ieee80211_hw *dev)
1647 {
1648 struct p54_common *priv = dev->priv;
1649 struct sk_buff *skb;
1650 struct p54_edcf *edcf;
1651
1652 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*edcf) +
1653 sizeof(struct p54_hdr), P54_CONTROL_TYPE_DCFINIT,
1654 GFP_ATOMIC);
1655 if (!skb)
1656 return -ENOMEM;
1657
1658 edcf = (struct p54_edcf *)skb_put(skb, sizeof(*edcf));
1659 if (priv->use_short_slot) {
1660 edcf->slottime = 9;
1661 edcf->sifs = 0x10;
1662 edcf->eofpad = 0x00;
1663 } else {
1664 edcf->slottime = 20;
1665 edcf->sifs = 0x0a;
1666 edcf->eofpad = 0x06;
1667 }
1668 /* (see prism54/isl_oid.h for further details) */
1669 edcf->frameburst = cpu_to_le16(0);
1670 edcf->round_trip_delay = cpu_to_le16(0);
1671 edcf->flags = 0;
1672 memset(edcf->mapping, 0, sizeof(edcf->mapping));
1673 memcpy(edcf->queue, priv->qos_params, sizeof(edcf->queue));
1674 priv->tx(dev, skb);
1675 return 0;
1676 }
1677
1678 static int p54_beacon_tim(struct sk_buff *skb)
1679 {
1680 /*
1681 * the good excuse for this mess is ... the firmware.
1682 * The dummy TIM MUST be at the end of the beacon frame,
1683 * because it'll be overwritten!
1684 */
1685
1686 struct ieee80211_mgmt *mgmt = (void *)skb->data;
1687 u8 *pos, *end;
1688
1689 if (skb->len <= sizeof(mgmt))
1690 return -EINVAL;
1691
1692 pos = (u8 *)mgmt->u.beacon.variable;
1693 end = skb->data + skb->len;
1694 while (pos < end) {
1695 if (pos + 2 + pos[1] > end)
1696 return -EINVAL;
1697
1698 if (pos[0] == WLAN_EID_TIM) {
1699 u8 dtim_len = pos[1];
1700 u8 dtim_period = pos[3];
1701 u8 *next = pos + 2 + dtim_len;
1702
1703 if (dtim_len < 3)
1704 return -EINVAL;
1705
1706 memmove(pos, next, end - next);
1707
1708 if (dtim_len > 3)
1709 skb_trim(skb, skb->len - (dtim_len - 3));
1710
1711 pos = end - (dtim_len + 2);
1712
1713 /* add the dummy at the end */
1714 pos[0] = WLAN_EID_TIM;
1715 pos[1] = 3;
1716 pos[2] = 0;
1717 pos[3] = dtim_period;
1718 pos[4] = 0;
1719 return 0;
1720 }
1721 pos += 2 + pos[1];
1722 }
1723 return 0;
1724 }
1725
1726 static int p54_beacon_update(struct ieee80211_hw *dev,
1727 struct ieee80211_vif *vif)
1728 {
1729 struct p54_common *priv = dev->priv;
1730 struct sk_buff *beacon;
1731 int ret;
1732
1733 if (priv->cached_beacon) {
1734 p54_tx_cancel(dev, priv->cached_beacon);
1735 /* wait for the last beacon the be freed */
1736 msleep(10);
1737 }
1738
1739 beacon = ieee80211_beacon_get(dev, vif);
1740 if (!beacon)
1741 return -ENOMEM;
1742 ret = p54_beacon_tim(beacon);
1743 if (ret)
1744 return ret;
1745 ret = p54_tx(dev, beacon);
1746 if (ret)
1747 return ret;
1748 priv->cached_beacon = beacon;
1749 priv->tsf_high32 = 0;
1750 priv->tsf_low32 = 0;
1751
1752 return 0;
1753 }
1754
1755 static int p54_start(struct ieee80211_hw *dev)
1756 {
1757 struct p54_common *priv = dev->priv;
1758 int err;
1759
1760 mutex_lock(&priv->conf_mutex);
1761 err = priv->open(dev);
1762 if (err)
1763 goto out;
1764 P54_SET_QUEUE(priv->qos_params[0], 0x0002, 0x0003, 0x0007, 47);
1765 P54_SET_QUEUE(priv->qos_params[1], 0x0002, 0x0007, 0x000f, 94);
1766 P54_SET_QUEUE(priv->qos_params[2], 0x0003, 0x000f, 0x03ff, 0);
1767 P54_SET_QUEUE(priv->qos_params[3], 0x0007, 0x000f, 0x03ff, 0);
1768 err = p54_set_edcf(dev);
1769 if (err)
1770 goto out;
1771
1772 memset(priv->bssid, ~0, ETH_ALEN);
1773 priv->mode = NL80211_IFTYPE_MONITOR;
1774 err = p54_setup_mac(dev);
1775 if (err) {
1776 priv->mode = NL80211_IFTYPE_UNSPECIFIED;
1777 goto out;
1778 }
1779
1780 queue_delayed_work(dev->workqueue, &priv->work, 0);
1781
1782 out:
1783 mutex_unlock(&priv->conf_mutex);
1784 return err;
1785 }
1786
1787 static void p54_stop(struct ieee80211_hw *dev)
1788 {
1789 struct p54_common *priv = dev->priv;
1790 struct sk_buff *skb;
1791
1792 mutex_lock(&priv->conf_mutex);
1793 priv->mode = NL80211_IFTYPE_UNSPECIFIED;
1794 cancel_delayed_work_sync(&priv->work);
1795 if (priv->cached_beacon)
1796 p54_tx_cancel(dev, priv->cached_beacon);
1797
1798 priv->stop(dev);
1799 while ((skb = skb_dequeue(&priv->tx_queue)))
1800 kfree_skb(skb);
1801 priv->cached_beacon = NULL;
1802 priv->tsf_high32 = priv->tsf_low32 = 0;
1803 mutex_unlock(&priv->conf_mutex);
1804 }
1805
1806 static int p54_add_interface(struct ieee80211_hw *dev,
1807 struct ieee80211_if_init_conf *conf)
1808 {
1809 struct p54_common *priv = dev->priv;
1810
1811 mutex_lock(&priv->conf_mutex);
1812 if (priv->mode != NL80211_IFTYPE_MONITOR) {
1813 mutex_unlock(&priv->conf_mutex);
1814 return -EOPNOTSUPP;
1815 }
1816
1817 switch (conf->type) {
1818 case NL80211_IFTYPE_STATION:
1819 case NL80211_IFTYPE_ADHOC:
1820 case NL80211_IFTYPE_AP:
1821 case NL80211_IFTYPE_MESH_POINT:
1822 priv->mode = conf->type;
1823 break;
1824 default:
1825 mutex_unlock(&priv->conf_mutex);
1826 return -EOPNOTSUPP;
1827 }
1828
1829 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
1830 p54_setup_mac(dev);
1831 p54_set_leds(dev, 1, 0, 0);
1832 mutex_unlock(&priv->conf_mutex);
1833 return 0;
1834 }
1835
1836 static void p54_remove_interface(struct ieee80211_hw *dev,
1837 struct ieee80211_if_init_conf *conf)
1838 {
1839 struct p54_common *priv = dev->priv;
1840
1841 mutex_lock(&priv->conf_mutex);
1842 if (priv->cached_beacon)
1843 p54_tx_cancel(dev, priv->cached_beacon);
1844 priv->mode = NL80211_IFTYPE_MONITOR;
1845 memset(priv->mac_addr, 0, ETH_ALEN);
1846 memset(priv->bssid, 0, ETH_ALEN);
1847 p54_setup_mac(dev);
1848 mutex_unlock(&priv->conf_mutex);
1849 }
1850
1851 static int p54_config(struct ieee80211_hw *dev, u32 changed)
1852 {
1853 int ret = 0;
1854 struct p54_common *priv = dev->priv;
1855 struct ieee80211_conf *conf = &dev->conf;
1856
1857 mutex_lock(&priv->conf_mutex);
1858 if (changed & IEEE80211_CONF_CHANGE_POWER)
1859 priv->output_power = conf->power_level << 2;
1860 if (changed & IEEE80211_CONF_CHANGE_RADIO_ENABLED) {
1861 ret = p54_setup_mac(dev);
1862 if (ret)
1863 goto out;
1864 }
1865 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1866 ret = p54_scan(dev, P54_SCAN_EXIT, 0);
1867 if (ret)
1868 goto out;
1869 }
1870
1871 out:
1872 mutex_unlock(&priv->conf_mutex);
1873 return ret;
1874 }
1875
1876 static int p54_config_interface(struct ieee80211_hw *dev,
1877 struct ieee80211_vif *vif,
1878 struct ieee80211_if_conf *conf)
1879 {
1880 struct p54_common *priv = dev->priv;
1881 int ret = 0;
1882
1883 mutex_lock(&priv->conf_mutex);
1884 if (conf->changed & IEEE80211_IFCC_BSSID) {
1885 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
1886 ret = p54_setup_mac(dev);
1887 if (ret)
1888 goto out;
1889 }
1890
1891 if (conf->changed & IEEE80211_IFCC_BEACON) {
1892 ret = p54_scan(dev, P54_SCAN_EXIT, 0);
1893 if (ret)
1894 goto out;
1895 ret = p54_setup_mac(dev);
1896 if (ret)
1897 goto out;
1898 ret = p54_beacon_update(dev, vif);
1899 if (ret)
1900 goto out;
1901 ret = p54_set_edcf(dev);
1902 if (ret)
1903 goto out;
1904 }
1905
1906 ret = p54_set_leds(dev, 1, !is_multicast_ether_addr(priv->bssid), 0);
1907
1908 out:
1909 mutex_unlock(&priv->conf_mutex);
1910 return ret;
1911 }
1912
1913 static void p54_configure_filter(struct ieee80211_hw *dev,
1914 unsigned int changed_flags,
1915 unsigned int *total_flags,
1916 int mc_count, struct dev_mc_list *mclist)
1917 {
1918 struct p54_common *priv = dev->priv;
1919
1920 *total_flags &= FIF_PROMISC_IN_BSS |
1921 (*total_flags & FIF_PROMISC_IN_BSS) ?
1922 FIF_FCSFAIL : 0;
1923
1924 priv->filter_flags = *total_flags;
1925
1926 if (changed_flags & FIF_PROMISC_IN_BSS)
1927 p54_setup_mac(dev);
1928 }
1929
1930 static int p54_conf_tx(struct ieee80211_hw *dev, u16 queue,
1931 const struct ieee80211_tx_queue_params *params)
1932 {
1933 struct p54_common *priv = dev->priv;
1934 int ret;
1935
1936 mutex_lock(&priv->conf_mutex);
1937 if ((params) && !(queue > 4)) {
1938 P54_SET_QUEUE(priv->qos_params[queue], params->aifs,
1939 params->cw_min, params->cw_max, params->txop);
1940 ret = p54_set_edcf(dev);
1941 } else
1942 ret = -EINVAL;
1943 mutex_unlock(&priv->conf_mutex);
1944 return ret;
1945 }
1946
1947 static int p54_init_xbow_synth(struct ieee80211_hw *dev)
1948 {
1949 struct p54_common *priv = dev->priv;
1950 struct sk_buff *skb;
1951 struct p54_xbow_synth *xbow;
1952
1953 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*xbow) +
1954 sizeof(struct p54_hdr),
1955 P54_CONTROL_TYPE_XBOW_SYNTH_CFG,
1956 GFP_KERNEL);
1957 if (!skb)
1958 return -ENOMEM;
1959
1960 xbow = (struct p54_xbow_synth *)skb_put(skb, sizeof(*xbow));
1961 xbow->magic1 = cpu_to_le16(0x1);
1962 xbow->magic2 = cpu_to_le16(0x2);
1963 xbow->freq = cpu_to_le16(5390);
1964 memset(xbow->padding, 0, sizeof(xbow->padding));
1965 priv->tx(dev, skb);
1966 return 0;
1967 }
1968
1969 static void p54_work(struct work_struct *work)
1970 {
1971 struct p54_common *priv = container_of(work, struct p54_common,
1972 work.work);
1973 struct ieee80211_hw *dev = priv->hw;
1974 struct sk_buff *skb;
1975
1976 if (unlikely(priv->mode == NL80211_IFTYPE_UNSPECIFIED))
1977 return ;
1978
1979 /*
1980 * TODO: walk through tx_queue and do the following tasks
1981 * 1. initiate bursts.
1982 * 2. cancel stuck frames / reset the device if necessary.
1983 */
1984
1985 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL, sizeof(struct p54_hdr) +
1986 sizeof(struct p54_statistics),
1987 P54_CONTROL_TYPE_STAT_READBACK, GFP_KERNEL);
1988 if (!skb)
1989 return ;
1990
1991 priv->tx(dev, skb);
1992 }
1993
1994 static int p54_get_stats(struct ieee80211_hw *dev,
1995 struct ieee80211_low_level_stats *stats)
1996 {
1997 struct p54_common *priv = dev->priv;
1998
1999 memcpy(stats, &priv->stats, sizeof(*stats));
2000 return 0;
2001 }
2002
2003 static int p54_get_tx_stats(struct ieee80211_hw *dev,
2004 struct ieee80211_tx_queue_stats *stats)
2005 {
2006 struct p54_common *priv = dev->priv;
2007
2008 memcpy(stats, &priv->tx_stats[4], sizeof(stats[0]) * dev->queues);
2009
2010 return 0;
2011 }
2012
2013 static void p54_bss_info_changed(struct ieee80211_hw *dev,
2014 struct ieee80211_vif *vif,
2015 struct ieee80211_bss_conf *info,
2016 u32 changed)
2017 {
2018 struct p54_common *priv = dev->priv;
2019
2020 if (changed & BSS_CHANGED_ERP_SLOT) {
2021 priv->use_short_slot = info->use_short_slot;
2022 p54_set_edcf(dev);
2023 }
2024 if (changed & BSS_CHANGED_BASIC_RATES) {
2025 if (dev->conf.channel->band == IEEE80211_BAND_5GHZ)
2026 priv->basic_rate_mask = (info->basic_rates << 4);
2027 else
2028 priv->basic_rate_mask = info->basic_rates;
2029 p54_setup_mac(dev);
2030 if (priv->fw_var >= 0x500)
2031 p54_scan(dev, P54_SCAN_EXIT, 0);
2032 }
2033 if (changed & BSS_CHANGED_ASSOC) {
2034 if (info->assoc) {
2035 priv->aid = info->aid;
2036 priv->wakeup_timer = info->beacon_int *
2037 info->dtim_period * 5;
2038 p54_setup_mac(dev);
2039 }
2040 }
2041
2042 }
2043
2044 static int p54_set_key(struct ieee80211_hw *dev, enum set_key_cmd cmd,
2045 const u8 *local_address, const u8 *address,
2046 struct ieee80211_key_conf *key)
2047 {
2048 struct p54_common *priv = dev->priv;
2049 struct sk_buff *skb;
2050 struct p54_keycache *rxkey;
2051 u8 algo = 0;
2052
2053 if (modparam_nohwcrypt)
2054 return -EOPNOTSUPP;
2055
2056 if (cmd == DISABLE_KEY)
2057 algo = 0;
2058 else {
2059 switch (key->alg) {
2060 case ALG_TKIP:
2061 if (!(priv->privacy_caps & (BR_DESC_PRIV_CAP_MICHAEL |
2062 BR_DESC_PRIV_CAP_TKIP)))
2063 return -EOPNOTSUPP;
2064 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
2065 algo = P54_CRYPTO_TKIPMICHAEL;
2066 break;
2067 case ALG_WEP:
2068 if (!(priv->privacy_caps & BR_DESC_PRIV_CAP_WEP))
2069 return -EOPNOTSUPP;
2070 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
2071 algo = P54_CRYPTO_WEP;
2072 break;
2073 case ALG_CCMP:
2074 if (!(priv->privacy_caps & BR_DESC_PRIV_CAP_AESCCMP))
2075 return -EOPNOTSUPP;
2076 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
2077 algo = P54_CRYPTO_AESCCMP;
2078 break;
2079 default:
2080 return -EINVAL;
2081 }
2082 }
2083
2084 if (key->keyidx > priv->rx_keycache_size) {
2085 /*
2086 * The device supports the choosen algorithm, but the firmware
2087 * does not provide enough key slots to store all of them.
2088 * So, incoming frames have to be decoded by the mac80211 stack,
2089 * but we can still offload encryption for outgoing frames.
2090 */
2091
2092 return 0;
2093 }
2094
2095 mutex_lock(&priv->conf_mutex);
2096 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*rxkey) +
2097 sizeof(struct p54_hdr), P54_CONTROL_TYPE_RX_KEYCACHE,
2098 GFP_ATOMIC);
2099 if (!skb) {
2100 mutex_unlock(&priv->conf_mutex);
2101 return -ENOMEM;
2102 }
2103
2104 /* TODO: some devices have 4 more free slots for rx keys */
2105 rxkey = (struct p54_keycache *)skb_put(skb, sizeof(*rxkey));
2106 rxkey->entry = key->keyidx;
2107 rxkey->key_id = key->keyidx;
2108 rxkey->key_type = algo;
2109 if (address)
2110 memcpy(rxkey->mac, address, ETH_ALEN);
2111 else
2112 memset(rxkey->mac, ~0, ETH_ALEN);
2113 if (key->alg != ALG_TKIP) {
2114 rxkey->key_len = min((u8)16, key->keylen);
2115 memcpy(rxkey->key, key->key, rxkey->key_len);
2116 } else {
2117 rxkey->key_len = 24;
2118 memcpy(rxkey->key, key->key, 16);
2119 memcpy(&(rxkey->key[16]), &(key->key
2120 [NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY]), 8);
2121 }
2122
2123 priv->tx(dev, skb);
2124 mutex_unlock(&priv->conf_mutex);
2125 return 0;
2126 }
2127
2128 static const struct ieee80211_ops p54_ops = {
2129 .tx = p54_tx,
2130 .start = p54_start,
2131 .stop = p54_stop,
2132 .add_interface = p54_add_interface,
2133 .remove_interface = p54_remove_interface,
2134 .set_tim = p54_set_tim,
2135 .sta_notify = p54_sta_notify,
2136 .set_key = p54_set_key,
2137 .config = p54_config,
2138 .config_interface = p54_config_interface,
2139 .bss_info_changed = p54_bss_info_changed,
2140 .configure_filter = p54_configure_filter,
2141 .conf_tx = p54_conf_tx,
2142 .get_stats = p54_get_stats,
2143 .get_tx_stats = p54_get_tx_stats
2144 };
2145
2146 struct ieee80211_hw *p54_init_common(size_t priv_data_len)
2147 {
2148 struct ieee80211_hw *dev;
2149 struct p54_common *priv;
2150
2151 dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
2152 if (!dev)
2153 return NULL;
2154
2155 priv = dev->priv;
2156 priv->hw = dev;
2157 priv->mode = NL80211_IFTYPE_UNSPECIFIED;
2158 priv->basic_rate_mask = 0x15f;
2159 skb_queue_head_init(&priv->tx_queue);
2160 dev->flags = IEEE80211_HW_RX_INCLUDES_FCS |
2161 IEEE80211_HW_SIGNAL_DBM |
2162 IEEE80211_HW_NOISE_DBM;
2163
2164 dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
2165 BIT(NL80211_IFTYPE_ADHOC) |
2166 BIT(NL80211_IFTYPE_AP) |
2167 BIT(NL80211_IFTYPE_MESH_POINT);
2168
2169 dev->channel_change_time = 1000; /* TODO: find actual value */
2170 priv->tx_stats[0].limit = 1; /* Beacon queue */
2171 priv->tx_stats[1].limit = 1; /* Probe queue for HW scan */
2172 priv->tx_stats[2].limit = 3; /* queue for MLMEs */
2173 priv->tx_stats[3].limit = 3; /* Broadcast / MC queue */
2174 priv->tx_stats[4].limit = 5; /* Data */
2175 dev->queues = 1;
2176 priv->noise = -94;
2177 /*
2178 * We support at most 8 tries no matter which rate they're at,
2179 * we cannot support max_rates * max_rate_tries as we set it
2180 * here, but setting it correctly to 4/2 or so would limit us
2181 * artificially if the RC algorithm wants just two rates, so
2182 * let's say 4/7, we'll redistribute it at TX time, see the
2183 * comments there.
2184 */
2185 dev->max_rates = 4;
2186 dev->max_rate_tries = 7;
2187 dev->extra_tx_headroom = sizeof(struct p54_hdr) + 4 +
2188 sizeof(struct p54_tx_data);
2189
2190 mutex_init(&priv->conf_mutex);
2191 init_completion(&priv->eeprom_comp);
2192 INIT_DELAYED_WORK(&priv->work, p54_work);
2193
2194 return dev;
2195 }
2196 EXPORT_SYMBOL_GPL(p54_init_common);
2197
2198 void p54_free_common(struct ieee80211_hw *dev)
2199 {
2200 struct p54_common *priv = dev->priv;
2201 kfree(priv->iq_autocal);
2202 kfree(priv->output_limit);
2203 kfree(priv->curve_data);
2204 }
2205 EXPORT_SYMBOL_GPL(p54_free_common);
2206
2207 static int __init p54_init(void)
2208 {
2209 return 0;
2210 }
2211
2212 static void __exit p54_exit(void)
2213 {
2214 }
2215
2216 module_init(p54_init);
2217 module_exit(p54_exit);
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