?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
MERGE-master-patchset-edits
[linux-2.6/openmoko-kernel.git] / drivers / mfd / pcf50633-core.c
blob24508e28e3fb87aae68d01d4fd2c8922201aefc0
1 /* NXP PCF50633 Power Management Unit (PMU) driver
2 *
3 * (C) 2006-2008 by Openmoko, Inc.
4 * Author: Harald Welte <laforge@openmoko.org>
5 * Balaji Rao <balajirrao@openmoko.org>
6 * All rights reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/device.h>
17 #include <linux/sysfs.h>
18 #include <linux/device.h>
19 #include <linux/module.h>
20 #include <linux/types.h>
21 #include <linux/interrupt.h>
22 #include <linux/workqueue.h>
23 #include <linux/platform_device.h>
24 #include <linux/i2c.h>
25 #include <linux/irq.h>
26
27 #include <linux/mfd/pcf50633/core.h>
28
29 /* Two MBCS registers used during cold start */
30 #define PCF50633_REG_MBCS1 0x4b
31 #define PCF50633_REG_MBCS2 0x4c
32 #define PCF50633_MBCS1_USBPRES 0x01
33 #define PCF50633_MBCS1_ADAPTPRES 0x01
34
35 static int __pcf50633_read(struct pcf50633 *pcf, u8 reg, int num, u8 *data)
36 {
37 int ret;
38
39 ret = i2c_smbus_read_i2c_block_data(pcf->i2c_client, reg,
40 num, data);
41 if (ret < 0)
42 dev_err(pcf->dev, "Error reading %d regs at %d\n", num, reg);
43
44 return ret;
45 }
46
47 static int __pcf50633_write(struct pcf50633 *pcf, u8 reg, int num, u8 *data)
48 {
49 int ret;
50
51 ret = i2c_smbus_write_i2c_block_data(pcf->i2c_client, reg,
52 num, data);
53 if (ret < 0)
54 dev_err(pcf->dev, "Error writing %d regs at %d\n", num, reg);
55
56 return ret;
57
58 }
59
60 /* Read a block of upto 32 regs */
61 int pcf50633_read_block(struct pcf50633 *pcf, u8 reg,
62 int nr_regs, u8 *data)
63 {
64 int ret;
65
66 mutex_lock(&pcf->lock);
67 ret = __pcf50633_read(pcf, reg, nr_regs, data);
68 mutex_unlock(&pcf->lock);
69
70 return ret;
71 }
72 EXPORT_SYMBOL_GPL(pcf50633_read_block);
73
74 /* Write a block of upto 32 regs */
75 int pcf50633_write_block(struct pcf50633 *pcf , u8 reg,
76 int nr_regs, u8 *data)
77 {
78 int ret;
79
80 mutex_lock(&pcf->lock);
81 ret = __pcf50633_write(pcf, reg, nr_regs, data);
82 mutex_unlock(&pcf->lock);
83
84 return ret;
85 }
86 EXPORT_SYMBOL_GPL(pcf50633_write_block);
87
88 u8 pcf50633_reg_read(struct pcf50633 *pcf, u8 reg)
89 {
90 u8 val;
91
92 mutex_lock(&pcf->lock);
93 __pcf50633_read(pcf, reg, 1, &val);
94 mutex_unlock(&pcf->lock);
95
96 return val;
97 }
98 EXPORT_SYMBOL_GPL(pcf50633_reg_read);
99
100 int pcf50633_reg_write(struct pcf50633 *pcf, u8 reg, u8 val)
101 {
102 int ret;
103
104 mutex_lock(&pcf->lock);
105 ret = __pcf50633_write(pcf, reg, 1, &val);
106 mutex_unlock(&pcf->lock);
107
108 return ret;
109 }
110 EXPORT_SYMBOL_GPL(pcf50633_reg_write);
111
112 int pcf50633_reg_set_bit_mask(struct pcf50633 *pcf, u8 reg, u8 mask, u8 val)
113 {
114 int ret;
115 u8 tmp;
116
117 val &= mask;
118
119 mutex_lock(&pcf->lock);
120 ret = __pcf50633_read(pcf, reg, 1, &tmp);
121 if (ret < 0)
122 goto out;
123
124 tmp &= ~mask;
125 tmp |= val;
126 ret = __pcf50633_write(pcf, reg, 1, &tmp);
127
128 out:
129 mutex_unlock(&pcf->lock);
130
131 return ret;
132 }
133 EXPORT_SYMBOL_GPL(pcf50633_reg_set_bit_mask);
134
135 int pcf50633_reg_clear_bits(struct pcf50633 *pcf, u8 reg, u8 val)
136 {
137 int ret;
138 u8 tmp;
139
140 mutex_lock(&pcf->lock);
141 ret = __pcf50633_read(pcf, reg, 1, &tmp);
142 if (ret < 0)
143 goto out;
144
145 tmp &= ~val;
146 ret = __pcf50633_write(pcf, reg, 1, &tmp);
147
148 out:
149 mutex_unlock(&pcf->lock);
150
151 return ret;
152 }
153 EXPORT_SYMBOL_GPL(pcf50633_reg_clear_bits);
154
155 /* sysfs attributes */
156 static ssize_t show_dump_regs(struct device *dev, struct device_attribute *attr,
157 char *buf)
158 {
159 struct pcf50633 *pcf = dev_get_drvdata(dev);
160 u8 dump[16];
161 int n, n1, idx = 0;
162 char *buf1 = buf;
163 static u8 address_no_read[] = { /* must be ascending */
164 PCF50633_REG_INT1,
165 PCF50633_REG_INT2,
166 PCF50633_REG_INT3,
167 PCF50633_REG_INT4,
168 PCF50633_REG_INT5,
169 0 /* terminator */
170 };
171
172 for (n = 0; n < 256; n += sizeof(dump)) {
173 for (n1 = 0; n1 < sizeof(dump); n1++)
174 if (n == address_no_read[idx]) {
175 idx++;
176 dump[n1] = 0x00;
177 } else
178 dump[n1] = pcf50633_reg_read(pcf, n + n1);
179
180 hex_dump_to_buffer(dump, sizeof(dump), 16, 1, buf1, 128, 0);
181 buf1 += strlen(buf1);
182 *buf1++ = '\n';
183 *buf1 = '\0';
184 }
185
186 return buf1 - buf;
187 }
188 static DEVICE_ATTR(dump_regs, 0400, show_dump_regs, NULL);
189
190 static ssize_t show_resume_reason(struct device *dev,
191 struct device_attribute *attr, char *buf)
192 {
193 struct pcf50633 *pcf = dev_get_drvdata(dev);
194 int n;
195
196 n = sprintf(buf, "%02x%02x%02x%02x%02x\n",
197 pcf->resume_reason[0],
198 pcf->resume_reason[1],
199 pcf->resume_reason[2],
200 pcf->resume_reason[3],
201 pcf->resume_reason[4]);
202
203 return n;
204 }
205 static DEVICE_ATTR(resume_reason, 0400, show_resume_reason, NULL);
206
207 static struct attribute *pcf_sysfs_entries[] = {
208 &dev_attr_dump_regs.attr,
209 &dev_attr_resume_reason.attr,
210 NULL,
211 };
212
213 static struct attribute_group pcf_attr_group = {
214 .name = NULL, /* put in device directory */
215 .attrs = pcf_sysfs_entries,
216 };
217
218 int pcf50633_register_irq(struct pcf50633 *pcf, int irq,
219 void (*handler) (int, void *), void *data)
220 {
221 if (irq < 0 || irq > PCF50633_NUM_IRQ || !handler)
222 return -EINVAL;
223
224 if (WARN_ON(pcf->irq_handler[irq].handler))
225 return -EBUSY;
226
227 mutex_lock(&pcf->lock);
228 pcf->irq_handler[irq].handler = handler;
229 pcf->irq_handler[irq].data = data;
230 mutex_unlock(&pcf->lock);
231
232 return 0;
233 }
234 EXPORT_SYMBOL_GPL(pcf50633_register_irq);
235
236 int pcf50633_free_irq(struct pcf50633 *pcf, int irq)
237 {
238 if (irq < 0 || irq > PCF50633_NUM_IRQ)
239 return -EINVAL;
240
241 mutex_lock(&pcf->lock);
242 pcf->irq_handler[irq].handler = NULL;
243 mutex_unlock(&pcf->lock);
244
245 return 0;
246 }
247 EXPORT_SYMBOL_GPL(pcf50633_free_irq);
248
249 static int __pcf50633_irq_mask_set(struct pcf50633 *pcf, int irq, u8 mask)
250 {
251 u8 reg, bits, tmp;
252 int ret = 0, idx;
253
254 idx = irq >> 3;
255 reg = PCF50633_REG_INT1M + idx;
256 bits = 1 << (irq & 0x07);
257
258 mutex_lock(&pcf->lock);
259
260 if (mask) {
261 ret = __pcf50633_read(pcf, reg, 1, &tmp);
262 if (ret < 0)
263 goto out;
264
265 tmp |= bits;
266
267 ret = __pcf50633_write(pcf, reg, 1, &tmp);
268 if (ret < 0)
269 goto out;
270
271 pcf->mask_regs[idx] &= ~bits;
272 pcf->mask_regs[idx] |= bits;
273 } else {
274 ret = __pcf50633_read(pcf, reg, 1, &tmp);
275 if (ret < 0)
276 goto out;
277
278 tmp &= ~bits;
279
280 ret = __pcf50633_write(pcf, reg, 1, &tmp);
281 if (ret < 0)
282 goto out;
283
284 pcf->mask_regs[idx] &= ~bits;
285 }
286 out:
287 mutex_unlock(&pcf->lock);
288
289 return ret;
290 }
291
292 int pcf50633_irq_mask(struct pcf50633 *pcf, int irq)
293 {
294 dev_info(pcf->dev, "Masking IRQ %d\n", irq);
295
296 return __pcf50633_irq_mask_set(pcf, irq, 1);
297 }
298 EXPORT_SYMBOL_GPL(pcf50633_irq_mask);
299
300 int pcf50633_irq_unmask(struct pcf50633 *pcf, int irq)
301 {
302 dev_info(pcf->dev, "Unmasking IRQ %d\n", irq);
303
304 return __pcf50633_irq_mask_set(pcf, irq, 0);
305 }
306 EXPORT_SYMBOL_GPL(pcf50633_irq_unmask);
307
308 int pcf50633_irq_mask_get(struct pcf50633 *pcf, int irq)
309 {
310 u8 reg, bits;
311
312 reg = irq >> 3;
313 bits = 1 << (irq & 0x07);
314
315 return pcf->mask_regs[reg] & bits;
316 }
317 EXPORT_SYMBOL_GPL(pcf50633_irq_mask_get);
318
319 static void pcf50633_irq_call_handler(struct pcf50633 *pcf, int irq)
320 {
321 if (pcf->irq_handler[irq].handler)
322 pcf->irq_handler[irq].handler(irq, pcf->irq_handler[irq].data);
323 }
324
325 /* Maximum amount of time ONKEY is held before emergency action is taken */
326 #define PCF50633_ONKEY1S_TIMEOUT 8
327
328 static void pcf50633_irq_worker(struct work_struct *work)
329 {
330 struct pcf50633 *pcf;
331 int ret, i, j;
332 u8 pcf_int[5], chgstat;
333
334 pcf = container_of(work, struct pcf50633, irq_work);
335
336 /* Read the 5 INT regs in one transaction */
337 ret = pcf50633_read_block(pcf, PCF50633_REG_INT1,
338 ARRAY_SIZE(pcf_int), pcf_int);
339 if (ret != ARRAY_SIZE(pcf_int)) {
340 dev_err(pcf->dev, "Error reading INT registers\n");
341
342 /*
343 * If this doesn't ACK the interrupt to the chip, we'll be
344 * called once again as we're level triggered.
345 */
346 goto out;
347 }
348
349 /* We immediately read the usb and adapter status. We thus make sure
350 * only of USBINS/USBREM IRQ handlers are called */
351 if (pcf_int[0] & (PCF50633_INT1_USBINS | PCF50633_INT1_USBREM)) {
352 chgstat = pcf50633_reg_read(pcf, PCF50633_REG_MBCS2);
353 if (chgstat & (0x3 << 4))
354 pcf_int[0] &= ~(1 << PCF50633_INT1_USBREM);
355 else
356 pcf_int[0] &= ~(1 << PCF50633_INT1_USBINS);
357 }
358
359 /* Make sure only one of ADPINS or ADPREM is set */
360 if (pcf_int[0] & (PCF50633_INT1_ADPINS | PCF50633_INT1_ADPREM)) {
361 chgstat = pcf50633_reg_read(pcf, PCF50633_REG_MBCS2);
362 if (chgstat & (0x3 << 4))
363 pcf_int[0] &= ~(1 << PCF50633_INT1_ADPREM);
364 else
365 pcf_int[0] &= ~(1 << PCF50633_INT1_ADPINS);
366 }
367
368 dev_dbg(pcf->dev, "INT1=0x%02x INT2=0x%02x INT3=0x%02x "
369 "INT4=0x%02x INT5=0x%02x\n", pcf_int[0],
370 pcf_int[1], pcf_int[2], pcf_int[3], pcf_int[4]);
371
372 /* Some revisions of the chip don't have a 8s standby mode on
373 * ONKEY1S press. We try to manually do it in such cases. */
374 if ((pcf_int[0] & PCF50633_INT1_SECOND) && pcf->onkey1s_held) {
375 dev_info(pcf->dev, "ONKEY1S held for %d secs\n",
376 pcf->onkey1s_held);
377 if (pcf->onkey1s_held++ == PCF50633_ONKEY1S_TIMEOUT)
378 if (pcf->pdata->force_shutdown)
379 pcf->pdata->force_shutdown(pcf);
380 }
381
382 if (pcf_int[2] & PCF50633_INT3_ONKEY1S) {
383 dev_info(pcf->dev, "ONKEY1S held\n");
384 pcf->onkey1s_held = 1 ;
385
386 /* Unmask IRQ_SECOND */
387 pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT1M,
388 PCF50633_INT1_SECOND);
389
390 /* Unmask IRQ_ONKEYR */
391 pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT2M,
392 PCF50633_INT2_ONKEYR);
393 }
394
395 if ((pcf_int[1] & PCF50633_INT2_ONKEYR) && pcf->onkey1s_held) {
396 pcf->onkey1s_held = 0;
397
398 /* Mask SECOND and ONKEYR interrupts */
399 if (pcf->mask_regs[0] & PCF50633_INT1_SECOND)
400 pcf50633_reg_set_bit_mask(pcf,
401 PCF50633_REG_INT1M,
402 PCF50633_INT1_SECOND,
403 PCF50633_INT1_SECOND);
404
405 if (pcf->mask_regs[1] & PCF50633_INT2_ONKEYR)
406 pcf50633_reg_set_bit_mask(pcf,
407 PCF50633_REG_INT2M,
408 PCF50633_INT2_ONKEYR,
409 PCF50633_INT2_ONKEYR);
410 }
411
412 /* Have we just resumed ? */
413 if (pcf->is_suspended) {
414 pcf->is_suspended = 0;
415
416 /* Set the resume reason filtering out non resumers */
417 for (i = 0; i < ARRAY_SIZE(pcf_int); i++)
418 pcf->resume_reason[i] = pcf_int[i] &
419 pcf->pdata->resumers[i];
420
421 /* Make sure we don't pass on any ONKEY events to
422 * userspace now */
423 pcf_int[1] &= ~(PCF50633_INT2_ONKEYR | PCF50633_INT2_ONKEYF);
424 }
425
426 for (i = 0; i < ARRAY_SIZE(pcf_int); i++) {
427 /* Unset masked interrupts */
428 pcf_int[i] &= ~pcf->mask_regs[i];
429
430 for (j = 0; j < 8 ; j++)
431 if (pcf_int[i] & (1 << j))
432 pcf50633_irq_call_handler(pcf, (i * 8) + j);
433 }
434
435 out:
436 put_device(pcf->dev);
437 enable_irq(pcf->irq);
438 }
439
440 static irqreturn_t pcf50633_irq(int irq, void *data)
441 {
442 struct pcf50633 *pcf = data;
443
444 dev_dbg(pcf->dev, "pcf50633_irq\n");
445
446 get_device(pcf->dev);
447 disable_irq(pcf->irq);
448 schedule_work(&pcf->irq_work);
449
450 return IRQ_HANDLED;
451 }
452
453 static void
454 pcf50633_client_dev_register(struct pcf50633 *pcf, const char *name,
455 struct platform_device **pdev)
456 {
457 struct pcf50633_subdev_pdata *subdev_pdata;
458 int ret;
459
460 *pdev = platform_device_alloc(name, -1);
461 if (!*pdev) {
462 dev_err(pcf->dev, "Falied to allocate %s\n", name);
463 return;
464 }
465
466 subdev_pdata = kmalloc(sizeof(*subdev_pdata), GFP_KERNEL);
467 if (!subdev_pdata) {
468 dev_err(pcf->dev, "Error allocating subdev pdata\n");
469 platform_device_put(*pdev);
470 }
471
472 subdev_pdata->pcf = pcf;
473 platform_device_add_data(*pdev, subdev_pdata, sizeof(*subdev_pdata));
474
475 (*pdev)->dev.parent = pcf->dev;
476
477 ret = platform_device_add(*pdev);
478 if (ret) {
479 dev_err(pcf->dev, "Failed to register %s: %d\n", name, ret);
480 platform_device_put(*pdev);
481 *pdev = NULL;
482 }
483 }
484
485 #ifdef CONFIG_PM
486 static int pcf50633_suspend(struct device *dev, pm_message_t state)
487 {
488 struct pcf50633 *pcf;
489 int ret = 0, i;
490 u8 res[5];
491
492 pcf = dev_get_drvdata(dev);
493
494 /* Make sure our interrupt handlers are not called
495 * henceforth */
496 disable_irq(pcf->irq);
497
498 /* Make sure that any running IRQ worker has quit */
499 cancel_work_sync(&pcf->irq_work);
500
501 /* Save the masks */
502 ret = pcf50633_read_block(pcf, PCF50633_REG_INT1M,
503 ARRAY_SIZE(pcf->suspend_irq_masks),
504 pcf->suspend_irq_masks);
505 if (ret < 0) {
506 dev_err(pcf->dev, "error saving irq masks\n");
507 goto out;
508 }
509
510 /* Write wakeup irq masks */
511 for (i = 0; i < ARRAY_SIZE(res); i++)
512 res[i] = ~pcf->pdata->resumers[i];
513
514 ret = pcf50633_write_block(pcf, PCF50633_REG_INT1M,
515 ARRAY_SIZE(res), &res[0]);
516 if (ret < 0) {
517 dev_err(pcf->dev, "error writing wakeup irq masks\n");
518 goto out;
519 }
520
521 pcf->is_suspended = 1;
522
523 out:
524 return ret;
525 }
526
527 static int pcf50633_resume(struct device *dev)
528 {
529 struct pcf50633 *pcf;
530 int ret;
531
532 pcf = dev_get_drvdata(dev);
533
534 /* Write the saved mask registers */
535 ret = pcf50633_write_block(pcf, PCF50633_REG_INT1M,
536 ARRAY_SIZE(pcf->suspend_irq_masks),
537 pcf->suspend_irq_masks);
538 if (ret < 0)
539 dev_err(pcf->dev, "Error restoring saved suspend masks\n");
540
541 /* Restore regulators' state */
542
543
544 get_device(pcf->dev);
545
546 /*
547 * Clear any pending interrupts and set resume reason if any.
548 * This will leave with enable_irq()
549 */
550 pcf50633_irq_worker(&pcf->irq_work);
551
552 return 0;
553 }
554 #else
555 #define pcf50633_suspend NULL
556 #define pcf50633_resume NULL
557 #endif
558
559 static int __devinit pcf50633_probe(struct i2c_client *client,
560 const struct i2c_device_id *ids)
561 {
562 struct pcf50633 *pcf;
563 struct pcf50633_platform_data *pdata = client->dev.platform_data;
564 int i, ret = 0;
565 int version, variant;
566
567 pcf = kzalloc(sizeof(*pcf), GFP_KERNEL);
568 if (!pcf)
569 return -ENOMEM;
570
571 pcf->pdata = pdata;
572
573 mutex_init(&pcf->lock);
574
575 i2c_set_clientdata(client, pcf);
576 pcf->dev = &client->dev;
577 pcf->i2c_client = client;
578 pcf->irq = client->irq;
579
580 INIT_WORK(&pcf->irq_work, pcf50633_irq_worker);
581
582 version = pcf50633_reg_read(pcf, 0);
583 variant = pcf50633_reg_read(pcf, 1);
584 if (version < 0 || variant < 0) {
585 dev_err(pcf->dev, "Unable to probe pcf50633\n");
586 ret = -ENODEV;
587 goto err;
588 }
589
590 dev_info(pcf->dev, "Probed device version %d variant %d\n",
591 version, variant);
592
593 /* Enable all interrupts except RTC SECOND */
594 pcf->mask_regs[0] = 0x80;
595 pcf50633_reg_write(pcf, PCF50633_REG_INT1M, pcf->mask_regs[0]);
596 pcf50633_reg_write(pcf, PCF50633_REG_INT2M, 0x00);
597 pcf50633_reg_write(pcf, PCF50633_REG_INT3M, 0x00);
598 pcf50633_reg_write(pcf, PCF50633_REG_INT4M, 0x00);
599 pcf50633_reg_write(pcf, PCF50633_REG_INT5M, 0x00);
600
601 /* Create sub devices */
602 pcf50633_client_dev_register(pcf, "pcf50633-input",
603 &pcf->input_pdev);
604 pcf50633_client_dev_register(pcf, "pcf50633-rtc",
605 &pcf->rtc_pdev);
606 pcf50633_client_dev_register(pcf, "pcf50633-mbc",
607 &pcf->mbc_pdev);
608 pcf50633_client_dev_register(pcf, "pcf50633-adc",
609 &pcf->adc_pdev);
610
611 for (i = 0; i < PCF50633_NUM_REGULATORS; i++) {
612 struct platform_device *pdev;
613
614 pdev = platform_device_alloc("pcf50633-regltr", i);
615 if (!pdev) {
616 dev_err(pcf->dev, "Cannot create regulator\n");
617 continue;
618 }
619
620 pdev->dev.parent = pcf->dev;
621 pdev->dev.platform_data = &pdata->reg_init_data[i];
622 pdev->dev.driver_data = pcf;
623 pcf->regulator_pdev[i] = pdev;
624
625 platform_device_add(pdev);
626 }
627
628 if (client->irq) {
629 set_irq_handler(client->irq, handle_level_irq);
630 ret = request_irq(client->irq, pcf50633_irq,
631 IRQF_TRIGGER_LOW, "pcf50633", pcf);
632
633 if (ret) {
634 dev_err(pcf->dev, "Failed to request IRQ %d\n", ret);
635 goto err;
636 }
637 } else {
638 dev_err(pcf->dev, "No IRQ configured\n");
639 goto err;
640 }
641
642 if (enable_irq_wake(client->irq) < 0)
643 dev_err(pcf->dev, "IRQ %u cannot be enabled as wake-up source"
644 "in this hardware revision", client->irq);
645
646 ret = sysfs_create_group(&client->dev.kobj, &pcf_attr_group);
647 if (ret)
648 dev_err(pcf->dev, "error creating sysfs entries\n");
649
650 if (pdata->probe_done)
651 pdata->probe_done(pcf);
652
653 return 0;
654
655 err:
656 kfree(pcf);
657 return ret;
658 }
659
660 static int __devexit pcf50633_remove(struct i2c_client *client)
661 {
662 struct pcf50633 *pcf = i2c_get_clientdata(client);
663 int i;
664
665 free_irq(pcf->irq, pcf);
666
667 platform_device_unregister(pcf->input_pdev);
668 platform_device_unregister(pcf->rtc_pdev);
669 platform_device_unregister(pcf->mbc_pdev);
670 platform_device_unregister(pcf->adc_pdev);
671
672 for (i = 0; i < PCF50633_NUM_REGULATORS; i++)
673 platform_device_unregister(pcf->regulator_pdev[i]);
674
675 kfree(pcf);
676
677 return 0;
678 }
679
680 static struct i2c_device_id pcf50633_id_table[] = {
681 {"pcf50633", 0x73},
682 };
683
684 static struct i2c_driver pcf50633_driver = {
685 .driver = {
686 .name = "pcf50633",
687 .suspend = pcf50633_suspend,
688 .resume = pcf50633_resume,
689 },
690 .id_table = pcf50633_id_table,
691 .probe = pcf50633_probe,
692 .remove = __devexit_p(pcf50633_remove),
693 };
694
695 static int __init pcf50633_init(void)
696 {
697 return i2c_add_driver(&pcf50633_driver);
698 }
699
700 static void __exit pcf50633_exit(void)
701 {
702 i2c_del_driver(&pcf50633_driver);
703 }
704
705 MODULE_DESCRIPTION("I2C chip driver for NXP PCF50633 PMU");
706 MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
707 MODULE_LICENSE("GPL");
708
709 module_init(pcf50633_init);
710 module_exit(pcf50633_exit);
Openmoko development kernel tree