arch/x86/include/asm/mce.h

   1 #ifndef _ASM_X86_MCE_H
   2 #define _ASM_X86_MCE_H
   3
   4 #include <linux/types.h>
   5 #include <asm/ioctls.h>
   6
   7 /*
   8  * Machine Check support for x86
   9  */
  10
  11 #define MCG_BANKCNT_MASK        0xff         /* Number of Banks */
  12 #define MCG_CTL_P               (1ULL<<8)    /* MCG_CAP register available */
  13 #define MCG_EXT_P               (1ULL<<9)    /* Extended registers available */
  14 #define MCG_CMCI_P              (1ULL<<10)   /* CMCI supported */
  15 #define MCG_EXT_CNT_MASK        0xff0000     /* Number of Extended registers */
  16 #define MCG_EXT_CNT_SHIFT       16
  17 #define MCG_EXT_CNT(c)          (((c) & MCG_EXT_CNT_MASK) >> MCG_EXT_CNT_SHIFT)
  18
  19 #define MCG_STATUS_RIPV  (1ULL<<0)   /* restart ip valid */
  20 #define MCG_STATUS_EIPV  (1ULL<<1)   /* ip points to correct instruction */
  21 #define MCG_STATUS_MCIP  (1ULL<<2)   /* machine check in progress */
  22
  23 #define MCI_STATUS_VAL   (1ULL<<63)  /* valid error */
  24 #define MCI_STATUS_OVER  (1ULL<<62)  /* previous errors lost */
  25 #define MCI_STATUS_UC    (1ULL<<61)  /* uncorrected error */
  26 #define MCI_STATUS_EN    (1ULL<<60)  /* error enabled */
  27 #define MCI_STATUS_MISCV (1ULL<<59)  /* misc error reg. valid */
  28 #define MCI_STATUS_ADDRV (1ULL<<58)  /* addr reg. valid */
  29 #define MCI_STATUS_PCC   (1ULL<<57)  /* processor context corrupt */
  30
  31 /* Fields are zero when not available */
  32 struct mce {
  33         __u64 status;
  34         __u64 misc;
  35         __u64 addr;
  36         __u64 mcgstatus;
  37         __u64 ip;
  38         __u64 tsc;      /* cpu time stamp counter */
  39         __u64 res1;     /* for future extension */
  40         __u64 res2;     /* dito. */
  41         __u8  cs;               /* code segment */
  42         __u8  bank;     /* machine check bank */
  43         __u8  cpu;      /* cpu that raised the error */
  44         __u8  finished;   /* entry is valid */
  45         __u32 pad;
  46 };
  47
  48 /*
  49  * This structure contains all data related to the MCE log.  Also
  50  * carries a signature to make it easier to find from external
  51  * debugging tools.  Each entry is only valid when its finished flag
  52  * is set.
  53  */
  54
  55 #define MCE_LOG_LEN 32
  56
  57 struct mce_log {
  58         char signature[12]; /* "MACHINECHECK" */
  59         unsigned len;       /* = MCE_LOG_LEN */
  60         unsigned next;
  61         unsigned flags;
  62         unsigned pad0;
  63         struct mce entry[MCE_LOG_LEN];
  64 };
  65
  66 #define MCE_OVERFLOW 0          /* bit 0 in flags means overflow */
  67
  68 #define MCE_LOG_SIGNATURE       "MACHINECHECK"
  69
  70 #define MCE_GET_RECORD_LEN   _IOR('M', 1, int)
  71 #define MCE_GET_LOG_LEN      _IOR('M', 2, int)
  72 #define MCE_GETCLEAR_FLAGS   _IOR('M', 3, int)
  73
  74 /* Software defined banks */
  75 #define MCE_EXTENDED_BANK       128
  76 #define MCE_THERMAL_BANK        MCE_EXTENDED_BANK + 0
  77
  78 #define K8_MCE_THRESHOLD_BASE      (MCE_EXTENDED_BANK + 1)      /* MCE_AMD */
  79 #define K8_MCE_THRESHOLD_BANK_0    (MCE_THRESHOLD_BASE + 0 * 9)
  80 #define K8_MCE_THRESHOLD_BANK_1    (MCE_THRESHOLD_BASE + 1 * 9)
  81 #define K8_MCE_THRESHOLD_BANK_2    (MCE_THRESHOLD_BASE + 2 * 9)
  82 #define K8_MCE_THRESHOLD_BANK_3    (MCE_THRESHOLD_BASE + 3 * 9)
  83 #define K8_MCE_THRESHOLD_BANK_4    (MCE_THRESHOLD_BASE + 4 * 9)
  84 #define K8_MCE_THRESHOLD_BANK_5    (MCE_THRESHOLD_BASE + 5 * 9)
  85 #define K8_MCE_THRESHOLD_DRAM_ECC  (MCE_THRESHOLD_BANK_4 + 0)
  86
  87 #ifdef __KERNEL__
  88
  89 extern int mce_disabled;
  90
  91 #include <asm/atomic.h>
  92
  93 void mce_setup(struct mce *m);
  94 void mce_log(struct mce *m);
  95 DECLARE_PER_CPU(struct sys_device, mce_dev);
  96 extern void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu);
  97
  98 /*
  99  * To support more than 128 would need to escape the predefined
 100  * Linux defined extended banks first.
 101  */
 102 #define MAX_NR_BANKS (MCE_EXTENDED_BANK - 1)
 103
 104 #ifdef CONFIG_X86_MCE_INTEL
 105 void mce_intel_feature_init(struct cpuinfo_x86 *c);
 106 void cmci_clear(void);
 107 void cmci_reenable(void);
 108 void cmci_rediscover(int dying);
 109 void cmci_recheck(void);
 110 #else
 111 static inline void mce_intel_feature_init(struct cpuinfo_x86 *c) { }
 112 static inline void cmci_clear(void) {}
 113 static inline void cmci_reenable(void) {}
 114 static inline void cmci_rediscover(int dying) {}
 115 static inline void cmci_recheck(void) {}
 116 #endif
 117
 118 #ifdef CONFIG_X86_MCE_AMD
 119 void mce_amd_feature_init(struct cpuinfo_x86 *c);
 120 #else
 121 static inline void mce_amd_feature_init(struct cpuinfo_x86 *c) { }
 122 #endif
 123
 124 extern int mce_available(struct cpuinfo_x86 *c);
 125
 126 void mce_log_therm_throt_event(__u64 status);
 127
 128 extern atomic_t mce_entry;
 129
 130 extern void do_machine_check(struct pt_regs *, long);
 131
 132 typedef DECLARE_BITMAP(mce_banks_t, MAX_NR_BANKS);
 133 DECLARE_PER_CPU(mce_banks_t, mce_poll_banks);
 134
 135 enum mcp_flags {
 136         MCP_TIMESTAMP = (1 << 0),       /* log time stamp */
 137         MCP_UC = (1 << 1),              /* log uncorrected errors */
 138         MCP_DONTLOG = (1 << 2),         /* only clear, don't log */
 139 };
 140 extern void machine_check_poll(enum mcp_flags flags, mce_banks_t *b);
 141
 142 extern int mce_notify_user(void);
 143
 144 DECLARE_PER_CPU(struct mce, injectm);
 145 extern struct file_operations mce_chrdev_ops;
 146
 147 #ifdef CONFIG_X86_MCE
 148 extern void mcheck_init(struct cpuinfo_x86 *c);
 149 #else
 150 #define mcheck_init(c) do { } while (0)
 151 #endif
 152
 153 extern void (*mce_threshold_vector)(void);
 154
 155 #endif /* __KERNEL__ */
 156 #endif /* _ASM_X86_MCE_H */