| blob | 3cec9b504f5f52fb2af83f004e442ec3784c393d |
1 /*
2 * arch/s390/kernel/entry64.S
3 * S390 low-level entry points.
4 *
5 * Copyright (C) IBM Corp. 1999,2006
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
10 */
12 #include <linux/sys.h>
13 #include <linux/linkage.h>
14 #include <linux/init.h>
15 #include <asm/cache.h>
16 #include <asm/lowcore.h>
17 #include <asm/errno.h>
18 #include <asm/ptrace.h>
19 #include <asm/thread_info.h>
20 #include <asm/asm-offsets.h>
21 #include <asm/unistd.h>
22 #include <asm/page.h>
24 /*
25 * Stack layout for the system_call stack entry.
26 * The first few entries are identical to the user_regs_struct.
27 */
28 SP_PTREGS = STACK_FRAME_OVERHEAD
29 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
30 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
31 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
32 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
33 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
34 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
35 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
36 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
37 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
38 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
39 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64
40 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72
41 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80
42 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88
43 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96
44 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104
45 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112
46 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120
47 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
48 SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
49 SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR
50 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
52 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
53 STACK_SIZE = 1 << STACK_SHIFT
55 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
56 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
57 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
58 _TIF_MCCK_PENDING)
59 _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | _TIF_SECCOMP>>8)
61 #define BASED(name) name-system_call(%r13)
63 #ifdef CONFIG_TRACE_IRQFLAGS
64 .macro TRACE_IRQS_ON
65 basr %r2,%r0
66 brasl %r14,trace_hardirqs_on_caller
67 .endm
69 .macro TRACE_IRQS_OFF
70 basr %r2,%r0
71 brasl %r14,trace_hardirqs_off_caller
72 .endm
74 .macro TRACE_IRQS_CHECK
75 basr %r2,%r0
76 tm SP_PSW(%r15),0x03 # irqs enabled?
77 jz 0f
78 brasl %r14,trace_hardirqs_on_caller
79 j 1f
80 0: brasl %r14,trace_hardirqs_off_caller
81 1:
82 .endm
83 #else
84 #define TRACE_IRQS_ON
85 #define TRACE_IRQS_OFF
86 #define TRACE_IRQS_CHECK
87 #endif
89 #ifdef CONFIG_LOCKDEP
90 .macro LOCKDEP_SYS_EXIT
91 tm SP_PSW+1(%r15),0x01 # returning to user ?
92 jz 0f
93 brasl %r14,lockdep_sys_exit
94 0:
95 .endm
96 #else
97 #define LOCKDEP_SYS_EXIT
98 #endif
100 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
101 lg %r10,\lc_from
102 slg %r10,\lc_to
103 alg %r10,\lc_sum
104 stg %r10,\lc_sum
105 .endm
107 /*
108 * Register usage in interrupt handlers:
109 * R9 - pointer to current task structure
110 * R13 - pointer to literal pool
111 * R14 - return register for function calls
112 * R15 - kernel stack pointer
113 */
115 .macro SAVE_ALL_BASE savearea
116 stmg %r12,%r15,\savearea
117 larl %r13,system_call
118 .endm
120 .macro SAVE_ALL_SVC psworg,savearea
121 la %r12,\psworg
122 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
123 .endm
125 .macro SAVE_ALL_SYNC psworg,savearea
126 la %r12,\psworg
127 tm \psworg+1,0x01 # test problem state bit
128 jz 2f # skip stack setup save
129 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
130 #ifdef CONFIG_CHECK_STACK
131 j 3f
132 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
133 jz stack_overflow
134 3:
135 #endif
136 2:
137 .endm
139 .macro SAVE_ALL_ASYNC psworg,savearea
140 la %r12,\psworg
141 tm \psworg+1,0x01 # test problem state bit
142 jnz 1f # from user -> load kernel stack
143 clc \psworg+8(8),BASED(.Lcritical_end)
144 jhe 0f
145 clc \psworg+8(8),BASED(.Lcritical_start)
146 jl 0f
147 brasl %r14,cleanup_critical
148 tm 1(%r12),0x01 # retest problem state after cleanup
149 jnz 1f
150 0: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
151 slgr %r14,%r15
152 srag %r14,%r14,STACK_SHIFT
153 jz 2f
154 1: lg %r15,__LC_ASYNC_STACK # load async stack
155 #ifdef CONFIG_CHECK_STACK
156 j 3f
157 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
158 jz stack_overflow
159 3:
160 #endif
161 2:
162 .endm
164 .macro CREATE_STACK_FRAME psworg,savearea
165 aghi %r15,-SP_SIZE # make room for registers & psw
166 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
167 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
168 icm %r12,3,__LC_SVC_ILC
169 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
170 st %r12,SP_SVCNR(%r15)
171 mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack
172 la %r12,0
173 stg %r12,__SF_BACKCHAIN(%r15)
174 .endm
176 .macro RESTORE_ALL psworg,sync
177 mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore
178 .if !\sync
179 ni \psworg+1,0xfd # clear wait state bit
180 .endif
181 lg %r14,__LC_VDSO_PER_CPU
182 lmg %r0,%r13,SP_R0(%r15) # load gprs 0-13 of user
183 stpt __LC_EXIT_TIMER
184 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
185 lmg %r14,%r15,SP_R14(%r15) # load grps 14-15 of user
186 lpswe \psworg # back to caller
187 .endm
189 /*
190 * Scheduler resume function, called by switch_to
191 * gpr2 = (task_struct *) prev
192 * gpr3 = (task_struct *) next
193 * Returns:
194 * gpr2 = prev
195 */
196 .globl __switch_to
197 __switch_to:
198 tm __THREAD_per+4(%r3),0xe8 # is the new process using per ?
199 jz __switch_to_noper # if not we're fine
200 stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff
201 clc __THREAD_per(24,%r3),__SF_EMPTY(%r15)
202 je __switch_to_noper # we got away without bashing TLB's
203 lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't
204 __switch_to_noper:
205 lg %r4,__THREAD_info(%r2) # get thread_info of prev
206 tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending?
207 jz __switch_to_no_mcck
208 ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
209 lg %r4,__THREAD_info(%r3) # get thread_info of next
210 oi __TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next
211 __switch_to_no_mcck:
212 stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
213 stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
214 lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
215 lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
216 stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct
217 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
218 lg %r3,__THREAD_info(%r3) # load thread_info from task struct
219 stg %r3,__LC_THREAD_INFO
220 aghi %r3,STACK_SIZE
221 stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
222 br %r14
224 __critical_start:
225 /*
226 * SVC interrupt handler routine. System calls are synchronous events and
227 * are executed with interrupts enabled.
228 */
230 .globl system_call
231 system_call:
232 stpt __LC_SYNC_ENTER_TIMER
233 sysc_saveall:
234 SAVE_ALL_BASE __LC_SAVE_AREA
235 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
236 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
237 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
238 sysc_vtime:
239 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
240 sysc_stime:
241 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
242 sysc_update:
243 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
244 sysc_do_svc:
245 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
246 ltgr %r7,%r7 # test for svc 0
247 jnz sysc_nr_ok
248 # svc 0: system call number in %r1
249 cl %r1,BASED(.Lnr_syscalls)
250 jnl sysc_nr_ok
251 lgfr %r7,%r1 # clear high word in r1
252 sysc_nr_ok:
253 mvc SP_ARGS(8,%r15),SP_R7(%r15)
254 sysc_do_restart:
255 sth %r7,SP_SVCNR(%r15)
256 sllg %r7,%r7,2 # svc number * 4
257 larl %r10,sys_call_table
258 #ifdef CONFIG_COMPAT
259 tm __TI_flags+5(%r9),(_TIF_31BIT>>16) # running in 31 bit mode ?
260 jno sysc_noemu
261 larl %r10,sys_call_table_emu # use 31 bit emulation system calls
262 sysc_noemu:
263 #endif
264 tm __TI_flags+6(%r9),_TIF_SYSCALL
265 lgf %r8,0(%r7,%r10) # load address of system call routine
266 jnz sysc_tracesys
267 basr %r14,%r8 # call sys_xxxx
268 stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
270 sysc_return:
271 tm __TI_flags+7(%r9),_TIF_WORK_SVC
272 jnz sysc_work # there is work to do (signals etc.)
273 sysc_restore:
274 #ifdef CONFIG_TRACE_IRQFLAGS
275 larl %r1,sysc_restore_trace_psw
276 lpswe 0(%r1)
277 sysc_restore_trace:
278 TRACE_IRQS_CHECK
279 LOCKDEP_SYS_EXIT
280 #endif
281 sysc_leave:
282 RESTORE_ALL __LC_RETURN_PSW,1
283 sysc_done:
285 #ifdef CONFIG_TRACE_IRQFLAGS
286 .align 8
287 .globl sysc_restore_trace_psw
288 sysc_restore_trace_psw:
289 .quad 0, sysc_restore_trace
290 #endif
292 #
293 # recheck if there is more work to do
294 #
295 sysc_work_loop:
296 tm __TI_flags+7(%r9),_TIF_WORK_SVC
297 jz sysc_restore # there is no work to do
298 #
299 # One of the work bits is on. Find out which one.
300 #
301 sysc_work:
302 tm SP_PSW+1(%r15),0x01 # returning to user ?
303 jno sysc_restore
304 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
305 jo sysc_mcck_pending
306 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
307 jo sysc_reschedule
308 tm __TI_flags+7(%r9),_TIF_SIGPENDING
309 jnz sysc_sigpending
310 tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME
311 jnz sysc_notify_resume
312 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
313 jo sysc_restart
314 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
315 jo sysc_singlestep
316 j sysc_restore
317 sysc_work_done:
319 #
320 # _TIF_NEED_RESCHED is set, call schedule
321 #
322 sysc_reschedule:
323 larl %r14,sysc_work_loop
324 jg schedule # return point is sysc_return
326 #
327 # _TIF_MCCK_PENDING is set, call handler
328 #
329 sysc_mcck_pending:
330 larl %r14,sysc_work_loop
331 jg s390_handle_mcck # TIF bit will be cleared by handler
333 #
334 # _TIF_SIGPENDING is set, call do_signal
335 #
336 sysc_sigpending:
337 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
338 la %r2,SP_PTREGS(%r15) # load pt_regs
339 brasl %r14,do_signal # call do_signal
340 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
341 jo sysc_restart
342 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
343 jo sysc_singlestep
344 j sysc_work_loop
346 #
347 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
348 #
349 sysc_notify_resume:
350 la %r2,SP_PTREGS(%r15) # load pt_regs
351 larl %r14,sysc_work_loop
352 jg do_notify_resume # call do_notify_resume
354 #
355 # _TIF_RESTART_SVC is set, set up registers and restart svc
356 #
357 sysc_restart:
358 ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
359 lg %r7,SP_R2(%r15) # load new svc number
360 mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
361 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
362 j sysc_do_restart # restart svc
364 #
365 # _TIF_SINGLE_STEP is set, call do_single_step
366 #
367 sysc_singlestep:
368 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
369 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
370 la %r2,SP_PTREGS(%r15) # address of register-save area
371 larl %r14,sysc_return # load adr. of system return
372 jg do_single_step # branch to do_sigtrap
374 #
375 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
376 # and after the system call
377 #
378 sysc_tracesys:
379 la %r2,SP_PTREGS(%r15) # load pt_regs
380 la %r3,0
381 srl %r7,2
382 stg %r7,SP_R2(%r15)
383 brasl %r14,do_syscall_trace_enter
384 lghi %r0,NR_syscalls
385 clgr %r0,%r2
386 jnh sysc_tracenogo
387 sllg %r7,%r2,2 # svc number *4
388 lgf %r8,0(%r7,%r10)
389 sysc_tracego:
390 lmg %r3,%r6,SP_R3(%r15)
391 lg %r2,SP_ORIG_R2(%r15)
392 basr %r14,%r8 # call sys_xxx
393 stg %r2,SP_R2(%r15) # store return value
394 sysc_tracenogo:
395 tm __TI_flags+6(%r9),_TIF_SYSCALL
396 jz sysc_return
397 la %r2,SP_PTREGS(%r15) # load pt_regs
398 larl %r14,sysc_return # return point is sysc_return
399 jg do_syscall_trace_exit
401 #
402 # a new process exits the kernel with ret_from_fork
403 #
404 .globl ret_from_fork
405 ret_from_fork:
406 lg %r13,__LC_SVC_NEW_PSW+8
407 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
408 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
409 jo 0f
410 stg %r15,SP_R15(%r15) # store stack pointer for new kthread
411 0: brasl %r14,schedule_tail
412 TRACE_IRQS_ON
413 stosm 24(%r15),0x03 # reenable interrupts
414 j sysc_tracenogo
416 #
417 # kernel_execve function needs to deal with pt_regs that is not
418 # at the usual place
419 #
420 .globl kernel_execve
421 kernel_execve:
422 stmg %r12,%r15,96(%r15)
423 lgr %r14,%r15
424 aghi %r15,-SP_SIZE
425 stg %r14,__SF_BACKCHAIN(%r15)
426 la %r12,SP_PTREGS(%r15)
427 xc 0(__PT_SIZE,%r12),0(%r12)
428 lgr %r5,%r12
429 brasl %r14,do_execve
430 ltgfr %r2,%r2
431 je 0f
432 aghi %r15,SP_SIZE
433 lmg %r12,%r15,96(%r15)
434 br %r14
435 # execve succeeded.
436 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
437 lg %r15,__LC_KERNEL_STACK # load ksp
438 aghi %r15,-SP_SIZE # make room for registers & psw
439 lg %r13,__LC_SVC_NEW_PSW+8
440 lg %r9,__LC_THREAD_INFO
441 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
442 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
443 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
444 brasl %r14,execve_tail
445 j sysc_return
447 /*
448 * Program check handler routine
449 */
451 .globl pgm_check_handler
452 pgm_check_handler:
453 /*
454 * First we need to check for a special case:
455 * Single stepping an instruction that disables the PER event mask will
456 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
457 * For a single stepped SVC the program check handler gets control after
458 * the SVC new PSW has been loaded. But we want to execute the SVC first and
459 * then handle the PER event. Therefore we update the SVC old PSW to point
460 * to the pgm_check_handler and branch to the SVC handler after we checked
461 * if we have to load the kernel stack register.
462 * For every other possible cause for PER event without the PER mask set
463 * we just ignore the PER event (FIXME: is there anything we have to do
464 * for LPSW?).
465 */
466 stpt __LC_SYNC_ENTER_TIMER
467 SAVE_ALL_BASE __LC_SAVE_AREA
468 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
469 jnz pgm_per # got per exception -> special case
470 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
471 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
472 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
473 jz pgm_no_vtime
474 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
475 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
476 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
477 pgm_no_vtime:
478 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
479 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
480 TRACE_IRQS_OFF
481 lgf %r3,__LC_PGM_ILC # load program interruption code
482 lghi %r8,0x7f
483 ngr %r8,%r3
484 pgm_do_call:
485 sll %r8,3
486 larl %r1,pgm_check_table
487 lg %r1,0(%r8,%r1) # load address of handler routine
488 la %r2,SP_PTREGS(%r15) # address of register-save area
489 larl %r14,sysc_return
490 br %r1 # branch to interrupt-handler
492 #
493 # handle per exception
494 #
495 pgm_per:
496 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
497 jnz pgm_per_std # ok, normal per event from user space
498 # ok its one of the special cases, now we need to find out which one
499 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
500 je pgm_svcper
501 # no interesting special case, ignore PER event
502 lmg %r12,%r15,__LC_SAVE_AREA
503 lpswe __LC_PGM_OLD_PSW
505 #
506 # Normal per exception
507 #
508 pgm_per_std:
509 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
510 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
511 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
512 jz pgm_no_vtime2
513 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
514 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
515 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
516 pgm_no_vtime2:
517 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
518 TRACE_IRQS_OFF
519 lg %r1,__TI_task(%r9)
520 tm SP_PSW+1(%r15),0x01 # kernel per event ?
521 jz kernel_per
522 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
523 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
524 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
525 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
526 lgf %r3,__LC_PGM_ILC # load program interruption code
527 lghi %r8,0x7f
528 ngr %r8,%r3 # clear per-event-bit and ilc
529 je sysc_return
530 j pgm_do_call
532 #
533 # it was a single stepped SVC that is causing all the trouble
534 #
535 pgm_svcper:
536 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
537 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
538 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
539 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
540 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
541 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
542 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
543 lg %r1,__TI_task(%r9)
544 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
545 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
546 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
547 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
548 TRACE_IRQS_ON
549 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
550 j sysc_do_svc
552 #
553 # per was called from kernel, must be kprobes
554 #
555 kernel_per:
556 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
557 la %r2,SP_PTREGS(%r15) # address of register-save area
558 larl %r14,sysc_restore # load adr. of system ret, no work
559 jg do_single_step # branch to do_single_step
561 /*
562 * IO interrupt handler routine
563 */
564 .globl io_int_handler
565 io_int_handler:
566 stck __LC_INT_CLOCK
567 stpt __LC_ASYNC_ENTER_TIMER
568 SAVE_ALL_BASE __LC_SAVE_AREA+32
569 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
570 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
571 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
572 jz io_no_vtime
573 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
574 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
575 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
576 io_no_vtime:
577 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
578 TRACE_IRQS_OFF
579 la %r2,SP_PTREGS(%r15) # address of register-save area
580 brasl %r14,do_IRQ # call standard irq handler
581 io_return:
582 tm __TI_flags+7(%r9),_TIF_WORK_INT
583 jnz io_work # there is work to do (signals etc.)
584 io_restore:
585 #ifdef CONFIG_TRACE_IRQFLAGS
586 larl %r1,io_restore_trace_psw
587 lpswe 0(%r1)
588 io_restore_trace:
589 TRACE_IRQS_CHECK
590 LOCKDEP_SYS_EXIT
591 #endif
592 io_leave:
593 RESTORE_ALL __LC_RETURN_PSW,0
594 io_done:
596 #ifdef CONFIG_TRACE_IRQFLAGS
597 .align 8
598 .globl io_restore_trace_psw
599 io_restore_trace_psw:
600 .quad 0, io_restore_trace
601 #endif
603 #
604 # There is work todo, we need to check if we return to userspace, then
605 # check, if we are in SIE, if yes leave it
606 #
607 io_work:
608 tm SP_PSW+1(%r15),0x01 # returning to user ?
609 #ifndef CONFIG_PREEMPT
610 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
611 jnz io_work_user # yes -> no need to check for SIE
612 la %r1, BASED(sie_opcode) # we return to kernel here
613 lg %r2, SP_PSW+8(%r15)
614 clc 0(2,%r1), 0(%r2) # is current instruction = SIE?
615 jne io_restore # no-> return to kernel
616 lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE
617 aghi %r1, 4
618 stg %r1, SP_PSW+8(%r15)
619 j io_restore # return to kernel
620 #else
621 jno io_restore # no-> skip resched & signal
622 #endif
623 #else
624 jnz io_work_user # yes -> do resched & signal
625 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
626 la %r1, BASED(sie_opcode)
627 lg %r2, SP_PSW+8(%r15)
628 clc 0(2,%r1), 0(%r2) # is current instruction = SIE?
629 jne 0f # no -> leave PSW alone
630 lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE
631 aghi %r1, 4
632 stg %r1, SP_PSW+8(%r15)
633 0:
634 #endif
635 # check for preemptive scheduling
636 icm %r0,15,__TI_precount(%r9)
637 jnz io_restore # preemption is disabled
638 # switch to kernel stack
639 lg %r1,SP_R15(%r15)
640 aghi %r1,-SP_SIZE
641 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
642 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
643 lgr %r15,%r1
644 io_resume_loop:
645 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
646 jno io_restore
647 larl %r14,io_resume_loop
648 jg preempt_schedule_irq
649 #endif
651 io_work_user:
652 lg %r1,__LC_KERNEL_STACK
653 aghi %r1,-SP_SIZE
654 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
655 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
656 lgr %r15,%r1
657 #
658 # One of the work bits is on. Find out which one.
659 # Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGPENDING, _TIF_NEED_RESCHED
660 # and _TIF_MCCK_PENDING
661 #
662 io_work_loop:
663 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
664 jo io_mcck_pending
665 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
666 jo io_reschedule
667 tm __TI_flags+7(%r9),_TIF_SIGPENDING
668 jnz io_sigpending
669 tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME
670 jnz io_notify_resume
671 j io_restore
672 io_work_done:
674 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
675 sie_opcode:
676 .long 0xb2140000
677 #endif
679 #
680 # _TIF_MCCK_PENDING is set, call handler
681 #
682 io_mcck_pending:
683 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
684 j io_work_loop
686 #
687 # _TIF_NEED_RESCHED is set, call schedule
688 #
689 io_reschedule:
690 TRACE_IRQS_ON
691 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
692 brasl %r14,schedule # call scheduler
693 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
694 TRACE_IRQS_OFF
695 tm __TI_flags+7(%r9),_TIF_WORK_INT
696 jz io_restore # there is no work to do
697 j io_work_loop
699 #
700 # _TIF_SIGPENDING or is set, call do_signal
701 #
702 io_sigpending:
703 TRACE_IRQS_ON
704 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
705 la %r2,SP_PTREGS(%r15) # load pt_regs
706 brasl %r14,do_signal # call do_signal
707 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
708 TRACE_IRQS_OFF
709 j io_work_loop
711 #
712 # _TIF_NOTIFY_RESUME or is set, call do_notify_resume
713 #
714 io_notify_resume:
715 TRACE_IRQS_ON
716 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
717 la %r2,SP_PTREGS(%r15) # load pt_regs
718 brasl %r14,do_notify_resume # call do_notify_resume
719 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
720 TRACE_IRQS_OFF
721 j io_work_loop
723 /*
724 * External interrupt handler routine
725 */
726 .globl ext_int_handler
727 ext_int_handler:
728 stck __LC_INT_CLOCK
729 stpt __LC_ASYNC_ENTER_TIMER
730 SAVE_ALL_BASE __LC_SAVE_AREA+32
731 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
732 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
733 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
734 jz ext_no_vtime
735 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
736 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
737 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
738 ext_no_vtime:
739 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
740 TRACE_IRQS_OFF
741 la %r2,SP_PTREGS(%r15) # address of register-save area
742 llgh %r3,__LC_EXT_INT_CODE # get interruption code
743 brasl %r14,do_extint
744 j io_return
746 __critical_end:
748 /*
749 * Machine check handler routines
750 */
751 .globl mcck_int_handler
752 mcck_int_handler:
753 stck __LC_INT_CLOCK
754 la %r1,4095 # revalidate r1
755 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
756 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
757 SAVE_ALL_BASE __LC_SAVE_AREA+64
758 la %r12,__LC_MCK_OLD_PSW
759 tm __LC_MCCK_CODE,0x80 # system damage?
760 jo mcck_int_main # yes -> rest of mcck code invalid
761 la %r14,4095
762 mvc __LC_SAVE_AREA+104(8),__LC_ASYNC_ENTER_TIMER
763 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14)
764 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
765 jo 1f
766 la %r14,__LC_SYNC_ENTER_TIMER
767 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
768 jl 0f
769 la %r14,__LC_ASYNC_ENTER_TIMER
770 0: clc 0(8,%r14),__LC_EXIT_TIMER
771 jl 0f
772 la %r14,__LC_EXIT_TIMER
773 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
774 jl 0f
775 la %r14,__LC_LAST_UPDATE_TIMER
776 0: spt 0(%r14)
777 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
778 1: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
779 jno mcck_int_main # no -> skip cleanup critical
780 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
781 jnz mcck_int_main # from user -> load kernel stack
782 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end)
783 jhe mcck_int_main
784 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start)
785 jl mcck_int_main
786 brasl %r14,cleanup_critical
787 mcck_int_main:
788 lg %r14,__LC_PANIC_STACK # are we already on the panic stack?
789 slgr %r14,%r15
790 srag %r14,%r14,PAGE_SHIFT
791 jz 0f
792 lg %r15,__LC_PANIC_STACK # load panic stack
793 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64
794 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
795 jno mcck_no_vtime # no -> no timer update
796 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
797 jz mcck_no_vtime
798 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
799 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
800 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
801 mcck_no_vtime:
802 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
803 la %r2,SP_PTREGS(%r15) # load pt_regs
804 brasl %r14,s390_do_machine_check
805 tm SP_PSW+1(%r15),0x01 # returning to user ?
806 jno mcck_return
807 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
808 aghi %r1,-SP_SIZE
809 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
810 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
811 lgr %r15,%r1
812 stosm __SF_EMPTY(%r15),0x04 # turn dat on
813 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
814 jno mcck_return
815 TRACE_IRQS_OFF
816 brasl %r14,s390_handle_mcck
817 TRACE_IRQS_ON
818 mcck_return:
819 mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW
820 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
821 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15
822 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+104
823 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
824 jno 0f
825 stpt __LC_EXIT_TIMER
826 0: lpswe __LC_RETURN_MCCK_PSW # back to caller
828 /*
829 * Restart interruption handler, kick starter for additional CPUs
830 */
831 #ifdef CONFIG_SMP
832 __CPUINIT
833 .globl restart_int_handler
834 restart_int_handler:
835 basr %r1,0
836 restart_base:
837 spt restart_vtime-restart_base(%r1)
838 stck __LC_LAST_UPDATE_CLOCK
839 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
840 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
841 lg %r15,__LC_SAVE_AREA+120 # load ksp
842 lghi %r10,__LC_CREGS_SAVE_AREA
843 lctlg %c0,%c15,0(%r10) # get new ctl regs
844 lghi %r10,__LC_AREGS_SAVE_AREA
845 lam %a0,%a15,0(%r10)
846 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone
847 lg %r1,__LC_THREAD_INFO
848 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1)
849 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
850 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
851 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
852 jg start_secondary
853 .align 8
854 restart_vtime:
855 .long 0x7fffffff,0xffffffff
856 .previous
857 #else
858 /*
859 * If we do not run with SMP enabled, let the new CPU crash ...
860 */
861 .globl restart_int_handler
862 restart_int_handler:
863 basr %r1,0
864 restart_base:
865 lpswe restart_crash-restart_base(%r1)
866 .align 8
867 restart_crash:
868 .long 0x000a0000,0x00000000,0x00000000,0x00000000
869 restart_go:
870 #endif
872 #ifdef CONFIG_CHECK_STACK
873 /*
874 * The synchronous or the asynchronous stack overflowed. We are dead.
875 * No need to properly save the registers, we are going to panic anyway.
876 * Setup a pt_regs so that show_trace can provide a good call trace.
877 */
878 stack_overflow:
879 lg %r15,__LC_PANIC_STACK # change to panic stack
880 aghi %r15,-SP_SIZE
881 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
882 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
883 la %r1,__LC_SAVE_AREA
884 chi %r12,__LC_SVC_OLD_PSW
885 je 0f
886 chi %r12,__LC_PGM_OLD_PSW
887 je 0f
888 la %r1,__LC_SAVE_AREA+32
889 0: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack
890 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
891 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
892 la %r2,SP_PTREGS(%r15) # load pt_regs
893 jg kernel_stack_overflow
894 #endif
896 cleanup_table_system_call:
897 .quad system_call, sysc_do_svc
898 cleanup_table_sysc_return:
899 .quad sysc_return, sysc_leave
900 cleanup_table_sysc_leave:
901 .quad sysc_leave, sysc_done
902 cleanup_table_sysc_work_loop:
903 .quad sysc_work_loop, sysc_work_done
904 cleanup_table_io_return:
905 .quad io_return, io_leave
906 cleanup_table_io_leave:
907 .quad io_leave, io_done
908 cleanup_table_io_work_loop:
909 .quad io_work_loop, io_work_done
911 cleanup_critical:
912 clc 8(8,%r12),BASED(cleanup_table_system_call)
913 jl 0f
914 clc 8(8,%r12),BASED(cleanup_table_system_call+8)
915 jl cleanup_system_call
916 0:
917 clc 8(8,%r12),BASED(cleanup_table_sysc_return)
918 jl 0f
919 clc 8(8,%r12),BASED(cleanup_table_sysc_return+8)
920 jl cleanup_sysc_return
921 0:
922 clc 8(8,%r12),BASED(cleanup_table_sysc_leave)
923 jl 0f
924 clc 8(8,%r12),BASED(cleanup_table_sysc_leave+8)
925 jl cleanup_sysc_leave
926 0:
927 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop)
928 jl 0f
929 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8)
930 jl cleanup_sysc_return
931 0:
932 clc 8(8,%r12),BASED(cleanup_table_io_return)
933 jl 0f
934 clc 8(8,%r12),BASED(cleanup_table_io_return+8)
935 jl cleanup_io_return
936 0:
937 clc 8(8,%r12),BASED(cleanup_table_io_leave)
938 jl 0f
939 clc 8(8,%r12),BASED(cleanup_table_io_leave+8)
940 jl cleanup_io_leave
941 0:
942 clc 8(8,%r12),BASED(cleanup_table_io_work_loop)
943 jl 0f
944 clc 8(8,%r12),BASED(cleanup_table_io_work_loop+8)
945 jl cleanup_io_return
946 0:
947 br %r14
949 cleanup_system_call:
950 mvc __LC_RETURN_PSW(16),0(%r12)
951 cghi %r12,__LC_MCK_OLD_PSW
952 je 0f
953 la %r12,__LC_SAVE_AREA+32
954 j 1f
955 0: la %r12,__LC_SAVE_AREA+64
956 1:
957 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
958 jh 0f
959 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
960 0: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
961 jhe cleanup_vtime
962 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
963 jh 0f
964 mvc __LC_SAVE_AREA(32),0(%r12)
965 0: stg %r13,8(%r12)
966 stg %r12,__LC_SAVE_AREA+96 # argh
967 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
968 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
969 lg %r12,__LC_SAVE_AREA+96 # argh
970 stg %r15,24(%r12)
971 llgh %r7,__LC_SVC_INT_CODE
972 cleanup_vtime:
973 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
974 jhe cleanup_stime
975 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
976 cleanup_stime:
977 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32)
978 jh cleanup_update
979 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
980 cleanup_update:
981 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
982 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
983 la %r12,__LC_RETURN_PSW
984 br %r14
985 cleanup_system_call_insn:
986 .quad sysc_saveall
987 .quad system_call
988 .quad sysc_vtime
989 .quad sysc_stime
990 .quad sysc_update
992 cleanup_sysc_return:
993 mvc __LC_RETURN_PSW(8),0(%r12)
994 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_return)
995 la %r12,__LC_RETURN_PSW
996 br %r14
998 cleanup_sysc_leave:
999 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn)
1000 je 3f
1001 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8)
1002 jhe 0f
1003 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1004 0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
1005 cghi %r12,__LC_MCK_OLD_PSW
1006 jne 1f
1007 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
1008 j 2f
1009 1: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
1010 2: lmg %r0,%r11,SP_R0(%r15)
1011 lg %r15,SP_R15(%r15)
1012 3: la %r12,__LC_RETURN_PSW
1013 br %r14
1014 cleanup_sysc_leave_insn:
1015 .quad sysc_done - 4
1016 .quad sysc_done - 16
1018 cleanup_io_return:
1019 mvc __LC_RETURN_PSW(8),0(%r12)
1020 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_work_loop)
1021 la %r12,__LC_RETURN_PSW
1022 br %r14
1024 cleanup_io_leave:
1025 clc 8(8,%r12),BASED(cleanup_io_leave_insn)
1026 je 3f
1027 clc 8(8,%r12),BASED(cleanup_io_leave_insn+8)
1028 jhe 0f
1029 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1030 0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
1031 cghi %r12,__LC_MCK_OLD_PSW
1032 jne 1f
1033 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
1034 j 2f
1035 1: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
1036 2: lmg %r0,%r11,SP_R0(%r15)
1037 lg %r15,SP_R15(%r15)
1038 3: la %r12,__LC_RETURN_PSW
1039 br %r14
1040 cleanup_io_leave_insn:
1041 .quad io_done - 4
1042 .quad io_done - 16
1044 /*
1045 * Integer constants
1046 */
1047 .align 4
1048 .Lconst:
1049 .Lnr_syscalls: .long NR_syscalls
1050 .L0x0130: .short 0x130
1051 .L0x0140: .short 0x140
1052 .L0x0150: .short 0x150
1053 .L0x0160: .short 0x160
1054 .L0x0170: .short 0x170
1055 .Lcritical_start:
1056 .quad __critical_start
1057 .Lcritical_end:
1058 .quad __critical_end
1060 .section .rodata, "a"
1061 #define SYSCALL(esa,esame,emu) .long esame
1062 sys_call_table:
1063 #include "syscalls.S"
1064 #undef SYSCALL
1066 #ifdef CONFIG_COMPAT
1068 #define SYSCALL(esa,esame,emu) .long emu
1069 sys_call_table_emu:
1070 #include "syscalls.S"
1071 #undef SYSCALL
1072 #endif