ACPI: cap off P-state transition latency from buggy BIOSes
[linux-2.6/mini2440.git] / drivers / mfd / pcf50633-gpio.c
blob2fa2eca5c9cc099f7ad9b41d77553a21b6b0ae08
1 /* NXP PCF50633 GPIO Driver
3 * (C) 2006-2008 by Openmoko, Inc.
4 * Author: Balaji Rao <balajirrao@openmoko.org>
5 * All rights reserved.
7 * Broken down from monstrous PCF50633 driver mainly by
8 * Harald Welte, Andy Green and Werner Almesberger
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
17 #include <linux/kernel.h>
19 #include <linux/mfd/pcf50633/core.h>
20 #include <linux/mfd/pcf50633/gpio.h>
22 enum pcf50633_regulator_id {
23 PCF50633_REGULATOR_AUTO,
24 PCF50633_REGULATOR_DOWN1,
25 PCF50633_REGULATOR_DOWN2,
26 PCF50633_REGULATOR_LDO1,
27 PCF50633_REGULATOR_LDO2,
28 PCF50633_REGULATOR_LDO3,
29 PCF50633_REGULATOR_LDO4,
30 PCF50633_REGULATOR_LDO5,
31 PCF50633_REGULATOR_LDO6,
32 PCF50633_REGULATOR_HCLDO,
33 PCF50633_REGULATOR_MEMLDO,
36 #define PCF50633_REG_AUTOOUT 0x1a
37 #define PCF50633_REG_DOWN1OUT 0x1e
38 #define PCF50633_REG_DOWN2OUT 0x22
39 #define PCF50633_REG_MEMLDOOUT 0x26
40 #define PCF50633_REG_LDO1OUT 0x2d
41 #define PCF50633_REG_LDO2OUT 0x2f
42 #define PCF50633_REG_LDO3OUT 0x31
43 #define PCF50633_REG_LDO4OUT 0x33
44 #define PCF50633_REG_LDO5OUT 0x35
45 #define PCF50633_REG_LDO6OUT 0x37
46 #define PCF50633_REG_HCLDOOUT 0x39
48 static const u8 pcf50633_regulator_registers[PCF50633_NUM_REGULATORS] = {
49 [PCF50633_REGULATOR_AUTO] = PCF50633_REG_AUTOOUT,
50 [PCF50633_REGULATOR_DOWN1] = PCF50633_REG_DOWN1OUT,
51 [PCF50633_REGULATOR_DOWN2] = PCF50633_REG_DOWN2OUT,
52 [PCF50633_REGULATOR_MEMLDO] = PCF50633_REG_MEMLDOOUT,
53 [PCF50633_REGULATOR_LDO1] = PCF50633_REG_LDO1OUT,
54 [PCF50633_REGULATOR_LDO2] = PCF50633_REG_LDO2OUT,
55 [PCF50633_REGULATOR_LDO3] = PCF50633_REG_LDO3OUT,
56 [PCF50633_REGULATOR_LDO4] = PCF50633_REG_LDO4OUT,
57 [PCF50633_REGULATOR_LDO5] = PCF50633_REG_LDO5OUT,
58 [PCF50633_REGULATOR_LDO6] = PCF50633_REG_LDO6OUT,
59 [PCF50633_REGULATOR_HCLDO] = PCF50633_REG_HCLDOOUT,
62 int pcf50633_gpio_set(struct pcf50633 *pcf, int gpio, u8 val)
64 u8 reg;
66 reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
68 return pcf50633_reg_set_bit_mask(pcf, reg, 0x07, val);
70 EXPORT_SYMBOL_GPL(pcf50633_gpio_set);
72 u8 pcf50633_gpio_get(struct pcf50633 *pcf, int gpio)
74 u8 reg, val;
76 reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
77 val = pcf50633_reg_read(pcf, reg) & 0x07;
79 return val;
81 EXPORT_SYMBOL_GPL(pcf50633_gpio_get);
83 int pcf50633_gpio_invert_set(struct pcf50633 *pcf, int gpio, int invert)
85 u8 val, reg;
87 reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
88 val = !!invert << 3;
90 return pcf50633_reg_set_bit_mask(pcf, reg, 1 << 3, val);
92 EXPORT_SYMBOL_GPL(pcf50633_gpio_invert_set);
94 int pcf50633_gpio_invert_get(struct pcf50633 *pcf, int gpio)
96 u8 reg, val;
98 reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
99 val = pcf50633_reg_read(pcf, reg);
101 return val & (1 << 3);
103 EXPORT_SYMBOL_GPL(pcf50633_gpio_invert_get);
105 int pcf50633_gpio_power_supply_set(struct pcf50633 *pcf,
106 int gpio, int regulator, int on)
108 u8 reg, val, mask;
110 /* the *ENA register is always one after the *OUT register */
111 reg = pcf50633_regulator_registers[regulator] + 1;
113 val = !!on << (gpio - PCF50633_GPIO1);
114 mask = 1 << (gpio - PCF50633_GPIO1);
116 return pcf50633_reg_set_bit_mask(pcf, reg, mask, val);
118 EXPORT_SYMBOL_GPL(pcf50633_gpio_power_supply_set);