1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2008 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
36 #include <linux/tcp.h>
37 #include <linux/ipv6.h>
38 #include <net/checksum.h>
39 #include <net/ip6_checksum.h>
40 #include <linux/ethtool.h>
41 #include <linux/if_vlan.h>
44 #include "ixgbe_common.h"
46 char ixgbe_driver_name
[] = "ixgbe";
47 static const char ixgbe_driver_string
[] =
48 "Intel(R) 10 Gigabit PCI Express Network Driver";
50 #define DRV_VERSION "1.3.30-k2"
51 const char ixgbe_driver_version
[] = DRV_VERSION
;
52 static char ixgbe_copyright
[] = "Copyright (c) 1999-2007 Intel Corporation.";
54 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
55 [board_82598
] = &ixgbe_82598_info
,
58 /* ixgbe_pci_tbl - PCI Device ID Table
60 * Wildcard entries (PCI_ANY_ID) should come last
61 * Last entry must be all 0s
63 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
64 * Class, Class Mask, private data (not used) }
66 static struct pci_device_id ixgbe_pci_tbl
[] = {
67 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
),
69 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
),
71 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT
),
73 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
),
75 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
),
77 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_DA_DUAL_PORT
),
79 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM
),
81 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_XF_LR
),
83 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_SFP_LOM
),
86 /* required last entry */
89 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
91 #ifdef CONFIG_IXGBE_DCA
92 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
94 static struct notifier_block dca_notifier
= {
95 .notifier_call
= ixgbe_notify_dca
,
101 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
102 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
103 MODULE_LICENSE("GPL");
104 MODULE_VERSION(DRV_VERSION
);
106 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
108 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
112 /* Let firmware take over control of h/w */
113 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
114 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
115 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
118 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
122 /* Let firmware know the driver has taken over */
123 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
124 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
125 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
128 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, u16 int_alloc_entry
,
133 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
134 index
= (int_alloc_entry
>> 2) & 0x1F;
135 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR(index
));
136 ivar
&= ~(0xFF << (8 * (int_alloc_entry
& 0x3)));
137 ivar
|= (msix_vector
<< (8 * (int_alloc_entry
& 0x3)));
138 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR(index
), ivar
);
141 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter
*adapter
,
142 struct ixgbe_tx_buffer
145 if (tx_buffer_info
->dma
) {
146 pci_unmap_page(adapter
->pdev
, tx_buffer_info
->dma
,
147 tx_buffer_info
->length
, PCI_DMA_TODEVICE
);
148 tx_buffer_info
->dma
= 0;
150 if (tx_buffer_info
->skb
) {
151 dev_kfree_skb_any(tx_buffer_info
->skb
);
152 tx_buffer_info
->skb
= NULL
;
154 /* tx_buffer_info must be completely set up in the transmit path */
157 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter
*adapter
,
158 struct ixgbe_ring
*tx_ring
,
161 struct ixgbe_hw
*hw
= &adapter
->hw
;
164 /* Detect a transmit hang in hardware, this serializes the
165 * check with the clearing of time_stamp and movement of eop */
166 head
= IXGBE_READ_REG(hw
, tx_ring
->head
);
167 tail
= IXGBE_READ_REG(hw
, tx_ring
->tail
);
168 adapter
->detect_tx_hung
= false;
169 if ((head
!= tail
) &&
170 tx_ring
->tx_buffer_info
[eop
].time_stamp
&&
171 time_after(jiffies
, tx_ring
->tx_buffer_info
[eop
].time_stamp
+ HZ
) &&
172 !(IXGBE_READ_REG(&adapter
->hw
, IXGBE_TFCS
) & IXGBE_TFCS_TXOFF
)) {
173 /* detected Tx unit hang */
174 union ixgbe_adv_tx_desc
*tx_desc
;
175 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, eop
);
176 DPRINTK(DRV
, ERR
, "Detected Tx Unit Hang\n"
178 " TDH, TDT <%x>, <%x>\n"
179 " next_to_use <%x>\n"
180 " next_to_clean <%x>\n"
181 "tx_buffer_info[next_to_clean]\n"
182 " time_stamp <%lx>\n"
184 tx_ring
->queue_index
,
186 tx_ring
->next_to_use
, eop
,
187 tx_ring
->tx_buffer_info
[eop
].time_stamp
, jiffies
);
194 #define IXGBE_MAX_TXD_PWR 14
195 #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
197 /* Tx Descriptors needed, worst case */
198 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
199 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
200 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
201 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
203 #define GET_TX_HEAD_FROM_RING(ring) (\
205 ((union ixgbe_adv_tx_desc *)(ring)->desc + (ring)->count))
206 static void ixgbe_tx_timeout(struct net_device
*netdev
);
209 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
210 * @adapter: board private structure
211 * @tx_ring: tx ring to clean
213 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter
*adapter
,
214 struct ixgbe_ring
*tx_ring
)
216 union ixgbe_adv_tx_desc
*tx_desc
;
217 struct ixgbe_tx_buffer
*tx_buffer_info
;
218 struct net_device
*netdev
= adapter
->netdev
;
222 unsigned int count
= 0;
223 unsigned int total_bytes
= 0, total_packets
= 0;
226 head
= GET_TX_HEAD_FROM_RING(tx_ring
);
227 head
= le32_to_cpu(head
);
228 i
= tx_ring
->next_to_clean
;
231 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, i
);
232 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
233 skb
= tx_buffer_info
->skb
;
236 unsigned int segs
, bytecount
;
238 /* gso_segs is currently only valid for tcp */
239 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
240 /* multiply data chunks by size of headers */
241 bytecount
= ((segs
- 1) * skb_headlen(skb
)) +
243 total_packets
+= segs
;
244 total_bytes
+= bytecount
;
247 ixgbe_unmap_and_free_tx_resource(adapter
,
251 if (i
== tx_ring
->count
)
255 if (count
== tx_ring
->count
)
260 head
= GET_TX_HEAD_FROM_RING(tx_ring
);
261 head
= le32_to_cpu(head
);
267 tx_ring
->next_to_clean
= i
;
269 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
270 if (unlikely(count
&& netif_carrier_ok(netdev
) &&
271 (IXGBE_DESC_UNUSED(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
272 /* Make sure that anybody stopping the queue after this
273 * sees the new next_to_clean.
276 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
277 !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
278 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
279 ++adapter
->restart_queue
;
283 if (adapter
->detect_tx_hung
) {
284 if (ixgbe_check_tx_hang(adapter
, tx_ring
, i
)) {
285 /* schedule immediate reset if we believe we hung */
287 "tx hang %d detected, resetting adapter\n",
288 adapter
->tx_timeout_count
+ 1);
289 ixgbe_tx_timeout(adapter
->netdev
);
293 /* re-arm the interrupt */
294 if ((total_packets
>= tx_ring
->work_limit
) ||
295 (count
== tx_ring
->count
))
296 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, tx_ring
->v_idx
);
298 tx_ring
->total_bytes
+= total_bytes
;
299 tx_ring
->total_packets
+= total_packets
;
300 tx_ring
->stats
.bytes
+= total_bytes
;
301 tx_ring
->stats
.packets
+= total_packets
;
302 adapter
->net_stats
.tx_bytes
+= total_bytes
;
303 adapter
->net_stats
.tx_packets
+= total_packets
;
304 return (total_packets
? true : false);
307 #ifdef CONFIG_IXGBE_DCA
308 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
309 struct ixgbe_ring
*rx_ring
)
313 int q
= rx_ring
- adapter
->rx_ring
;
315 if (rx_ring
->cpu
!= cpu
) {
316 rxctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
));
317 rxctrl
&= ~IXGBE_DCA_RXCTRL_CPUID_MASK
;
318 rxctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
319 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
320 rxctrl
|= IXGBE_DCA_RXCTRL_HEAD_DCA_EN
;
321 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
), rxctrl
);
327 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
328 struct ixgbe_ring
*tx_ring
)
332 int q
= tx_ring
- adapter
->tx_ring
;
334 if (tx_ring
->cpu
!= cpu
) {
335 txctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_DCA_TXCTRL(q
));
336 txctrl
&= ~IXGBE_DCA_TXCTRL_CPUID_MASK
;
337 txctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
338 txctrl
|= IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
339 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_TXCTRL(q
), txctrl
);
345 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
349 if (!(adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
))
352 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
353 adapter
->tx_ring
[i
].cpu
= -1;
354 ixgbe_update_tx_dca(adapter
, &adapter
->tx_ring
[i
]);
356 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
357 adapter
->rx_ring
[i
].cpu
= -1;
358 ixgbe_update_rx_dca(adapter
, &adapter
->rx_ring
[i
]);
362 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
364 struct net_device
*netdev
= dev_get_drvdata(dev
);
365 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
366 unsigned long event
= *(unsigned long *)data
;
369 case DCA_PROVIDER_ADD
:
370 /* if we're already enabled, don't do it again */
371 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
373 /* Always use CB2 mode, difference is masked
374 * in the CB driver. */
375 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 2);
376 if (dca_add_requester(dev
) == 0) {
377 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
378 ixgbe_setup_dca(adapter
);
381 /* Fall Through since DCA is disabled. */
382 case DCA_PROVIDER_REMOVE
:
383 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
384 dca_remove_requester(dev
);
385 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
386 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
394 #endif /* CONFIG_IXGBE_DCA */
396 * ixgbe_receive_skb - Send a completed packet up the stack
397 * @adapter: board private structure
398 * @skb: packet to send up
399 * @status: hardware indication of status of receive
400 * @rx_ring: rx descriptor ring (for a specific queue) to setup
401 * @rx_desc: rx descriptor
403 static void ixgbe_receive_skb(struct ixgbe_adapter
*adapter
,
404 struct sk_buff
*skb
, u8 status
,
405 struct ixgbe_ring
*ring
,
406 union ixgbe_adv_rx_desc
*rx_desc
)
408 bool is_vlan
= (status
& IXGBE_RXD_STAT_VP
);
409 u16 tag
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
411 if (adapter
->netdev
->features
& NETIF_F_LRO
&&
412 skb
->ip_summed
== CHECKSUM_UNNECESSARY
) {
413 if (adapter
->vlgrp
&& is_vlan
&& (tag
!= 0))
414 lro_vlan_hwaccel_receive_skb(&ring
->lro_mgr
, skb
,
418 lro_receive_skb(&ring
->lro_mgr
, skb
, rx_desc
);
419 ring
->lro_used
= true;
421 if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
)) {
422 if (adapter
->vlgrp
&& is_vlan
&& (tag
!= 0))
423 vlan_hwaccel_receive_skb(skb
, adapter
->vlgrp
, tag
);
425 netif_receive_skb(skb
);
427 if (adapter
->vlgrp
&& is_vlan
&& (tag
!= 0))
428 vlan_hwaccel_rx(skb
, adapter
->vlgrp
, tag
);
436 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
437 * @adapter: address of board private structure
438 * @status_err: hardware indication of status of receive
439 * @skb: skb currently being received and modified
441 static inline void ixgbe_rx_checksum(struct ixgbe_adapter
*adapter
,
442 u32 status_err
, struct sk_buff
*skb
)
444 skb
->ip_summed
= CHECKSUM_NONE
;
446 /* Rx csum disabled */
447 if (!(adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
))
450 /* if IP and error */
451 if ((status_err
& IXGBE_RXD_STAT_IPCS
) &&
452 (status_err
& IXGBE_RXDADV_ERR_IPE
)) {
453 adapter
->hw_csum_rx_error
++;
457 if (!(status_err
& IXGBE_RXD_STAT_L4CS
))
460 if (status_err
& IXGBE_RXDADV_ERR_TCPE
) {
461 adapter
->hw_csum_rx_error
++;
465 /* It must be a TCP or UDP packet with a valid checksum */
466 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
467 adapter
->hw_csum_rx_good
++;
471 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
472 * @adapter: address of board private structure
474 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter
*adapter
,
475 struct ixgbe_ring
*rx_ring
,
478 struct pci_dev
*pdev
= adapter
->pdev
;
479 union ixgbe_adv_rx_desc
*rx_desc
;
480 struct ixgbe_rx_buffer
*bi
;
482 unsigned int bufsz
= rx_ring
->rx_buf_len
+ NET_IP_ALIGN
;
484 i
= rx_ring
->next_to_use
;
485 bi
= &rx_ring
->rx_buffer_info
[i
];
487 while (cleaned_count
--) {
488 rx_desc
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
491 (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
)) {
493 bi
->page
= alloc_page(GFP_ATOMIC
);
495 adapter
->alloc_rx_page_failed
++;
500 /* use a half page if we're re-using */
501 bi
->page_offset
^= (PAGE_SIZE
/ 2);
504 bi
->page_dma
= pci_map_page(pdev
, bi
->page
,
511 struct sk_buff
*skb
= netdev_alloc_skb(adapter
->netdev
,
515 adapter
->alloc_rx_buff_failed
++;
520 * Make buffer alignment 2 beyond a 16 byte boundary
521 * this will result in a 16 byte aligned IP header after
522 * the 14 byte MAC header is removed
524 skb_reserve(skb
, NET_IP_ALIGN
);
527 bi
->dma
= pci_map_single(pdev
, skb
->data
, bufsz
,
530 /* Refresh the desc even if buffer_addrs didn't change because
531 * each write-back erases this info. */
532 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
533 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->page_dma
);
534 rx_desc
->read
.hdr_addr
= cpu_to_le64(bi
->dma
);
536 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
);
540 if (i
== rx_ring
->count
)
542 bi
= &rx_ring
->rx_buffer_info
[i
];
546 if (rx_ring
->next_to_use
!= i
) {
547 rx_ring
->next_to_use
= i
;
549 i
= (rx_ring
->count
- 1);
552 * Force memory writes to complete before letting h/w
553 * know there are new descriptors to fetch. (Only
554 * applicable for weak-ordered memory model archs,
558 writel(i
, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
562 static inline u16
ixgbe_get_hdr_info(union ixgbe_adv_rx_desc
*rx_desc
)
564 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.hdr_info
;
567 static inline u16
ixgbe_get_pkt_info(union ixgbe_adv_rx_desc
*rx_desc
)
569 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
572 static bool ixgbe_clean_rx_irq(struct ixgbe_adapter
*adapter
,
573 struct ixgbe_ring
*rx_ring
,
574 int *work_done
, int work_to_do
)
576 struct pci_dev
*pdev
= adapter
->pdev
;
577 union ixgbe_adv_rx_desc
*rx_desc
, *next_rxd
;
578 struct ixgbe_rx_buffer
*rx_buffer_info
, *next_buffer
;
583 bool cleaned
= false;
584 int cleaned_count
= 0;
585 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
587 i
= rx_ring
->next_to_clean
;
588 rx_desc
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
589 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
590 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
592 while (staterr
& IXGBE_RXD_STAT_DD
) {
594 if (*work_done
>= work_to_do
)
598 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
599 hdr_info
= le16_to_cpu(ixgbe_get_hdr_info(rx_desc
));
600 len
= (hdr_info
& IXGBE_RXDADV_HDRBUFLEN_MASK
) >>
601 IXGBE_RXDADV_HDRBUFLEN_SHIFT
;
602 if (hdr_info
& IXGBE_RXDADV_SPH
)
603 adapter
->rx_hdr_split
++;
604 if (len
> IXGBE_RX_HDR_SIZE
)
605 len
= IXGBE_RX_HDR_SIZE
;
606 upper_len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
608 len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
612 skb
= rx_buffer_info
->skb
;
613 prefetch(skb
->data
- NET_IP_ALIGN
);
614 rx_buffer_info
->skb
= NULL
;
616 if (len
&& !skb_shinfo(skb
)->nr_frags
) {
617 pci_unmap_single(pdev
, rx_buffer_info
->dma
,
618 rx_ring
->rx_buf_len
+ NET_IP_ALIGN
,
624 pci_unmap_page(pdev
, rx_buffer_info
->page_dma
,
625 PAGE_SIZE
/ 2, PCI_DMA_FROMDEVICE
);
626 rx_buffer_info
->page_dma
= 0;
627 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
,
628 rx_buffer_info
->page
,
629 rx_buffer_info
->page_offset
,
632 if ((rx_ring
->rx_buf_len
> (PAGE_SIZE
/ 2)) ||
633 (page_count(rx_buffer_info
->page
) != 1))
634 rx_buffer_info
->page
= NULL
;
636 get_page(rx_buffer_info
->page
);
638 skb
->len
+= upper_len
;
639 skb
->data_len
+= upper_len
;
640 skb
->truesize
+= upper_len
;
644 if (i
== rx_ring
->count
)
646 next_buffer
= &rx_ring
->rx_buffer_info
[i
];
648 next_rxd
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
652 if (staterr
& IXGBE_RXD_STAT_EOP
) {
653 rx_ring
->stats
.packets
++;
654 rx_ring
->stats
.bytes
+= skb
->len
;
656 rx_buffer_info
->skb
= next_buffer
->skb
;
657 rx_buffer_info
->dma
= next_buffer
->dma
;
658 next_buffer
->skb
= skb
;
659 next_buffer
->dma
= 0;
660 adapter
->non_eop_descs
++;
664 if (staterr
& IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) {
665 dev_kfree_skb_irq(skb
);
669 ixgbe_rx_checksum(adapter
, staterr
, skb
);
671 /* probably a little skewed due to removing CRC */
672 total_rx_bytes
+= skb
->len
;
675 skb
->protocol
= eth_type_trans(skb
, adapter
->netdev
);
676 ixgbe_receive_skb(adapter
, skb
, staterr
, rx_ring
, rx_desc
);
679 rx_desc
->wb
.upper
.status_error
= 0;
681 /* return some buffers to hardware, one at a time is too slow */
682 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
683 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
687 /* use prefetched values */
689 rx_buffer_info
= next_buffer
;
691 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
694 if (rx_ring
->lro_used
) {
695 lro_flush_all(&rx_ring
->lro_mgr
);
696 rx_ring
->lro_used
= false;
699 rx_ring
->next_to_clean
= i
;
700 cleaned_count
= IXGBE_DESC_UNUSED(rx_ring
);
703 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
705 rx_ring
->total_packets
+= total_rx_packets
;
706 rx_ring
->total_bytes
+= total_rx_bytes
;
707 adapter
->net_stats
.rx_bytes
+= total_rx_bytes
;
708 adapter
->net_stats
.rx_packets
+= total_rx_packets
;
713 static int ixgbe_clean_rxonly(struct napi_struct
*, int);
715 * ixgbe_configure_msix - Configure MSI-X hardware
716 * @adapter: board private structure
718 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
721 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
723 struct ixgbe_q_vector
*q_vector
;
724 int i
, j
, q_vectors
, v_idx
, r_idx
;
727 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
729 /* Populate the IVAR table and set the ITR values to the
730 * corresponding register.
732 for (v_idx
= 0; v_idx
< q_vectors
; v_idx
++) {
733 q_vector
= &adapter
->q_vector
[v_idx
];
734 /* XXX for_each_bit(...) */
735 r_idx
= find_first_bit(q_vector
->rxr_idx
,
736 adapter
->num_rx_queues
);
738 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
739 j
= adapter
->rx_ring
[r_idx
].reg_idx
;
740 ixgbe_set_ivar(adapter
, IXGBE_IVAR_RX_QUEUE(j
), v_idx
);
741 r_idx
= find_next_bit(q_vector
->rxr_idx
,
742 adapter
->num_rx_queues
,
745 r_idx
= find_first_bit(q_vector
->txr_idx
,
746 adapter
->num_tx_queues
);
748 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
749 j
= adapter
->tx_ring
[r_idx
].reg_idx
;
750 ixgbe_set_ivar(adapter
, IXGBE_IVAR_TX_QUEUE(j
), v_idx
);
751 r_idx
= find_next_bit(q_vector
->txr_idx
,
752 adapter
->num_tx_queues
,
756 /* if this is a tx only vector halve the interrupt rate */
757 if (q_vector
->txr_count
&& !q_vector
->rxr_count
)
758 q_vector
->eitr
= (adapter
->eitr_param
>> 1);
761 q_vector
->eitr
= adapter
->eitr_param
;
763 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
),
764 EITR_INTS_PER_SEC_TO_REG(q_vector
->eitr
));
767 ixgbe_set_ivar(adapter
, IXGBE_IVAR_OTHER_CAUSES_INDEX
, v_idx
);
768 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
770 /* set up to autoclear timer, and the vectors */
771 mask
= IXGBE_EIMS_ENABLE_MASK
;
772 mask
&= ~(IXGBE_EIMS_OTHER
| IXGBE_EIMS_LSC
);
773 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
780 latency_invalid
= 255
784 * ixgbe_update_itr - update the dynamic ITR value based on statistics
785 * @adapter: pointer to adapter
786 * @eitr: eitr setting (ints per sec) to give last timeslice
787 * @itr_setting: current throttle rate in ints/second
788 * @packets: the number of packets during this measurement interval
789 * @bytes: the number of bytes during this measurement interval
791 * Stores a new ITR value based on packets and byte
792 * counts during the last interrupt. The advantage of per interrupt
793 * computation is faster updates and more accurate ITR for the current
794 * traffic pattern. Constants in this function were computed
795 * based on theoretical maximum wire speed and thresholds were set based
796 * on testing data as well as attempting to minimize response time
797 * while increasing bulk throughput.
798 * this functionality is controlled by the InterruptThrottleRate module
799 * parameter (see ixgbe_param.c)
801 static u8
ixgbe_update_itr(struct ixgbe_adapter
*adapter
,
802 u32 eitr
, u8 itr_setting
,
803 int packets
, int bytes
)
805 unsigned int retval
= itr_setting
;
810 goto update_itr_done
;
813 /* simple throttlerate management
814 * 0-20MB/s lowest (100000 ints/s)
815 * 20-100MB/s low (20000 ints/s)
816 * 100-1249MB/s bulk (8000 ints/s)
818 /* what was last interrupt timeslice? */
819 timepassed_us
= 1000000/eitr
;
820 bytes_perint
= bytes
/ timepassed_us
; /* bytes/usec */
822 switch (itr_setting
) {
824 if (bytes_perint
> adapter
->eitr_low
)
825 retval
= low_latency
;
828 if (bytes_perint
> adapter
->eitr_high
)
829 retval
= bulk_latency
;
830 else if (bytes_perint
<= adapter
->eitr_low
)
831 retval
= lowest_latency
;
834 if (bytes_perint
<= adapter
->eitr_high
)
835 retval
= low_latency
;
843 static void ixgbe_set_itr_msix(struct ixgbe_q_vector
*q_vector
)
845 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
846 struct ixgbe_hw
*hw
= &adapter
->hw
;
848 u8 current_itr
, ret_itr
;
849 int i
, r_idx
, v_idx
= ((void *)q_vector
- (void *)(adapter
->q_vector
)) /
850 sizeof(struct ixgbe_q_vector
);
851 struct ixgbe_ring
*rx_ring
, *tx_ring
;
853 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
854 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
855 tx_ring
= &(adapter
->tx_ring
[r_idx
]);
856 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
858 tx_ring
->total_packets
,
859 tx_ring
->total_bytes
);
860 /* if the result for this queue would decrease interrupt
861 * rate for this vector then use that result */
862 q_vector
->tx_itr
= ((q_vector
->tx_itr
> ret_itr
) ?
863 q_vector
->tx_itr
- 1 : ret_itr
);
864 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
868 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
869 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
870 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
871 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
873 rx_ring
->total_packets
,
874 rx_ring
->total_bytes
);
875 /* if the result for this queue would decrease interrupt
876 * rate for this vector then use that result */
877 q_vector
->rx_itr
= ((q_vector
->rx_itr
> ret_itr
) ?
878 q_vector
->rx_itr
- 1 : ret_itr
);
879 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
883 current_itr
= max(q_vector
->rx_itr
, q_vector
->tx_itr
);
885 switch (current_itr
) {
886 /* counts and packets in update_itr are dependent on these numbers */
891 new_itr
= 20000; /* aka hwitr = ~200 */
899 if (new_itr
!= q_vector
->eitr
) {
901 /* do an exponential smoothing */
902 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
903 q_vector
->eitr
= new_itr
;
904 itr_reg
= EITR_INTS_PER_SEC_TO_REG(new_itr
);
905 /* must write high and low 16 bits to reset counter */
906 DPRINTK(TX_ERR
, DEBUG
, "writing eitr(%d): %08X\n", v_idx
,
908 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
| (itr_reg
)<<16);
914 static void ixgbe_check_fan_failure(struct ixgbe_adapter
*adapter
, u32 eicr
)
916 struct ixgbe_hw
*hw
= &adapter
->hw
;
918 if ((adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) &&
919 (eicr
& IXGBE_EICR_GPI_SDP1
)) {
920 DPRINTK(PROBE
, CRIT
, "Fan has stopped, replace the adapter\n");
921 /* write to clear the interrupt */
922 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
926 static void ixgbe_check_lsc(struct ixgbe_adapter
*adapter
)
928 struct ixgbe_hw
*hw
= &adapter
->hw
;
931 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
932 adapter
->link_check_timeout
= jiffies
;
933 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
934 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_LSC
);
935 schedule_work(&adapter
->watchdog_task
);
939 static irqreturn_t
ixgbe_msix_lsc(int irq
, void *data
)
941 struct net_device
*netdev
= data
;
942 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
943 struct ixgbe_hw
*hw
= &adapter
->hw
;
944 u32 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
946 if (eicr
& IXGBE_EICR_LSC
)
947 ixgbe_check_lsc(adapter
);
949 ixgbe_check_fan_failure(adapter
, eicr
);
951 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
952 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_OTHER
);
957 static irqreturn_t
ixgbe_msix_clean_tx(int irq
, void *data
)
959 struct ixgbe_q_vector
*q_vector
= data
;
960 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
961 struct ixgbe_ring
*tx_ring
;
964 if (!q_vector
->txr_count
)
967 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
968 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
969 tx_ring
= &(adapter
->tx_ring
[r_idx
]);
970 #ifdef CONFIG_IXGBE_DCA
971 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
972 ixgbe_update_tx_dca(adapter
, tx_ring
);
974 tx_ring
->total_bytes
= 0;
975 tx_ring
->total_packets
= 0;
976 ixgbe_clean_tx_irq(adapter
, tx_ring
);
977 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
985 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
987 * @data: pointer to our q_vector struct for this interrupt vector
989 static irqreturn_t
ixgbe_msix_clean_rx(int irq
, void *data
)
991 struct ixgbe_q_vector
*q_vector
= data
;
992 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
993 struct ixgbe_ring
*rx_ring
;
997 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
998 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
999 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1000 rx_ring
->total_bytes
= 0;
1001 rx_ring
->total_packets
= 0;
1002 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1006 if (!q_vector
->rxr_count
)
1009 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1010 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1011 /* disable interrupts on this vector only */
1012 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, rx_ring
->v_idx
);
1013 netif_rx_schedule(adapter
->netdev
, &q_vector
->napi
);
1018 static irqreturn_t
ixgbe_msix_clean_many(int irq
, void *data
)
1020 ixgbe_msix_clean_rx(irq
, data
);
1021 ixgbe_msix_clean_tx(irq
, data
);
1027 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1028 * @napi: napi struct with our devices info in it
1029 * @budget: amount of work driver is allowed to do this pass, in packets
1031 * This function is optimized for cleaning one queue only on a single
1034 static int ixgbe_clean_rxonly(struct napi_struct
*napi
, int budget
)
1036 struct ixgbe_q_vector
*q_vector
=
1037 container_of(napi
, struct ixgbe_q_vector
, napi
);
1038 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1039 struct ixgbe_ring
*rx_ring
= NULL
;
1043 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1044 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1045 #ifdef CONFIG_IXGBE_DCA
1046 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1047 ixgbe_update_rx_dca(adapter
, rx_ring
);
1050 ixgbe_clean_rx_irq(adapter
, rx_ring
, &work_done
, budget
);
1052 /* If all Rx work done, exit the polling mode */
1053 if (work_done
< budget
) {
1054 netif_rx_complete(adapter
->netdev
, napi
);
1055 if (adapter
->itr_setting
& 3)
1056 ixgbe_set_itr_msix(q_vector
);
1057 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1058 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, rx_ring
->v_idx
);
1065 * ixgbe_clean_rxonly_many - msix (aka one shot) rx clean routine
1066 * @napi: napi struct with our devices info in it
1067 * @budget: amount of work driver is allowed to do this pass, in packets
1069 * This function will clean more than one rx queue associated with a
1072 static int ixgbe_clean_rxonly_many(struct napi_struct
*napi
, int budget
)
1074 struct ixgbe_q_vector
*q_vector
=
1075 container_of(napi
, struct ixgbe_q_vector
, napi
);
1076 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1077 struct ixgbe_ring
*rx_ring
= NULL
;
1078 int work_done
= 0, i
;
1080 u16 enable_mask
= 0;
1082 /* attempt to distribute budget to each queue fairly, but don't allow
1083 * the budget to go below 1 because we'll exit polling */
1084 budget
/= (q_vector
->rxr_count
?: 1);
1085 budget
= max(budget
, 1);
1086 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1087 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1088 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1089 #ifdef CONFIG_IXGBE_DCA
1090 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1091 ixgbe_update_rx_dca(adapter
, rx_ring
);
1093 ixgbe_clean_rx_irq(adapter
, rx_ring
, &work_done
, budget
);
1094 enable_mask
|= rx_ring
->v_idx
;
1095 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1099 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1100 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1101 /* If all Rx work done, exit the polling mode */
1102 if (work_done
< budget
) {
1103 netif_rx_complete(adapter
->netdev
, napi
);
1104 if (adapter
->itr_setting
& 3)
1105 ixgbe_set_itr_msix(q_vector
);
1106 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1107 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, enable_mask
);
1113 static inline void map_vector_to_rxq(struct ixgbe_adapter
*a
, int v_idx
,
1116 a
->q_vector
[v_idx
].adapter
= a
;
1117 set_bit(r_idx
, a
->q_vector
[v_idx
].rxr_idx
);
1118 a
->q_vector
[v_idx
].rxr_count
++;
1119 a
->rx_ring
[r_idx
].v_idx
= 1 << v_idx
;
1122 static inline void map_vector_to_txq(struct ixgbe_adapter
*a
, int v_idx
,
1125 a
->q_vector
[v_idx
].adapter
= a
;
1126 set_bit(r_idx
, a
->q_vector
[v_idx
].txr_idx
);
1127 a
->q_vector
[v_idx
].txr_count
++;
1128 a
->tx_ring
[r_idx
].v_idx
= 1 << v_idx
;
1132 * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1133 * @adapter: board private structure to initialize
1134 * @vectors: allotted vector count for descriptor rings
1136 * This function maps descriptor rings to the queue-specific vectors
1137 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1138 * one vector per ring/queue, but on a constrained vector budget, we
1139 * group the rings as "efficiently" as possible. You would add new
1140 * mapping configurations in here.
1142 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter
*adapter
,
1146 int rxr_idx
= 0, txr_idx
= 0;
1147 int rxr_remaining
= adapter
->num_rx_queues
;
1148 int txr_remaining
= adapter
->num_tx_queues
;
1153 /* No mapping required if MSI-X is disabled. */
1154 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
1158 * The ideal configuration...
1159 * We have enough vectors to map one per queue.
1161 if (vectors
== adapter
->num_rx_queues
+ adapter
->num_tx_queues
) {
1162 for (; rxr_idx
< rxr_remaining
; v_start
++, rxr_idx
++)
1163 map_vector_to_rxq(adapter
, v_start
, rxr_idx
);
1165 for (; txr_idx
< txr_remaining
; v_start
++, txr_idx
++)
1166 map_vector_to_txq(adapter
, v_start
, txr_idx
);
1172 * If we don't have enough vectors for a 1-to-1
1173 * mapping, we'll have to group them so there are
1174 * multiple queues per vector.
1176 /* Re-adjusting *qpv takes care of the remainder. */
1177 for (i
= v_start
; i
< vectors
; i
++) {
1178 rqpv
= DIV_ROUND_UP(rxr_remaining
, vectors
- i
);
1179 for (j
= 0; j
< rqpv
; j
++) {
1180 map_vector_to_rxq(adapter
, i
, rxr_idx
);
1185 for (i
= v_start
; i
< vectors
; i
++) {
1186 tqpv
= DIV_ROUND_UP(txr_remaining
, vectors
- i
);
1187 for (j
= 0; j
< tqpv
; j
++) {
1188 map_vector_to_txq(adapter
, i
, txr_idx
);
1199 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1200 * @adapter: board private structure
1202 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1203 * interrupts from the kernel.
1205 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
1207 struct net_device
*netdev
= adapter
->netdev
;
1208 irqreturn_t (*handler
)(int, void *);
1209 int i
, vector
, q_vectors
, err
;
1212 /* Decrement for Other and TCP Timer vectors */
1213 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1215 /* Map the Tx/Rx rings to the vectors we were allotted. */
1216 err
= ixgbe_map_rings_to_vectors(adapter
, q_vectors
);
1220 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1221 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1222 &ixgbe_msix_clean_many)
1223 for (vector
= 0; vector
< q_vectors
; vector
++) {
1224 handler
= SET_HANDLER(&adapter
->q_vector
[vector
]);
1226 if(handler
== &ixgbe_msix_clean_rx
) {
1227 sprintf(adapter
->name
[vector
], "%s-%s-%d",
1228 netdev
->name
, "rx", ri
++);
1230 else if(handler
== &ixgbe_msix_clean_tx
) {
1231 sprintf(adapter
->name
[vector
], "%s-%s-%d",
1232 netdev
->name
, "tx", ti
++);
1235 sprintf(adapter
->name
[vector
], "%s-%s-%d",
1236 netdev
->name
, "TxRx", vector
);
1238 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
1239 handler
, 0, adapter
->name
[vector
],
1240 &(adapter
->q_vector
[vector
]));
1243 "request_irq failed for MSIX interrupt "
1244 "Error: %d\n", err
);
1245 goto free_queue_irqs
;
1249 sprintf(adapter
->name
[vector
], "%s:lsc", netdev
->name
);
1250 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
1251 &ixgbe_msix_lsc
, 0, adapter
->name
[vector
], netdev
);
1254 "request_irq for msix_lsc failed: %d\n", err
);
1255 goto free_queue_irqs
;
1261 for (i
= vector
- 1; i
>= 0; i
--)
1262 free_irq(adapter
->msix_entries
[--vector
].vector
,
1263 &(adapter
->q_vector
[i
]));
1264 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
1265 pci_disable_msix(adapter
->pdev
);
1266 kfree(adapter
->msix_entries
);
1267 adapter
->msix_entries
= NULL
;
1272 static void ixgbe_set_itr(struct ixgbe_adapter
*adapter
)
1274 struct ixgbe_hw
*hw
= &adapter
->hw
;
1275 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
;
1277 u32 new_itr
= q_vector
->eitr
;
1278 struct ixgbe_ring
*rx_ring
= &adapter
->rx_ring
[0];
1279 struct ixgbe_ring
*tx_ring
= &adapter
->tx_ring
[0];
1281 q_vector
->tx_itr
= ixgbe_update_itr(adapter
, new_itr
,
1283 tx_ring
->total_packets
,
1284 tx_ring
->total_bytes
);
1285 q_vector
->rx_itr
= ixgbe_update_itr(adapter
, new_itr
,
1287 rx_ring
->total_packets
,
1288 rx_ring
->total_bytes
);
1290 current_itr
= max(q_vector
->rx_itr
, q_vector
->tx_itr
);
1292 switch (current_itr
) {
1293 /* counts and packets in update_itr are dependent on these numbers */
1294 case lowest_latency
:
1298 new_itr
= 20000; /* aka hwitr = ~200 */
1307 if (new_itr
!= q_vector
->eitr
) {
1309 /* do an exponential smoothing */
1310 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
1311 q_vector
->eitr
= new_itr
;
1312 itr_reg
= EITR_INTS_PER_SEC_TO_REG(new_itr
);
1313 /* must write high and low 16 bits to reset counter */
1314 IXGBE_WRITE_REG(hw
, IXGBE_EITR(0), itr_reg
| (itr_reg
)<<16);
1321 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1322 * @adapter: board private structure
1324 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
1326 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
1327 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1328 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1330 for (i
= 0; i
< adapter
->num_msix_vectors
; i
++)
1331 synchronize_irq(adapter
->msix_entries
[i
].vector
);
1333 synchronize_irq(adapter
->pdev
->irq
);
1338 * ixgbe_irq_enable - Enable default interrupt generation settings
1339 * @adapter: board private structure
1341 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
)
1344 mask
= IXGBE_EIMS_ENABLE_MASK
;
1345 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
1346 mask
|= IXGBE_EIMS_GPI_SDP1
;
1347 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
1348 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1352 * ixgbe_intr - legacy mode Interrupt Handler
1353 * @irq: interrupt number
1354 * @data: pointer to a network interface device structure
1356 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
1358 struct net_device
*netdev
= data
;
1359 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1360 struct ixgbe_hw
*hw
= &adapter
->hw
;
1363 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1364 * therefore no explict interrupt disable is necessary */
1365 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
1367 /* shared interrupt alert!
1368 * make sure interrupts are enabled because the read will
1369 * have disabled interrupts due to EIAM */
1370 ixgbe_irq_enable(adapter
);
1371 return IRQ_NONE
; /* Not our interrupt */
1374 if (eicr
& IXGBE_EICR_LSC
)
1375 ixgbe_check_lsc(adapter
);
1377 ixgbe_check_fan_failure(adapter
, eicr
);
1379 if (netif_rx_schedule_prep(netdev
, &adapter
->q_vector
[0].napi
)) {
1380 adapter
->tx_ring
[0].total_packets
= 0;
1381 adapter
->tx_ring
[0].total_bytes
= 0;
1382 adapter
->rx_ring
[0].total_packets
= 0;
1383 adapter
->rx_ring
[0].total_bytes
= 0;
1384 /* would disable interrupts here but EIAM disabled it */
1385 __netif_rx_schedule(netdev
, &adapter
->q_vector
[0].napi
);
1391 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter
*adapter
)
1393 int i
, q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1395 for (i
= 0; i
< q_vectors
; i
++) {
1396 struct ixgbe_q_vector
*q_vector
= &adapter
->q_vector
[i
];
1397 bitmap_zero(q_vector
->rxr_idx
, MAX_RX_QUEUES
);
1398 bitmap_zero(q_vector
->txr_idx
, MAX_TX_QUEUES
);
1399 q_vector
->rxr_count
= 0;
1400 q_vector
->txr_count
= 0;
1405 * ixgbe_request_irq - initialize interrupts
1406 * @adapter: board private structure
1408 * Attempts to configure interrupts using the best available
1409 * capabilities of the hardware and kernel.
1411 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
1413 struct net_device
*netdev
= adapter
->netdev
;
1416 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1417 err
= ixgbe_request_msix_irqs(adapter
);
1418 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
1419 err
= request_irq(adapter
->pdev
->irq
, &ixgbe_intr
, 0,
1420 netdev
->name
, netdev
);
1422 err
= request_irq(adapter
->pdev
->irq
, &ixgbe_intr
, IRQF_SHARED
,
1423 netdev
->name
, netdev
);
1427 DPRINTK(PROBE
, ERR
, "request_irq failed, Error %d\n", err
);
1432 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
1434 struct net_device
*netdev
= adapter
->netdev
;
1436 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1439 q_vectors
= adapter
->num_msix_vectors
;
1442 free_irq(adapter
->msix_entries
[i
].vector
, netdev
);
1445 for (; i
>= 0; i
--) {
1446 free_irq(adapter
->msix_entries
[i
].vector
,
1447 &(adapter
->q_vector
[i
]));
1450 ixgbe_reset_q_vectors(adapter
);
1452 free_irq(adapter
->pdev
->irq
, netdev
);
1457 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1460 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
1462 struct ixgbe_hw
*hw
= &adapter
->hw
;
1464 IXGBE_WRITE_REG(hw
, IXGBE_EITR(0),
1465 EITR_INTS_PER_SEC_TO_REG(adapter
->eitr_param
));
1467 ixgbe_set_ivar(adapter
, IXGBE_IVAR_RX_QUEUE(0), 0);
1468 ixgbe_set_ivar(adapter
, IXGBE_IVAR_TX_QUEUE(0), 0);
1470 map_vector_to_rxq(adapter
, 0, 0);
1471 map_vector_to_txq(adapter
, 0, 0);
1473 DPRINTK(HW
, INFO
, "Legacy interrupt IVAR setup done\n");
1477 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1478 * @adapter: board private structure
1480 * Configure the Tx unit of the MAC after a reset.
1482 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
1485 struct ixgbe_hw
*hw
= &adapter
->hw
;
1486 u32 i
, j
, tdlen
, txctrl
;
1488 /* Setup the HW Tx Head and Tail descriptor pointers */
1489 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1490 struct ixgbe_ring
*ring
= &adapter
->tx_ring
[i
];
1493 tdlen
= ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
1494 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(j
),
1495 (tdba
& DMA_32BIT_MASK
));
1496 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(j
), (tdba
>> 32));
1498 (ring
->count
* sizeof(union ixgbe_adv_tx_desc
));
1499 tdwba
|= IXGBE_TDWBAL_HEAD_WB_ENABLE
;
1500 IXGBE_WRITE_REG(hw
, IXGBE_TDWBAL(j
), tdwba
& DMA_32BIT_MASK
);
1501 IXGBE_WRITE_REG(hw
, IXGBE_TDWBAH(j
), (tdwba
>> 32));
1502 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(j
), tdlen
);
1503 IXGBE_WRITE_REG(hw
, IXGBE_TDH(j
), 0);
1504 IXGBE_WRITE_REG(hw
, IXGBE_TDT(j
), 0);
1505 adapter
->tx_ring
[i
].head
= IXGBE_TDH(j
);
1506 adapter
->tx_ring
[i
].tail
= IXGBE_TDT(j
);
1507 /* Disable Tx Head Writeback RO bit, since this hoses
1508 * bookkeeping if things aren't delivered in order.
1510 txctrl
= IXGBE_READ_REG(hw
, IXGBE_DCA_TXCTRL(j
));
1511 txctrl
&= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN
;
1512 IXGBE_WRITE_REG(hw
, IXGBE_DCA_TXCTRL(j
), txctrl
);
1516 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1518 static void ixgbe_configure_srrctl(struct ixgbe_adapter
*adapter
, int index
)
1520 struct ixgbe_ring
*rx_ring
;
1525 /* program one srrctl register per VMDq index */
1526 if (adapter
->flags
& IXGBE_FLAG_VMDQ_ENABLED
) {
1528 mask
= (unsigned long) adapter
->ring_feature
[RING_F_RSS
].mask
;
1529 len
= sizeof(adapter
->ring_feature
[RING_F_VMDQ
].mask
) * 8;
1530 shift
= find_first_bit(&mask
, len
);
1531 queue0
= index
& mask
;
1532 index
= (index
& mask
) >> shift
;
1533 /* program one srrctl per RSS queue since RDRXCTL.MVMEN is enabled */
1535 mask
= (unsigned long) adapter
->ring_feature
[RING_F_RSS
].mask
;
1536 queue0
= index
& mask
;
1537 index
= index
& mask
;
1540 rx_ring
= &adapter
->rx_ring
[queue0
];
1542 srrctl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SRRCTL(index
));
1544 srrctl
&= ~IXGBE_SRRCTL_BSIZEHDR_MASK
;
1545 srrctl
&= ~IXGBE_SRRCTL_BSIZEPKT_MASK
;
1547 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
1548 srrctl
|= IXGBE_RXBUFFER_2048
>> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1549 srrctl
|= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
1550 srrctl
|= ((IXGBE_RX_HDR_SIZE
<<
1551 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
) &
1552 IXGBE_SRRCTL_BSIZEHDR_MASK
);
1554 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
1556 if (rx_ring
->rx_buf_len
== MAXIMUM_ETHERNET_VLAN_SIZE
)
1557 srrctl
|= IXGBE_RXBUFFER_2048
>>
1558 IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1560 srrctl
|= rx_ring
->rx_buf_len
>>
1561 IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1563 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_SRRCTL(index
), srrctl
);
1567 * ixgbe_get_skb_hdr - helper function for LRO header processing
1568 * @skb: pointer to sk_buff to be added to LRO packet
1569 * @iphdr: pointer to ip header structure
1570 * @tcph: pointer to tcp header structure
1571 * @hdr_flags: pointer to header flags
1572 * @priv: private data
1574 static int ixgbe_get_skb_hdr(struct sk_buff
*skb
, void **iphdr
, void **tcph
,
1575 u64
*hdr_flags
, void *priv
)
1577 union ixgbe_adv_rx_desc
*rx_desc
= priv
;
1579 /* Verify that this is a valid IPv4 TCP packet */
1580 if (!((ixgbe_get_pkt_info(rx_desc
) & IXGBE_RXDADV_PKTTYPE_IPV4
) &&
1581 (ixgbe_get_pkt_info(rx_desc
) & IXGBE_RXDADV_PKTTYPE_TCP
)))
1584 /* Set network headers */
1585 skb_reset_network_header(skb
);
1586 skb_set_transport_header(skb
, ip_hdrlen(skb
));
1587 *iphdr
= ip_hdr(skb
);
1588 *tcph
= tcp_hdr(skb
);
1589 *hdr_flags
= LRO_IPV4
| LRO_TCP
;
1593 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1594 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1597 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1598 * @adapter: board private structure
1600 * Configure the Rx unit of the MAC after a reset.
1602 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
1605 struct ixgbe_hw
*hw
= &adapter
->hw
;
1606 struct net_device
*netdev
= adapter
->netdev
;
1607 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1609 u32 rdlen
, rxctrl
, rxcsum
;
1610 static const u32 seed
[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1611 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1612 0x6A3E67EA, 0x14364D17, 0x3BED200D};
1619 /* Decide whether to use packet split mode or not */
1620 adapter
->flags
|= IXGBE_FLAG_RX_PS_ENABLED
;
1622 /* Set the RX buffer length according to the mode */
1623 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
1624 rx_buf_len
= IXGBE_RX_HDR_SIZE
;
1626 if (netdev
->mtu
<= ETH_DATA_LEN
)
1627 rx_buf_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
1629 rx_buf_len
= ALIGN(max_frame
, 1024);
1632 fctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_FCTRL
);
1633 fctrl
|= IXGBE_FCTRL_BAM
;
1634 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
1635 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_FCTRL
, fctrl
);
1637 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
1638 if (adapter
->netdev
->mtu
<= ETH_DATA_LEN
)
1639 hlreg0
&= ~IXGBE_HLREG0_JUMBOEN
;
1641 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
1642 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
1644 pages
= PAGE_USE_COUNT(adapter
->netdev
->mtu
);
1646 rdlen
= adapter
->rx_ring
[0].count
* sizeof(union ixgbe_adv_rx_desc
);
1647 /* disable receives while setting up the descriptors */
1648 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
1649 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
1651 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1652 * the Base and Length of the Rx Descriptor Ring */
1653 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1654 rdba
= adapter
->rx_ring
[i
].dma
;
1655 j
= adapter
->rx_ring
[i
].reg_idx
;
1656 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(j
), (rdba
& DMA_32BIT_MASK
));
1657 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(j
), (rdba
>> 32));
1658 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(j
), rdlen
);
1659 IXGBE_WRITE_REG(hw
, IXGBE_RDH(j
), 0);
1660 IXGBE_WRITE_REG(hw
, IXGBE_RDT(j
), 0);
1661 adapter
->rx_ring
[i
].head
= IXGBE_RDH(j
);
1662 adapter
->rx_ring
[i
].tail
= IXGBE_RDT(j
);
1663 adapter
->rx_ring
[i
].rx_buf_len
= rx_buf_len
;
1664 /* Intitial LRO Settings */
1665 adapter
->rx_ring
[i
].lro_mgr
.max_aggr
= IXGBE_MAX_LRO_AGGREGATE
;
1666 adapter
->rx_ring
[i
].lro_mgr
.max_desc
= IXGBE_MAX_LRO_DESCRIPTORS
;
1667 adapter
->rx_ring
[i
].lro_mgr
.get_skb_header
= ixgbe_get_skb_hdr
;
1668 adapter
->rx_ring
[i
].lro_mgr
.features
= LRO_F_EXTRACT_VLAN_ID
;
1669 if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
))
1670 adapter
->rx_ring
[i
].lro_mgr
.features
|= LRO_F_NAPI
;
1671 adapter
->rx_ring
[i
].lro_mgr
.dev
= adapter
->netdev
;
1672 adapter
->rx_ring
[i
].lro_mgr
.ip_summed
= CHECKSUM_UNNECESSARY
;
1673 adapter
->rx_ring
[i
].lro_mgr
.ip_summed_aggr
= CHECKSUM_UNNECESSARY
;
1675 ixgbe_configure_srrctl(adapter
, j
);
1679 * For VMDq support of different descriptor types or
1680 * buffer sizes through the use of multiple SRRCTL
1681 * registers, RDRXCTL.MVMEN must be set to 1
1683 * also, the manual doesn't mention it clearly but DCA hints
1684 * will only use queue 0's tags unless this bit is set. Side
1685 * effects of setting this bit are only that SRRCTL must be
1686 * fully programmed [0..15]
1688 if (adapter
->flags
&
1689 (IXGBE_FLAG_RSS_ENABLED
| IXGBE_FLAG_VMDQ_ENABLED
)) {
1690 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
1691 rdrxctl
|= IXGBE_RDRXCTL_MVMEN
;
1692 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
1695 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
1696 /* Fill out redirection table */
1697 for (i
= 0, j
= 0; i
< 128; i
++, j
++) {
1698 if (j
== adapter
->ring_feature
[RING_F_RSS
].indices
)
1700 /* reta = 4-byte sliding window of
1701 * 0x00..(indices-1)(indices-1)00..etc. */
1702 reta
= (reta
<< 8) | (j
* 0x11);
1704 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
1707 /* Fill out hash function seeds */
1708 for (i
= 0; i
< 10; i
++)
1709 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), seed
[i
]);
1711 mrqc
= IXGBE_MRQC_RSSEN
1712 /* Perform hash on these packet types */
1713 | IXGBE_MRQC_RSS_FIELD_IPV4
1714 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1715 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1716 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1717 | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1718 | IXGBE_MRQC_RSS_FIELD_IPV6
1719 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1720 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1721 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP
;
1722 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
1725 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
1727 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
||
1728 adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
) {
1729 /* Disable indicating checksum in descriptor, enables
1731 rxcsum
|= IXGBE_RXCSUM_PCSD
;
1733 if (!(rxcsum
& IXGBE_RXCSUM_PCSD
)) {
1734 /* Enable IPv4 payload checksum for UDP fragments
1735 * if PCSD is not set */
1736 rxcsum
|= IXGBE_RXCSUM_IPPCSE
;
1739 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
1742 static void ixgbe_vlan_rx_register(struct net_device
*netdev
,
1743 struct vlan_group
*grp
)
1745 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1748 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1749 ixgbe_irq_disable(adapter
);
1750 adapter
->vlgrp
= grp
;
1753 * For a DCB driver, always enable VLAN tag stripping so we can
1754 * still receive traffic from a DCB-enabled host even if we're
1757 ctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_VLNCTRL
);
1758 ctrl
|= IXGBE_VLNCTRL_VME
;
1759 ctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
1760 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_VLNCTRL
, ctrl
);
1763 /* enable VLAN tag insert/strip */
1764 ctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_VLNCTRL
);
1765 ctrl
|= IXGBE_VLNCTRL_VME
;
1766 ctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
1767 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_VLNCTRL
, ctrl
);
1770 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1771 ixgbe_irq_enable(adapter
);
1774 static void ixgbe_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
1776 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1777 struct ixgbe_hw
*hw
= &adapter
->hw
;
1779 /* add VID to filter table */
1780 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, 0, true);
1783 static void ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
1785 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1786 struct ixgbe_hw
*hw
= &adapter
->hw
;
1788 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1789 ixgbe_irq_disable(adapter
);
1791 vlan_group_set_device(adapter
->vlgrp
, vid
, NULL
);
1793 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1794 ixgbe_irq_enable(adapter
);
1796 /* remove VID from filter table */
1797 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, 0, false);
1800 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
1802 ixgbe_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
1804 if (adapter
->vlgrp
) {
1806 for (vid
= 0; vid
< VLAN_GROUP_ARRAY_LEN
; vid
++) {
1807 if (!vlan_group_get_device(adapter
->vlgrp
, vid
))
1809 ixgbe_vlan_rx_add_vid(adapter
->netdev
, vid
);
1814 static u8
*ixgbe_addr_list_itr(struct ixgbe_hw
*hw
, u8
**mc_addr_ptr
, u32
*vmdq
)
1816 struct dev_mc_list
*mc_ptr
;
1817 u8
*addr
= *mc_addr_ptr
;
1820 mc_ptr
= container_of(addr
, struct dev_mc_list
, dmi_addr
[0]);
1822 *mc_addr_ptr
= mc_ptr
->next
->dmi_addr
;
1824 *mc_addr_ptr
= NULL
;
1830 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1831 * @netdev: network interface device structure
1833 * The set_rx_method entry point is called whenever the unicast/multicast
1834 * address list or the network interface flags are updated. This routine is
1835 * responsible for configuring the hardware for proper unicast, multicast and
1838 static void ixgbe_set_rx_mode(struct net_device
*netdev
)
1840 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1841 struct ixgbe_hw
*hw
= &adapter
->hw
;
1843 u8
*addr_list
= NULL
;
1846 /* Check for Promiscuous and All Multicast modes */
1848 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
1849 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
1851 if (netdev
->flags
& IFF_PROMISC
) {
1852 hw
->addr_ctrl
.user_set_promisc
= 1;
1853 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
1854 vlnctrl
&= ~IXGBE_VLNCTRL_VFE
;
1856 if (netdev
->flags
& IFF_ALLMULTI
) {
1857 fctrl
|= IXGBE_FCTRL_MPE
;
1858 fctrl
&= ~IXGBE_FCTRL_UPE
;
1860 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
1862 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
1863 hw
->addr_ctrl
.user_set_promisc
= 0;
1866 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
1867 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
1869 /* reprogram secondary unicast list */
1870 addr_count
= netdev
->uc_count
;
1872 addr_list
= netdev
->uc_list
->dmi_addr
;
1873 hw
->mac
.ops
.update_uc_addr_list(hw
, addr_list
, addr_count
,
1874 ixgbe_addr_list_itr
);
1876 /* reprogram multicast list */
1877 addr_count
= netdev
->mc_count
;
1879 addr_list
= netdev
->mc_list
->dmi_addr
;
1880 hw
->mac
.ops
.update_mc_addr_list(hw
, addr_list
, addr_count
,
1881 ixgbe_addr_list_itr
);
1884 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
1887 struct ixgbe_q_vector
*q_vector
;
1888 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1890 /* legacy and MSI only use one vector */
1891 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
1894 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
1895 struct napi_struct
*napi
;
1896 q_vector
= &adapter
->q_vector
[q_idx
];
1897 if (!q_vector
->rxr_count
)
1899 napi
= &q_vector
->napi
;
1900 if ((adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) &&
1901 (q_vector
->rxr_count
> 1))
1902 napi
->poll
= &ixgbe_clean_rxonly_many
;
1908 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
1911 struct ixgbe_q_vector
*q_vector
;
1912 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1914 /* legacy and MSI only use one vector */
1915 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
1918 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
1919 q_vector
= &adapter
->q_vector
[q_idx
];
1920 if (!q_vector
->rxr_count
)
1922 napi_disable(&q_vector
->napi
);
1926 #ifdef CONFIG_IXGBE_DCB
1928 * ixgbe_configure_dcb - Configure DCB hardware
1929 * @adapter: ixgbe adapter struct
1931 * This is called by the driver on open to configure the DCB hardware.
1932 * This is also called by the gennetlink interface when reconfiguring
1935 static void ixgbe_configure_dcb(struct ixgbe_adapter
*adapter
)
1937 struct ixgbe_hw
*hw
= &adapter
->hw
;
1938 u32 txdctl
, vlnctrl
;
1941 ixgbe_dcb_check_config(&adapter
->dcb_cfg
);
1942 ixgbe_dcb_calculate_tc_credits(&adapter
->dcb_cfg
, DCB_TX_CONFIG
);
1943 ixgbe_dcb_calculate_tc_credits(&adapter
->dcb_cfg
, DCB_RX_CONFIG
);
1945 /* reconfigure the hardware */
1946 ixgbe_dcb_hw_config(&adapter
->hw
, &adapter
->dcb_cfg
);
1948 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1949 j
= adapter
->tx_ring
[i
].reg_idx
;
1950 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
1951 /* PThresh workaround for Tx hang with DFP enabled. */
1953 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
1955 /* Enable VLAN tag insert/strip */
1956 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
1957 vlnctrl
|= IXGBE_VLNCTRL_VME
| IXGBE_VLNCTRL_VFE
;
1958 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
1959 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
1960 hw
->mac
.ops
.set_vfta(&adapter
->hw
, 0, 0, true);
1964 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
1966 struct net_device
*netdev
= adapter
->netdev
;
1969 ixgbe_set_rx_mode(netdev
);
1971 ixgbe_restore_vlan(adapter
);
1972 #ifdef CONFIG_IXGBE_DCB
1973 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
1974 netif_set_gso_max_size(netdev
, 32768);
1975 ixgbe_configure_dcb(adapter
);
1977 netif_set_gso_max_size(netdev
, 65536);
1980 netif_set_gso_max_size(netdev
, 65536);
1983 ixgbe_configure_tx(adapter
);
1984 ixgbe_configure_rx(adapter
);
1985 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1986 ixgbe_alloc_rx_buffers(adapter
, &adapter
->rx_ring
[i
],
1987 (adapter
->rx_ring
[i
].count
- 1));
1990 static int ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
1992 struct net_device
*netdev
= adapter
->netdev
;
1993 struct ixgbe_hw
*hw
= &adapter
->hw
;
1995 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1996 u32 txdctl
, rxdctl
, mhadd
;
1999 ixgbe_get_hw_control(adapter
);
2001 if ((adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) ||
2002 (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
)) {
2003 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2004 gpie
= (IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_EIAME
|
2005 IXGBE_GPIE_PBA_SUPPORT
| IXGBE_GPIE_OCD
);
2010 /* XXX: to interrupt immediately for EICS writes, enable this */
2011 /* gpie |= IXGBE_GPIE_EIMEN; */
2012 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
2015 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
2016 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
2017 * specifically only auto mask tx and rx interrupts */
2018 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
2021 /* Enable fan failure interrupt if media type is copper */
2022 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
2023 gpie
= IXGBE_READ_REG(hw
, IXGBE_GPIE
);
2024 gpie
|= IXGBE_SDP1_GPIEN
;
2025 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
2028 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
2029 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
2030 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
2031 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
2033 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
2036 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2037 j
= adapter
->tx_ring
[i
].reg_idx
;
2038 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
2039 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
2040 txdctl
|= (8 << 16);
2041 txdctl
|= IXGBE_TXDCTL_ENABLE
;
2042 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
2045 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2046 j
= adapter
->rx_ring
[i
].reg_idx
;
2047 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
2048 /* enable PTHRESH=32 descriptors (half the internal cache)
2049 * and HTHRESH=0 descriptors (to minimize latency on fetch),
2050 * this also removes a pesky rx_no_buffer_count increment */
2052 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
2053 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), rxdctl
);
2055 /* enable all receives */
2056 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
2057 rxdctl
|= (IXGBE_RXCTRL_DMBYPS
| IXGBE_RXCTRL_RXEN
);
2058 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxdctl
);
2060 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
2061 ixgbe_configure_msix(adapter
);
2063 ixgbe_configure_msi_and_legacy(adapter
);
2065 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
2066 ixgbe_napi_enable_all(adapter
);
2068 /* clear any pending interrupts, may auto mask */
2069 IXGBE_READ_REG(hw
, IXGBE_EICR
);
2071 ixgbe_irq_enable(adapter
);
2073 /* bring the link up in the watchdog, this could race with our first
2074 * link up interrupt but shouldn't be a problem */
2075 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
2076 adapter
->link_check_timeout
= jiffies
;
2077 mod_timer(&adapter
->watchdog_timer
, jiffies
);
2081 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
2083 WARN_ON(in_interrupt());
2084 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
2086 ixgbe_down(adapter
);
2088 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
2091 int ixgbe_up(struct ixgbe_adapter
*adapter
)
2093 /* hardware has been reset, we need to reload some things */
2094 ixgbe_configure(adapter
);
2096 return ixgbe_up_complete(adapter
);
2099 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
2101 struct ixgbe_hw
*hw
= &adapter
->hw
;
2102 if (hw
->mac
.ops
.init_hw(hw
))
2103 dev_err(&adapter
->pdev
->dev
, "Hardware Error\n");
2105 /* reprogram the RAR[0] in case user changed it. */
2106 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, 0, IXGBE_RAH_AV
);
2111 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
2112 * @adapter: board private structure
2113 * @rx_ring: ring to free buffers from
2115 static void ixgbe_clean_rx_ring(struct ixgbe_adapter
*adapter
,
2116 struct ixgbe_ring
*rx_ring
)
2118 struct pci_dev
*pdev
= adapter
->pdev
;
2122 /* Free all the Rx ring sk_buffs */
2124 for (i
= 0; i
< rx_ring
->count
; i
++) {
2125 struct ixgbe_rx_buffer
*rx_buffer_info
;
2127 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
2128 if (rx_buffer_info
->dma
) {
2129 pci_unmap_single(pdev
, rx_buffer_info
->dma
,
2130 rx_ring
->rx_buf_len
,
2131 PCI_DMA_FROMDEVICE
);
2132 rx_buffer_info
->dma
= 0;
2134 if (rx_buffer_info
->skb
) {
2135 dev_kfree_skb(rx_buffer_info
->skb
);
2136 rx_buffer_info
->skb
= NULL
;
2138 if (!rx_buffer_info
->page
)
2140 pci_unmap_page(pdev
, rx_buffer_info
->page_dma
, PAGE_SIZE
/ 2,
2141 PCI_DMA_FROMDEVICE
);
2142 rx_buffer_info
->page_dma
= 0;
2143 put_page(rx_buffer_info
->page
);
2144 rx_buffer_info
->page
= NULL
;
2145 rx_buffer_info
->page_offset
= 0;
2148 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
2149 memset(rx_ring
->rx_buffer_info
, 0, size
);
2151 /* Zero out the descriptor ring */
2152 memset(rx_ring
->desc
, 0, rx_ring
->size
);
2154 rx_ring
->next_to_clean
= 0;
2155 rx_ring
->next_to_use
= 0;
2157 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
2158 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
2162 * ixgbe_clean_tx_ring - Free Tx Buffers
2163 * @adapter: board private structure
2164 * @tx_ring: ring to be cleaned
2166 static void ixgbe_clean_tx_ring(struct ixgbe_adapter
*adapter
,
2167 struct ixgbe_ring
*tx_ring
)
2169 struct ixgbe_tx_buffer
*tx_buffer_info
;
2173 /* Free all the Tx ring sk_buffs */
2175 for (i
= 0; i
< tx_ring
->count
; i
++) {
2176 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
2177 ixgbe_unmap_and_free_tx_resource(adapter
, tx_buffer_info
);
2180 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
2181 memset(tx_ring
->tx_buffer_info
, 0, size
);
2183 /* Zero out the descriptor ring */
2184 memset(tx_ring
->desc
, 0, tx_ring
->size
);
2186 tx_ring
->next_to_use
= 0;
2187 tx_ring
->next_to_clean
= 0;
2189 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
2190 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2194 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2195 * @adapter: board private structure
2197 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
2201 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2202 ixgbe_clean_rx_ring(adapter
, &adapter
->rx_ring
[i
]);
2206 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2207 * @adapter: board private structure
2209 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
2213 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2214 ixgbe_clean_tx_ring(adapter
, &adapter
->tx_ring
[i
]);
2217 void ixgbe_down(struct ixgbe_adapter
*adapter
)
2219 struct net_device
*netdev
= adapter
->netdev
;
2220 struct ixgbe_hw
*hw
= &adapter
->hw
;
2225 /* signal that we are down to the interrupt handler */
2226 set_bit(__IXGBE_DOWN
, &adapter
->state
);
2228 /* disable receives */
2229 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
2230 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
2232 netif_tx_disable(netdev
);
2234 IXGBE_WRITE_FLUSH(hw
);
2237 netif_tx_stop_all_queues(netdev
);
2239 ixgbe_irq_disable(adapter
);
2241 ixgbe_napi_disable_all(adapter
);
2243 del_timer_sync(&adapter
->watchdog_timer
);
2244 cancel_work_sync(&adapter
->watchdog_task
);
2246 /* disable transmits in the hardware now that interrupts are off */
2247 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2248 j
= adapter
->tx_ring
[i
].reg_idx
;
2249 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
2250 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
),
2251 (txdctl
& ~IXGBE_TXDCTL_ENABLE
));
2254 netif_carrier_off(netdev
);
2256 #ifdef CONFIG_IXGBE_DCA
2257 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
2258 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
2259 dca_remove_requester(&adapter
->pdev
->dev
);
2263 if (!pci_channel_offline(adapter
->pdev
))
2264 ixgbe_reset(adapter
);
2265 ixgbe_clean_all_tx_rings(adapter
);
2266 ixgbe_clean_all_rx_rings(adapter
);
2268 #ifdef CONFIG_IXGBE_DCA
2269 /* since we reset the hardware DCA settings were cleared */
2270 if (dca_add_requester(&adapter
->pdev
->dev
) == 0) {
2271 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
2272 /* always use CB2 mode, difference is masked
2273 * in the CB driver */
2274 IXGBE_WRITE_REG(hw
, IXGBE_DCA_CTRL
, 2);
2275 ixgbe_setup_dca(adapter
);
2281 * ixgbe_poll - NAPI Rx polling callback
2282 * @napi: structure for representing this polling device
2283 * @budget: how many packets driver is allowed to clean
2285 * This function is used for legacy and MSI, NAPI mode
2287 static int ixgbe_poll(struct napi_struct
*napi
, int budget
)
2289 struct ixgbe_q_vector
*q_vector
= container_of(napi
,
2290 struct ixgbe_q_vector
, napi
);
2291 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2292 int tx_cleaned
, work_done
= 0;
2294 #ifdef CONFIG_IXGBE_DCA
2295 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
2296 ixgbe_update_tx_dca(adapter
, adapter
->tx_ring
);
2297 ixgbe_update_rx_dca(adapter
, adapter
->rx_ring
);
2301 tx_cleaned
= ixgbe_clean_tx_irq(adapter
, adapter
->tx_ring
);
2302 ixgbe_clean_rx_irq(adapter
, adapter
->rx_ring
, &work_done
, budget
);
2307 /* If budget not fully consumed, exit the polling mode */
2308 if (work_done
< budget
) {
2309 netif_rx_complete(adapter
->netdev
, napi
);
2310 if (adapter
->itr_setting
& 3)
2311 ixgbe_set_itr(adapter
);
2312 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2313 ixgbe_irq_enable(adapter
);
2319 * ixgbe_tx_timeout - Respond to a Tx Hang
2320 * @netdev: network interface device structure
2322 static void ixgbe_tx_timeout(struct net_device
*netdev
)
2324 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2326 /* Do the reset outside of interrupt context */
2327 schedule_work(&adapter
->reset_task
);
2330 static void ixgbe_reset_task(struct work_struct
*work
)
2332 struct ixgbe_adapter
*adapter
;
2333 adapter
= container_of(work
, struct ixgbe_adapter
, reset_task
);
2335 /* If we're already down or resetting, just bail */
2336 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
2337 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
2340 adapter
->tx_timeout_count
++;
2342 ixgbe_reinit_locked(adapter
);
2345 static void ixgbe_set_num_queues(struct ixgbe_adapter
*adapter
)
2347 int nrq
= 1, ntq
= 1;
2348 int feature_mask
= 0, rss_i
, rss_m
;
2351 /* Number of supported queues */
2352 switch (adapter
->hw
.mac
.type
) {
2353 case ixgbe_mac_82598EB
:
2354 dcb_i
= adapter
->ring_feature
[RING_F_DCB
].indices
;
2356 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
2358 feature_mask
|= IXGBE_FLAG_RSS_ENABLED
;
2359 feature_mask
|= IXGBE_FLAG_DCB_ENABLED
;
2361 switch (adapter
->flags
& feature_mask
) {
2362 case (IXGBE_FLAG_RSS_ENABLED
| IXGBE_FLAG_DCB_ENABLED
):
2364 rss_i
= min(8, rss_i
);
2366 nrq
= dcb_i
* rss_i
;
2367 ntq
= min(MAX_TX_QUEUES
, dcb_i
* rss_i
);
2369 case (IXGBE_FLAG_DCB_ENABLED
):
2374 case (IXGBE_FLAG_RSS_ENABLED
):
2390 /* Sanity check, we should never have zero queues */
2394 adapter
->ring_feature
[RING_F_DCB
].indices
= dcb_i
;
2395 adapter
->ring_feature
[RING_F_DCB
].mask
= dcb_m
;
2396 adapter
->ring_feature
[RING_F_RSS
].indices
= rss_i
;
2397 adapter
->ring_feature
[RING_F_RSS
].mask
= rss_m
;
2405 adapter
->num_rx_queues
= nrq
;
2406 adapter
->num_tx_queues
= ntq
;
2409 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter
*adapter
,
2412 int err
, vector_threshold
;
2414 /* We'll want at least 3 (vector_threshold):
2417 * 3) Other (Link Status Change, etc.)
2418 * 4) TCP Timer (optional)
2420 vector_threshold
= MIN_MSIX_COUNT
;
2422 /* The more we get, the more we will assign to Tx/Rx Cleanup
2423 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2424 * Right now, we simply care about how many we'll get; we'll
2425 * set them up later while requesting irq's.
2427 while (vectors
>= vector_threshold
) {
2428 err
= pci_enable_msix(adapter
->pdev
, adapter
->msix_entries
,
2430 if (!err
) /* Success in acquiring all requested vectors. */
2433 vectors
= 0; /* Nasty failure, quit now */
2434 else /* err == number of vectors we should try again with */
2438 if (vectors
< vector_threshold
) {
2439 /* Can't allocate enough MSI-X interrupts? Oh well.
2440 * This just means we'll go with either a single MSI
2441 * vector or fall back to legacy interrupts.
2443 DPRINTK(HW
, DEBUG
, "Unable to allocate MSI-X interrupts\n");
2444 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2445 kfree(adapter
->msix_entries
);
2446 adapter
->msix_entries
= NULL
;
2447 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
2448 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
2449 ixgbe_set_num_queues(adapter
);
2451 adapter
->flags
|= IXGBE_FLAG_MSIX_ENABLED
; /* Woot! */
2452 adapter
->num_msix_vectors
= vectors
;
2457 * ixgbe_cache_ring_register - Descriptor ring to register mapping
2458 * @adapter: board private structure to initialize
2460 * Once we know the feature-set enabled for the device, we'll cache
2461 * the register offset the descriptor ring is assigned to.
2463 static void __devinit
ixgbe_cache_ring_register(struct ixgbe_adapter
*adapter
)
2465 int feature_mask
= 0, rss_i
;
2466 int i
, txr_idx
, rxr_idx
;
2469 /* Number of supported queues */
2470 switch (adapter
->hw
.mac
.type
) {
2471 case ixgbe_mac_82598EB
:
2472 dcb_i
= adapter
->ring_feature
[RING_F_DCB
].indices
;
2473 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
2476 feature_mask
|= IXGBE_FLAG_DCB_ENABLED
;
2477 feature_mask
|= IXGBE_FLAG_RSS_ENABLED
;
2478 switch (adapter
->flags
& feature_mask
) {
2479 case (IXGBE_FLAG_RSS_ENABLED
| IXGBE_FLAG_DCB_ENABLED
):
2480 for (i
= 0; i
< dcb_i
; i
++) {
2483 for (j
= 0; j
< adapter
->num_rx_queues
; j
++) {
2484 adapter
->rx_ring
[rxr_idx
].reg_idx
=
2489 for (j
= 0; j
< adapter
->num_tx_queues
; j
++) {
2490 adapter
->tx_ring
[txr_idx
].reg_idx
=
2496 case (IXGBE_FLAG_DCB_ENABLED
):
2497 /* the number of queues is assumed to be symmetric */
2498 for (i
= 0; i
< dcb_i
; i
++) {
2499 adapter
->rx_ring
[i
].reg_idx
= i
<< 3;
2500 adapter
->tx_ring
[i
].reg_idx
= i
<< 2;
2503 case (IXGBE_FLAG_RSS_ENABLED
):
2504 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2505 adapter
->rx_ring
[i
].reg_idx
= i
;
2506 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2507 adapter
->tx_ring
[i
].reg_idx
= i
;
2520 * ixgbe_alloc_queues - Allocate memory for all rings
2521 * @adapter: board private structure to initialize
2523 * We allocate one ring per queue at run-time since we don't know the
2524 * number of queues at compile-time. The polling_netdev array is
2525 * intended for Multiqueue, but should work fine with a single queue.
2527 static int ixgbe_alloc_queues(struct ixgbe_adapter
*adapter
)
2531 adapter
->tx_ring
= kcalloc(adapter
->num_tx_queues
,
2532 sizeof(struct ixgbe_ring
), GFP_KERNEL
);
2533 if (!adapter
->tx_ring
)
2534 goto err_tx_ring_allocation
;
2536 adapter
->rx_ring
= kcalloc(adapter
->num_rx_queues
,
2537 sizeof(struct ixgbe_ring
), GFP_KERNEL
);
2538 if (!adapter
->rx_ring
)
2539 goto err_rx_ring_allocation
;
2541 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2542 adapter
->tx_ring
[i
].count
= adapter
->tx_ring_count
;
2543 adapter
->tx_ring
[i
].queue_index
= i
;
2546 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2547 adapter
->rx_ring
[i
].count
= adapter
->rx_ring_count
;
2548 adapter
->rx_ring
[i
].queue_index
= i
;
2551 ixgbe_cache_ring_register(adapter
);
2555 err_rx_ring_allocation
:
2556 kfree(adapter
->tx_ring
);
2557 err_tx_ring_allocation
:
2562 * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2563 * @adapter: board private structure to initialize
2565 * Attempt to configure the interrupts using the best available
2566 * capabilities of the hardware and the kernel.
2568 static int __devinit
ixgbe_set_interrupt_capability(struct ixgbe_adapter
2572 int vector
, v_budget
;
2575 * It's easy to be greedy for MSI-X vectors, but it really
2576 * doesn't do us much good if we have a lot more vectors
2577 * than CPU's. So let's be conservative and only ask for
2578 * (roughly) twice the number of vectors as there are CPU's.
2580 v_budget
= min(adapter
->num_rx_queues
+ adapter
->num_tx_queues
,
2581 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS
;
2584 * At the same time, hardware can only support a maximum of
2585 * MAX_MSIX_COUNT vectors. With features such as RSS and VMDq,
2586 * we can easily reach upwards of 64 Rx descriptor queues and
2587 * 32 Tx queues. Thus, we cap it off in those rare cases where
2588 * the cpu count also exceeds our vector limit.
2590 v_budget
= min(v_budget
, MAX_MSIX_COUNT
);
2592 /* A failure in MSI-X entry allocation isn't fatal, but it does
2593 * mean we disable MSI-X capabilities of the adapter. */
2594 adapter
->msix_entries
= kcalloc(v_budget
,
2595 sizeof(struct msix_entry
), GFP_KERNEL
);
2596 if (!adapter
->msix_entries
) {
2597 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
2598 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
2599 ixgbe_set_num_queues(adapter
);
2600 kfree(adapter
->tx_ring
);
2601 kfree(adapter
->rx_ring
);
2602 err
= ixgbe_alloc_queues(adapter
);
2604 DPRINTK(PROBE
, ERR
, "Unable to allocate memory "
2612 for (vector
= 0; vector
< v_budget
; vector
++)
2613 adapter
->msix_entries
[vector
].entry
= vector
;
2615 ixgbe_acquire_msix_vectors(adapter
, v_budget
);
2617 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
2621 err
= pci_enable_msi(adapter
->pdev
);
2623 adapter
->flags
|= IXGBE_FLAG_MSI_ENABLED
;
2625 DPRINTK(HW
, DEBUG
, "Unable to allocate MSI interrupt, "
2626 "falling back to legacy. Error: %d\n", err
);
2632 /* Notify the stack of the (possibly) reduced Tx Queue count. */
2633 adapter
->netdev
->real_num_tx_queues
= adapter
->num_tx_queues
;
2638 void ixgbe_reset_interrupt_capability(struct ixgbe_adapter
*adapter
)
2640 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2641 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2642 pci_disable_msix(adapter
->pdev
);
2643 kfree(adapter
->msix_entries
);
2644 adapter
->msix_entries
= NULL
;
2645 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
2646 adapter
->flags
&= ~IXGBE_FLAG_MSI_ENABLED
;
2647 pci_disable_msi(adapter
->pdev
);
2653 * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2654 * @adapter: board private structure to initialize
2656 * We determine which interrupt scheme to use based on...
2657 * - Kernel support (MSI, MSI-X)
2658 * - which can be user-defined (via MODULE_PARAM)
2659 * - Hardware queue count (num_*_queues)
2660 * - defined by miscellaneous hardware support/features (RSS, etc.)
2662 int ixgbe_init_interrupt_scheme(struct ixgbe_adapter
*adapter
)
2666 /* Number of supported queues */
2667 ixgbe_set_num_queues(adapter
);
2669 err
= ixgbe_alloc_queues(adapter
);
2671 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for queues\n");
2672 goto err_alloc_queues
;
2675 err
= ixgbe_set_interrupt_capability(adapter
);
2677 DPRINTK(PROBE
, ERR
, "Unable to setup interrupt capabilities\n");
2678 goto err_set_interrupt
;
2681 DPRINTK(DRV
, INFO
, "Multiqueue %s: Rx Queue count = %u, "
2682 "Tx Queue count = %u\n",
2683 (adapter
->num_rx_queues
> 1) ? "Enabled" :
2684 "Disabled", adapter
->num_rx_queues
, adapter
->num_tx_queues
);
2686 set_bit(__IXGBE_DOWN
, &adapter
->state
);
2691 kfree(adapter
->tx_ring
);
2692 kfree(adapter
->rx_ring
);
2698 * ixgbe_sfp_timer - worker thread to find a missing module
2699 * @data: pointer to our adapter struct
2701 static void ixgbe_sfp_timer(unsigned long data
)
2703 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
2705 /* Do the sfp_timer outside of interrupt context due to the
2706 * delays that sfp+ detection requires
2708 schedule_work(&adapter
->sfp_task
);
2712 * ixgbe_sfp_task - worker thread to find a missing module
2713 * @work: pointer to work_struct containing our data
2715 static void ixgbe_sfp_task(struct work_struct
*work
)
2717 struct ixgbe_adapter
*adapter
= container_of(work
,
2718 struct ixgbe_adapter
,
2720 struct ixgbe_hw
*hw
= &adapter
->hw
;
2722 if ((hw
->phy
.type
== ixgbe_phy_nl
) &&
2723 (hw
->phy
.sfp_type
== ixgbe_sfp_type_not_present
)) {
2724 s32 ret
= hw
->phy
.ops
.identify_sfp(hw
);
2727 ret
= hw
->phy
.ops
.reset(hw
);
2728 if (ret
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
2729 DPRINTK(PROBE
, ERR
, "failed to initialize because an "
2730 "unsupported SFP+ module type was detected.\n"
2731 "Reload the driver after installing a "
2732 "supported module.\n");
2733 unregister_netdev(adapter
->netdev
);
2735 DPRINTK(PROBE
, INFO
, "detected SFP+: %d\n",
2738 /* don't need this routine any more */
2739 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
2743 if (test_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
))
2744 mod_timer(&adapter
->sfp_timer
,
2745 round_jiffies(jiffies
+ (2 * HZ
)));
2749 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
2750 * @adapter: board private structure to initialize
2752 * ixgbe_sw_init initializes the Adapter private data structure.
2753 * Fields are initialized based on PCI device information and
2754 * OS network device settings (MTU size).
2756 static int __devinit
ixgbe_sw_init(struct ixgbe_adapter
*adapter
)
2758 struct ixgbe_hw
*hw
= &adapter
->hw
;
2759 struct pci_dev
*pdev
= adapter
->pdev
;
2761 #ifdef CONFIG_IXGBE_DCB
2763 struct tc_configuration
*tc
;
2766 /* PCI config space info */
2768 hw
->vendor_id
= pdev
->vendor
;
2769 hw
->device_id
= pdev
->device
;
2770 hw
->revision_id
= pdev
->revision
;
2771 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
2772 hw
->subsystem_device_id
= pdev
->subsystem_device
;
2774 /* Set capability flags */
2775 rss
= min(IXGBE_MAX_RSS_INDICES
, (int)num_online_cpus());
2776 adapter
->ring_feature
[RING_F_RSS
].indices
= rss
;
2777 adapter
->flags
|= IXGBE_FLAG_RSS_ENABLED
;
2778 adapter
->ring_feature
[RING_F_DCB
].indices
= IXGBE_MAX_DCB_INDICES
;
2780 #ifdef CONFIG_IXGBE_DCB
2781 /* Configure DCB traffic classes */
2782 for (j
= 0; j
< MAX_TRAFFIC_CLASS
; j
++) {
2783 tc
= &adapter
->dcb_cfg
.tc_config
[j
];
2784 tc
->path
[DCB_TX_CONFIG
].bwg_id
= 0;
2785 tc
->path
[DCB_TX_CONFIG
].bwg_percent
= 12 + (j
& 1);
2786 tc
->path
[DCB_RX_CONFIG
].bwg_id
= 0;
2787 tc
->path
[DCB_RX_CONFIG
].bwg_percent
= 12 + (j
& 1);
2788 tc
->dcb_pfc
= pfc_disabled
;
2790 adapter
->dcb_cfg
.bw_percentage
[DCB_TX_CONFIG
][0] = 100;
2791 adapter
->dcb_cfg
.bw_percentage
[DCB_RX_CONFIG
][0] = 100;
2792 adapter
->dcb_cfg
.rx_pba_cfg
= pba_equal
;
2793 adapter
->dcb_cfg
.round_robin_enable
= false;
2794 adapter
->dcb_set_bitmap
= 0x00;
2795 ixgbe_copy_dcb_cfg(&adapter
->dcb_cfg
, &adapter
->temp_dcb_cfg
,
2796 adapter
->ring_feature
[RING_F_DCB
].indices
);
2799 if (hw
->mac
.ops
.get_media_type
&&
2800 (hw
->mac
.ops
.get_media_type(hw
) == ixgbe_media_type_copper
))
2801 adapter
->flags
|= IXGBE_FLAG_FAN_FAIL_CAPABLE
;
2803 /* default flow control settings */
2804 hw
->fc
.original_type
= ixgbe_fc_none
;
2805 hw
->fc
.type
= ixgbe_fc_none
;
2806 hw
->fc
.high_water
= IXGBE_DEFAULT_FCRTH
;
2807 hw
->fc
.low_water
= IXGBE_DEFAULT_FCRTL
;
2808 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
2809 hw
->fc
.send_xon
= true;
2811 /* select 10G link by default */
2812 hw
->mac
.link_mode_select
= IXGBE_AUTOC_LMS_10G_LINK_NO_AN
;
2814 /* enable itr by default in dynamic mode */
2815 adapter
->itr_setting
= 1;
2816 adapter
->eitr_param
= 20000;
2818 /* set defaults for eitr in MegaBytes */
2819 adapter
->eitr_low
= 10;
2820 adapter
->eitr_high
= 20;
2822 /* set default ring sizes */
2823 adapter
->tx_ring_count
= IXGBE_DEFAULT_TXD
;
2824 adapter
->rx_ring_count
= IXGBE_DEFAULT_RXD
;
2826 /* initialize eeprom parameters */
2827 if (ixgbe_init_eeprom_params_generic(hw
)) {
2828 dev_err(&pdev
->dev
, "EEPROM initialization failed\n");
2832 /* enable rx csum by default */
2833 adapter
->flags
|= IXGBE_FLAG_RX_CSUM_ENABLED
;
2835 set_bit(__IXGBE_DOWN
, &adapter
->state
);
2841 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2842 * @adapter: board private structure
2843 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2845 * Return 0 on success, negative on failure
2847 int ixgbe_setup_tx_resources(struct ixgbe_adapter
*adapter
,
2848 struct ixgbe_ring
*tx_ring
)
2850 struct pci_dev
*pdev
= adapter
->pdev
;
2853 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
2854 tx_ring
->tx_buffer_info
= vmalloc(size
);
2855 if (!tx_ring
->tx_buffer_info
)
2857 memset(tx_ring
->tx_buffer_info
, 0, size
);
2859 /* round up to nearest 4K */
2860 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
) +
2862 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
2864 tx_ring
->desc
= pci_alloc_consistent(pdev
, tx_ring
->size
,
2869 tx_ring
->next_to_use
= 0;
2870 tx_ring
->next_to_clean
= 0;
2871 tx_ring
->work_limit
= tx_ring
->count
;
2875 vfree(tx_ring
->tx_buffer_info
);
2876 tx_ring
->tx_buffer_info
= NULL
;
2877 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for the transmit "
2878 "descriptor ring\n");
2883 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2884 * @adapter: board private structure
2886 * If this function returns with an error, then it's possible one or
2887 * more of the rings is populated (while the rest are not). It is the
2888 * callers duty to clean those orphaned rings.
2890 * Return 0 on success, negative on failure
2892 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
2896 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2897 err
= ixgbe_setup_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
2900 DPRINTK(PROBE
, ERR
, "Allocation for Tx Queue %u failed\n", i
);
2908 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2909 * @adapter: board private structure
2910 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2912 * Returns 0 on success, negative on failure
2914 int ixgbe_setup_rx_resources(struct ixgbe_adapter
*adapter
,
2915 struct ixgbe_ring
*rx_ring
)
2917 struct pci_dev
*pdev
= adapter
->pdev
;
2920 size
= sizeof(struct net_lro_desc
) * IXGBE_MAX_LRO_DESCRIPTORS
;
2921 rx_ring
->lro_mgr
.lro_arr
= vmalloc(size
);
2922 if (!rx_ring
->lro_mgr
.lro_arr
)
2924 memset(rx_ring
->lro_mgr
.lro_arr
, 0, size
);
2926 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
2927 rx_ring
->rx_buffer_info
= vmalloc(size
);
2928 if (!rx_ring
->rx_buffer_info
) {
2930 "vmalloc allocation failed for the rx desc ring\n");
2933 memset(rx_ring
->rx_buffer_info
, 0, size
);
2935 /* Round up to nearest 4K */
2936 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
2937 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
2939 rx_ring
->desc
= pci_alloc_consistent(pdev
, rx_ring
->size
, &rx_ring
->dma
);
2941 if (!rx_ring
->desc
) {
2943 "Memory allocation failed for the rx desc ring\n");
2944 vfree(rx_ring
->rx_buffer_info
);
2948 rx_ring
->next_to_clean
= 0;
2949 rx_ring
->next_to_use
= 0;
2954 vfree(rx_ring
->lro_mgr
.lro_arr
);
2955 rx_ring
->lro_mgr
.lro_arr
= NULL
;
2960 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2961 * @adapter: board private structure
2963 * If this function returns with an error, then it's possible one or
2964 * more of the rings is populated (while the rest are not). It is the
2965 * callers duty to clean those orphaned rings.
2967 * Return 0 on success, negative on failure
2970 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
2974 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2975 err
= ixgbe_setup_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
2978 DPRINTK(PROBE
, ERR
, "Allocation for Rx Queue %u failed\n", i
);
2986 * ixgbe_free_tx_resources - Free Tx Resources per Queue
2987 * @adapter: board private structure
2988 * @tx_ring: Tx descriptor ring for a specific queue
2990 * Free all transmit software resources
2992 void ixgbe_free_tx_resources(struct ixgbe_adapter
*adapter
,
2993 struct ixgbe_ring
*tx_ring
)
2995 struct pci_dev
*pdev
= adapter
->pdev
;
2997 ixgbe_clean_tx_ring(adapter
, tx_ring
);
2999 vfree(tx_ring
->tx_buffer_info
);
3000 tx_ring
->tx_buffer_info
= NULL
;
3002 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
, tx_ring
->dma
);
3004 tx_ring
->desc
= NULL
;
3008 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
3009 * @adapter: board private structure
3011 * Free all transmit software resources
3013 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
3017 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3018 ixgbe_free_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
3022 * ixgbe_free_rx_resources - Free Rx Resources
3023 * @adapter: board private structure
3024 * @rx_ring: ring to clean the resources from
3026 * Free all receive software resources
3028 void ixgbe_free_rx_resources(struct ixgbe_adapter
*adapter
,
3029 struct ixgbe_ring
*rx_ring
)
3031 struct pci_dev
*pdev
= adapter
->pdev
;
3033 vfree(rx_ring
->lro_mgr
.lro_arr
);
3034 rx_ring
->lro_mgr
.lro_arr
= NULL
;
3036 ixgbe_clean_rx_ring(adapter
, rx_ring
);
3038 vfree(rx_ring
->rx_buffer_info
);
3039 rx_ring
->rx_buffer_info
= NULL
;
3041 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
, rx_ring
->dma
);
3043 rx_ring
->desc
= NULL
;
3047 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
3048 * @adapter: board private structure
3050 * Free all receive software resources
3052 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
3056 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3057 ixgbe_free_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
3061 * ixgbe_change_mtu - Change the Maximum Transfer Unit
3062 * @netdev: network interface device structure
3063 * @new_mtu: new value for maximum frame size
3065 * Returns 0 on success, negative on failure
3067 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
3069 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3070 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3072 /* MTU < 68 is an error and causes problems on some kernels */
3073 if ((new_mtu
< 68) || (max_frame
> IXGBE_MAX_JUMBO_FRAME_SIZE
))
3076 DPRINTK(PROBE
, INFO
, "changing MTU from %d to %d\n",
3077 netdev
->mtu
, new_mtu
);
3078 /* must set new MTU before calling down or up */
3079 netdev
->mtu
= new_mtu
;
3081 if (netif_running(netdev
))
3082 ixgbe_reinit_locked(adapter
);
3088 * ixgbe_open - Called when a network interface is made active
3089 * @netdev: network interface device structure
3091 * Returns 0 on success, negative value on failure
3093 * The open entry point is called when a network interface is made
3094 * active by the system (IFF_UP). At this point all resources needed
3095 * for transmit and receive operations are allocated, the interrupt
3096 * handler is registered with the OS, the watchdog timer is started,
3097 * and the stack is notified that the interface is ready.
3099 static int ixgbe_open(struct net_device
*netdev
)
3101 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3104 /* disallow open during test */
3105 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
3108 /* allocate transmit descriptors */
3109 err
= ixgbe_setup_all_tx_resources(adapter
);
3113 /* allocate receive descriptors */
3114 err
= ixgbe_setup_all_rx_resources(adapter
);
3118 ixgbe_configure(adapter
);
3120 err
= ixgbe_request_irq(adapter
);
3124 err
= ixgbe_up_complete(adapter
);
3128 netif_tx_start_all_queues(netdev
);
3133 ixgbe_release_hw_control(adapter
);
3134 ixgbe_free_irq(adapter
);
3136 ixgbe_free_all_rx_resources(adapter
);
3138 ixgbe_free_all_tx_resources(adapter
);
3140 ixgbe_reset(adapter
);
3146 * ixgbe_close - Disables a network interface
3147 * @netdev: network interface device structure
3149 * Returns 0, this is not allowed to fail
3151 * The close entry point is called when an interface is de-activated
3152 * by the OS. The hardware is still under the drivers control, but
3153 * needs to be disabled. A global MAC reset is issued to stop the
3154 * hardware, and all transmit and receive resources are freed.
3156 static int ixgbe_close(struct net_device
*netdev
)
3158 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3160 ixgbe_down(adapter
);
3161 ixgbe_free_irq(adapter
);
3163 ixgbe_free_all_tx_resources(adapter
);
3164 ixgbe_free_all_rx_resources(adapter
);
3166 ixgbe_release_hw_control(adapter
);
3172 * ixgbe_napi_add_all - prep napi structs for use
3173 * @adapter: private struct
3174 * helper function to napi_add each possible q_vector->napi
3176 void ixgbe_napi_add_all(struct ixgbe_adapter
*adapter
)
3178 int q_idx
, q_vectors
;
3179 int (*poll
)(struct napi_struct
*, int);
3181 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3182 poll
= &ixgbe_clean_rxonly
;
3183 /* Only enable as many vectors as we have rx queues. */
3184 q_vectors
= adapter
->num_rx_queues
;
3187 /* only one q_vector for legacy modes */
3191 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
3192 struct ixgbe_q_vector
*q_vector
= &adapter
->q_vector
[q_idx
];
3193 netif_napi_add(adapter
->netdev
, &q_vector
->napi
, (*poll
), 64);
3197 void ixgbe_napi_del_all(struct ixgbe_adapter
*adapter
)
3200 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
3202 /* legacy and MSI only use one vector */
3203 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
3206 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
3207 struct ixgbe_q_vector
*q_vector
= &adapter
->q_vector
[q_idx
];
3208 if (!q_vector
->rxr_count
)
3210 netif_napi_del(&q_vector
->napi
);
3215 static int ixgbe_resume(struct pci_dev
*pdev
)
3217 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3218 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3221 pci_set_power_state(pdev
, PCI_D0
);
3222 pci_restore_state(pdev
);
3223 err
= pci_enable_device(pdev
);
3225 printk(KERN_ERR
"ixgbe: Cannot enable PCI device from "
3229 pci_set_master(pdev
);
3231 pci_enable_wake(pdev
, PCI_D3hot
, 0);
3232 pci_enable_wake(pdev
, PCI_D3cold
, 0);
3234 err
= ixgbe_init_interrupt_scheme(adapter
);
3236 printk(KERN_ERR
"ixgbe: Cannot initialize interrupts for "
3241 ixgbe_napi_add_all(adapter
);
3242 ixgbe_reset(adapter
);
3244 if (netif_running(netdev
)) {
3245 err
= ixgbe_open(adapter
->netdev
);
3250 netif_device_attach(netdev
);
3255 #endif /* CONFIG_PM */
3256 static int ixgbe_suspend(struct pci_dev
*pdev
, pm_message_t state
)
3258 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3259 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3264 netif_device_detach(netdev
);
3266 if (netif_running(netdev
)) {
3267 ixgbe_down(adapter
);
3268 ixgbe_free_irq(adapter
);
3269 ixgbe_free_all_tx_resources(adapter
);
3270 ixgbe_free_all_rx_resources(adapter
);
3272 ixgbe_reset_interrupt_capability(adapter
);
3273 ixgbe_napi_del_all(adapter
);
3274 kfree(adapter
->tx_ring
);
3275 kfree(adapter
->rx_ring
);
3278 retval
= pci_save_state(pdev
);
3283 pci_enable_wake(pdev
, PCI_D3hot
, 0);
3284 pci_enable_wake(pdev
, PCI_D3cold
, 0);
3286 ixgbe_release_hw_control(adapter
);
3288 pci_disable_device(pdev
);
3290 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
3295 static void ixgbe_shutdown(struct pci_dev
*pdev
)
3297 ixgbe_suspend(pdev
, PMSG_SUSPEND
);
3301 * ixgbe_update_stats - Update the board statistics counters.
3302 * @adapter: board private structure
3304 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
3306 struct ixgbe_hw
*hw
= &adapter
->hw
;
3308 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
3310 adapter
->stats
.crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
3311 for (i
= 0; i
< 8; i
++) {
3312 /* for packet buffers not used, the register should read 0 */
3313 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
3315 adapter
->stats
.mpc
[i
] += mpc
;
3316 total_mpc
+= adapter
->stats
.mpc
[i
];
3317 adapter
->stats
.rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
3318 adapter
->stats
.qptc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPTC(i
));
3319 adapter
->stats
.qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC(i
));
3320 adapter
->stats
.qprc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRC(i
));
3321 adapter
->stats
.qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC(i
));
3322 adapter
->stats
.pxonrxc
[i
] += IXGBE_READ_REG(hw
,
3324 adapter
->stats
.pxontxc
[i
] += IXGBE_READ_REG(hw
,
3326 adapter
->stats
.pxoffrxc
[i
] += IXGBE_READ_REG(hw
,
3328 adapter
->stats
.pxofftxc
[i
] += IXGBE_READ_REG(hw
,
3331 adapter
->stats
.gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
3332 /* work around hardware counting issue */
3333 adapter
->stats
.gprc
-= missed_rx
;
3335 /* 82598 hardware only has a 32 bit counter in the high register */
3336 adapter
->stats
.gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
3337 adapter
->stats
.gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
3338 adapter
->stats
.tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
3339 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
3340 adapter
->stats
.bprc
+= bprc
;
3341 adapter
->stats
.mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
3342 adapter
->stats
.mprc
-= bprc
;
3343 adapter
->stats
.roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
3344 adapter
->stats
.prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
3345 adapter
->stats
.prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
3346 adapter
->stats
.prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
3347 adapter
->stats
.prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
3348 adapter
->stats
.prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
3349 adapter
->stats
.prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
3350 adapter
->stats
.rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
3351 adapter
->stats
.lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
3352 adapter
->stats
.lxoffrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
3353 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
3354 adapter
->stats
.lxontxc
+= lxon
;
3355 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
3356 adapter
->stats
.lxofftxc
+= lxoff
;
3357 adapter
->stats
.ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
3358 adapter
->stats
.gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
3359 adapter
->stats
.mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
3361 * 82598 errata - tx of flow control packets is included in tx counters
3363 xon_off_tot
= lxon
+ lxoff
;
3364 adapter
->stats
.gptc
-= xon_off_tot
;
3365 adapter
->stats
.mptc
-= xon_off_tot
;
3366 adapter
->stats
.gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
3367 adapter
->stats
.ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
3368 adapter
->stats
.rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
3369 adapter
->stats
.rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
3370 adapter
->stats
.tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
3371 adapter
->stats
.ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
3372 adapter
->stats
.ptc64
-= xon_off_tot
;
3373 adapter
->stats
.ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
3374 adapter
->stats
.ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
3375 adapter
->stats
.ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
3376 adapter
->stats
.ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
3377 adapter
->stats
.ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
3378 adapter
->stats
.bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
3380 /* Fill out the OS statistics structure */
3381 adapter
->net_stats
.multicast
= adapter
->stats
.mprc
;
3384 adapter
->net_stats
.rx_errors
= adapter
->stats
.crcerrs
+
3385 adapter
->stats
.rlec
;
3386 adapter
->net_stats
.rx_dropped
= 0;
3387 adapter
->net_stats
.rx_length_errors
= adapter
->stats
.rlec
;
3388 adapter
->net_stats
.rx_crc_errors
= adapter
->stats
.crcerrs
;
3389 adapter
->net_stats
.rx_missed_errors
= total_mpc
;
3393 * ixgbe_watchdog - Timer Call-back
3394 * @data: pointer to adapter cast into an unsigned long
3396 static void ixgbe_watchdog(unsigned long data
)
3398 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
3399 struct ixgbe_hw
*hw
= &adapter
->hw
;
3401 /* Do the watchdog outside of interrupt context due to the lovely
3402 * delays that some of the newer hardware requires */
3403 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
3404 /* Cause software interrupt to ensure rx rings are cleaned */
3405 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3407 (1 << (adapter
->num_msix_vectors
- NON_Q_VECTORS
)) - 1;
3408 IXGBE_WRITE_REG(hw
, IXGBE_EICS
, eics
);
3410 /* For legacy and MSI interrupts don't set any bits that
3411 * are enabled for EIAM, because this operation would
3412 * set *both* EIMS and EICS for any bit in EIAM */
3413 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
3414 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
3416 /* Reset the timer */
3417 mod_timer(&adapter
->watchdog_timer
,
3418 round_jiffies(jiffies
+ 2 * HZ
));
3421 schedule_work(&adapter
->watchdog_task
);
3425 * ixgbe_watchdog_task - worker thread to bring link up
3426 * @work: pointer to work_struct containing our data
3428 static void ixgbe_watchdog_task(struct work_struct
*work
)
3430 struct ixgbe_adapter
*adapter
= container_of(work
,
3431 struct ixgbe_adapter
,
3433 struct net_device
*netdev
= adapter
->netdev
;
3434 struct ixgbe_hw
*hw
= &adapter
->hw
;
3435 u32 link_speed
= adapter
->link_speed
;
3436 bool link_up
= adapter
->link_up
;
3438 adapter
->flags
|= IXGBE_FLAG_IN_WATCHDOG_TASK
;
3440 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
) {
3441 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
3443 time_after(jiffies
, (adapter
->link_check_timeout
+
3444 IXGBE_TRY_LINK_TIMEOUT
))) {
3445 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMC_LSC
);
3446 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
3448 adapter
->link_up
= link_up
;
3449 adapter
->link_speed
= link_speed
;
3453 if (!netif_carrier_ok(netdev
)) {
3454 u32 frctl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
3455 u32 rmcs
= IXGBE_READ_REG(hw
, IXGBE_RMCS
);
3456 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
3457 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
3458 printk(KERN_INFO
"ixgbe: %s NIC Link is Up %s, "
3459 "Flow Control: %s\n",
3461 (link_speed
== IXGBE_LINK_SPEED_10GB_FULL
?
3463 (link_speed
== IXGBE_LINK_SPEED_1GB_FULL
?
3464 "1 Gbps" : "unknown speed")),
3465 ((FLOW_RX
&& FLOW_TX
) ? "RX/TX" :
3467 (FLOW_TX
? "TX" : "None"))));
3469 netif_carrier_on(netdev
);
3470 netif_tx_wake_all_queues(netdev
);
3472 /* Force detection of hung controller */
3473 adapter
->detect_tx_hung
= true;
3476 adapter
->link_up
= false;
3477 adapter
->link_speed
= 0;
3478 if (netif_carrier_ok(netdev
)) {
3479 printk(KERN_INFO
"ixgbe: %s NIC Link is Down\n",
3481 netif_carrier_off(netdev
);
3482 netif_tx_stop_all_queues(netdev
);
3486 ixgbe_update_stats(adapter
);
3487 adapter
->flags
&= ~IXGBE_FLAG_IN_WATCHDOG_TASK
;
3490 static int ixgbe_tso(struct ixgbe_adapter
*adapter
,
3491 struct ixgbe_ring
*tx_ring
, struct sk_buff
*skb
,
3492 u32 tx_flags
, u8
*hdr_len
)
3494 struct ixgbe_adv_tx_context_desc
*context_desc
;
3497 struct ixgbe_tx_buffer
*tx_buffer_info
;
3498 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
;
3499 u32 mss_l4len_idx
, l4len
;
3501 if (skb_is_gso(skb
)) {
3502 if (skb_header_cloned(skb
)) {
3503 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
3507 l4len
= tcp_hdrlen(skb
);
3510 if (skb
->protocol
== htons(ETH_P_IP
)) {
3511 struct iphdr
*iph
= ip_hdr(skb
);
3514 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
3518 adapter
->hw_tso_ctxt
++;
3519 } else if (skb_shinfo(skb
)->gso_type
== SKB_GSO_TCPV6
) {
3520 ipv6_hdr(skb
)->payload_len
= 0;
3521 tcp_hdr(skb
)->check
=
3522 ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
3523 &ipv6_hdr(skb
)->daddr
,
3525 adapter
->hw_tso6_ctxt
++;
3528 i
= tx_ring
->next_to_use
;
3530 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3531 context_desc
= IXGBE_TX_CTXTDESC_ADV(*tx_ring
, i
);
3533 /* VLAN MACLEN IPLEN */
3534 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
3536 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
3537 vlan_macip_lens
|= ((skb_network_offset(skb
)) <<
3538 IXGBE_ADVTXD_MACLEN_SHIFT
);
3539 *hdr_len
+= skb_network_offset(skb
);
3541 (skb_transport_header(skb
) - skb_network_header(skb
));
3543 (skb_transport_header(skb
) - skb_network_header(skb
));
3544 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
3545 context_desc
->seqnum_seed
= 0;
3547 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3548 type_tucmd_mlhl
= (IXGBE_TXD_CMD_DEXT
|
3549 IXGBE_ADVTXD_DTYP_CTXT
);
3551 if (skb
->protocol
== htons(ETH_P_IP
))
3552 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
3553 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
3554 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
3558 (skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
);
3559 mss_l4len_idx
|= (l4len
<< IXGBE_ADVTXD_L4LEN_SHIFT
);
3560 /* use index 1 for TSO */
3561 mss_l4len_idx
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
3562 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
3564 tx_buffer_info
->time_stamp
= jiffies
;
3565 tx_buffer_info
->next_to_watch
= i
;
3568 if (i
== tx_ring
->count
)
3570 tx_ring
->next_to_use
= i
;
3577 static bool ixgbe_tx_csum(struct ixgbe_adapter
*adapter
,
3578 struct ixgbe_ring
*tx_ring
,
3579 struct sk_buff
*skb
, u32 tx_flags
)
3581 struct ixgbe_adv_tx_context_desc
*context_desc
;
3583 struct ixgbe_tx_buffer
*tx_buffer_info
;
3584 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
= 0;
3586 if (skb
->ip_summed
== CHECKSUM_PARTIAL
||
3587 (tx_flags
& IXGBE_TX_FLAGS_VLAN
)) {
3588 i
= tx_ring
->next_to_use
;
3589 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3590 context_desc
= IXGBE_TX_CTXTDESC_ADV(*tx_ring
, i
);
3592 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
3594 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
3595 vlan_macip_lens
|= (skb_network_offset(skb
) <<
3596 IXGBE_ADVTXD_MACLEN_SHIFT
);
3597 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
3598 vlan_macip_lens
|= (skb_transport_header(skb
) -
3599 skb_network_header(skb
));
3601 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
3602 context_desc
->seqnum_seed
= 0;
3604 type_tucmd_mlhl
|= (IXGBE_TXD_CMD_DEXT
|
3605 IXGBE_ADVTXD_DTYP_CTXT
);
3607 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
3608 switch (skb
->protocol
) {
3609 case __constant_htons(ETH_P_IP
):
3610 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
3611 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
)
3613 IXGBE_ADVTXD_TUCMD_L4T_TCP
;
3615 case __constant_htons(ETH_P_IPV6
):
3616 /* XXX what about other V6 headers?? */
3617 if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_TCP
)
3619 IXGBE_ADVTXD_TUCMD_L4T_TCP
;
3622 if (unlikely(net_ratelimit())) {
3623 DPRINTK(PROBE
, WARNING
,
3624 "partial checksum but proto=%x!\n",
3631 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
3632 /* use index zero for tx checksum offload */
3633 context_desc
->mss_l4len_idx
= 0;
3635 tx_buffer_info
->time_stamp
= jiffies
;
3636 tx_buffer_info
->next_to_watch
= i
;
3638 adapter
->hw_csum_tx_good
++;
3640 if (i
== tx_ring
->count
)
3642 tx_ring
->next_to_use
= i
;
3650 static int ixgbe_tx_map(struct ixgbe_adapter
*adapter
,
3651 struct ixgbe_ring
*tx_ring
,
3652 struct sk_buff
*skb
, unsigned int first
)
3654 struct ixgbe_tx_buffer
*tx_buffer_info
;
3655 unsigned int len
= skb
->len
;
3656 unsigned int offset
= 0, size
, count
= 0, i
;
3657 unsigned int nr_frags
= skb_shinfo(skb
)->nr_frags
;
3660 len
-= skb
->data_len
;
3662 i
= tx_ring
->next_to_use
;
3665 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3666 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
3668 tx_buffer_info
->length
= size
;
3669 tx_buffer_info
->dma
= pci_map_single(adapter
->pdev
,
3671 size
, PCI_DMA_TODEVICE
);
3672 tx_buffer_info
->time_stamp
= jiffies
;
3673 tx_buffer_info
->next_to_watch
= i
;
3679 if (i
== tx_ring
->count
)
3683 for (f
= 0; f
< nr_frags
; f
++) {
3684 struct skb_frag_struct
*frag
;
3686 frag
= &skb_shinfo(skb
)->frags
[f
];
3688 offset
= frag
->page_offset
;
3691 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3692 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
3694 tx_buffer_info
->length
= size
;
3695 tx_buffer_info
->dma
= pci_map_page(adapter
->pdev
,
3700 tx_buffer_info
->time_stamp
= jiffies
;
3701 tx_buffer_info
->next_to_watch
= i
;
3707 if (i
== tx_ring
->count
)
3712 i
= tx_ring
->count
- 1;
3715 tx_ring
->tx_buffer_info
[i
].skb
= skb
;
3716 tx_ring
->tx_buffer_info
[first
].next_to_watch
= i
;
3721 static void ixgbe_tx_queue(struct ixgbe_adapter
*adapter
,
3722 struct ixgbe_ring
*tx_ring
,
3723 int tx_flags
, int count
, u32 paylen
, u8 hdr_len
)
3725 union ixgbe_adv_tx_desc
*tx_desc
= NULL
;
3726 struct ixgbe_tx_buffer
*tx_buffer_info
;
3727 u32 olinfo_status
= 0, cmd_type_len
= 0;
3729 u32 txd_cmd
= IXGBE_TXD_CMD_EOP
| IXGBE_TXD_CMD_RS
| IXGBE_TXD_CMD_IFCS
;
3731 cmd_type_len
|= IXGBE_ADVTXD_DTYP_DATA
;
3733 cmd_type_len
|= IXGBE_ADVTXD_DCMD_IFCS
| IXGBE_ADVTXD_DCMD_DEXT
;
3735 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
3736 cmd_type_len
|= IXGBE_ADVTXD_DCMD_VLE
;
3738 if (tx_flags
& IXGBE_TX_FLAGS_TSO
) {
3739 cmd_type_len
|= IXGBE_ADVTXD_DCMD_TSE
;
3741 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
3742 IXGBE_ADVTXD_POPTS_SHIFT
;
3744 /* use index 1 context for tso */
3745 olinfo_status
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
3746 if (tx_flags
& IXGBE_TX_FLAGS_IPV4
)
3747 olinfo_status
|= IXGBE_TXD_POPTS_IXSM
<<
3748 IXGBE_ADVTXD_POPTS_SHIFT
;
3750 } else if (tx_flags
& IXGBE_TX_FLAGS_CSUM
)
3751 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
3752 IXGBE_ADVTXD_POPTS_SHIFT
;
3754 olinfo_status
|= ((paylen
- hdr_len
) << IXGBE_ADVTXD_PAYLEN_SHIFT
);
3756 i
= tx_ring
->next_to_use
;
3758 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3759 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, i
);
3760 tx_desc
->read
.buffer_addr
= cpu_to_le64(tx_buffer_info
->dma
);
3761 tx_desc
->read
.cmd_type_len
=
3762 cpu_to_le32(cmd_type_len
| tx_buffer_info
->length
);
3763 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
3765 if (i
== tx_ring
->count
)
3769 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(txd_cmd
);
3772 * Force memory writes to complete before letting h/w
3773 * know there are new descriptors to fetch. (Only
3774 * applicable for weak-ordered memory model archs,
3779 tx_ring
->next_to_use
= i
;
3780 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
3783 static int __ixgbe_maybe_stop_tx(struct net_device
*netdev
,
3784 struct ixgbe_ring
*tx_ring
, int size
)
3786 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3788 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
3789 /* Herbert's original patch had:
3790 * smp_mb__after_netif_stop_queue();
3791 * but since that doesn't exist yet, just open code it. */
3794 /* We need to check again in a case another CPU has just
3795 * made room available. */
3796 if (likely(IXGBE_DESC_UNUSED(tx_ring
) < size
))
3799 /* A reprieve! - use start_queue because it doesn't call schedule */
3800 netif_start_subqueue(netdev
, tx_ring
->queue_index
);
3801 ++adapter
->restart_queue
;
3805 static int ixgbe_maybe_stop_tx(struct net_device
*netdev
,
3806 struct ixgbe_ring
*tx_ring
, int size
)
3808 if (likely(IXGBE_DESC_UNUSED(tx_ring
) >= size
))
3810 return __ixgbe_maybe_stop_tx(netdev
, tx_ring
, size
);
3813 static int ixgbe_xmit_frame(struct sk_buff
*skb
, struct net_device
*netdev
)
3815 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3816 struct ixgbe_ring
*tx_ring
;
3818 unsigned int tx_flags
= 0;
3824 r_idx
= (adapter
->num_tx_queues
- 1) & skb
->queue_mapping
;
3825 tx_ring
= &adapter
->tx_ring
[r_idx
];
3827 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
3828 tx_flags
|= vlan_tx_tag_get(skb
);
3829 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
3830 tx_flags
&= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK
;
3831 tx_flags
|= (skb
->queue_mapping
<< 13);
3833 tx_flags
<<= IXGBE_TX_FLAGS_VLAN_SHIFT
;
3834 tx_flags
|= IXGBE_TX_FLAGS_VLAN
;
3835 } else if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
3836 tx_flags
|= (skb
->queue_mapping
<< 13);
3837 tx_flags
<<= IXGBE_TX_FLAGS_VLAN_SHIFT
;
3838 tx_flags
|= IXGBE_TX_FLAGS_VLAN
;
3840 /* three things can cause us to need a context descriptor */
3841 if (skb_is_gso(skb
) ||
3842 (skb
->ip_summed
== CHECKSUM_PARTIAL
) ||
3843 (tx_flags
& IXGBE_TX_FLAGS_VLAN
))
3846 count
+= TXD_USE_COUNT(skb_headlen(skb
));
3847 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
3848 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
3850 if (ixgbe_maybe_stop_tx(netdev
, tx_ring
, count
)) {
3852 return NETDEV_TX_BUSY
;
3855 if (skb
->protocol
== htons(ETH_P_IP
))
3856 tx_flags
|= IXGBE_TX_FLAGS_IPV4
;
3857 first
= tx_ring
->next_to_use
;
3858 tso
= ixgbe_tso(adapter
, tx_ring
, skb
, tx_flags
, &hdr_len
);
3860 dev_kfree_skb_any(skb
);
3861 return NETDEV_TX_OK
;
3865 tx_flags
|= IXGBE_TX_FLAGS_TSO
;
3866 else if (ixgbe_tx_csum(adapter
, tx_ring
, skb
, tx_flags
) &&
3867 (skb
->ip_summed
== CHECKSUM_PARTIAL
))
3868 tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
3870 ixgbe_tx_queue(adapter
, tx_ring
, tx_flags
,
3871 ixgbe_tx_map(adapter
, tx_ring
, skb
, first
),
3874 netdev
->trans_start
= jiffies
;
3876 ixgbe_maybe_stop_tx(netdev
, tx_ring
, DESC_NEEDED
);
3878 return NETDEV_TX_OK
;
3882 * ixgbe_get_stats - Get System Network Statistics
3883 * @netdev: network interface device structure
3885 * Returns the address of the device statistics structure.
3886 * The statistics are actually updated from the timer callback.
3888 static struct net_device_stats
*ixgbe_get_stats(struct net_device
*netdev
)
3890 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3892 /* only return the current stats */
3893 return &adapter
->net_stats
;
3897 * ixgbe_set_mac - Change the Ethernet Address of the NIC
3898 * @netdev: network interface device structure
3899 * @p: pointer to an address structure
3901 * Returns 0 on success, negative on failure
3903 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
3905 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3906 struct ixgbe_hw
*hw
= &adapter
->hw
;
3907 struct sockaddr
*addr
= p
;
3909 if (!is_valid_ether_addr(addr
->sa_data
))
3910 return -EADDRNOTAVAIL
;
3912 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
3913 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
3915 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, 0, IXGBE_RAH_AV
);
3920 #ifdef CONFIG_NET_POLL_CONTROLLER
3922 * Polling 'interrupt' - used by things like netconsole to send skbs
3923 * without having to re-enable interrupts. It's not called while
3924 * the interrupt routine is executing.
3926 static void ixgbe_netpoll(struct net_device
*netdev
)
3928 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3930 disable_irq(adapter
->pdev
->irq
);
3931 adapter
->flags
|= IXGBE_FLAG_IN_NETPOLL
;
3932 ixgbe_intr(adapter
->pdev
->irq
, netdev
);
3933 adapter
->flags
&= ~IXGBE_FLAG_IN_NETPOLL
;
3934 enable_irq(adapter
->pdev
->irq
);
3939 * ixgbe_link_config - set up initial link with default speed and duplex
3940 * @hw: pointer to private hardware struct
3942 * Returns 0 on success, negative on failure
3944 static int ixgbe_link_config(struct ixgbe_hw
*hw
)
3946 u32 autoneg
= IXGBE_LINK_SPEED_10GB_FULL
;
3948 /* must always autoneg for both 1G and 10G link */
3949 hw
->mac
.autoneg
= true;
3951 if ((hw
->mac
.type
== ixgbe_mac_82598EB
) &&
3952 (hw
->phy
.media_type
== ixgbe_media_type_copper
))
3953 autoneg
= IXGBE_LINK_SPEED_82598_AUTONEG
;
3955 return hw
->mac
.ops
.setup_link_speed(hw
, autoneg
, true, true);
3958 static const struct net_device_ops ixgbe_netdev_ops
= {
3959 .ndo_open
= ixgbe_open
,
3960 .ndo_stop
= ixgbe_close
,
3961 .ndo_start_xmit
= ixgbe_xmit_frame
,
3962 .ndo_get_stats
= ixgbe_get_stats
,
3963 .ndo_set_multicast_list
= ixgbe_set_rx_mode
,
3964 .ndo_validate_addr
= eth_validate_addr
,
3965 .ndo_set_mac_address
= ixgbe_set_mac
,
3966 .ndo_change_mtu
= ixgbe_change_mtu
,
3967 .ndo_tx_timeout
= ixgbe_tx_timeout
,
3968 .ndo_vlan_rx_register
= ixgbe_vlan_rx_register
,
3969 .ndo_vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
,
3970 .ndo_vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
,
3971 #ifdef CONFIG_NET_POLL_CONTROLLER
3972 .ndo_poll_controller
= ixgbe_netpoll
,
3977 * ixgbe_probe - Device Initialization Routine
3978 * @pdev: PCI device information struct
3979 * @ent: entry in ixgbe_pci_tbl
3981 * Returns 0 on success, negative on failure
3983 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
3984 * The OS initialization, configuring of the adapter private structure,
3985 * and a hardware reset occur.
3987 static int __devinit
ixgbe_probe(struct pci_dev
*pdev
,
3988 const struct pci_device_id
*ent
)
3990 struct net_device
*netdev
;
3991 struct ixgbe_adapter
*adapter
= NULL
;
3992 struct ixgbe_hw
*hw
;
3993 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
3994 static int cards_found
;
3995 int i
, err
, pci_using_dac
;
3996 u16 link_status
, link_speed
, link_width
;
3999 err
= pci_enable_device(pdev
);
4003 if (!pci_set_dma_mask(pdev
, DMA_64BIT_MASK
) &&
4004 !pci_set_consistent_dma_mask(pdev
, DMA_64BIT_MASK
)) {
4007 err
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
4009 err
= pci_set_consistent_dma_mask(pdev
, DMA_32BIT_MASK
);
4011 dev_err(&pdev
->dev
, "No usable DMA "
4012 "configuration, aborting\n");
4019 err
= pci_request_regions(pdev
, ixgbe_driver_name
);
4021 dev_err(&pdev
->dev
, "pci_request_regions failed 0x%x\n", err
);
4025 pci_set_master(pdev
);
4026 pci_save_state(pdev
);
4028 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), MAX_TX_QUEUES
);
4031 goto err_alloc_etherdev
;
4034 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
4036 pci_set_drvdata(pdev
, netdev
);
4037 adapter
= netdev_priv(netdev
);
4039 adapter
->netdev
= netdev
;
4040 adapter
->pdev
= pdev
;
4043 adapter
->msg_enable
= (1 << DEFAULT_DEBUG_LEVEL_SHIFT
) - 1;
4045 hw
->hw_addr
= ioremap(pci_resource_start(pdev
, 0),
4046 pci_resource_len(pdev
, 0));
4052 for (i
= 1; i
<= 5; i
++) {
4053 if (pci_resource_len(pdev
, i
) == 0)
4057 netdev
->netdev_ops
= &ixgbe_netdev_ops
;
4058 ixgbe_set_ethtool_ops(netdev
);
4059 netdev
->watchdog_timeo
= 5 * HZ
;
4060 strcpy(netdev
->name
, pci_name(pdev
));
4062 adapter
->bd_number
= cards_found
;
4065 memcpy(&hw
->mac
.ops
, ii
->mac_ops
, sizeof(hw
->mac
.ops
));
4066 hw
->mac
.type
= ii
->mac
;
4069 memcpy(&hw
->eeprom
.ops
, ii
->eeprom_ops
, sizeof(hw
->eeprom
.ops
));
4070 eec
= IXGBE_READ_REG(hw
, IXGBE_EEC
);
4071 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
4072 if (!(eec
& (1 << 8)))
4073 hw
->eeprom
.ops
.read
= &ixgbe_read_eeprom_bit_bang_generic
;
4076 memcpy(&hw
->phy
.ops
, ii
->phy_ops
, sizeof(hw
->phy
.ops
));
4077 hw
->phy
.sfp_type
= ixgbe_sfp_type_unknown
;
4079 /* set up this timer and work struct before calling get_invariants
4080 * which might start the timer
4082 init_timer(&adapter
->sfp_timer
);
4083 adapter
->sfp_timer
.function
= &ixgbe_sfp_timer
;
4084 adapter
->sfp_timer
.data
= (unsigned long) adapter
;
4086 INIT_WORK(&adapter
->sfp_task
, ixgbe_sfp_task
);
4088 err
= ii
->get_invariants(hw
);
4089 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
) {
4090 /* start a kernel thread to watch for a module to arrive */
4091 set_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
4092 mod_timer(&adapter
->sfp_timer
,
4093 round_jiffies(jiffies
+ (2 * HZ
)));
4095 } else if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
4096 DPRINTK(PROBE
, ERR
, "failed to load because an "
4097 "unsupported SFP+ module type was detected.\n");
4103 /* setup the private structure */
4104 err
= ixgbe_sw_init(adapter
);
4108 /* reset_hw fills in the perm_addr as well */
4109 err
= hw
->mac
.ops
.reset_hw(hw
);
4111 dev_err(&adapter
->pdev
->dev
, "HW Init failed: %d\n", err
);
4115 netdev
->features
= NETIF_F_SG
|
4117 NETIF_F_HW_VLAN_TX
|
4118 NETIF_F_HW_VLAN_RX
|
4119 NETIF_F_HW_VLAN_FILTER
;
4121 netdev
->features
|= NETIF_F_IPV6_CSUM
;
4122 netdev
->features
|= NETIF_F_TSO
;
4123 netdev
->features
|= NETIF_F_TSO6
;
4124 netdev
->features
|= NETIF_F_LRO
;
4126 netdev
->vlan_features
|= NETIF_F_TSO
;
4127 netdev
->vlan_features
|= NETIF_F_TSO6
;
4128 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
4129 netdev
->vlan_features
|= NETIF_F_SG
;
4131 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)
4132 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
4134 #ifdef CONFIG_IXGBE_DCB
4135 netdev
->dcbnl_ops
= &dcbnl_ops
;
4139 netdev
->features
|= NETIF_F_HIGHDMA
;
4141 /* make sure the EEPROM is good */
4142 if (hw
->eeprom
.ops
.validate_checksum(hw
, NULL
) < 0) {
4143 dev_err(&pdev
->dev
, "The EEPROM Checksum Is Not Valid\n");
4148 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
4149 memcpy(netdev
->perm_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
4151 if (ixgbe_validate_mac_addr(netdev
->perm_addr
)) {
4152 dev_err(&pdev
->dev
, "invalid MAC address\n");
4157 init_timer(&adapter
->watchdog_timer
);
4158 adapter
->watchdog_timer
.function
= &ixgbe_watchdog
;
4159 adapter
->watchdog_timer
.data
= (unsigned long)adapter
;
4161 INIT_WORK(&adapter
->reset_task
, ixgbe_reset_task
);
4162 INIT_WORK(&adapter
->watchdog_task
, ixgbe_watchdog_task
);
4164 err
= ixgbe_init_interrupt_scheme(adapter
);
4168 /* print bus type/speed/width info */
4169 pci_read_config_word(pdev
, IXGBE_PCI_LINK_STATUS
, &link_status
);
4170 link_speed
= link_status
& IXGBE_PCI_LINK_SPEED
;
4171 link_width
= link_status
& IXGBE_PCI_LINK_WIDTH
;
4172 dev_info(&pdev
->dev
, "(PCI Express:%s:%s) %pM\n",
4173 ((link_speed
== IXGBE_PCI_LINK_SPEED_5000
) ? "5.0Gb/s" :
4174 (link_speed
== IXGBE_PCI_LINK_SPEED_2500
) ? "2.5Gb/s" :
4176 ((link_width
== IXGBE_PCI_LINK_WIDTH_8
) ? "Width x8" :
4177 (link_width
== IXGBE_PCI_LINK_WIDTH_4
) ? "Width x4" :
4178 (link_width
== IXGBE_PCI_LINK_WIDTH_2
) ? "Width x2" :
4179 (link_width
== IXGBE_PCI_LINK_WIDTH_1
) ? "Width x1" :
4182 ixgbe_read_pba_num_generic(hw
, &part_num
);
4183 dev_info(&pdev
->dev
, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4184 hw
->mac
.type
, hw
->phy
.type
,
4185 (part_num
>> 8), (part_num
& 0xff));
4187 if (link_width
<= IXGBE_PCI_LINK_WIDTH_4
) {
4188 dev_warn(&pdev
->dev
, "PCI-Express bandwidth available for "
4189 "this card is not sufficient for optimal "
4191 dev_warn(&pdev
->dev
, "For optimal performance a x8 "
4192 "PCI-Express slot is required.\n");
4195 /* reset the hardware with the new settings */
4196 hw
->mac
.ops
.start_hw(hw
);
4198 /* link_config depends on start_hw being called at least once */
4199 err
= ixgbe_link_config(hw
);
4201 dev_err(&pdev
->dev
, "setup_link_speed FAILED %d\n", err
);
4205 netif_carrier_off(netdev
);
4206 netif_tx_stop_all_queues(netdev
);
4208 ixgbe_napi_add_all(adapter
);
4210 strcpy(netdev
->name
, "eth%d");
4211 err
= register_netdev(netdev
);
4215 #ifdef CONFIG_IXGBE_DCA
4216 if (dca_add_requester(&pdev
->dev
) == 0) {
4217 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
4218 /* always use CB2 mode, difference is masked
4219 * in the CB driver */
4220 IXGBE_WRITE_REG(hw
, IXGBE_DCA_CTRL
, 2);
4221 ixgbe_setup_dca(adapter
);
4225 dev_info(&pdev
->dev
, "Intel(R) 10 Gigabit Network Connection\n");
4230 ixgbe_release_hw_control(adapter
);
4233 ixgbe_reset_interrupt_capability(adapter
);
4235 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
4236 del_timer_sync(&adapter
->sfp_timer
);
4237 cancel_work_sync(&adapter
->sfp_task
);
4238 iounmap(hw
->hw_addr
);
4240 free_netdev(netdev
);
4242 pci_release_regions(pdev
);
4245 pci_disable_device(pdev
);
4250 * ixgbe_remove - Device Removal Routine
4251 * @pdev: PCI device information struct
4253 * ixgbe_remove is called by the PCI subsystem to alert the driver
4254 * that it should release a PCI device. The could be caused by a
4255 * Hot-Plug event, or because the driver is going to be removed from
4258 static void __devexit
ixgbe_remove(struct pci_dev
*pdev
)
4260 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4261 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4263 set_bit(__IXGBE_DOWN
, &adapter
->state
);
4264 /* clear the module not found bit to make sure the worker won't
4267 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND
, &adapter
->state
);
4268 del_timer_sync(&adapter
->watchdog_timer
);
4270 del_timer_sync(&adapter
->sfp_timer
);
4271 cancel_work_sync(&adapter
->watchdog_task
);
4272 cancel_work_sync(&adapter
->sfp_task
);
4273 flush_scheduled_work();
4275 #ifdef CONFIG_IXGBE_DCA
4276 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
4277 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
4278 dca_remove_requester(&pdev
->dev
);
4279 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
4283 if (netdev
->reg_state
== NETREG_REGISTERED
)
4284 unregister_netdev(netdev
);
4286 ixgbe_reset_interrupt_capability(adapter
);
4288 ixgbe_release_hw_control(adapter
);
4290 iounmap(adapter
->hw
.hw_addr
);
4291 pci_release_regions(pdev
);
4293 DPRINTK(PROBE
, INFO
, "complete\n");
4294 ixgbe_napi_del_all(adapter
);
4295 kfree(adapter
->tx_ring
);
4296 kfree(adapter
->rx_ring
);
4298 free_netdev(netdev
);
4300 pci_disable_device(pdev
);
4304 * ixgbe_io_error_detected - called when PCI error is detected
4305 * @pdev: Pointer to PCI device
4306 * @state: The current pci connection state
4308 * This function is called after a PCI bus error affecting
4309 * this device has been detected.
4311 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
4312 pci_channel_state_t state
)
4314 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4315 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4317 netif_device_detach(netdev
);
4319 if (netif_running(netdev
))
4320 ixgbe_down(adapter
);
4321 pci_disable_device(pdev
);
4323 /* Request a slot reset. */
4324 return PCI_ERS_RESULT_NEED_RESET
;
4328 * ixgbe_io_slot_reset - called after the pci bus has been reset.
4329 * @pdev: Pointer to PCI device
4331 * Restart the card from scratch, as if from a cold-boot.
4333 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
4335 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4336 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4338 if (pci_enable_device(pdev
)) {
4340 "Cannot re-enable PCI device after reset.\n");
4341 return PCI_ERS_RESULT_DISCONNECT
;
4343 pci_set_master(pdev
);
4344 pci_restore_state(pdev
);
4346 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4347 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4349 ixgbe_reset(adapter
);
4351 return PCI_ERS_RESULT_RECOVERED
;
4355 * ixgbe_io_resume - called when traffic can start flowing again.
4356 * @pdev: Pointer to PCI device
4358 * This callback is called when the error recovery driver tells us that
4359 * its OK to resume normal operation.
4361 static void ixgbe_io_resume(struct pci_dev
*pdev
)
4363 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4364 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4366 if (netif_running(netdev
)) {
4367 if (ixgbe_up(adapter
)) {
4368 DPRINTK(PROBE
, INFO
, "ixgbe_up failed after reset\n");
4373 netif_device_attach(netdev
);
4376 static struct pci_error_handlers ixgbe_err_handler
= {
4377 .error_detected
= ixgbe_io_error_detected
,
4378 .slot_reset
= ixgbe_io_slot_reset
,
4379 .resume
= ixgbe_io_resume
,
4382 static struct pci_driver ixgbe_driver
= {
4383 .name
= ixgbe_driver_name
,
4384 .id_table
= ixgbe_pci_tbl
,
4385 .probe
= ixgbe_probe
,
4386 .remove
= __devexit_p(ixgbe_remove
),
4388 .suspend
= ixgbe_suspend
,
4389 .resume
= ixgbe_resume
,
4391 .shutdown
= ixgbe_shutdown
,
4392 .err_handler
= &ixgbe_err_handler
4396 * ixgbe_init_module - Driver Registration Routine
4398 * ixgbe_init_module is the first routine called when the driver is
4399 * loaded. All it does is register with the PCI subsystem.
4401 static int __init
ixgbe_init_module(void)
4404 printk(KERN_INFO
"%s: %s - version %s\n", ixgbe_driver_name
,
4405 ixgbe_driver_string
, ixgbe_driver_version
);
4407 printk(KERN_INFO
"%s: %s\n", ixgbe_driver_name
, ixgbe_copyright
);
4409 #ifdef CONFIG_IXGBE_DCA
4410 dca_register_notify(&dca_notifier
);
4413 ret
= pci_register_driver(&ixgbe_driver
);
4417 module_init(ixgbe_init_module
);
4420 * ixgbe_exit_module - Driver Exit Cleanup Routine
4422 * ixgbe_exit_module is called just before the driver is removed
4425 static void __exit
ixgbe_exit_module(void)
4427 #ifdef CONFIG_IXGBE_DCA
4428 dca_unregister_notify(&dca_notifier
);
4430 pci_unregister_driver(&ixgbe_driver
);
4433 #ifdef CONFIG_IXGBE_DCA
4434 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
4439 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
4440 __ixgbe_notify_dca
);
4442 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
4444 #endif /* CONFIG_IXGBE_DCA */
4446 module_exit(ixgbe_exit_module
);