[ARM] 5614/1: at91: atmel_lcdfb: add at91sam9g10 support to atmel LCD driver
[linux-2.6/mini2440.git] / drivers / video / atmel_lcdfb.c
blobadc5bf01254c6d57724da769c03ec2efbfce6c86
1 /*
2 * Driver for AT91/AT32 LCD Controller
4 * Copyright (C) 2007 Atmel Corporation
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
8 * more details.
9 */
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
16 #include <linux/fb.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
21 #include <mach/board.h>
22 #include <mach/cpu.h>
23 #include <mach/gpio.h>
25 #include <video/atmel_lcdc.h>
27 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
28 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
30 /* configurable parameters */
31 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
32 #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */
33 #define ATMEL_LCDC_FIFO_SIZE 512 /* words */
35 #if defined(CONFIG_ARCH_AT91)
36 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
37 | FBINFO_PARTIAL_PAN_OK \
38 | FBINFO_HWACCEL_YPAN)
40 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
41 struct fb_var_screeninfo *var)
45 #elif defined(CONFIG_AVR32)
46 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
47 | FBINFO_PARTIAL_PAN_OK \
48 | FBINFO_HWACCEL_XPAN \
49 | FBINFO_HWACCEL_YPAN)
51 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
52 struct fb_var_screeninfo *var)
54 u32 dma2dcfg;
55 u32 pixeloff;
57 pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
59 dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
60 dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
61 lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
63 /* Update configuration */
64 lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
65 lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
66 | ATMEL_LCDC_DMAUPDT);
68 #endif
70 static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
71 | ATMEL_LCDC_POL_POSITIVE
72 | ATMEL_LCDC_ENA_PWMENABLE;
74 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
76 /* some bl->props field just changed */
77 static int atmel_bl_update_status(struct backlight_device *bl)
79 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
80 int power = sinfo->bl_power;
81 int brightness = bl->props.brightness;
83 /* REVISIT there may be a meaningful difference between
84 * fb_blank and power ... there seem to be some cases
85 * this doesn't handle correctly.
87 if (bl->props.fb_blank != sinfo->bl_power)
88 power = bl->props.fb_blank;
89 else if (bl->props.power != sinfo->bl_power)
90 power = bl->props.power;
92 if (brightness < 0 && power == FB_BLANK_UNBLANK)
93 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
94 else if (power != FB_BLANK_UNBLANK)
95 brightness = 0;
97 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
98 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
99 brightness ? contrast_ctr : 0);
101 bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
103 return 0;
106 static int atmel_bl_get_brightness(struct backlight_device *bl)
108 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
110 return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
113 static struct backlight_ops atmel_lcdc_bl_ops = {
114 .update_status = atmel_bl_update_status,
115 .get_brightness = atmel_bl_get_brightness,
118 static void init_backlight(struct atmel_lcdfb_info *sinfo)
120 struct backlight_device *bl;
122 sinfo->bl_power = FB_BLANK_UNBLANK;
124 if (sinfo->backlight)
125 return;
127 bl = backlight_device_register("backlight", &sinfo->pdev->dev,
128 sinfo, &atmel_lcdc_bl_ops);
129 if (IS_ERR(bl)) {
130 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
131 PTR_ERR(bl));
132 return;
134 sinfo->backlight = bl;
136 bl->props.power = FB_BLANK_UNBLANK;
137 bl->props.fb_blank = FB_BLANK_UNBLANK;
138 bl->props.max_brightness = 0xff;
139 bl->props.brightness = atmel_bl_get_brightness(bl);
142 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
144 if (sinfo->backlight)
145 backlight_device_unregister(sinfo->backlight);
148 #else
150 static void init_backlight(struct atmel_lcdfb_info *sinfo)
152 dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
155 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
159 #endif
161 static void init_contrast(struct atmel_lcdfb_info *sinfo)
163 /* have some default contrast/backlight settings */
164 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
165 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
167 if (sinfo->lcdcon_is_backlight)
168 init_backlight(sinfo);
172 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
173 .type = FB_TYPE_PACKED_PIXELS,
174 .visual = FB_VISUAL_TRUECOLOR,
175 .xpanstep = 0,
176 .ypanstep = 1,
177 .ywrapstep = 0,
178 .accel = FB_ACCEL_NONE,
181 static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
183 unsigned long value;
185 if (!(cpu_is_at91sam9261() || cpu_is_at91sam9g10()
186 || cpu_is_at32ap7000()))
187 return xres;
189 value = xres;
190 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
191 /* STN display */
192 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
193 value *= 3;
195 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
196 || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
197 && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
198 value = DIV_ROUND_UP(value, 4);
199 else
200 value = DIV_ROUND_UP(value, 8);
203 return value;
206 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
208 /* Turn off the LCD controller and the DMA controller */
209 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
210 sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
212 /* Wait for the LCDC core to become idle */
213 while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
214 msleep(10);
216 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
219 static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
221 atmel_lcdfb_stop_nowait(sinfo);
223 /* Wait for DMA engine to become idle... */
224 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
225 msleep(10);
228 static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
230 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
231 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
232 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
233 | ATMEL_LCDC_PWR);
236 static void atmel_lcdfb_update_dma(struct fb_info *info,
237 struct fb_var_screeninfo *var)
239 struct atmel_lcdfb_info *sinfo = info->par;
240 struct fb_fix_screeninfo *fix = &info->fix;
241 unsigned long dma_addr;
243 dma_addr = (fix->smem_start + var->yoffset * fix->line_length
244 + var->xoffset * var->bits_per_pixel / 8);
246 dma_addr &= ~3UL;
248 /* Set framebuffer DMA base address and pixel offset */
249 lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
251 atmel_lcdfb_update_dma2d(sinfo, var);
254 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
256 struct fb_info *info = sinfo->info;
258 dma_free_writecombine(info->device, info->fix.smem_len,
259 info->screen_base, info->fix.smem_start);
263 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
264 * @sinfo: the frame buffer to allocate memory for
266 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
268 struct fb_info *info = sinfo->info;
269 struct fb_var_screeninfo *var = &info->var;
270 unsigned int smem_len;
272 smem_len = (var->xres_virtual * var->yres_virtual
273 * ((var->bits_per_pixel + 7) / 8));
274 info->fix.smem_len = max(smem_len, sinfo->smem_len);
276 info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
277 (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
279 if (!info->screen_base) {
280 return -ENOMEM;
283 memset(info->screen_base, 0, info->fix.smem_len);
285 return 0;
288 static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
289 struct fb_info *info)
291 struct fb_videomode varfbmode;
292 const struct fb_videomode *fbmode = NULL;
294 fb_var_to_videomode(&varfbmode, var);
295 fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
296 if (fbmode)
297 fb_videomode_to_var(var, fbmode);
298 return fbmode;
303 * atmel_lcdfb_check_var - Validates a var passed in.
304 * @var: frame buffer variable screen structure
305 * @info: frame buffer structure that represents a single frame buffer
307 * Checks to see if the hardware supports the state requested by
308 * var passed in. This function does not alter the hardware
309 * state!!! This means the data stored in struct fb_info and
310 * struct atmel_lcdfb_info do not change. This includes the var
311 * inside of struct fb_info. Do NOT change these. This function
312 * can be called on its own if we intent to only test a mode and
313 * not actually set it. The stuff in modedb.c is a example of
314 * this. If the var passed in is slightly off by what the
315 * hardware can support then we alter the var PASSED in to what
316 * we can do. If the hardware doesn't support mode change a
317 * -EINVAL will be returned by the upper layers. You don't need
318 * to implement this function then. If you hardware doesn't
319 * support changing the resolution then this function is not
320 * needed. In this case the driver would just provide a var that
321 * represents the static state the screen is in.
323 * Returns negative errno on error, or zero on success.
325 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
326 struct fb_info *info)
328 struct device *dev = info->device;
329 struct atmel_lcdfb_info *sinfo = info->par;
330 unsigned long clk_value_khz;
332 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
334 dev_dbg(dev, "%s:\n", __func__);
336 if (!(var->pixclock && var->bits_per_pixel)) {
337 /* choose a suitable mode if possible */
338 if (!atmel_lcdfb_choose_mode(var, info)) {
339 dev_err(dev, "needed value not specified\n");
340 return -EINVAL;
344 dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
345 dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
346 dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
347 dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
349 if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
350 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
351 return -EINVAL;
354 /* Do not allow to have real resoulution larger than virtual */
355 if (var->xres > var->xres_virtual)
356 var->xres_virtual = var->xres;
358 if (var->yres > var->yres_virtual)
359 var->yres_virtual = var->yres;
361 /* Force same alignment for each line */
362 var->xres = (var->xres + 3) & ~3UL;
363 var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
365 var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
366 var->transp.msb_right = 0;
367 var->transp.offset = var->transp.length = 0;
368 var->xoffset = var->yoffset = 0;
370 if (info->fix.smem_len) {
371 unsigned int smem_len = (var->xres_virtual * var->yres_virtual
372 * ((var->bits_per_pixel + 7) / 8));
373 if (smem_len > info->fix.smem_len)
374 return -EINVAL;
377 /* Saturate vertical and horizontal timings at maximum values */
378 var->vsync_len = min_t(u32, var->vsync_len,
379 (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
380 var->upper_margin = min_t(u32, var->upper_margin,
381 ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
382 var->lower_margin = min_t(u32, var->lower_margin,
383 ATMEL_LCDC_VFP);
384 var->right_margin = min_t(u32, var->right_margin,
385 (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
386 var->hsync_len = min_t(u32, var->hsync_len,
387 (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
388 var->left_margin = min_t(u32, var->left_margin,
389 ATMEL_LCDC_HBP + 1);
391 /* Some parameters can't be zero */
392 var->vsync_len = max_t(u32, var->vsync_len, 1);
393 var->right_margin = max_t(u32, var->right_margin, 1);
394 var->hsync_len = max_t(u32, var->hsync_len, 1);
395 var->left_margin = max_t(u32, var->left_margin, 1);
397 switch (var->bits_per_pixel) {
398 case 1:
399 case 2:
400 case 4:
401 case 8:
402 var->red.offset = var->green.offset = var->blue.offset = 0;
403 var->red.length = var->green.length = var->blue.length
404 = var->bits_per_pixel;
405 break;
406 case 15:
407 case 16:
408 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
409 /* RGB:565 mode */
410 var->red.offset = 11;
411 var->blue.offset = 0;
412 var->green.length = 6;
413 } else if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB555) {
414 var->red.offset = 10;
415 var->blue.offset = 0;
416 var->green.length = 5;
417 } else {
418 /* BGR:555 mode */
419 var->red.offset = 0;
420 var->blue.offset = 10;
421 var->green.length = 5;
423 var->green.offset = 5;
424 var->red.length = var->blue.length = 5;
425 break;
426 case 32:
427 var->transp.offset = 24;
428 var->transp.length = 8;
429 /* fall through */
430 case 24:
431 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
432 /* RGB:888 mode */
433 var->red.offset = 16;
434 var->blue.offset = 0;
435 } else {
436 /* BGR:888 mode */
437 var->red.offset = 0;
438 var->blue.offset = 16;
440 var->green.offset = 8;
441 var->red.length = var->green.length = var->blue.length = 8;
442 break;
443 default:
444 dev_err(dev, "color depth %d not supported\n",
445 var->bits_per_pixel);
446 return -EINVAL;
449 return 0;
453 * LCD reset sequence
455 static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
457 might_sleep();
459 atmel_lcdfb_stop(sinfo);
460 atmel_lcdfb_start(sinfo);
464 * atmel_lcdfb_set_par - Alters the hardware state.
465 * @info: frame buffer structure that represents a single frame buffer
467 * Using the fb_var_screeninfo in fb_info we set the resolution
468 * of the this particular framebuffer. This function alters the
469 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
470 * not alter var in fb_info since we are using that data. This
471 * means we depend on the data in var inside fb_info to be
472 * supported by the hardware. atmel_lcdfb_check_var is always called
473 * before atmel_lcdfb_set_par to ensure this. Again if you can't
474 * change the resolution you don't need this function.
477 static int atmel_lcdfb_set_par(struct fb_info *info)
479 struct atmel_lcdfb_info *sinfo = info->par;
480 unsigned long hozval_linesz;
481 unsigned long value;
482 unsigned long clk_value_khz;
483 unsigned long bits_per_line;
485 might_sleep();
487 dev_dbg(info->device, "%s:\n", __func__);
488 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
489 info->var.xres, info->var.yres,
490 info->var.xres_virtual, info->var.yres_virtual);
492 atmel_lcdfb_stop_nowait(sinfo);
494 if (info->var.bits_per_pixel == 1)
495 info->fix.visual = FB_VISUAL_MONO01;
496 else if (info->var.bits_per_pixel <= 8)
497 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
498 else
499 info->fix.visual = FB_VISUAL_TRUECOLOR;
501 bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
502 info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
504 /* Re-initialize the DMA engine... */
505 dev_dbg(info->device, " * update DMA engine\n");
506 atmel_lcdfb_update_dma(info, &info->var);
508 /* ...set frame size and burst length = 8 words (?) */
509 value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
510 value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
511 lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
513 /* Now, the LCDC core... */
515 /* Set pixel clock */
516 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
518 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
520 if (value < 2) {
521 dev_notice(info->device, "Bypassing pixel clock divider\n");
522 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
523 } else {
524 value = (value / 2) - 1;
525 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",
526 value);
527 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
528 value << ATMEL_LCDC_CLKVAL_OFFSET);
529 info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1)));
530 dev_dbg(info->device, " updated pixclk: %lu KHz\n",
531 PICOS2KHZ(info->var.pixclock));
535 /* Initialize control register 2 */
536 value = sinfo->default_lcdcon2;
538 if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
539 value |= ATMEL_LCDC_INVLINE_INVERTED;
540 if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
541 value |= ATMEL_LCDC_INVFRAME_INVERTED;
543 switch (info->var.bits_per_pixel) {
544 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
545 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
546 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
547 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
548 case 15: /* fall through */
549 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
550 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
551 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
552 default: BUG(); break;
554 dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
555 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
557 /* Vertical timing */
558 value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
559 value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
560 value |= info->var.lower_margin;
561 dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
562 lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
564 /* Horizontal timing */
565 value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
566 value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
567 value |= (info->var.left_margin - 1);
568 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
569 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
571 /* Horizontal value (aka line size) */
572 hozval_linesz = compute_hozval(info->var.xres,
573 lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
575 /* Display size */
576 value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
577 value |= info->var.yres - 1;
578 dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
579 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
581 /* FIFO Threshold: Use formula from data sheet */
582 value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
583 lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
585 /* Toggle LCD_MODE every frame */
586 lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
588 /* Disable all interrupts */
589 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
590 /* Enable FIFO & DMA errors */
591 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
593 /* ...wait for DMA engine to become idle... */
594 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
595 msleep(10);
597 atmel_lcdfb_start(sinfo);
599 dev_dbg(info->device, " * DONE\n");
601 return 0;
604 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
606 chan &= 0xffff;
607 chan >>= 16 - bf->length;
608 return chan << bf->offset;
612 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
613 * @regno: Which register in the CLUT we are programming
614 * @red: The red value which can be up to 16 bits wide
615 * @green: The green value which can be up to 16 bits wide
616 * @blue: The blue value which can be up to 16 bits wide.
617 * @transp: If supported the alpha value which can be up to 16 bits wide.
618 * @info: frame buffer info structure
620 * Set a single color register. The values supplied have a 16 bit
621 * magnitude which needs to be scaled in this function for the hardware.
622 * Things to take into consideration are how many color registers, if
623 * any, are supported with the current color visual. With truecolor mode
624 * no color palettes are supported. Here a psuedo palette is created
625 * which we store the value in pseudo_palette in struct fb_info. For
626 * pseudocolor mode we have a limited color palette. To deal with this
627 * we can program what color is displayed for a particular pixel value.
628 * DirectColor is similar in that we can program each color field. If
629 * we have a static colormap we don't need to implement this function.
631 * Returns negative errno on error, or zero on success. In an
632 * ideal world, this would have been the case, but as it turns
633 * out, the other drivers return 1 on failure, so that's what
634 * we're going to do.
636 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
637 unsigned int green, unsigned int blue,
638 unsigned int transp, struct fb_info *info)
640 struct atmel_lcdfb_info *sinfo = info->par;
641 unsigned int val;
642 u32 *pal;
643 int ret = 1;
645 if (info->var.grayscale)
646 red = green = blue = (19595 * red + 38470 * green
647 + 7471 * blue) >> 16;
649 switch (info->fix.visual) {
650 case FB_VISUAL_TRUECOLOR:
651 if (regno < 16) {
652 pal = info->pseudo_palette;
654 val = chan_to_field(red, &info->var.red);
655 val |= chan_to_field(green, &info->var.green);
656 val |= chan_to_field(blue, &info->var.blue);
658 pal[regno] = val;
659 ret = 0;
661 break;
663 case FB_VISUAL_PSEUDOCOLOR:
664 if (regno < 256) {
665 val = ((red >> 11) & 0x001f);
666 val |= ((green >> 6) & 0x03e0);
667 val |= ((blue >> 1) & 0x7c00);
670 * TODO: intensity bit. Maybe something like
671 * ~(red[10] ^ green[10] ^ blue[10]) & 1
674 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
675 ret = 0;
677 break;
679 case FB_VISUAL_MONO01:
680 if (regno < 2) {
681 val = (regno == 0) ? 0x00 : 0x1F;
682 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
683 ret = 0;
685 break;
689 return ret;
692 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
693 struct fb_info *info)
695 dev_dbg(info->device, "%s\n", __func__);
697 atmel_lcdfb_update_dma(info, var);
699 return 0;
702 static struct fb_ops atmel_lcdfb_ops = {
703 .owner = THIS_MODULE,
704 .fb_check_var = atmel_lcdfb_check_var,
705 .fb_set_par = atmel_lcdfb_set_par,
706 .fb_setcolreg = atmel_lcdfb_setcolreg,
707 .fb_pan_display = atmel_lcdfb_pan_display,
708 .fb_fillrect = cfb_fillrect,
709 .fb_copyarea = cfb_copyarea,
710 .fb_imageblit = cfb_imageblit,
713 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
715 struct fb_info *info = dev_id;
716 struct atmel_lcdfb_info *sinfo = info->par;
717 u32 status;
719 status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
720 if (status & ATMEL_LCDC_UFLWI) {
721 dev_warn(info->device, "FIFO underflow %#x\n", status);
722 /* reset DMA and FIFO to avoid screen shifting */
723 schedule_work(&sinfo->task);
725 lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
726 return IRQ_HANDLED;
730 * LCD controller task (to reset the LCD)
732 static void atmel_lcdfb_task(struct work_struct *work)
734 struct atmel_lcdfb_info *sinfo =
735 container_of(work, struct atmel_lcdfb_info, task);
737 atmel_lcdfb_reset(sinfo);
740 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
742 struct fb_info *info = sinfo->info;
743 int ret = 0;
745 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
747 dev_info(info->device,
748 "%luKiB frame buffer at %08lx (mapped at %p)\n",
749 (unsigned long)info->fix.smem_len / 1024,
750 (unsigned long)info->fix.smem_start,
751 info->screen_base);
753 /* Allocate colormap */
754 ret = fb_alloc_cmap(&info->cmap, 256, 0);
755 if (ret < 0)
756 dev_err(info->device, "Alloc color map failed\n");
758 return ret;
761 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
763 if (sinfo->bus_clk)
764 clk_enable(sinfo->bus_clk);
765 clk_enable(sinfo->lcdc_clk);
768 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
770 if (sinfo->bus_clk)
771 clk_disable(sinfo->bus_clk);
772 clk_disable(sinfo->lcdc_clk);
776 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
778 struct device *dev = &pdev->dev;
779 struct fb_info *info;
780 struct atmel_lcdfb_info *sinfo;
781 struct atmel_lcdfb_info *pdata_sinfo;
782 struct fb_videomode fbmode;
783 struct resource *regs = NULL;
784 struct resource *map = NULL;
785 int ret;
787 dev_dbg(dev, "%s BEGIN\n", __func__);
789 ret = -ENOMEM;
790 info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
791 if (!info) {
792 dev_err(dev, "cannot allocate memory\n");
793 goto out;
796 sinfo = info->par;
798 if (dev->platform_data) {
799 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
800 sinfo->default_bpp = pdata_sinfo->default_bpp;
801 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
802 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
803 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
804 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
805 sinfo->guard_time = pdata_sinfo->guard_time;
806 sinfo->smem_len = pdata_sinfo->smem_len;
807 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
808 sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
809 } else {
810 dev_err(dev, "cannot get default configuration\n");
811 goto free_info;
813 sinfo->info = info;
814 sinfo->pdev = pdev;
816 strcpy(info->fix.id, sinfo->pdev->name);
817 info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
818 info->pseudo_palette = sinfo->pseudo_palette;
819 info->fbops = &atmel_lcdfb_ops;
821 memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
822 info->fix = atmel_lcdfb_fix;
824 /* Enable LCDC Clocks */
825 if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()
826 || cpu_is_at32ap7000()) {
827 sinfo->bus_clk = clk_get(dev, "hck1");
828 if (IS_ERR(sinfo->bus_clk)) {
829 ret = PTR_ERR(sinfo->bus_clk);
830 goto free_info;
833 sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
834 if (IS_ERR(sinfo->lcdc_clk)) {
835 ret = PTR_ERR(sinfo->lcdc_clk);
836 goto put_bus_clk;
838 atmel_lcdfb_start_clock(sinfo);
840 ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
841 info->monspecs.modedb_len, info->monspecs.modedb,
842 sinfo->default_bpp);
843 if (!ret) {
844 dev_err(dev, "no suitable video mode found\n");
845 goto stop_clk;
849 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
850 if (!regs) {
851 dev_err(dev, "resources unusable\n");
852 ret = -ENXIO;
853 goto stop_clk;
856 sinfo->irq_base = platform_get_irq(pdev, 0);
857 if (sinfo->irq_base < 0) {
858 dev_err(dev, "unable to get irq\n");
859 ret = sinfo->irq_base;
860 goto stop_clk;
863 /* Initialize video memory */
864 map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
865 if (map) {
866 /* use a pre-allocated memory buffer */
867 info->fix.smem_start = map->start;
868 info->fix.smem_len = map->end - map->start + 1;
869 if (!request_mem_region(info->fix.smem_start,
870 info->fix.smem_len, pdev->name)) {
871 ret = -EBUSY;
872 goto stop_clk;
875 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
876 if (!info->screen_base)
877 goto release_intmem;
880 * Don't clear the framebuffer -- someone may have set
881 * up a splash image.
883 } else {
884 /* alocate memory buffer */
885 ret = atmel_lcdfb_alloc_video_memory(sinfo);
886 if (ret < 0) {
887 dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
888 goto stop_clk;
892 /* LCDC registers */
893 info->fix.mmio_start = regs->start;
894 info->fix.mmio_len = regs->end - regs->start + 1;
896 if (!request_mem_region(info->fix.mmio_start,
897 info->fix.mmio_len, pdev->name)) {
898 ret = -EBUSY;
899 goto free_fb;
902 sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
903 if (!sinfo->mmio) {
904 dev_err(dev, "cannot map LCDC registers\n");
905 goto release_mem;
908 /* Initialize PWM for contrast or backlight ("off") */
909 init_contrast(sinfo);
911 /* interrupt */
912 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
913 if (ret) {
914 dev_err(dev, "request_irq failed: %d\n", ret);
915 goto unmap_mmio;
918 /* Some operations on the LCDC might sleep and
919 * require a preemptible task context */
920 INIT_WORK(&sinfo->task, atmel_lcdfb_task);
922 ret = atmel_lcdfb_init_fbinfo(sinfo);
923 if (ret < 0) {
924 dev_err(dev, "init fbinfo failed: %d\n", ret);
925 goto unregister_irqs;
929 * This makes sure that our colour bitfield
930 * descriptors are correctly initialised.
932 atmel_lcdfb_check_var(&info->var, info);
934 ret = fb_set_var(info, &info->var);
935 if (ret) {
936 dev_warn(dev, "unable to set display parameters\n");
937 goto free_cmap;
940 dev_set_drvdata(dev, info);
943 * Tell the world that we're ready to go
945 ret = register_framebuffer(info);
946 if (ret < 0) {
947 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
948 goto reset_drvdata;
951 /* add selected videomode to modelist */
952 fb_var_to_videomode(&fbmode, &info->var);
953 fb_add_videomode(&fbmode, &info->modelist);
955 /* Power up the LCDC screen */
956 if (sinfo->atmel_lcdfb_power_control)
957 sinfo->atmel_lcdfb_power_control(1);
959 dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
960 info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
962 return 0;
964 reset_drvdata:
965 dev_set_drvdata(dev, NULL);
966 free_cmap:
967 fb_dealloc_cmap(&info->cmap);
968 unregister_irqs:
969 cancel_work_sync(&sinfo->task);
970 free_irq(sinfo->irq_base, info);
971 unmap_mmio:
972 exit_backlight(sinfo);
973 iounmap(sinfo->mmio);
974 release_mem:
975 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
976 free_fb:
977 if (map)
978 iounmap(info->screen_base);
979 else
980 atmel_lcdfb_free_video_memory(sinfo);
982 release_intmem:
983 if (map)
984 release_mem_region(info->fix.smem_start, info->fix.smem_len);
985 stop_clk:
986 atmel_lcdfb_stop_clock(sinfo);
987 clk_put(sinfo->lcdc_clk);
988 put_bus_clk:
989 if (sinfo->bus_clk)
990 clk_put(sinfo->bus_clk);
991 free_info:
992 framebuffer_release(info);
993 out:
994 dev_dbg(dev, "%s FAILED\n", __func__);
995 return ret;
998 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
1000 struct device *dev = &pdev->dev;
1001 struct fb_info *info = dev_get_drvdata(dev);
1002 struct atmel_lcdfb_info *sinfo;
1004 if (!info || !info->par)
1005 return 0;
1006 sinfo = info->par;
1008 cancel_work_sync(&sinfo->task);
1009 exit_backlight(sinfo);
1010 if (sinfo->atmel_lcdfb_power_control)
1011 sinfo->atmel_lcdfb_power_control(0);
1012 unregister_framebuffer(info);
1013 atmel_lcdfb_stop_clock(sinfo);
1014 clk_put(sinfo->lcdc_clk);
1015 if (sinfo->bus_clk)
1016 clk_put(sinfo->bus_clk);
1017 fb_dealloc_cmap(&info->cmap);
1018 free_irq(sinfo->irq_base, info);
1019 iounmap(sinfo->mmio);
1020 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1021 if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
1022 iounmap(info->screen_base);
1023 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1024 } else {
1025 atmel_lcdfb_free_video_memory(sinfo);
1028 dev_set_drvdata(dev, NULL);
1029 framebuffer_release(info);
1031 return 0;
1034 #ifdef CONFIG_PM
1036 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
1038 struct fb_info *info = platform_get_drvdata(pdev);
1039 struct atmel_lcdfb_info *sinfo = info->par;
1042 * We don't want to handle interrupts while the clock is
1043 * stopped. It may take forever.
1045 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
1047 sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
1048 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
1049 if (sinfo->atmel_lcdfb_power_control)
1050 sinfo->atmel_lcdfb_power_control(0);
1052 atmel_lcdfb_stop(sinfo);
1053 atmel_lcdfb_stop_clock(sinfo);
1055 return 0;
1058 static int atmel_lcdfb_resume(struct platform_device *pdev)
1060 struct fb_info *info = platform_get_drvdata(pdev);
1061 struct atmel_lcdfb_info *sinfo = info->par;
1063 atmel_lcdfb_start_clock(sinfo);
1064 atmel_lcdfb_start(sinfo);
1065 if (sinfo->atmel_lcdfb_power_control)
1066 sinfo->atmel_lcdfb_power_control(1);
1067 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1069 /* Enable FIFO & DMA errors */
1070 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
1071 | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
1073 return 0;
1076 #else
1077 #define atmel_lcdfb_suspend NULL
1078 #define atmel_lcdfb_resume NULL
1079 #endif
1081 static struct platform_driver atmel_lcdfb_driver = {
1082 .remove = __exit_p(atmel_lcdfb_remove),
1083 .suspend = atmel_lcdfb_suspend,
1084 .resume = atmel_lcdfb_resume,
1086 .driver = {
1087 .name = "atmel_lcdfb",
1088 .owner = THIS_MODULE,
1092 static int __init atmel_lcdfb_init(void)
1094 return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
1097 static void __exit atmel_lcdfb_exit(void)
1099 platform_driver_unregister(&atmel_lcdfb_driver);
1102 module_init(atmel_lcdfb_init);
1103 module_exit(atmel_lcdfb_exit);
1105 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1106 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1107 MODULE_LICENSE("GPL");