arch/i386/kernel/cpu/cpufreq/p4-clockmod.c

   1 /*
   2  *      Pentium 4/Xeon CPU on demand clock modulation/speed scaling
   3  *      (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
   4  *      (C) 2002 Zwane Mwaikambo <zwane@commfireservices.com>
   5  *      (C) 2002 Arjan van de Ven <arjanv@redhat.com>
   6  *      (C) 2002 Tora T. Engstad
   7  *      All Rights Reserved
   8  *
   9  *      This program is free software; you can redistribute it and/or
  10  *      modify it under the terms of the GNU General Public License
  11  *      as published by the Free Software Foundation; either version
  12  *      2 of the License, or (at your option) any later version.
  13  *
  14  *      The author(s) of this software shall not be held liable for damages
  15  *      of any nature resulting due to the use of this software. This
  16  *      software is provided AS-IS with no warranties.
  17  *
  18  *      Date            Errata                  Description
  19  *      20020525        N44, O17        12.5% or 25% DC causes lockup
  20  *
  21  */
  22
  23 #include <linux/config.h>
  24 #include <linux/kernel.h>
  25 #include <linux/module.h>
  26 #include <linux/init.h>
  27 #include <linux/smp.h>
  28 #include <linux/cpufreq.h>
  29 #include <linux/slab.h>
  30 #include <linux/cpumask.h>
  31 #include <linux/sched.h>        /* current / set_cpus_allowed() */
  32
  33 #include <asm/processor.h>
  34 #include <asm/msr.h>
  35 #include <asm/timex.h>
  36
  37 #include "speedstep-lib.h"
  38
  39 #define PFX     "p4-clockmod: "
  40 #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "p4-clockmod", msg)
  41
  42 /*
  43  * Duty Cycle (3bits), note DC_DISABLE is not specified in
  44  * intel docs i just use it to mean disable
  45  */
  46 enum {
  47         DC_RESV, DC_DFLT, DC_25PT, DC_38PT, DC_50PT,
  48         DC_64PT, DC_75PT, DC_88PT, DC_DISABLE
  49 };
  50
  51 #define DC_ENTRIES      8
  52
  53
  54 static int has_N44_O17_errata[NR_CPUS];
  55 static int has_N60_errata[NR_CPUS];
  56 static unsigned int stock_freq;
  57 static struct cpufreq_driver p4clockmod_driver;
  58 static unsigned int cpufreq_p4_get(unsigned int cpu);
  59
  60 static int cpufreq_p4_setdc(unsigned int cpu, unsigned int newstate)
  61 {
  62         u32 l, h;
  63
  64         if (!cpu_online(cpu) || (newstate > DC_DISABLE) || (newstate == DC_RESV))
  65                 return -EINVAL;
  66
  67         rdmsr(MSR_IA32_THERM_STATUS, l, h);
  68
  69         if (l & 0x01)
  70                 dprintk("CPU#%d currently thermal throttled\n", cpu);
  71
  72         if (has_N44_O17_errata[cpu] && (newstate == DC_25PT || newstate == DC_DFLT))
  73                 newstate = DC_38PT;
  74
  75         rdmsr(MSR_IA32_THERM_CONTROL, l, h);
  76         if (newstate == DC_DISABLE) {
  77                 dprintk("CPU#%d disabling modulation\n", cpu);
  78                 wrmsr(MSR_IA32_THERM_CONTROL, l & ~(1<<4), h);
  79         } else {
  80                 dprintk("CPU#%d setting duty cycle to %d%%\n",
  81                         cpu, ((125 * newstate) / 10));
  82                 /* bits 63 - 5  : reserved
  83                  * bit  4       : enable/disable
  84                  * bits 3-1     : duty cycle
  85                  * bit  0       : reserved
  86                  */
  87                 l = (l & ~14);
  88                 l = l | (1<<4) | ((newstate & 0x7)<<1);
  89                 wrmsr(MSR_IA32_THERM_CONTROL, l, h);
  90         }
  91
  92         return 0;
  93 }
  94
  95
  96 static struct cpufreq_frequency_table p4clockmod_table[] = {
  97         {DC_RESV, CPUFREQ_ENTRY_INVALID},
  98         {DC_DFLT, 0},
  99         {DC_25PT, 0},
 100         {DC_38PT, 0},
 101         {DC_50PT, 0},
 102         {DC_64PT, 0},
 103         {DC_75PT, 0},
 104         {DC_88PT, 0},
 105         {DC_DISABLE, 0},
 106         {DC_RESV, CPUFREQ_TABLE_END},
 107 };
 108
 109
 110 static int cpufreq_p4_target(struct cpufreq_policy *policy,
 111                              unsigned int target_freq,
 112                              unsigned int relation)
 113 {
 114         unsigned int    newstate = DC_RESV;
 115         struct cpufreq_freqs freqs;
 116         cpumask_t cpus_allowed;
 117         int i;
 118
 119         if (cpufreq_frequency_table_target(policy, &p4clockmod_table[0], target_freq, relation, &newstate))
 120                 return -EINVAL;
 121
 122         freqs.old = cpufreq_p4_get(policy->cpu);
 123         freqs.new = stock_freq * p4clockmod_table[newstate].index / 8;
 124
 125         if (freqs.new == freqs.old)
 126                 return 0;
 127
 128         /* notifiers */
 129         for_each_cpu_mask(i, policy->cpus) {
 130                 freqs.cpu = i;
 131                 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
 132         }
 133
 134         /* run on each logical CPU, see section 13.15.3 of IA32 Intel Architecture Software
 135          * Developer's Manual, Volume 3
 136          */
 137         cpus_allowed = current->cpus_allowed;
 138
 139         for_each_cpu_mask(i, policy->cpus) {
 140                 cpumask_t this_cpu = cpumask_of_cpu(i);
 141
 142                 set_cpus_allowed(current, this_cpu);
 143                 BUG_ON(smp_processor_id() != i);
 144
 145                 cpufreq_p4_setdc(i, p4clockmod_table[newstate].index);
 146         }
 147         set_cpus_allowed(current, cpus_allowed);
 148
 149         /* notifiers */
 150         for_each_cpu_mask(i, policy->cpus) {
 151                 freqs.cpu = i;
 152                 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 153         }
 154
 155         return 0;
 156 }
 157
 158
 159 static int cpufreq_p4_verify(struct cpufreq_policy *policy)
 160 {
 161         return cpufreq_frequency_table_verify(policy, &p4clockmod_table[0]);
 162 }
 163
 164
 165 static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c)
 166 {
 167         if ((c->x86 == 0x06) && (c->x86_model == 0x09)) {
 168                 /* Pentium M (Banias) */
 169                 printk(KERN_WARNING PFX "Warning: Pentium M detected. "
 170                        "The speedstep_centrino module offers voltage scaling"
 171                        " in addition of frequency scaling. You should use "
 172                        "that instead of p4-clockmod, if possible.\n");
 173                 return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PM);
 174         }
 175
 176         if ((c->x86 == 0x06) && (c->x86_model == 0x0D)) {
 177                 /* Pentium M (Dothan) */
 178                 printk(KERN_WARNING PFX "Warning: Pentium M detected. "
 179                        "The speedstep_centrino module offers voltage scaling"
 180                        " in addition of frequency scaling. You should use "
 181                        "that instead of p4-clockmod, if possible.\n");
 182                 /* on P-4s, the TSC runs with constant frequency independent whether
 183                  * throttling is active or not. */
 184                 p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
 185                 return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PM);
 186         }
 187
 188         if (c->x86 != 0xF) {
 189                 printk(KERN_WARNING PFX "Unknown p4-clockmod-capable CPU. Please send an e-mail to <linux@brodo.de>\n");
 190                 return 0;
 191         }
 192
 193         /* on P-4s, the TSC runs with constant frequency independent whether
 194          * throttling is active or not. */
 195         p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
 196
 197         if (speedstep_detect_processor() == SPEEDSTEP_PROCESSOR_P4M) {
 198                 printk(KERN_WARNING PFX "Warning: Pentium 4-M detected. "
 199                        "The speedstep-ich or acpi cpufreq modules offer "
 200                        "voltage scaling in addition of frequency scaling. "
 201                        "You should use either one instead of p4-clockmod, "
 202                        "if possible.\n");
 203                 return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_P4M);
 204         }
 205
 206         return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_P4D);
 207 }
 208
 209
 210
 211 static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy)
 212 {
 213         struct cpuinfo_x86 *c = &cpu_data[policy->cpu];
 214         int cpuid = 0;
 215         unsigned int i;
 216
 217 #ifdef CONFIG_SMP
 218         policy->cpus = cpu_sibling_map[policy->cpu];
 219 #endif
 220
 221         /* Errata workaround */
 222         cpuid = (c->x86 << 8) | (c->x86_model << 4) | c->x86_mask;
 223         switch (cpuid) {
 224         case 0x0f07:
 225         case 0x0f0a:
 226         case 0x0f11:
 227         case 0x0f12:
 228                 has_N44_O17_errata[policy->cpu] = 1;
 229                 dprintk("has errata -- disabling low frequencies\n");
 230                 break;
 231
 232         case 0x0f29:
 233                 has_N60_errata[policy->cpu] = 1;
 234                 dprintk("has errata -- disabling frequencies lower than 2ghz\n");
 235                 break;
 236         }
 237
 238         /* get max frequency */
 239         stock_freq = cpufreq_p4_get_frequency(c);
 240         if (!stock_freq)
 241                 return -EINVAL;
 242
 243         /* table init */
 244         for (i=1; (p4clockmod_table[i].frequency != CPUFREQ_TABLE_END); i++) {
 245                 if ((i<2) && (has_N44_O17_errata[policy->cpu]))
 246                         p4clockmod_table[i].frequency = CPUFREQ_ENTRY_INVALID;
 247                 else if (has_N60_errata[policy->cpu] && ((stock_freq * i)/8) < 2000000)
 248                         p4clockmod_table[i].frequency = CPUFREQ_ENTRY_INVALID;
 249                 else
 250                         p4clockmod_table[i].frequency = (stock_freq * i)/8;
 251         }
 252         cpufreq_frequency_table_get_attr(p4clockmod_table, policy->cpu);
 253
 254         /* cpuinfo and default policy values */
 255         policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
 256         policy->cpuinfo.transition_latency = 1000000; /* assumed */
 257         policy->cur = stock_freq;
 258
 259         return cpufreq_frequency_table_cpuinfo(policy, &p4clockmod_table[0]);
 260 }
 261
 262
 263 static int cpufreq_p4_cpu_exit(struct cpufreq_policy *policy)
 264 {
 265         cpufreq_frequency_table_put_attr(policy->cpu);
 266         return 0;
 267 }
 268
 269 static unsigned int cpufreq_p4_get(unsigned int cpu)
 270 {
 271         cpumask_t cpus_allowed;
 272         u32 l, h;
 273
 274         cpus_allowed = current->cpus_allowed;
 275
 276         set_cpus_allowed(current, cpumask_of_cpu(cpu));
 277         BUG_ON(smp_processor_id() != cpu);
 278
 279         rdmsr(MSR_IA32_THERM_CONTROL, l, h);
 280
 281         set_cpus_allowed(current, cpus_allowed);
 282
 283         if (l & 0x10) {
 284                 l = l >> 1;
 285                 l &= 0x7;
 286         } else
 287                 l = DC_DISABLE;
 288
 289         if (l != DC_DISABLE)
 290                 return (stock_freq * l / 8);
 291
 292         return stock_freq;
 293 }
 294
 295 static struct freq_attr* p4clockmod_attr[] = {
 296         &cpufreq_freq_attr_scaling_available_freqs,
 297         NULL,
 298 };
 299
 300 static struct cpufreq_driver p4clockmod_driver = {
 301         .verify         = cpufreq_p4_verify,
 302         .target         = cpufreq_p4_target,
 303         .init           = cpufreq_p4_cpu_init,
 304         .exit           = cpufreq_p4_cpu_exit,
 305         .get            = cpufreq_p4_get,
 306         .name           = "p4-clockmod",
 307         .owner          = THIS_MODULE,
 308         .attr           = p4clockmod_attr,
 309 };
 310
 311
 312 static int __init cpufreq_p4_init(void)
 313 {
 314         struct cpuinfo_x86 *c = cpu_data;
 315         int ret;
 316
 317         /*
 318          * THERM_CONTROL is architectural for IA32 now, so
 319          * we can rely on the capability checks
 320          */
 321         if (c->x86_vendor != X86_VENDOR_INTEL)
 322                 return -ENODEV;
 323
 324         if (!test_bit(X86_FEATURE_ACPI, c->x86_capability) ||
 325                 !test_bit(X86_FEATURE_ACC, c->x86_capability))
 326                 return -ENODEV;
 327
 328         ret = cpufreq_register_driver(&p4clockmod_driver);
 329         if (!ret)
 330                 printk(KERN_INFO PFX "P4/Xeon(TM) CPU On-Demand Clock Modulation available\n");
 331
 332         return (ret);
 333 }
 334
 335
 336 static void __exit cpufreq_p4_exit(void)
 337 {
 338         cpufreq_unregister_driver(&p4clockmod_driver);
 339 }
 340
 341
 342 MODULE_AUTHOR ("Zwane Mwaikambo <zwane@commfireservices.com>");
 343 MODULE_DESCRIPTION ("cpufreq driver for Pentium(TM) 4/Xeon(TM)");
 344 MODULE_LICENSE ("GPL");
 345
 346 late_initcall(cpufreq_p4_init);
 347 module_exit(cpufreq_p4_exit);