drivers/staging/winbond/mds_s.h

   1 ////////////////////////////////////////////////////////////////////////////////////////////////////////
   2 #define MAX_USB_TX_DESCRIPTOR           15              // IS89C35 ability
   3 #define MAX_USB_TX_BUFFER_NUMBER        4               // Virtual pre-buffer number of MAX_USB_TX_BUFFER
   4 #define MAX_USB_TX_BUFFER                       4096    // IS89C35 ability 4n alignment is required for hardware
   5
   6 #define MDS_EVENT_INDICATE( _A, _B, _F )        OS_EVENT_INDICATE( _A, _B, _F )
   7 #define AUTH_REQUEST_PAIRWISE_ERROR                     0               // _F flag setting
   8 #define AUTH_REQUEST_GROUP_ERROR                        1               // _F flag setting
   9
  10 // For variable setting
  11 #define CURRENT_BSS_TYPE                                psBSS(psLOCAL->wConnectedSTAindex)->bBssType
  12 #define CURRENT_WEP_MODE                                psSME->_dot11PrivacyInvoked
  13 #define CURRENT_BSSID                                   psBSS(psLOCAL->wConnectedSTAindex)->abBssID
  14 #define CURRENT_DESIRED_WPA_ENABLE              ((psSME->bDesiredAuthMode==WPA_AUTH)||(psSME->bDesiredAuthMode==WPAPSK_AUTH))
  15 #ifdef _WPA2_
  16 #define CURRENT_DESIRED_WPA2_ENABLE             ((psSME->bDesiredAuthMode==WPA2_AUTH)||(psSME->bDesiredAuthMode==WPA2PSK_AUTH))
  17 #endif //end def _WPA2_
  18 #define CURRENT_PAIRWISE_KEY_OK                 psSME->pairwise_key_ok
  19 //[20040712 WS]
  20 #define CURRENT_GROUP_KEY_OK                    psSME->group_key_ok
  21 #define CURRENT_PAIRWISE_KEY                    psSME->tx_mic_key
  22 #define CURRENT_GROUP_KEY                               psSME->group_tx_mic_key
  23 #define CURRENT_ENCRYPT_STATUS                  psSME->encrypt_status
  24 #define CURRENT_WEP_ID                                  Adapter->sSmePara._dot11WEPDefaultKeyID
  25 #define CURRENT_CONTROL_PORT_BLOCK              ( psSME->wpa_ok!=1 || (Adapter->Mds.boCounterMeasureBlock==1 && (CURRENT_ENCRYPT_STATUS==ENCRYPT_TKIP)) )
  26 #define CURRENT_FRAGMENT_THRESHOLD              (Adapter->Mds.TxFragmentThreshold & ~0x1)
  27 #define CURRENT_PREAMBLE_MODE                   psLOCAL->boShortPreamble?WLAN_PREAMBLE_TYPE_SHORT:WLAN_PREAMBLE_TYPE_LONG
  28 #define CURRENT_LINK_ON                                 OS_LINK_STATUS
  29 #define CURRENT_TX_RATE                                 Adapter->sLocalPara.CurrentTxRate
  30 #define CURRENT_FALL_BACK_TX_RATE               Adapter->sLocalPara.CurrentTxFallbackRate
  31 #define CURRENT_TX_RATE_FOR_MNG                 Adapter->sLocalPara.CurrentTxRateForMng
  32 #define CURRENT_PROTECT_MECHANISM               psLOCAL->boProtectMechanism
  33 #define CURRENT_RTS_THRESHOLD                   Adapter->Mds.TxRTSThreshold
  34
  35 #define MIB_GS_XMIT_OK_INC                              Adapter->sLocalPara.GS_XMIT_OK++
  36 #define MIB_GS_RCV_OK_INC                               Adapter->sLocalPara.GS_RCV_OK++
  37 #define MIB_GS_XMIT_ERROR_INC                   Adapter->sLocalPara.GS_XMIT_ERROR
  38
  39 //---------- TX -----------------------------------
  40 #define ETHERNET_TX_DESCRIPTORS         MAX_USB_TX_BUFFER_NUMBER
  41
  42 //---------- RX ------------------------------------
  43 #define ETHERNET_RX_DESCRIPTORS                 8       //It's not necessary to allocate more than 2 in sync indicate
  44
  45 //================================================================
  46 // Configration default value
  47 //================================================================
  48 #define DEFAULT_MULTICASTLISTMAX                32              // standard
  49 #define DEFAULT_TX_BURSTLENGTH                  3               // 32 Longwords
  50 #define DEFAULT_RX_BURSTLENGTH                  3               // 32 Longwords
  51 #define DEFAULT_TX_THRESHOLD                    0               // Full Packet
  52 #define DEFAULT_RX_THRESHOLD                    0               // Full Packet
  53 #define DEFAULT_MAXTXRATE                               6               // 11 Mbps (Long)
  54 #define DEFAULT_CHANNEL                                 3               // Chennel 3
  55 #define DEFAULT_RTSThreshold                    2347    // Disable RTS
  56 //#define DEFAULT_PME                                           1               // Enable
  57 #define DEFAULT_PME                                             0               // Disable
  58 #define DEFAULT_SIFSTIME                                10
  59 #define DEFAULT_ACKTIME_1ML             304     // 148+44+112 911220 by LCC
  60 #define DEFAULT_ACKTIME_2ML             248     // 148+44+56 911220 by LCC
  61 #define DEFAULT_FRAGMENT_THRESHOLD      2346    // No fragment
  62 #define DEFAULT_PREAMBLE_LENGTH                 72
  63 #define DEFAULT_PLCPHEADERTIME_LENGTH   24
  64
  65 /*------------------------------------------------------------------------
  66  0.96 sec since time unit of the R03 for the current, W89C32 is about 60ns
  67  instead of 960 ns. This shall be fixed in the future W89C32
  68  -------------------------------------------------------------------------*/
  69 #define DEFAULT_MAX_RECEIVE_TIME        16440000
  70
  71 #define RX_BUF_SIZE                                             2352        // 600      // For 301 must be multiple of 8
  72 #define MAX_RX_DESCRIPTORS              18         // Rx Layer 2
  73 #define MAX_BUFFER_QUEUE        8 // The value is always equal 8 due to NDIS_PACKET's MiniportReserved field size
  74
  75
  76 // For brand-new rx system
  77 #define MDS_ID_IGNORE                           ETHERNET_RX_DESCRIPTORS
  78
  79 // For Tx Packet status classify
  80 #define PACKET_FREE_TO_USE                                              0
  81 #define PACKET_COME_FROM_NDIS                                   0x08
  82 #define PACKET_COME_FROM_MLME                                   0x80
  83 #define PACKET_SEND_COMPLETE                                    0xff
  84
  85 typedef struct _MDS
  86 {
  87         // For Tx usage
  88         u8      TxOwner[ ((MAX_USB_TX_BUFFER_NUMBER + 3) & ~0x03) ];
  89         PUCHAR  pTxBuffer;
  90         u16     TxBufferSize[ ((MAX_USB_TX_BUFFER_NUMBER + 1) & ~0x01) ];
  91         u8      TxDesFrom[ ((MAX_USB_TX_DESCRIPTOR + 3) & ~0x03) ];//931130.4.u // 1: MLME 2: NDIS control 3: NDIS data
  92         u8      TxCountInBuffer[ ((MAX_USB_TX_DESCRIPTOR + 3) & ~0x03) ]; // 20060928
  93
  94         u8      TxFillIndex;//the next index of TxBuffer can be used
  95         u8      TxDesIndex;//The next index of TxDes can be used
  96         u8      ScanTxPause;    //data Tx pause because the scanning is progressing, but probe request Tx won't.
  97         u8      TxPause;//For pause the Mds_Tx modult
  98
  99         OS_ATOMIC       TxThreadCount;//For thread counting 931130.4.v
 100 //950301 delete due to HW
 101 //      OS_ATOMIC       TxConcurrentCount;//931130.4.w
 102
 103         u16     TxResult[ ((MAX_USB_TX_DESCRIPTOR + 1) & ~0x01) ];//Collect the sending result of Mpdu
 104
 105         u8      MicRedundant[8]; // For tmp use
 106         PUCHAR  MicWriteAddress[2]; //The start address to fill the Mic, use 2 point due to Mic maybe fragment
 107
 108         u16     MicWriteSize[2]; //931130.4.x
 109
 110         u16     MicAdd; // If want to add the Mic, this variable equal to 8
 111         u16     MicWriteIndex;//The number of MicWriteAddress 931130.4.y
 112
 113         u8      TxRate[ ((MAX_USB_TX_DESCRIPTOR+1)&~0x01) ][2]; // [0] current tx rate, [1] fall back rate
 114         u8      TxInfo[ ((MAX_USB_TX_DESCRIPTOR+1)&~0x01) ];    //Store information for callback function
 115
 116         //WKCHEN added for scanning mechanism
 117         u8      TxToggle;               //It is TRUE if there are tx activities in some time interval
 118         u8      Reserved_[3];
 119
 120         //---------- for Tx Parameter
 121         u16     TxFragmentThreshold;            // For frame body only
 122         u16     TxRTSThreshold;
 123
 124         u32             MaxReceiveTime;//911220.3 Add
 125
 126         // depend on OS,
 127         u32                                     MulticastListNo;
 128         u32                                     PacketFilter; // Setting by NDIS, the current packet filter in use.
 129         u8                                      MulticastAddressesArray[DEFAULT_MULTICASTLISTMAX][MAC_ADDR_LENGTH];
 130
 131         //COUNTERMEASURE
 132         u8              bMICfailCount;
 133         u8              boCounterMeasureBlock;
 134         u8              reserved_4[2];
 135
 136         //NDIS_MINIPORT_TIMER   nTimer;
 137         OS_TIMER        nTimer;
 138
 139         u32     TxTsc; // 20060214
 140         u32     TxTsc_2; // 20060214
 141
 142 } MDS, *PMDS;
 143
 144
 145 typedef struct _RxBuffer
 146 {
 147     PUCHAR  pBufferAddress;     // Pointer the received data buffer.
 148         u16     BufferSize;
 149         u8      RESERVED;
 150         u8      BufferIndex;// Only 1 byte
 151 } RXBUFFER, *PRXBUFFER;
 152
 153 //
 154 // Reveive Layer 1 Format.
 155 //----------------------------
 156 typedef struct _RXLAYER1
 157 {
 158     u16  SequenceNumber;     // The sequence number of the last received packet.
 159         u16     BufferTotalSize;
 160
 161         u32     InUsed;
 162     u32   DecryptionMethod;   // The desired defragment number of the next incoming packet.
 163
 164         u8      DeFragmentNumber;
 165         u8      FrameType;
 166     u8  TypeEncapsulated;
 167         u8      BufferNumber;
 168
 169         u32     FirstFrameArrivedTime;
 170
 171         RXBUFFER        BufferQueue[ MAX_BUFFER_QUEUE ];
 172
 173         u8              LastFrameType; // 20061004 for fix intel 3945 's bug
 174         u8              RESERVED[3];  //@@ anson
 175
 176         /////////////////////////////////////////////////////////////////////////////////////////////
 177         // For brand-new Rx system
 178         u8      ReservedBuffer[ 2400 ];//If Buffer ID is reserved one, it must copy the data into this area
 179         PUCHAR  ReservedBufferPoint;// Point to the next availabe address of reserved buffer
 180
 181 }RXLAYER1, * PRXLAYER1;
 182
 183