2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
8 #include <linux/module.h>
9 #include <linux/regset.h>
10 #include <linux/sched.h>
12 #include <asm/sigcontext.h>
13 #include <asm/processor.h>
14 #include <asm/math_emu.h>
15 #include <asm/uaccess.h>
16 #include <asm/ptrace.h>
21 # include <asm/sigcontext32.h>
22 # include <asm/user32.h>
24 # define save_i387_ia32 save_i387
25 # define restore_i387_ia32 restore_i387
26 # define _fpstate_ia32 _fpstate
27 # define sig_xstate_ia32_size sig_xstate_size
28 # define user_i387_ia32_struct user_i387_struct
29 # define user32_fxsr_struct user_fxsr_struct
32 #ifdef CONFIG_MATH_EMULATION
33 # define HAVE_HWFP (boot_cpu_data.hard_math)
38 static unsigned int mxcsr_feature_mask __read_mostly
= 0xffffffffu
;
39 unsigned int xstate_size
;
40 unsigned int sig_xstate_ia32_size
= sizeof(struct _fpstate_ia32
);
41 static struct i387_fxsave_struct fx_scratch __cpuinitdata
;
43 void __cpuinit
mxcsr_feature_mask_init(void)
45 unsigned long mask
= 0;
49 memset(&fx_scratch
, 0, sizeof(struct i387_fxsave_struct
));
50 asm volatile("fxsave %0" : : "m" (fx_scratch
));
51 mask
= fx_scratch
.mxcsr_mask
;
55 mxcsr_feature_mask
&= mask
;
59 void __init
init_thread_xstate(void)
62 xstate_size
= sizeof(struct i387_soft_struct
);
72 xstate_size
= sizeof(struct i387_fxsave_struct
);
75 xstate_size
= sizeof(struct i387_fsave_struct
);
81 * Called at bootup to set up the initial FPU state that is later cloned
84 void __cpuinit
fpu_init(void)
86 unsigned long oldcr0
= read_cr0();
88 set_in_cr4(X86_CR4_OSFXSR
);
89 set_in_cr4(X86_CR4_OSXMMEXCPT
);
91 write_cr0(oldcr0
& ~(X86_CR0_TS
|X86_CR0_EM
)); /* clear TS and EM */
94 * Boot processor to setup the FP and extended state context info.
96 if (!smp_processor_id())
100 mxcsr_feature_mask_init();
101 /* clean state in init */
103 current_thread_info()->status
= TS_XSAVE
;
105 current_thread_info()->status
= 0;
108 #endif /* CONFIG_X86_64 */
111 * The _current_ task is using the FPU for the first time
112 * so initialize it and set the mxcsr to its default
113 * value at reset if we support XMM instructions and then
114 * remeber the current task has used the FPU.
116 int init_fpu(struct task_struct
*tsk
)
118 if (tsk_used_math(tsk
)) {
119 if (HAVE_HWFP
&& tsk
== current
)
125 * Memory allocation at the first usage of the FPU and other state.
127 if (!tsk
->thread
.xstate
) {
128 tsk
->thread
.xstate
= kmem_cache_alloc(task_xstate_cachep
,
130 if (!tsk
->thread
.xstate
)
136 memset(tsk
->thread
.xstate
, 0, xstate_size
);
138 set_stopped_child_used_math(tsk
);
144 struct i387_fxsave_struct
*fx
= &tsk
->thread
.xstate
->fxsave
;
146 memset(fx
, 0, xstate_size
);
149 fx
->mxcsr
= MXCSR_DEFAULT
;
151 struct i387_fsave_struct
*fp
= &tsk
->thread
.xstate
->fsave
;
152 memset(fp
, 0, xstate_size
);
153 fp
->cwd
= 0xffff037fu
;
154 fp
->swd
= 0xffff0000u
;
155 fp
->twd
= 0xffffffffu
;
156 fp
->fos
= 0xffff0000u
;
159 * Only the device not available exception or ptrace can call init_fpu.
161 set_stopped_child_used_math(tsk
);
165 int fpregs_active(struct task_struct
*target
, const struct user_regset
*regset
)
167 return tsk_used_math(target
) ? regset
->n
: 0;
170 int xfpregs_active(struct task_struct
*target
, const struct user_regset
*regset
)
172 return (cpu_has_fxsr
&& tsk_used_math(target
)) ? regset
->n
: 0;
175 int xfpregs_get(struct task_struct
*target
, const struct user_regset
*regset
,
176 unsigned int pos
, unsigned int count
,
177 void *kbuf
, void __user
*ubuf
)
184 ret
= init_fpu(target
);
188 return user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
,
189 &target
->thread
.xstate
->fxsave
, 0, -1);
192 int xfpregs_set(struct task_struct
*target
, const struct user_regset
*regset
,
193 unsigned int pos
, unsigned int count
,
194 const void *kbuf
, const void __user
*ubuf
)
201 ret
= init_fpu(target
);
205 set_stopped_child_used_math(target
);
207 ret
= user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
,
208 &target
->thread
.xstate
->fxsave
, 0, -1);
211 * mxcsr reserved bits must be masked to zero for security reasons.
213 target
->thread
.xstate
->fxsave
.mxcsr
&= mxcsr_feature_mask
;
218 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
221 * FPU tag word conversions.
224 static inline unsigned short twd_i387_to_fxsr(unsigned short twd
)
226 unsigned int tmp
; /* to avoid 16 bit prefixes in the code */
228 /* Transform each pair of bits into 01 (valid) or 00 (empty) */
230 tmp
= (tmp
| (tmp
>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
231 /* and move the valid bits to the lower byte. */
232 tmp
= (tmp
| (tmp
>> 1)) & 0x3333; /* 00VV00VV00VV00VV */
233 tmp
= (tmp
| (tmp
>> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
234 tmp
= (tmp
| (tmp
>> 4)) & 0x00ff; /* 00000000VVVVVVVV */
239 #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16);
240 #define FP_EXP_TAG_VALID 0
241 #define FP_EXP_TAG_ZERO 1
242 #define FP_EXP_TAG_SPECIAL 2
243 #define FP_EXP_TAG_EMPTY 3
245 static inline u32
twd_fxsr_to_i387(struct i387_fxsave_struct
*fxsave
)
248 u32 tos
= (fxsave
->swd
>> 11) & 7;
249 u32 twd
= (unsigned long) fxsave
->twd
;
251 u32 ret
= 0xffff0000u
;
254 for (i
= 0; i
< 8; i
++, twd
>>= 1) {
256 st
= FPREG_ADDR(fxsave
, (i
- tos
) & 7);
258 switch (st
->exponent
& 0x7fff) {
260 tag
= FP_EXP_TAG_SPECIAL
;
263 if (!st
->significand
[0] &&
264 !st
->significand
[1] &&
265 !st
->significand
[2] &&
267 tag
= FP_EXP_TAG_ZERO
;
269 tag
= FP_EXP_TAG_SPECIAL
;
272 if (st
->significand
[3] & 0x8000)
273 tag
= FP_EXP_TAG_VALID
;
275 tag
= FP_EXP_TAG_SPECIAL
;
279 tag
= FP_EXP_TAG_EMPTY
;
281 ret
|= tag
<< (2 * i
);
287 * FXSR floating point environment conversions.
291 convert_from_fxsr(struct user_i387_ia32_struct
*env
, struct task_struct
*tsk
)
293 struct i387_fxsave_struct
*fxsave
= &tsk
->thread
.xstate
->fxsave
;
294 struct _fpreg
*to
= (struct _fpreg
*) &env
->st_space
[0];
295 struct _fpxreg
*from
= (struct _fpxreg
*) &fxsave
->st_space
[0];
298 env
->cwd
= fxsave
->cwd
| 0xffff0000u
;
299 env
->swd
= fxsave
->swd
| 0xffff0000u
;
300 env
->twd
= twd_fxsr_to_i387(fxsave
);
303 env
->fip
= fxsave
->rip
;
304 env
->foo
= fxsave
->rdp
;
305 if (tsk
== current
) {
307 * should be actually ds/cs at fpu exception time, but
308 * that information is not available in 64bit mode.
310 asm("mov %%ds, %[fos]" : [fos
] "=r" (env
->fos
));
311 asm("mov %%cs, %[fcs]" : [fcs
] "=r" (env
->fcs
));
313 struct pt_regs
*regs
= task_pt_regs(tsk
);
315 env
->fos
= 0xffff0000 | tsk
->thread
.ds
;
319 env
->fip
= fxsave
->fip
;
320 env
->fcs
= (u16
) fxsave
->fcs
| ((u32
) fxsave
->fop
<< 16);
321 env
->foo
= fxsave
->foo
;
322 env
->fos
= fxsave
->fos
;
325 for (i
= 0; i
< 8; ++i
)
326 memcpy(&to
[i
], &from
[i
], sizeof(to
[0]));
329 static void convert_to_fxsr(struct task_struct
*tsk
,
330 const struct user_i387_ia32_struct
*env
)
333 struct i387_fxsave_struct
*fxsave
= &tsk
->thread
.xstate
->fxsave
;
334 struct _fpreg
*from
= (struct _fpreg
*) &env
->st_space
[0];
335 struct _fpxreg
*to
= (struct _fpxreg
*) &fxsave
->st_space
[0];
338 fxsave
->cwd
= env
->cwd
;
339 fxsave
->swd
= env
->swd
;
340 fxsave
->twd
= twd_i387_to_fxsr(env
->twd
);
341 fxsave
->fop
= (u16
) ((u32
) env
->fcs
>> 16);
343 fxsave
->rip
= env
->fip
;
344 fxsave
->rdp
= env
->foo
;
345 /* cs and ds ignored */
347 fxsave
->fip
= env
->fip
;
348 fxsave
->fcs
= (env
->fcs
& 0xffff);
349 fxsave
->foo
= env
->foo
;
350 fxsave
->fos
= env
->fos
;
353 for (i
= 0; i
< 8; ++i
)
354 memcpy(&to
[i
], &from
[i
], sizeof(from
[0]));
357 int fpregs_get(struct task_struct
*target
, const struct user_regset
*regset
,
358 unsigned int pos
, unsigned int count
,
359 void *kbuf
, void __user
*ubuf
)
361 struct user_i387_ia32_struct env
;
364 ret
= init_fpu(target
);
369 return fpregs_soft_get(target
, regset
, pos
, count
, kbuf
, ubuf
);
372 return user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
,
373 &target
->thread
.xstate
->fsave
, 0,
377 if (kbuf
&& pos
== 0 && count
== sizeof(env
)) {
378 convert_from_fxsr(kbuf
, target
);
382 convert_from_fxsr(&env
, target
);
384 return user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
, &env
, 0, -1);
387 int fpregs_set(struct task_struct
*target
, const struct user_regset
*regset
,
388 unsigned int pos
, unsigned int count
,
389 const void *kbuf
, const void __user
*ubuf
)
391 struct user_i387_ia32_struct env
;
394 ret
= init_fpu(target
);
398 set_stopped_child_used_math(target
);
401 return fpregs_soft_set(target
, regset
, pos
, count
, kbuf
, ubuf
);
404 return user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
,
405 &target
->thread
.xstate
->fsave
, 0, -1);
408 if (pos
> 0 || count
< sizeof(env
))
409 convert_from_fxsr(&env
, target
);
411 ret
= user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
, &env
, 0, -1);
413 convert_to_fxsr(target
, &env
);
419 * Signal frame handlers.
422 static inline int save_i387_fsave(struct _fpstate_ia32 __user
*buf
)
424 struct task_struct
*tsk
= current
;
425 struct i387_fsave_struct
*fp
= &tsk
->thread
.xstate
->fsave
;
428 fp
->status
= fp
->swd
;
429 if (__copy_to_user(buf
, fp
, sizeof(struct i387_fsave_struct
)))
434 static int save_i387_fxsave(struct _fpstate_ia32 __user
*buf
)
436 struct task_struct
*tsk
= current
;
437 struct i387_fxsave_struct
*fx
= &tsk
->thread
.xstate
->fxsave
;
438 struct user_i387_ia32_struct env
;
443 convert_from_fxsr(&env
, tsk
);
444 if (__copy_to_user(buf
, &env
, sizeof(env
)))
447 err
|= __put_user(fx
->swd
, &buf
->status
);
448 err
|= __put_user(X86_FXSR_MAGIC
, &buf
->magic
);
452 if (__copy_to_user(&buf
->_fxsr_env
[0], fx
,
453 sizeof(struct i387_fxsave_struct
)))
458 int save_i387_ia32(struct _fpstate_ia32 __user
*buf
)
463 * This will cause a "finit" to be triggered by the next
464 * attempted FPU operation by the 'current' process.
469 return fpregs_soft_get(current
, NULL
,
470 0, sizeof(struct user_i387_ia32_struct
),
475 return save_i387_fxsave(buf
);
477 return save_i387_fsave(buf
);
480 static inline int restore_i387_fsave(struct _fpstate_ia32 __user
*buf
)
482 struct task_struct
*tsk
= current
;
484 return __copy_from_user(&tsk
->thread
.xstate
->fsave
, buf
,
485 sizeof(struct i387_fsave_struct
));
488 static int restore_i387_fxsave(struct _fpstate_ia32 __user
*buf
)
490 struct task_struct
*tsk
= current
;
491 struct user_i387_ia32_struct env
;
494 err
= __copy_from_user(&tsk
->thread
.xstate
->fxsave
, &buf
->_fxsr_env
[0],
495 sizeof(struct i387_fxsave_struct
));
496 /* mxcsr reserved bits must be masked to zero for security reasons */
497 tsk
->thread
.xstate
->fxsave
.mxcsr
&= mxcsr_feature_mask
;
498 if (err
|| __copy_from_user(&env
, buf
, sizeof(env
)))
500 convert_to_fxsr(tsk
, &env
);
505 int restore_i387_ia32(struct _fpstate_ia32 __user
*buf
)
508 struct task_struct
*tsk
= current
;
521 err
= restore_i387_fxsave(buf
);
523 err
= restore_i387_fsave(buf
);
525 err
= fpregs_soft_set(current
, NULL
,
526 0, sizeof(struct user_i387_ia32_struct
),
535 * FPU state for core dumps.
536 * This is only used for a.out dumps now.
537 * It is declared generically using elf_fpregset_t (which is
538 * struct user_i387_struct) but is in fact only used for 32-bit
539 * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
541 int dump_fpu(struct pt_regs
*regs
, struct user_i387_struct
*fpu
)
543 struct task_struct
*tsk
= current
;
546 fpvalid
= !!used_math();
548 fpvalid
= !fpregs_get(tsk
, NULL
,
549 0, sizeof(struct user_i387_ia32_struct
),
554 EXPORT_SYMBOL(dump_fpu
);
556 #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */