2 * V4L2 Driver for i.MX3x camera host
5 * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/version.h>
15 #include <linux/videodev2.h>
16 #include <linux/platform_device.h>
17 #include <linux/clk.h>
18 #include <linux/vmalloc.h>
19 #include <linux/interrupt.h>
21 #include <media/v4l2-common.h>
22 #include <media/v4l2-dev.h>
23 #include <media/videobuf-dma-contig.h>
24 #include <media/soc_camera.h>
27 #include <mach/mx3_camera.h>
29 #define MX3_CAM_DRV_NAME "mx3-camera"
31 /* CMOS Sensor Interface Registers */
32 #define CSI_REG_START 0x60
34 #define CSI_SENS_CONF (0x60 - CSI_REG_START)
35 #define CSI_SENS_FRM_SIZE (0x64 - CSI_REG_START)
36 #define CSI_ACT_FRM_SIZE (0x68 - CSI_REG_START)
37 #define CSI_OUT_FRM_CTRL (0x6C - CSI_REG_START)
38 #define CSI_TST_CTRL (0x70 - CSI_REG_START)
39 #define CSI_CCIR_CODE_1 (0x74 - CSI_REG_START)
40 #define CSI_CCIR_CODE_2 (0x78 - CSI_REG_START)
41 #define CSI_CCIR_CODE_3 (0x7C - CSI_REG_START)
42 #define CSI_FLASH_STROBE_1 (0x80 - CSI_REG_START)
43 #define CSI_FLASH_STROBE_2 (0x84 - CSI_REG_START)
45 #define CSI_SENS_CONF_VSYNC_POL_SHIFT 0
46 #define CSI_SENS_CONF_HSYNC_POL_SHIFT 1
47 #define CSI_SENS_CONF_DATA_POL_SHIFT 2
48 #define CSI_SENS_CONF_PIX_CLK_POL_SHIFT 3
49 #define CSI_SENS_CONF_SENS_PRTCL_SHIFT 4
50 #define CSI_SENS_CONF_SENS_CLKSRC_SHIFT 7
51 #define CSI_SENS_CONF_DATA_FMT_SHIFT 8
52 #define CSI_SENS_CONF_DATA_WIDTH_SHIFT 10
53 #define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
54 #define CSI_SENS_CONF_DIVRATIO_SHIFT 16
56 #define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
57 #define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
58 #define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
60 #define MAX_VIDEO_MEM 16
62 struct mx3_camera_buffer
{
63 /* common v4l buffer stuff -- must be first */
64 struct videobuf_buffer vb
;
65 const struct soc_camera_data_format
*fmt
;
67 /* One descriptot per scatterlist (per frame) */
68 struct dma_async_tx_descriptor
*txd
;
70 /* We have to "build" a scatterlist ourselves - one element per frame */
71 struct scatterlist sg
;
75 * struct mx3_camera_dev - i.MX3x camera (CSI) object
76 * @dev: camera device, to which the coherent buffer is attached
77 * @icd: currently attached camera sensor
78 * @clk: pointer to clock
79 * @base: remapped register base address
80 * @pdata: platform data
81 * @platform_flags: platform flags
82 * @mclk: master clock frequency in Hz
83 * @capture: list of capture videobuffers
84 * @lock: protects video buffer lists
85 * @active: active video buffer
86 * @idmac_channel: array of pointers to IPU DMAC DMA channels
87 * @soc_host: embedded soc_host object
89 struct mx3_camera_dev
{
92 * i.MX3x is only supposed to handle one camera on its Camera Sensor
93 * Interface. If anyone ever builds hardware to enable more than one
94 * camera _simultaneously_, they will have to modify this driver too
96 struct soc_camera_device
*icd
;
101 struct mx3_camera_pdata
*pdata
;
103 unsigned long platform_flags
;
106 struct list_head capture
;
107 spinlock_t lock
; /* Protects video buffer lists */
108 struct mx3_camera_buffer
*active
;
110 /* IDMAC / dmaengine interface */
111 struct idmac_channel
*idmac_channel
[1]; /* We need one channel */
113 struct soc_camera_host soc_host
;
116 struct dma_chan_request
{
117 struct mx3_camera_dev
*mx3_cam
;
121 static int mx3_camera_set_bus_param(struct soc_camera_device
*icd
, __u32 pixfmt
);
123 static u32
csi_reg_read(struct mx3_camera_dev
*mx3
, off_t reg
)
125 return __raw_readl(mx3
->base
+ reg
);
128 static void csi_reg_write(struct mx3_camera_dev
*mx3
, u32 value
, off_t reg
)
130 __raw_writel(value
, mx3
->base
+ reg
);
133 /* Called from the IPU IDMAC ISR */
134 static void mx3_cam_dma_done(void *arg
)
136 struct idmac_tx_desc
*desc
= to_tx_desc(arg
);
137 struct dma_chan
*chan
= desc
->txd
.chan
;
138 struct idmac_channel
*ichannel
= to_idmac_chan(chan
);
139 struct mx3_camera_dev
*mx3_cam
= ichannel
->client
;
140 struct videobuf_buffer
*vb
;
142 dev_dbg(chan
->device
->dev
, "callback cookie %d, active DMA 0x%08x\n",
143 desc
->txd
.cookie
, mx3_cam
->active
? sg_dma_address(&mx3_cam
->active
->sg
) : 0);
145 spin_lock(&mx3_cam
->lock
);
146 if (mx3_cam
->active
) {
147 vb
= &mx3_cam
->active
->vb
;
149 list_del_init(&vb
->queue
);
150 vb
->state
= VIDEOBUF_DONE
;
151 do_gettimeofday(&vb
->ts
);
156 if (list_empty(&mx3_cam
->capture
)) {
157 mx3_cam
->active
= NULL
;
158 spin_unlock(&mx3_cam
->lock
);
161 * stop capture - without further buffers IPU_CHA_BUF0_RDY will
167 mx3_cam
->active
= list_entry(mx3_cam
->capture
.next
,
168 struct mx3_camera_buffer
, vb
.queue
);
169 mx3_cam
->active
->vb
.state
= VIDEOBUF_ACTIVE
;
170 spin_unlock(&mx3_cam
->lock
);
173 static void free_buffer(struct videobuf_queue
*vq
, struct mx3_camera_buffer
*buf
)
175 struct soc_camera_device
*icd
= vq
->priv_data
;
176 struct videobuf_buffer
*vb
= &buf
->vb
;
177 struct dma_async_tx_descriptor
*txd
= buf
->txd
;
178 struct idmac_channel
*ichan
;
180 BUG_ON(in_interrupt());
182 dev_dbg(&icd
->dev
, "%s (vb=0x%p) 0x%08lx %d\n", __func__
,
183 vb
, vb
->baddr
, vb
->bsize
);
186 * This waits until this buffer is out of danger, i.e., until it is no
187 * longer in STATE_QUEUED or STATE_ACTIVE
189 videobuf_waiton(vb
, 0, 0);
191 ichan
= to_idmac_chan(txd
->chan
);
194 videobuf_dma_contig_free(vq
, vb
);
197 vb
->state
= VIDEOBUF_NEEDS_INIT
;
201 * Videobuf operations
205 * Calculate the __buffer__ (not data) size and number of buffers.
206 * Called with .vb_lock held
208 static int mx3_videobuf_setup(struct videobuf_queue
*vq
, unsigned int *count
,
211 struct soc_camera_device
*icd
= vq
->priv_data
;
212 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->dev
.parent
);
213 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
215 * bits-per-pixel (depth) as specified in camera's pixel format does
216 * not necessarily match what the camera interface writes to RAM, but
217 * it should be good enough for now.
219 unsigned int bpp
= DIV_ROUND_UP(icd
->current_fmt
->depth
, 8);
221 if (!mx3_cam
->idmac_channel
[0])
224 *size
= icd
->width
* icd
->height
* bpp
;
229 if (*size
* *count
> MAX_VIDEO_MEM
* 1024 * 1024)
230 *count
= MAX_VIDEO_MEM
* 1024 * 1024 / *size
;
235 /* Called with .vb_lock held */
236 static int mx3_videobuf_prepare(struct videobuf_queue
*vq
,
237 struct videobuf_buffer
*vb
, enum v4l2_field field
)
239 struct soc_camera_device
*icd
= vq
->priv_data
;
240 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->dev
.parent
);
241 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
242 struct mx3_camera_buffer
*buf
=
243 container_of(vb
, struct mx3_camera_buffer
, vb
);
244 /* current_fmt _must_ always be set */
245 size_t new_size
= icd
->width
* icd
->height
*
246 ((icd
->current_fmt
->depth
+ 7) >> 3);
250 * I think, in buf_prepare you only have to protect global data,
251 * the actual buffer is yours
254 if (buf
->fmt
!= icd
->current_fmt
||
255 vb
->width
!= icd
->width
||
256 vb
->height
!= icd
->height
||
257 vb
->field
!= field
) {
258 buf
->fmt
= icd
->current_fmt
;
259 vb
->width
= icd
->width
;
260 vb
->height
= icd
->height
;
262 if (vb
->state
!= VIDEOBUF_NEEDS_INIT
)
263 free_buffer(vq
, buf
);
266 if (vb
->baddr
&& vb
->bsize
< new_size
) {
267 /* User provided buffer, but it is too small */
272 if (vb
->state
== VIDEOBUF_NEEDS_INIT
) {
273 struct idmac_channel
*ichan
= mx3_cam
->idmac_channel
[0];
274 struct scatterlist
*sg
= &buf
->sg
;
277 * The total size of video-buffers that will be allocated / mapped.
278 * *size that we calculated in videobuf_setup gets assigned to
279 * vb->bsize, and now we use the same calculation to get vb->size.
283 /* This actually (allocates and) maps buffers */
284 ret
= videobuf_iolock(vq
, vb
, NULL
);
289 * We will have to configure the IDMAC channel. It has two slots
290 * for DMA buffers, we shall enter the first two buffers there,
291 * and then submit new buffers in DMA-ready interrupts
293 sg_init_table(sg
, 1);
294 sg_dma_address(sg
) = videobuf_to_dma_contig(vb
);
295 sg_dma_len(sg
) = vb
->size
;
297 buf
->txd
= ichan
->dma_chan
.device
->device_prep_slave_sg(
298 &ichan
->dma_chan
, sg
, 1, DMA_FROM_DEVICE
,
305 buf
->txd
->callback_param
= buf
->txd
;
306 buf
->txd
->callback
= mx3_cam_dma_done
;
308 vb
->state
= VIDEOBUF_PREPARED
;
314 free_buffer(vq
, buf
);
319 static enum pixel_fmt
fourcc_to_ipu_pix(__u32 fourcc
)
321 /* Add more formats as need arises and test possibilities appear... */
323 case V4L2_PIX_FMT_RGB565
:
324 return IPU_PIX_FMT_RGB565
;
325 case V4L2_PIX_FMT_RGB24
:
326 return IPU_PIX_FMT_RGB24
;
327 case V4L2_PIX_FMT_RGB332
:
328 return IPU_PIX_FMT_RGB332
;
329 case V4L2_PIX_FMT_YUV422P
:
330 return IPU_PIX_FMT_YVU422P
;
332 return IPU_PIX_FMT_GENERIC
;
336 /* Called with .vb_lock held */
337 static void mx3_videobuf_queue(struct videobuf_queue
*vq
,
338 struct videobuf_buffer
*vb
)
340 struct soc_camera_device
*icd
= vq
->priv_data
;
341 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->dev
.parent
);
342 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
343 struct mx3_camera_buffer
*buf
=
344 container_of(vb
, struct mx3_camera_buffer
, vb
);
345 struct dma_async_tx_descriptor
*txd
= buf
->txd
;
346 struct idmac_channel
*ichan
= to_idmac_chan(txd
->chan
);
347 struct idmac_video_param
*video
= &ichan
->params
.video
;
348 const struct soc_camera_data_format
*data_fmt
= icd
->current_fmt
;
352 /* This is the configuration of one sg-element */
353 video
->out_pixel_fmt
= fourcc_to_ipu_pix(data_fmt
->fourcc
);
354 video
->out_width
= icd
->width
;
355 video
->out_height
= icd
->height
;
356 video
->out_stride
= icd
->width
;
359 /* helps to see what DMA actually has written */
360 memset((void *)vb
->baddr
, 0xaa, vb
->bsize
);
363 spin_lock_irqsave(&mx3_cam
->lock
, flags
);
365 list_add_tail(&vb
->queue
, &mx3_cam
->capture
);
367 if (!mx3_cam
->active
) {
368 mx3_cam
->active
= buf
;
369 vb
->state
= VIDEOBUF_ACTIVE
;
371 vb
->state
= VIDEOBUF_QUEUED
;
374 spin_unlock_irqrestore(&mx3_cam
->lock
, flags
);
376 cookie
= txd
->tx_submit(txd
);
377 dev_dbg(&icd
->dev
, "Submitted cookie %d DMA 0x%08x\n", cookie
, sg_dma_address(&buf
->sg
));
382 vb
->state
= VIDEOBUF_PREPARED
;
384 spin_lock_irqsave(&mx3_cam
->lock
, flags
);
386 list_del_init(&vb
->queue
);
388 if (mx3_cam
->active
== buf
)
389 mx3_cam
->active
= NULL
;
391 spin_unlock_irqrestore(&mx3_cam
->lock
, flags
);
394 /* Called with .vb_lock held */
395 static void mx3_videobuf_release(struct videobuf_queue
*vq
,
396 struct videobuf_buffer
*vb
)
398 struct soc_camera_device
*icd
= vq
->priv_data
;
399 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->dev
.parent
);
400 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
401 struct mx3_camera_buffer
*buf
=
402 container_of(vb
, struct mx3_camera_buffer
, vb
);
405 dev_dbg(&icd
->dev
, "Release%s DMA 0x%08x (state %d), queue %sempty\n",
406 mx3_cam
->active
== buf
? " active" : "", sg_dma_address(&buf
->sg
),
407 vb
->state
, list_empty(&vb
->queue
) ? "" : "not ");
408 spin_lock_irqsave(&mx3_cam
->lock
, flags
);
409 if ((vb
->state
== VIDEOBUF_ACTIVE
|| vb
->state
== VIDEOBUF_QUEUED
) &&
410 !list_empty(&vb
->queue
)) {
411 vb
->state
= VIDEOBUF_ERROR
;
413 list_del_init(&vb
->queue
);
414 if (mx3_cam
->active
== buf
)
415 mx3_cam
->active
= NULL
;
417 spin_unlock_irqrestore(&mx3_cam
->lock
, flags
);
418 free_buffer(vq
, buf
);
421 static struct videobuf_queue_ops mx3_videobuf_ops
= {
422 .buf_setup
= mx3_videobuf_setup
,
423 .buf_prepare
= mx3_videobuf_prepare
,
424 .buf_queue
= mx3_videobuf_queue
,
425 .buf_release
= mx3_videobuf_release
,
428 static void mx3_camera_init_videobuf(struct videobuf_queue
*q
,
429 struct soc_camera_device
*icd
)
431 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->dev
.parent
);
432 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
434 videobuf_queue_dma_contig_init(q
, &mx3_videobuf_ops
, mx3_cam
->dev
,
436 V4L2_BUF_TYPE_VIDEO_CAPTURE
,
438 sizeof(struct mx3_camera_buffer
), icd
);
441 /* First part of ipu_csi_init_interface() */
442 static void mx3_camera_activate(struct mx3_camera_dev
*mx3_cam
,
443 struct soc_camera_device
*icd
)
448 /* Set default size: ipu_csi_set_window_size() */
449 csi_reg_write(mx3_cam
, (640 - 1) | ((480 - 1) << 16), CSI_ACT_FRM_SIZE
);
450 /* ...and position to 0:0: ipu_csi_set_window_pos() */
451 conf
= csi_reg_read(mx3_cam
, CSI_OUT_FRM_CTRL
) & 0xffff0000;
452 csi_reg_write(mx3_cam
, conf
, CSI_OUT_FRM_CTRL
);
454 /* We use only gated clock synchronisation mode so far */
455 conf
= 0 << CSI_SENS_CONF_SENS_PRTCL_SHIFT
;
457 /* Set generic data, platform-biggest bus-width */
458 conf
|= CSI_SENS_CONF_DATA_FMT_BAYER
;
460 if (mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_15
)
461 conf
|= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
462 else if (mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_10
)
463 conf
|= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
464 else if (mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_8
)
465 conf
|= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
466 else/* if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)*/
467 conf
|= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
469 if (mx3_cam
->platform_flags
& MX3_CAMERA_CLK_SRC
)
470 conf
|= 1 << CSI_SENS_CONF_SENS_CLKSRC_SHIFT
;
471 if (mx3_cam
->platform_flags
& MX3_CAMERA_EXT_VSYNC
)
472 conf
|= 1 << CSI_SENS_CONF_EXT_VSYNC_SHIFT
;
473 if (mx3_cam
->platform_flags
& MX3_CAMERA_DP
)
474 conf
|= 1 << CSI_SENS_CONF_DATA_POL_SHIFT
;
475 if (mx3_cam
->platform_flags
& MX3_CAMERA_PCP
)
476 conf
|= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT
;
477 if (mx3_cam
->platform_flags
& MX3_CAMERA_HSP
)
478 conf
|= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT
;
479 if (mx3_cam
->platform_flags
& MX3_CAMERA_VSP
)
480 conf
|= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT
;
482 /* ipu_csi_init_interface() */
483 csi_reg_write(mx3_cam
, conf
, CSI_SENS_CONF
);
485 clk_enable(mx3_cam
->clk
);
486 rate
= clk_round_rate(mx3_cam
->clk
, mx3_cam
->mclk
);
487 dev_dbg(&icd
->dev
, "Set SENS_CONF to %x, rate %ld\n", conf
, rate
);
489 clk_set_rate(mx3_cam
->clk
, rate
);
492 /* Called with .video_lock held */
493 static int mx3_camera_add_device(struct soc_camera_device
*icd
)
495 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->dev
.parent
);
496 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
504 mx3_camera_activate(mx3_cam
, icd
);
505 ret
= icd
->ops
->init(icd
);
507 clk_disable(mx3_cam
->clk
);
516 dev_info(&icd
->dev
, "MX3 Camera driver attached to camera %d\n",
522 /* Called with .video_lock held */
523 static void mx3_camera_remove_device(struct soc_camera_device
*icd
)
525 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->dev
.parent
);
526 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
527 struct idmac_channel
**ichan
= &mx3_cam
->idmac_channel
[0];
529 BUG_ON(icd
!= mx3_cam
->icd
);
532 dma_release_channel(&(*ichan
)->dma_chan
);
536 icd
->ops
->release(icd
);
538 clk_disable(mx3_cam
->clk
);
542 dev_info(&icd
->dev
, "MX3 Camera driver detached from camera %d\n",
546 static bool channel_change_requested(struct soc_camera_device
*icd
,
547 struct v4l2_rect
*rect
)
549 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->dev
.parent
);
550 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
551 struct idmac_channel
*ichan
= mx3_cam
->idmac_channel
[0];
553 /* Do buffers have to be re-allocated or channel re-configured? */
554 return ichan
&& rect
->width
* rect
->height
> icd
->width
* icd
->height
;
557 static int test_platform_param(struct mx3_camera_dev
*mx3_cam
,
558 unsigned char buswidth
, unsigned long *flags
)
561 * Platform specified synchronization and pixel clock polarities are
562 * only a recommendation and are only used during probing. MX3x
563 * camera interface only works in master mode, i.e., uses HSYNC and
564 * VSYNC signals from the sensor
566 *flags
= SOCAM_MASTER
|
567 SOCAM_HSYNC_ACTIVE_HIGH
|
568 SOCAM_HSYNC_ACTIVE_LOW
|
569 SOCAM_VSYNC_ACTIVE_HIGH
|
570 SOCAM_VSYNC_ACTIVE_LOW
|
571 SOCAM_PCLK_SAMPLE_RISING
|
572 SOCAM_PCLK_SAMPLE_FALLING
|
573 SOCAM_DATA_ACTIVE_HIGH
|
574 SOCAM_DATA_ACTIVE_LOW
;
576 /* If requested data width is supported by the platform, use it or any
577 * possible lower value - i.MX31 is smart enough to schift bits */
580 if (!(mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_15
))
582 *flags
|= SOCAM_DATAWIDTH_15
| SOCAM_DATAWIDTH_10
|
583 SOCAM_DATAWIDTH_8
| SOCAM_DATAWIDTH_4
;
586 if (!(mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_10
))
588 *flags
|= SOCAM_DATAWIDTH_10
| SOCAM_DATAWIDTH_8
|
592 if (!(mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_8
))
594 *flags
|= SOCAM_DATAWIDTH_8
| SOCAM_DATAWIDTH_4
;
597 if (!(mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_4
))
599 *flags
|= SOCAM_DATAWIDTH_4
;
602 dev_info(mx3_cam
->dev
, "Unsupported bus width %d\n", buswidth
);
609 static int mx3_camera_try_bus_param(struct soc_camera_device
*icd
,
610 const unsigned int depth
)
612 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->dev
.parent
);
613 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
614 unsigned long bus_flags
, camera_flags
;
615 int ret
= test_platform_param(mx3_cam
, depth
, &bus_flags
);
617 dev_dbg(&ici
->dev
, "requested bus width %d bit: %d\n", depth
, ret
);
622 camera_flags
= icd
->ops
->query_bus_param(icd
);
624 ret
= soc_camera_bus_param_compatible(camera_flags
, bus_flags
);
626 dev_warn(&icd
->dev
, "Flags incompatible: camera %lx, host %lx\n",
627 camera_flags
, bus_flags
);
632 static bool chan_filter(struct dma_chan
*chan
, void *arg
)
634 struct dma_chan_request
*rq
= arg
;
635 struct mx3_camera_pdata
*pdata
;
640 pdata
= rq
->mx3_cam
->dev
->platform_data
;
642 return rq
->id
== chan
->chan_id
&&
643 pdata
->dma_dev
== chan
->device
->dev
;
646 static const struct soc_camera_data_format mx3_camera_formats
[] = {
648 .name
= "Bayer (sRGB) 8 bit",
650 .fourcc
= V4L2_PIX_FMT_SBGGR8
,
651 .colorspace
= V4L2_COLORSPACE_SRGB
,
653 .name
= "Monochrome 8 bit",
655 .fourcc
= V4L2_PIX_FMT_GREY
,
656 .colorspace
= V4L2_COLORSPACE_JPEG
,
660 static bool buswidth_supported(struct soc_camera_host
*ici
, int depth
)
662 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
666 return !!(mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_4
);
668 return !!(mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_8
);
670 return !!(mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_10
);
672 return !!(mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_15
);
677 static int mx3_camera_get_formats(struct soc_camera_device
*icd
, int idx
,
678 struct soc_camera_format_xlate
*xlate
)
680 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->dev
.parent
);
681 int formats
= 0, buswidth
, ret
;
683 buswidth
= icd
->formats
[idx
].depth
;
685 if (!buswidth_supported(ici
, buswidth
))
688 ret
= mx3_camera_try_bus_param(icd
, buswidth
);
692 switch (icd
->formats
[idx
].fourcc
) {
693 case V4L2_PIX_FMT_SGRBG10
:
696 xlate
->host_fmt
= &mx3_camera_formats
[0];
697 xlate
->cam_fmt
= icd
->formats
+ idx
;
698 xlate
->buswidth
= buswidth
;
700 dev_dbg(&ici
->dev
, "Providing format %s using %s\n",
701 mx3_camera_formats
[0].name
,
702 icd
->formats
[idx
].name
);
705 case V4L2_PIX_FMT_Y16
:
708 xlate
->host_fmt
= &mx3_camera_formats
[1];
709 xlate
->cam_fmt
= icd
->formats
+ idx
;
710 xlate
->buswidth
= buswidth
;
712 dev_dbg(&ici
->dev
, "Providing format %s using %s\n",
713 mx3_camera_formats
[0].name
,
714 icd
->formats
[idx
].name
);
718 /* Generic pass-through */
721 xlate
->host_fmt
= icd
->formats
+ idx
;
722 xlate
->cam_fmt
= icd
->formats
+ idx
;
723 xlate
->buswidth
= buswidth
;
726 "Providing format %s in pass-through mode\n",
727 icd
->formats
[idx
].name
);
734 static void configure_geometry(struct mx3_camera_dev
*mx3_cam
,
735 struct v4l2_rect
*rect
)
737 u32 ctrl
, width_field
, height_field
;
739 /* Setup frame size - this cannot be changed on-the-fly... */
740 width_field
= rect
->width
- 1;
741 height_field
= rect
->height
- 1;
742 csi_reg_write(mx3_cam
, width_field
| (height_field
<< 16), CSI_SENS_FRM_SIZE
);
744 csi_reg_write(mx3_cam
, width_field
<< 16, CSI_FLASH_STROBE_1
);
745 csi_reg_write(mx3_cam
, (height_field
<< 16) | 0x22, CSI_FLASH_STROBE_2
);
747 csi_reg_write(mx3_cam
, width_field
| (height_field
<< 16), CSI_ACT_FRM_SIZE
);
749 /* ...and position */
750 ctrl
= csi_reg_read(mx3_cam
, CSI_OUT_FRM_CTRL
) & 0xffff0000;
751 /* Sensor does the cropping */
752 csi_reg_write(mx3_cam
, ctrl
| 0 | (0 << 8), CSI_OUT_FRM_CTRL
);
755 * No need to free resources here if we fail, we'll see if we need to
756 * do this next time we are called
760 static int acquire_dma_channel(struct mx3_camera_dev
*mx3_cam
)
763 struct dma_chan
*chan
;
764 struct idmac_channel
**ichan
= &mx3_cam
->idmac_channel
[0];
765 /* We have to use IDMAC_IC_7 for Bayer / generic data */
766 struct dma_chan_request rq
= {.mx3_cam
= mx3_cam
,
770 struct videobuf_buffer
*vb
, *_vb
;
771 dma_release_channel(&(*ichan
)->dma_chan
);
773 mx3_cam
->active
= NULL
;
774 list_for_each_entry_safe(vb
, _vb
, &mx3_cam
->capture
, queue
) {
775 list_del_init(&vb
->queue
);
776 vb
->state
= VIDEOBUF_ERROR
;
782 dma_cap_set(DMA_SLAVE
, mask
);
783 dma_cap_set(DMA_PRIVATE
, mask
);
784 chan
= dma_request_channel(mask
, chan_filter
, &rq
);
788 *ichan
= to_idmac_chan(chan
);
789 (*ichan
)->client
= mx3_cam
;
794 static int mx3_camera_set_crop(struct soc_camera_device
*icd
,
795 struct v4l2_rect
*rect
)
797 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->dev
.parent
);
798 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
801 * We now know pixel formats and can decide upon DMA-channel(s)
802 * So far only direct camera-to-memory is supported
804 if (channel_change_requested(icd
, rect
)) {
805 int ret
= acquire_dma_channel(mx3_cam
);
810 configure_geometry(mx3_cam
, rect
);
812 return icd
->ops
->set_crop(icd
, rect
);
815 static int mx3_camera_set_fmt(struct soc_camera_device
*icd
,
816 struct v4l2_format
*f
)
818 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->dev
.parent
);
819 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
820 const struct soc_camera_format_xlate
*xlate
;
821 struct v4l2_pix_format
*pix
= &f
->fmt
.pix
;
822 struct v4l2_rect rect
= {
823 .left
= icd
->x_current
,
824 .top
= icd
->y_current
,
826 .height
= pix
->height
,
830 xlate
= soc_camera_xlate_by_fourcc(icd
, pix
->pixelformat
);
832 dev_warn(&ici
->dev
, "Format %x not found\n", pix
->pixelformat
);
836 ret
= acquire_dma_channel(mx3_cam
);
841 * Might have to perform a complete interface initialisation like in
842 * ipu_csi_init_interface() in mxc_v4l2_s_param(). Also consider
846 configure_geometry(mx3_cam
, &rect
);
848 ret
= icd
->ops
->set_fmt(icd
, f
);
850 icd
->buswidth
= xlate
->buswidth
;
851 icd
->current_fmt
= xlate
->host_fmt
;
857 static int mx3_camera_try_fmt(struct soc_camera_device
*icd
,
858 struct v4l2_format
*f
)
860 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->dev
.parent
);
861 const struct soc_camera_format_xlate
*xlate
;
862 struct v4l2_pix_format
*pix
= &f
->fmt
.pix
;
863 __u32 pixfmt
= pix
->pixelformat
;
864 enum v4l2_field field
;
867 xlate
= soc_camera_xlate_by_fourcc(icd
, pixfmt
);
868 if (pixfmt
&& !xlate
) {
869 dev_warn(&ici
->dev
, "Format %x not found\n", pixfmt
);
873 /* limit to MX3 hardware capabilities */
874 if (pix
->height
> 4096)
876 if (pix
->width
> 4096)
879 pix
->bytesperline
= pix
->width
*
880 DIV_ROUND_UP(xlate
->host_fmt
->depth
, 8);
881 pix
->sizeimage
= pix
->height
* pix
->bytesperline
;
883 /* camera has to see its format, but the user the original one */
884 pix
->pixelformat
= xlate
->cam_fmt
->fourcc
;
885 /* limit to sensor capabilities */
886 ret
= icd
->ops
->try_fmt(icd
, f
);
887 pix
->pixelformat
= xlate
->host_fmt
->fourcc
;
891 if (field
== V4L2_FIELD_ANY
) {
892 pix
->field
= V4L2_FIELD_NONE
;
893 } else if (field
!= V4L2_FIELD_NONE
) {
894 dev_err(&icd
->dev
, "Field type %d unsupported.\n", field
);
901 static int mx3_camera_reqbufs(struct soc_camera_file
*icf
,
902 struct v4l2_requestbuffers
*p
)
907 static unsigned int mx3_camera_poll(struct file
*file
, poll_table
*pt
)
909 struct soc_camera_file
*icf
= file
->private_data
;
911 return videobuf_poll_stream(file
, &icf
->vb_vidq
, pt
);
914 static int mx3_camera_querycap(struct soc_camera_host
*ici
,
915 struct v4l2_capability
*cap
)
917 /* cap->name is set by the firendly caller:-> */
918 strlcpy(cap
->card
, "i.MX3x Camera", sizeof(cap
->card
));
919 cap
->version
= KERNEL_VERSION(0, 2, 2);
920 cap
->capabilities
= V4L2_CAP_VIDEO_CAPTURE
| V4L2_CAP_STREAMING
;
925 static int mx3_camera_set_bus_param(struct soc_camera_device
*icd
, __u32 pixfmt
)
927 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->dev
.parent
);
928 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
929 unsigned long bus_flags
, camera_flags
, common_flags
;
931 int ret
= test_platform_param(mx3_cam
, icd
->buswidth
, &bus_flags
);
932 const struct soc_camera_format_xlate
*xlate
;
934 xlate
= soc_camera_xlate_by_fourcc(icd
, pixfmt
);
936 dev_warn(&ici
->dev
, "Format %x not found\n", pixfmt
);
940 dev_dbg(&ici
->dev
, "requested bus width %d bit: %d\n",
946 camera_flags
= icd
->ops
->query_bus_param(icd
);
948 common_flags
= soc_camera_bus_param_compatible(camera_flags
, bus_flags
);
950 dev_dbg(&ici
->dev
, "no common flags: camera %lx, host %lx\n",
951 camera_flags
, bus_flags
);
955 /* Make choices, based on platform preferences */
956 if ((common_flags
& SOCAM_HSYNC_ACTIVE_HIGH
) &&
957 (common_flags
& SOCAM_HSYNC_ACTIVE_LOW
)) {
958 if (mx3_cam
->platform_flags
& MX3_CAMERA_HSP
)
959 common_flags
&= ~SOCAM_HSYNC_ACTIVE_HIGH
;
961 common_flags
&= ~SOCAM_HSYNC_ACTIVE_LOW
;
964 if ((common_flags
& SOCAM_VSYNC_ACTIVE_HIGH
) &&
965 (common_flags
& SOCAM_VSYNC_ACTIVE_LOW
)) {
966 if (mx3_cam
->platform_flags
& MX3_CAMERA_VSP
)
967 common_flags
&= ~SOCAM_VSYNC_ACTIVE_HIGH
;
969 common_flags
&= ~SOCAM_VSYNC_ACTIVE_LOW
;
972 if ((common_flags
& SOCAM_DATA_ACTIVE_HIGH
) &&
973 (common_flags
& SOCAM_DATA_ACTIVE_LOW
)) {
974 if (mx3_cam
->platform_flags
& MX3_CAMERA_DP
)
975 common_flags
&= ~SOCAM_DATA_ACTIVE_HIGH
;
977 common_flags
&= ~SOCAM_DATA_ACTIVE_LOW
;
980 if ((common_flags
& SOCAM_PCLK_SAMPLE_RISING
) &&
981 (common_flags
& SOCAM_PCLK_SAMPLE_FALLING
)) {
982 if (mx3_cam
->platform_flags
& MX3_CAMERA_PCP
)
983 common_flags
&= ~SOCAM_PCLK_SAMPLE_RISING
;
985 common_flags
&= ~SOCAM_PCLK_SAMPLE_FALLING
;
988 /* Make the camera work in widest common mode, we'll take care of
990 if (common_flags
& SOCAM_DATAWIDTH_15
)
991 common_flags
= (common_flags
& ~SOCAM_DATAWIDTH_MASK
) |
993 else if (common_flags
& SOCAM_DATAWIDTH_10
)
994 common_flags
= (common_flags
& ~SOCAM_DATAWIDTH_MASK
) |
996 else if (common_flags
& SOCAM_DATAWIDTH_8
)
997 common_flags
= (common_flags
& ~SOCAM_DATAWIDTH_MASK
) |
1000 common_flags
= (common_flags
& ~SOCAM_DATAWIDTH_MASK
) |
1003 ret
= icd
->ops
->set_bus_param(icd
, common_flags
);
1008 * So far only gated clock mode is supported. Add a line
1009 * (3 << CSI_SENS_CONF_SENS_PRTCL_SHIFT) |
1010 * below and select the required mode when supporting other
1011 * synchronisation protocols.
1013 sens_conf
= csi_reg_read(mx3_cam
, CSI_SENS_CONF
) &
1014 ~((1 << CSI_SENS_CONF_VSYNC_POL_SHIFT
) |
1015 (1 << CSI_SENS_CONF_HSYNC_POL_SHIFT
) |
1016 (1 << CSI_SENS_CONF_DATA_POL_SHIFT
) |
1017 (1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT
) |
1018 (3 << CSI_SENS_CONF_DATA_FMT_SHIFT
) |
1019 (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
));
1021 /* TODO: Support RGB and YUV formats */
1023 /* This has been set in mx3_camera_activate(), but we clear it above */
1024 sens_conf
|= CSI_SENS_CONF_DATA_FMT_BAYER
;
1026 if (common_flags
& SOCAM_PCLK_SAMPLE_FALLING
)
1027 sens_conf
|= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT
;
1028 if (common_flags
& SOCAM_HSYNC_ACTIVE_LOW
)
1029 sens_conf
|= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT
;
1030 if (common_flags
& SOCAM_VSYNC_ACTIVE_LOW
)
1031 sens_conf
|= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT
;
1032 if (common_flags
& SOCAM_DATA_ACTIVE_LOW
)
1033 sens_conf
|= 1 << CSI_SENS_CONF_DATA_POL_SHIFT
;
1035 /* Just do what we're asked to do */
1036 switch (xlate
->host_fmt
->depth
) {
1038 dw
= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
1041 dw
= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
1044 dw
= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
1048 * Actually it can only be 15 now, default is just to silence
1052 dw
= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
1055 csi_reg_write(mx3_cam
, sens_conf
| dw
, CSI_SENS_CONF
);
1057 dev_dbg(&ici
->dev
, "Set SENS_CONF to %x\n", sens_conf
| dw
);
1062 static struct soc_camera_host_ops mx3_soc_camera_host_ops
= {
1063 .owner
= THIS_MODULE
,
1064 .add
= mx3_camera_add_device
,
1065 .remove
= mx3_camera_remove_device
,
1067 .suspend
= mx3_camera_suspend
,
1068 .resume
= mx3_camera_resume
,
1070 .set_crop
= mx3_camera_set_crop
,
1071 .set_fmt
= mx3_camera_set_fmt
,
1072 .try_fmt
= mx3_camera_try_fmt
,
1073 .get_formats
= mx3_camera_get_formats
,
1074 .init_videobuf
= mx3_camera_init_videobuf
,
1075 .reqbufs
= mx3_camera_reqbufs
,
1076 .poll
= mx3_camera_poll
,
1077 .querycap
= mx3_camera_querycap
,
1078 .set_bus_param
= mx3_camera_set_bus_param
,
1081 static int mx3_camera_probe(struct platform_device
*pdev
)
1083 struct mx3_camera_dev
*mx3_cam
;
1084 struct resource
*res
;
1087 struct soc_camera_host
*soc_host
;
1089 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1095 mx3_cam
= vmalloc(sizeof(*mx3_cam
));
1097 dev_err(&pdev
->dev
, "Could not allocate mx3 camera object\n");
1101 memset(mx3_cam
, 0, sizeof(*mx3_cam
));
1103 mx3_cam
->clk
= clk_get(&pdev
->dev
, "csi_clk");
1104 if (IS_ERR(mx3_cam
->clk
)) {
1105 err
= PTR_ERR(mx3_cam
->clk
);
1109 dev_set_drvdata(&pdev
->dev
, mx3_cam
);
1111 mx3_cam
->pdata
= pdev
->dev
.platform_data
;
1112 mx3_cam
->platform_flags
= mx3_cam
->pdata
->flags
;
1113 if (!(mx3_cam
->platform_flags
& (MX3_CAMERA_DATAWIDTH_4
|
1114 MX3_CAMERA_DATAWIDTH_8
| MX3_CAMERA_DATAWIDTH_10
|
1115 MX3_CAMERA_DATAWIDTH_15
))) {
1116 /* Platform hasn't set available data widths. This is bad.
1117 * Warn and use a default. */
1118 dev_warn(&pdev
->dev
, "WARNING! Platform hasn't set available "
1119 "data widths, using default 8 bit\n");
1120 mx3_cam
->platform_flags
|= MX3_CAMERA_DATAWIDTH_8
;
1123 mx3_cam
->mclk
= mx3_cam
->pdata
->mclk_10khz
* 10000;
1124 if (!mx3_cam
->mclk
) {
1125 dev_warn(&pdev
->dev
,
1126 "mclk_10khz == 0! Please, fix your platform data. "
1127 "Using default 20MHz\n");
1128 mx3_cam
->mclk
= 20000000;
1131 /* list of video-buffers */
1132 INIT_LIST_HEAD(&mx3_cam
->capture
);
1133 spin_lock_init(&mx3_cam
->lock
);
1135 base
= ioremap(res
->start
, res
->end
- res
->start
+ 1);
1141 mx3_cam
->base
= base
;
1142 mx3_cam
->dev
= &pdev
->dev
;
1144 soc_host
= &mx3_cam
->soc_host
;
1145 soc_host
->drv_name
= MX3_CAM_DRV_NAME
;
1146 soc_host
->ops
= &mx3_soc_camera_host_ops
;
1147 soc_host
->priv
= mx3_cam
;
1148 soc_host
->dev
.parent
= &pdev
->dev
;
1149 soc_host
->nr
= pdev
->id
;
1150 err
= soc_camera_host_register(soc_host
);
1154 /* IDMAC interface */
1162 clk_put(mx3_cam
->clk
);
1170 static int __devexit
mx3_camera_remove(struct platform_device
*pdev
)
1172 struct mx3_camera_dev
*mx3_cam
= platform_get_drvdata(pdev
);
1174 clk_put(mx3_cam
->clk
);
1176 soc_camera_host_unregister(&mx3_cam
->soc_host
);
1178 iounmap(mx3_cam
->base
);
1181 * The channel has either not been allocated,
1182 * or should have been released
1184 if (WARN_ON(mx3_cam
->idmac_channel
[0]))
1185 dma_release_channel(&mx3_cam
->idmac_channel
[0]->dma_chan
);
1191 dev_info(&pdev
->dev
, "i.MX3x Camera driver unloaded\n");
1196 static struct platform_driver mx3_camera_driver
= {
1198 .name
= MX3_CAM_DRV_NAME
,
1200 .probe
= mx3_camera_probe
,
1201 .remove
= __exit_p(mx3_camera_remove
),
1205 static int __devinit
mx3_camera_init(void)
1207 return platform_driver_register(&mx3_camera_driver
);
1210 static void __exit
mx3_camera_exit(void)
1212 platform_driver_unregister(&mx3_camera_driver
);
1215 module_init(mx3_camera_init
);
1216 module_exit(mx3_camera_exit
);
1218 MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver");
1219 MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>");
1220 MODULE_LICENSE("GPL v2");