thinkpad-acpi: handle HKEY 0x4010, 0x4011 events
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / staging / tm6000 / tm6000-core.c
blobd7eb2e23cdbdc38014f81f9200636ff1bd609343
1 /*
2 * tm6000-core.c - driver for TM5600/TM6000/TM6010 USB video capture devices
4 * Copyright (C) 2006-2007 Mauro Carvalho Chehab <mchehab@infradead.org>
6 * Copyright (C) 2007 Michel Ludwig <michel.ludwig@gmail.com>
7 * - DVB-T support
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation version 2
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/module.h>
24 #include <linux/kernel.h>
25 #include <linux/slab.h>
26 #include <linux/usb.h>
27 #include <linux/i2c.h>
28 #include "tm6000.h"
29 #include "tm6000-regs.h"
30 #include <media/v4l2-common.h>
31 #include <media/tuner.h>
33 #define USB_TIMEOUT (5 * HZ) /* ms */
35 int tm6000_read_write_usb(struct tm6000_core *dev, u8 req_type, u8 req,
36 u16 value, u16 index, u8 *buf, u16 len)
38 int ret, i;
39 unsigned int pipe;
40 u8 *data = NULL;
42 if (len)
43 data = kzalloc(len, GFP_KERNEL);
46 if (req_type & USB_DIR_IN)
47 pipe = usb_rcvctrlpipe(dev->udev, 0);
48 else {
49 pipe = usb_sndctrlpipe(dev->udev, 0);
50 memcpy(data, buf, len);
53 if (tm6000_debug & V4L2_DEBUG_I2C) {
54 printk("(dev %p, pipe %08x): ", dev->udev, pipe);
56 printk("%s: %02x %02x %02x %02x %02x %02x %02x %02x ",
57 (req_type & USB_DIR_IN) ? " IN" : "OUT",
58 req_type, req, value&0xff, value>>8, index&0xff,
59 index>>8, len&0xff, len>>8);
61 if (!(req_type & USB_DIR_IN)) {
62 printk(">>> ");
63 for (i = 0; i < len; i++)
64 printk(" %02x", buf[i]);
65 printk("\n");
69 ret = usb_control_msg(dev->udev, pipe, req, req_type, value, index,
70 data, len, USB_TIMEOUT);
72 if (req_type & USB_DIR_IN)
73 memcpy(buf, data, len);
75 if (tm6000_debug & V4L2_DEBUG_I2C) {
76 if (ret < 0) {
77 if (req_type & USB_DIR_IN)
78 printk("<<< (len=%d)\n", len);
80 printk("%s: Error #%d\n", __FUNCTION__, ret);
81 } else if (req_type & USB_DIR_IN) {
82 printk("<<< ");
83 for (i = 0; i < len; i++)
84 printk(" %02x", buf[i]);
85 printk("\n");
89 kfree(data);
91 msleep(5);
93 return ret;
96 int tm6000_set_reg(struct tm6000_core *dev, u8 req, u16 value, u16 index)
98 return
99 tm6000_read_write_usb(dev, USB_DIR_OUT | USB_TYPE_VENDOR,
100 req, value, index, NULL, 0);
102 EXPORT_SYMBOL_GPL(tm6000_set_reg);
104 int tm6000_get_reg(struct tm6000_core *dev, u8 req, u16 value, u16 index)
106 int rc;
107 u8 buf[1];
109 rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
110 value, index, buf, 1);
112 if (rc < 0)
113 return rc;
115 return *buf;
117 EXPORT_SYMBOL_GPL(tm6000_get_reg);
119 int tm6000_set_reg_mask(struct tm6000_core *dev, u8 req, u16 value,
120 u16 index, u16 mask)
122 int rc;
123 u8 buf[1];
124 u8 new_index;
126 rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
127 value, index, buf, 1);
129 if (rc < 0)
130 return rc;
132 new_index = (buf[0] & ~mask) | (index & mask);
134 if (new_index == index)
135 return 0;
137 return tm6000_read_write_usb(dev, USB_DIR_OUT | USB_TYPE_VENDOR,
138 req, value, new_index, NULL, 0);
140 EXPORT_SYMBOL_GPL(tm6000_set_reg_mask);
142 int tm6000_get_reg16(struct tm6000_core *dev, u8 req, u16 value, u16 index)
144 int rc;
145 u8 buf[2];
147 rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
148 value, index, buf, 2);
150 if (rc < 0)
151 return rc;
153 return buf[1]|buf[0]<<8;
156 int tm6000_get_reg32(struct tm6000_core *dev, u8 req, u16 value, u16 index)
158 int rc;
159 u8 buf[4];
161 rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
162 value, index, buf, 4);
164 if (rc < 0)
165 return rc;
167 return buf[3] | buf[2] << 8 | buf[1] << 16 | buf[0] << 24;
170 int tm6000_i2c_reset(struct tm6000_core *dev, u16 tsleep)
172 int rc;
174 rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_CLK, 0);
175 if (rc < 0)
176 return rc;
178 msleep(tsleep);
180 rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_CLK, 1);
181 msleep(tsleep);
183 return rc;
186 void tm6000_set_fourcc_format(struct tm6000_core *dev)
188 if (dev->dev_type == TM6010) {
189 int val;
191 val = tm6000_get_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, 0) & 0xfc;
192 if (dev->fourcc == V4L2_PIX_FMT_UYVY)
193 tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, val);
194 else
195 tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, val | 1);
196 } else {
197 if (dev->fourcc == V4L2_PIX_FMT_UYVY)
198 tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0xd0);
199 else
200 tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0x90);
204 static void tm6000_set_vbi(struct tm6000_core *dev)
207 * FIXME:
208 * VBI lines and start/end are different between 60Hz and 50Hz
209 * So, it is very likely that we need to change the config to
210 * something that takes it into account, doing something different
211 * if (dev->norm & V4L2_STD_525_60)
214 if (dev->dev_type == TM6010) {
215 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
216 tm6000_set_reg(dev, TM6010_REQ07_R41_TELETEXT_VBI_CODE1, 0x27);
217 tm6000_set_reg(dev, TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55);
218 tm6000_set_reg(dev, TM6010_REQ07_R43_VBI_DATA_TYPE_LINE7, 0x66);
219 tm6000_set_reg(dev, TM6010_REQ07_R44_VBI_DATA_TYPE_LINE8, 0x66);
220 tm6000_set_reg(dev, TM6010_REQ07_R45_VBI_DATA_TYPE_LINE9, 0x66);
221 tm6000_set_reg(dev,
222 TM6010_REQ07_R46_VBI_DATA_TYPE_LINE10, 0x66);
223 tm6000_set_reg(dev,
224 TM6010_REQ07_R47_VBI_DATA_TYPE_LINE11, 0x66);
225 tm6000_set_reg(dev,
226 TM6010_REQ07_R48_VBI_DATA_TYPE_LINE12, 0x66);
227 tm6000_set_reg(dev,
228 TM6010_REQ07_R49_VBI_DATA_TYPE_LINE13, 0x66);
229 tm6000_set_reg(dev,
230 TM6010_REQ07_R4A_VBI_DATA_TYPE_LINE14, 0x66);
231 tm6000_set_reg(dev,
232 TM6010_REQ07_R4B_VBI_DATA_TYPE_LINE15, 0x66);
233 tm6000_set_reg(dev,
234 TM6010_REQ07_R4C_VBI_DATA_TYPE_LINE16, 0x66);
235 tm6000_set_reg(dev,
236 TM6010_REQ07_R4D_VBI_DATA_TYPE_LINE17, 0x66);
237 tm6000_set_reg(dev,
238 TM6010_REQ07_R4E_VBI_DATA_TYPE_LINE18, 0x66);
239 tm6000_set_reg(dev,
240 TM6010_REQ07_R4F_VBI_DATA_TYPE_LINE19, 0x66);
241 tm6000_set_reg(dev,
242 TM6010_REQ07_R50_VBI_DATA_TYPE_LINE20, 0x66);
243 tm6000_set_reg(dev,
244 TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x66);
245 tm6000_set_reg(dev,
246 TM6010_REQ07_R52_VBI_DATA_TYPE_LINE22, 0x66);
247 tm6000_set_reg(dev,
248 TM6010_REQ07_R53_VBI_DATA_TYPE_LINE23, 0x00);
249 tm6000_set_reg(dev,
250 TM6010_REQ07_R54_VBI_DATA_TYPE_RLINES, 0x00);
251 tm6000_set_reg(dev,
252 TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01);
253 tm6000_set_reg(dev,
254 TM6010_REQ07_R56_VBI_LOOP_FILTER_I_GAIN, 0x00);
255 tm6000_set_reg(dev,
256 TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02);
257 tm6000_set_reg(dev, TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35);
258 tm6000_set_reg(dev, TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0);
259 tm6000_set_reg(dev, TM6010_REQ07_R5A_VBI_TELETEXT_DTO1, 0x11);
260 tm6000_set_reg(dev, TM6010_REQ07_R5B_VBI_TELETEXT_DTO0, 0x4c);
261 tm6000_set_reg(dev, TM6010_REQ07_R40_TELETEXT_VBI_CODE0, 0x01);
262 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x00);
266 int tm6000_init_analog_mode(struct tm6000_core *dev)
268 struct v4l2_frequency f;
270 if (dev->dev_type == TM6010) {
271 /* Enable video and audio */
272 tm6000_set_reg_mask(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF,
273 0x60, 0x60);
274 /* Disable TS input */
275 tm6000_set_reg_mask(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE,
276 0x00, 0x40);
277 } else {
278 /* Enables soft reset */
279 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
281 if (dev->scaler)
282 /* Disable Hfilter and Enable TS Drop err */
283 tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x20);
284 else /* Enable Hfilter and disable TS Drop err */
285 tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x80);
287 tm6000_set_reg(dev, TM6010_REQ07_RC3_HSTART1, 0x88);
288 tm6000_set_reg(dev, TM6000_REQ07_RDA_CLK_SEL, 0x23);
289 tm6000_set_reg(dev, TM6010_REQ07_RD1_ADDR_FOR_REQ1, 0xc0);
290 tm6000_set_reg(dev, TM6010_REQ07_RD2_ADDR_FOR_REQ2, 0xd8);
291 tm6000_set_reg(dev, TM6010_REQ07_RD6_ENDP_REQ1_REQ2, 0x06);
292 tm6000_set_reg(dev, TM6000_REQ07_RDF_PWDOWN_ACLK, 0x1f);
294 /* AP Software reset */
295 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x08);
296 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x00);
298 tm6000_set_fourcc_format(dev);
300 /* Disables soft reset */
301 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x00);
303 msleep(20);
305 /* Tuner firmware can now be loaded */
308 * FIXME: This is a hack! xc3028 "sleeps" when no channel is detected
309 * for more than a few seconds. Not sure why, as this behavior does
310 * not happen on other devices with xc3028. So, I suspect that it
311 * is yet another bug at tm6000. After start sleeping, decoding
312 * doesn't start automatically. Instead, it requires some
313 * I2C commands to wake it up. As we want to have image at the
314 * beginning, we needed to add this hack. The better would be to
315 * discover some way to make tm6000 to wake up without this hack.
317 f.frequency = dev->freq;
318 v4l2_device_call_all(&dev->v4l2_dev, 0, tuner, s_frequency, &f);
320 msleep(100);
321 tm6000_set_standard(dev);
322 tm6000_set_vbi(dev);
323 tm6000_set_audio_bitrate(dev, 48000);
325 /* switch dvb led off */
326 if (dev->gpio.dvb_led) {
327 tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN,
328 dev->gpio.dvb_led, 0x01);
331 return 0;
334 int tm6000_init_digital_mode(struct tm6000_core *dev)
336 if (dev->dev_type == TM6010) {
337 /* Disable video and audio */
338 tm6000_set_reg_mask(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF,
339 0x00, 0x60);
340 /* Enable TS input */
341 tm6000_set_reg_mask(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE,
342 0x40, 0x40);
343 /* all power down, but not the digital data port */
344 tm6000_set_reg(dev, TM6010_REQ07_RFE_POWER_DOWN, 0x28);
345 tm6000_set_reg(dev, TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xfc);
346 tm6000_set_reg(dev, TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0xff);
347 } else {
348 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x08);
349 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x00);
350 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
351 tm6000_set_reg(dev, TM6000_REQ07_RDF_PWDOWN_ACLK, 0x08);
352 tm6000_set_reg(dev, TM6000_REQ07_RE2_VADC_STATUS_CTL, 0x0c);
353 tm6000_set_reg(dev, TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0xff);
354 tm6000_set_reg(dev, TM6000_REQ07_REB_VADC_AADC_MODE, 0xd8);
355 tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x40);
356 tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0xd0);
357 tm6000_set_reg(dev, TM6010_REQ07_RC3_HSTART1, 0x09);
358 tm6000_set_reg(dev, TM6000_REQ07_RDA_CLK_SEL, 0x37);
359 tm6000_set_reg(dev, TM6010_REQ07_RD1_ADDR_FOR_REQ1, 0xd8);
360 tm6000_set_reg(dev, TM6010_REQ07_RD2_ADDR_FOR_REQ2, 0xc0);
361 tm6000_set_reg(dev, TM6010_REQ07_RD6_ENDP_REQ1_REQ2, 0x60);
363 tm6000_set_reg(dev, TM6000_REQ07_RE2_VADC_STATUS_CTL, 0x0c);
364 tm6000_set_reg(dev, TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0xff);
365 tm6000_set_reg(dev, TM6000_REQ07_REB_VADC_AADC_MODE, 0x08);
366 msleep(50);
368 tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00);
369 msleep(50);
370 tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x01);
371 msleep(50);
372 tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00);
373 msleep(100);
376 /* switch dvb led on */
377 if (dev->gpio.dvb_led) {
378 tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN,
379 dev->gpio.dvb_led, 0x00);
382 return 0;
384 EXPORT_SYMBOL(tm6000_init_digital_mode);
386 struct reg_init {
387 u8 req;
388 u8 reg;
389 u8 val;
392 /* The meaning of those initializations are unknown */
393 struct reg_init tm6000_init_tab[] = {
394 /* REG VALUE */
395 { TM6000_REQ07_RDF_PWDOWN_ACLK, 0x1f },
396 { TM6010_REQ07_RFF_SOFT_RESET, 0x08 },
397 { TM6010_REQ07_RFF_SOFT_RESET, 0x00 },
398 { TM6010_REQ07_RD5_POWERSAVE, 0x4f },
399 { TM6000_REQ07_RDA_CLK_SEL, 0x23 },
400 { TM6000_REQ07_RDB_OUT_SEL, 0x08 },
401 { TM6000_REQ07_RE2_VADC_STATUS_CTL, 0x00 },
402 { TM6000_REQ07_RE3_VADC_INP_LPF_SEL1, 0x10 },
403 { TM6000_REQ07_RE5_VADC_INP_LPF_SEL2, 0x00 },
404 { TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0x00 },
405 { TM6000_REQ07_REB_VADC_AADC_MODE, 0x64 }, /* 48000 bits/sample, external input */
406 { TM6000_REQ07_REE_VADC_CTRL_SEL_CONTROL, 0xc2 },
408 { TM6010_REQ07_R3F_RESET, 0x01 }, /* Start of soft reset */
409 { TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00 },
410 { TM6010_REQ07_R01_VIDEO_CONTROL1, 0x07 },
411 { TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f },
412 { TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00 },
413 { TM6010_REQ07_R05_NOISE_THRESHOLD, 0x64 },
414 { TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01 },
415 { TM6010_REQ07_R08_LUMA_CONTRAST_ADJ, 0x82 },
416 { TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ, 0x36 },
417 { TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ, 0x50 },
418 { TM6010_REQ07_R0C_CHROMA_AGC_CONTROL, 0x6a },
419 { TM6010_REQ07_R11_AGC_PEAK_CONTROL, 0xc9 },
420 { TM6010_REQ07_R12_AGC_GATE_STARTH, 0x07 },
421 { TM6010_REQ07_R13_AGC_GATE_STARTL, 0x3b },
422 { TM6010_REQ07_R14_AGC_GATE_WIDTH, 0x47 },
423 { TM6010_REQ07_R15_AGC_BP_DELAY, 0x6f },
424 { TM6010_REQ07_R17_HLOOP_MAXSTATE, 0xcd },
425 { TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e },
426 { TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b },
427 { TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2 },
428 { TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9 },
429 { TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c },
430 { TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc },
431 { TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc },
432 { TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd },
433 { TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME, 0x3c },
434 { TM6010_REQ07_R21_HSYNC_PHASE_OFFSET, 0x3c },
435 { TM6010_REQ07_R2D_CHROMA_BURST_END, 0x48 },
436 { TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88 },
437 { TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22 },
438 { TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61 },
439 { TM6010_REQ07_R32_VSYNC_HLOCK_MIN, 0x74 },
440 { TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c },
441 { TM6010_REQ07_R34_VSYNC_AGC_MIN, 0x74 },
442 { TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c },
443 { TM6010_REQ07_R36_VSYNC_VBI_MIN, 0x7a },
444 { TM6010_REQ07_R37_VSYNC_VBI_MAX, 0x26 },
445 { TM6010_REQ07_R38_VSYNC_THRESHOLD, 0x40 },
446 { TM6010_REQ07_R39_VSYNC_TIME_CONSTANT, 0x0a },
447 { TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55 },
448 { TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x11 },
449 { TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01 },
450 { TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02 },
451 { TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35 },
452 { TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0 },
453 { TM6010_REQ07_R80_COMB_FILTER_TRESHOLD, 0x15 },
454 { TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42 },
455 { TM6010_REQ07_RC1_TRESHOLD, 0xd0 },
456 { TM6010_REQ07_RC3_HSTART1, 0x88 },
457 { TM6010_REQ07_R3F_RESET, 0x00 }, /* End of the soft reset */
458 { TM6010_REQ05_R18_IMASK7, 0x00 },
461 struct reg_init tm6010_init_tab[] = {
462 { TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x00 },
463 { TM6010_REQ07_RC4_HSTART0, 0xa0 },
464 { TM6010_REQ07_RC6_HEND0, 0x40 },
465 { TM6010_REQ07_RCA_VEND0, 0x31 },
466 { TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, 0xe1 },
467 { TM6010_REQ07_RE0_DVIDEO_SOURCE, 0x03 },
468 { TM6010_REQ07_RFE_POWER_DOWN, 0x7f },
470 { TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0 },
471 { TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4 },
472 { TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8 },
473 { TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00 },
474 { TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2 },
475 { TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0 },
476 { TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2 },
477 { TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60 },
478 { TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc },
480 { TM6010_REQ07_R3F_RESET, 0x01 },
481 { TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00 },
482 { TM6010_REQ07_R01_VIDEO_CONTROL1, 0x07 },
483 { TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f },
484 { TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00 },
485 { TM6010_REQ07_R05_NOISE_THRESHOLD, 0x64 },
486 { TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01 },
487 { TM6010_REQ07_R08_LUMA_CONTRAST_ADJ, 0x82 },
488 { TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ, 0x36 },
489 { TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ, 0x50 },
490 { TM6010_REQ07_R0C_CHROMA_AGC_CONTROL, 0x6a },
491 { TM6010_REQ07_R11_AGC_PEAK_CONTROL, 0xc9 },
492 { TM6010_REQ07_R12_AGC_GATE_STARTH, 0x07 },
493 { TM6010_REQ07_R13_AGC_GATE_STARTL, 0x3b },
494 { TM6010_REQ07_R14_AGC_GATE_WIDTH, 0x47 },
495 { TM6010_REQ07_R15_AGC_BP_DELAY, 0x6f },
496 { TM6010_REQ07_R17_HLOOP_MAXSTATE, 0xcd },
497 { TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e },
498 { TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b },
499 { TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2 },
500 { TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9 },
501 { TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c },
502 { TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc },
503 { TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc },
504 { TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd },
505 { TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME, 0x3c },
506 { TM6010_REQ07_R21_HSYNC_PHASE_OFFSET, 0x3c },
507 { TM6010_REQ07_R2D_CHROMA_BURST_END, 0x48 },
508 { TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88 },
509 { TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22 },
510 { TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61 },
511 { TM6010_REQ07_R32_VSYNC_HLOCK_MIN, 0x74 },
512 { TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c },
513 { TM6010_REQ07_R34_VSYNC_AGC_MIN, 0x74 },
514 { TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c },
515 { TM6010_REQ07_R36_VSYNC_VBI_MIN, 0x7a },
516 { TM6010_REQ07_R37_VSYNC_VBI_MAX, 0x26 },
517 { TM6010_REQ07_R38_VSYNC_THRESHOLD, 0x40 },
518 { TM6010_REQ07_R39_VSYNC_TIME_CONSTANT, 0x0a },
519 { TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55 },
520 { TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x11 },
521 { TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01 },
522 { TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02 },
523 { TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35 },
524 { TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0 },
525 { TM6010_REQ07_R80_COMB_FILTER_TRESHOLD, 0x15 },
526 { TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42 },
527 { TM6010_REQ07_RC1_TRESHOLD, 0xd0 },
528 { TM6010_REQ07_RC3_HSTART1, 0x88 },
529 { TM6010_REQ07_R3F_RESET, 0x00 },
531 { TM6010_REQ05_R18_IMASK7, 0x00 },
533 { TM6010_REQ07_RD8_IR_LEADER1, 0xaa },
534 { TM6010_REQ07_RD8_IR_LEADER0, 0x30 },
535 { TM6010_REQ07_RD8_IR_PULSE_CNT1, 0x20 },
536 { TM6010_REQ07_RD8_IR_PULSE_CNT0, 0xd0 },
537 { REQ_04_EN_DISABLE_MCU_INT, 0x02, 0x00 },
538 { TM6010_REQ07_RD8_IR, 0x2f },
540 /* set remote wakeup key:any key wakeup */
541 { TM6010_REQ07_RE5_REMOTE_WAKEUP, 0xfe },
542 { TM6010_REQ07_RD8_IR_WAKEUP_SEL, 0xff },
545 int tm6000_init(struct tm6000_core *dev)
547 int board, rc = 0, i, size;
548 struct reg_init *tab;
550 /* Check board revision */
551 board = tm6000_get_reg32(dev, REQ_40_GET_VERSION, 0, 0);
552 if (board >= 0) {
553 switch (board & 0xff) {
554 case 0xf3:
555 printk(KERN_INFO "Found tm6000\n");
556 if (dev->dev_type != TM6000)
557 dev->dev_type = TM6000;
558 break;
559 case 0xf4:
560 printk(KERN_INFO "Found tm6010\n");
561 if (dev->dev_type != TM6010)
562 dev->dev_type = TM6010;
563 break;
564 default:
565 printk(KERN_INFO "Unknown board version = 0x%08x\n", board);
567 } else
568 printk(KERN_ERR "Error %i while retrieving board version\n", board);
570 if (dev->dev_type == TM6010) {
571 tab = tm6010_init_tab;
572 size = ARRAY_SIZE(tm6010_init_tab);
573 } else {
574 tab = tm6000_init_tab;
575 size = ARRAY_SIZE(tm6000_init_tab);
578 /* Load board's initialization table */
579 for (i = 0; i < size; i++) {
580 rc = tm6000_set_reg(dev, tab[i].req, tab[i].reg, tab[i].val);
581 if (rc < 0) {
582 printk(KERN_ERR "Error %i while setting req %d, "
583 "reg %d to value %d\n", rc,
584 tab[i].req, tab[i].reg, tab[i].val);
585 return rc;
589 msleep(5); /* Just to be conservative */
591 rc = tm6000_cards_setup(dev);
593 return rc;
596 int tm6000_set_audio_bitrate(struct tm6000_core *dev, int bitrate)
598 int val = 0;
599 u8 areg_f0 = 0x60; /* ADC MCLK = 250 Fs */
600 u8 areg_0a = 0x91; /* SIF 48KHz */
602 switch (bitrate) {
603 case 48000:
604 areg_f0 = 0x60; /* ADC MCLK = 250 Fs */
605 areg_0a = 0x91; /* SIF 48KHz */
606 dev->audio_bitrate = bitrate;
607 break;
608 case 32000:
609 areg_f0 = 0x00; /* ADC MCLK = 375 Fs */
610 areg_0a = 0x90; /* SIF 32KHz */
611 dev->audio_bitrate = bitrate;
612 break;
613 default:
614 return -EINVAL;
618 /* enable I2S, if we use sif or external I2S device */
619 if (dev->dev_type == TM6010) {
620 val = tm6000_set_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, areg_0a);
621 if (val < 0)
622 return val;
624 val = tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
625 areg_f0, 0xf0);
626 if (val < 0)
627 return val;
628 } else {
629 val = tm6000_set_reg_mask(dev, TM6000_REQ07_REB_VADC_AADC_MODE,
630 areg_f0, 0xf0);
631 if (val < 0)
632 return val;
634 return 0;
636 EXPORT_SYMBOL_GPL(tm6000_set_audio_bitrate);
638 int tm6000_set_audio_rinput(struct tm6000_core *dev)
640 if (dev->dev_type == TM6010) {
641 /* Audio crossbar setting, default SIF1 */
642 u8 areg_f0;
644 switch (dev->rinput.amux) {
645 case TM6000_AMUX_SIF1:
646 case TM6000_AMUX_SIF2:
647 areg_f0 = 0x03;
648 break;
649 case TM6000_AMUX_ADC1:
650 areg_f0 = 0x00;
651 break;
652 case TM6000_AMUX_ADC2:
653 areg_f0 = 0x08;
654 break;
655 case TM6000_AMUX_I2S:
656 areg_f0 = 0x04;
657 break;
658 default:
659 printk(KERN_INFO "%s: audio input dosn't support\n",
660 dev->name);
661 return 0;
662 break;
664 /* Set audio input crossbar */
665 tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
666 areg_f0, 0x0f);
667 } else {
668 u8 areg_eb;
669 /* Audio setting, default LINE1 */
670 switch (dev->rinput.amux) {
671 case TM6000_AMUX_ADC1:
672 areg_eb = 0x00;
673 break;
674 case TM6000_AMUX_ADC2:
675 areg_eb = 0x04;
676 break;
677 default:
678 printk(KERN_INFO "%s: audio input dosn't support\n",
679 dev->name);
680 return 0;
681 break;
683 /* Set audio input */
684 tm6000_set_reg_mask(dev, TM6000_REQ07_REB_VADC_AADC_MODE,
685 areg_eb, 0x0f);
687 return 0;
690 void tm6010_set_mute_sif(struct tm6000_core *dev, u8 mute)
692 u8 mute_reg = 0;
694 if (mute)
695 mute_reg = 0x08;
697 tm6000_set_reg_mask(dev, TM6010_REQ08_R0A_A_I2S_MOD, mute_reg, 0x08);
700 void tm6010_set_mute_adc(struct tm6000_core *dev, u8 mute)
702 u8 mute_reg = 0;
704 if (mute)
705 mute_reg = 0x20;
707 if (dev->dev_type == TM6010) {
708 tm6000_set_reg_mask(dev, TM6010_REQ08_RF2_LEFT_CHANNEL_VOL,
709 mute_reg, 0x20);
710 tm6000_set_reg_mask(dev, TM6010_REQ08_RF3_RIGHT_CHANNEL_VOL,
711 mute_reg, 0x20);
712 } else {
713 tm6000_set_reg_mask(dev, TM6000_REQ07_REC_VADC_AADC_LVOL,
714 mute_reg, 0x20);
715 tm6000_set_reg_mask(dev, TM6000_REQ07_RED_VADC_AADC_RVOL,
716 mute_reg, 0x20);
720 int tm6000_tvaudio_set_mute(struct tm6000_core *dev, u8 mute)
722 enum tm6000_mux mux;
724 if (dev->radio)
725 mux = dev->rinput.amux;
726 else
727 mux = dev->vinput[dev->input].amux;
729 switch (mux) {
730 case TM6000_AMUX_SIF1:
731 case TM6000_AMUX_SIF2:
732 if (dev->dev_type == TM6010)
733 tm6010_set_mute_sif(dev, mute);
734 else {
735 printk(KERN_INFO "ERROR: TM5600 and TM6000 don't has"
736 " SIF audio inputs. Please check the %s"
737 " configuration.\n", dev->name);
738 return -EINVAL;
740 break;
741 case TM6000_AMUX_ADC1:
742 case TM6000_AMUX_ADC2:
743 tm6010_set_mute_adc(dev, mute);
744 break;
745 default:
746 return -EINVAL;
747 break;
749 return 0;
752 void tm6010_set_volume_sif(struct tm6000_core *dev, int vol)
754 u8 vol_reg;
756 vol_reg = vol & 0x0F;
758 if (vol < 0)
759 vol_reg |= 0x40;
761 tm6000_set_reg(dev, TM6010_REQ08_R07_A_LEFT_VOL, vol_reg);
762 tm6000_set_reg(dev, TM6010_REQ08_R08_A_RIGHT_VOL, vol_reg);
765 void tm6010_set_volume_adc(struct tm6000_core *dev, int vol)
767 u8 vol_reg;
769 vol_reg = (vol + 0x10) & 0x1f;
771 if (dev->dev_type == TM6010) {
772 tm6000_set_reg(dev, TM6010_REQ08_RF2_LEFT_CHANNEL_VOL, vol_reg);
773 tm6000_set_reg(dev, TM6010_REQ08_RF3_RIGHT_CHANNEL_VOL, vol_reg);
774 } else {
775 tm6000_set_reg(dev, TM6000_REQ07_REC_VADC_AADC_LVOL, vol_reg);
776 tm6000_set_reg(dev, TM6000_REQ07_RED_VADC_AADC_RVOL, vol_reg);
780 void tm6000_set_volume(struct tm6000_core *dev, int vol)
782 enum tm6000_mux mux;
784 if (dev->radio) {
785 mux = dev->rinput.amux;
786 vol += 8; /* Offset to 0 dB */
787 } else
788 mux = dev->vinput[dev->input].amux;
790 switch (mux) {
791 case TM6000_AMUX_SIF1:
792 case TM6000_AMUX_SIF2:
793 if (dev->dev_type == TM6010)
794 tm6010_set_volume_sif(dev, vol);
795 else
796 printk(KERN_INFO "ERROR: TM5600 and TM6000 don't has"
797 " SIF audio inputs. Please check the %s"
798 " configuration.\n", dev->name);
799 break;
800 case TM6000_AMUX_ADC1:
801 case TM6000_AMUX_ADC2:
802 tm6010_set_volume_adc(dev, vol);
803 break;
804 default:
805 break;
809 static LIST_HEAD(tm6000_devlist);
810 static DEFINE_MUTEX(tm6000_devlist_mutex);
813 * tm6000_realease_resource()
816 void tm6000_remove_from_devlist(struct tm6000_core *dev)
818 mutex_lock(&tm6000_devlist_mutex);
819 list_del(&dev->devlist);
820 mutex_unlock(&tm6000_devlist_mutex);
823 void tm6000_add_into_devlist(struct tm6000_core *dev)
825 mutex_lock(&tm6000_devlist_mutex);
826 list_add_tail(&dev->devlist, &tm6000_devlist);
827 mutex_unlock(&tm6000_devlist_mutex);
831 * Extension interface
834 static LIST_HEAD(tm6000_extension_devlist);
836 int tm6000_call_fillbuf(struct tm6000_core *dev, enum tm6000_ops_type type,
837 char *buf, int size)
839 struct tm6000_ops *ops = NULL;
841 /* FIXME: tm6000_extension_devlist_lock should be a spinlock */
843 if (!list_empty(&tm6000_extension_devlist)) {
844 list_for_each_entry(ops, &tm6000_extension_devlist, next) {
845 if (ops->fillbuf && ops->type == type)
846 ops->fillbuf(dev, buf, size);
850 return 0;
853 int tm6000_register_extension(struct tm6000_ops *ops)
855 struct tm6000_core *dev = NULL;
857 mutex_lock(&tm6000_devlist_mutex);
858 list_add_tail(&ops->next, &tm6000_extension_devlist);
859 list_for_each_entry(dev, &tm6000_devlist, devlist) {
860 ops->init(dev);
861 printk(KERN_INFO "%s: Initialized (%s) extension\n",
862 dev->name, ops->name);
864 mutex_unlock(&tm6000_devlist_mutex);
865 return 0;
867 EXPORT_SYMBOL(tm6000_register_extension);
869 void tm6000_unregister_extension(struct tm6000_ops *ops)
871 struct tm6000_core *dev = NULL;
873 mutex_lock(&tm6000_devlist_mutex);
874 list_for_each_entry(dev, &tm6000_devlist, devlist)
875 ops->fini(dev);
877 printk(KERN_INFO "tm6000: Remove (%s) extension\n", ops->name);
878 list_del(&ops->next);
879 mutex_unlock(&tm6000_devlist_mutex);
881 EXPORT_SYMBOL(tm6000_unregister_extension);
883 void tm6000_init_extension(struct tm6000_core *dev)
885 struct tm6000_ops *ops = NULL;
887 mutex_lock(&tm6000_devlist_mutex);
888 if (!list_empty(&tm6000_extension_devlist)) {
889 list_for_each_entry(ops, &tm6000_extension_devlist, next) {
890 if (ops->init)
891 ops->init(dev);
894 mutex_unlock(&tm6000_devlist_mutex);
897 void tm6000_close_extension(struct tm6000_core *dev)
899 struct tm6000_ops *ops = NULL;
901 mutex_lock(&tm6000_devlist_mutex);
902 if (!list_empty(&tm6000_extension_devlist)) {
903 list_for_each_entry(ops, &tm6000_extension_devlist, next) {
904 if (ops->fini)
905 ops->fini(dev);
908 mutex_unlock(&tm6000_devlist_mutex);