drivers/staging/solo6x10/core.c

   1 /*
   2  * Copyright (C) 2010 Bluecherry, LLC www.bluecherrydvr.com
   3  * Copyright (C) 2010 Ben Collins <bcollins@bluecherry.net>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18  */
  19
  20 #include <linux/kernel.h>
  21 #include <linux/module.h>
  22 #include <linux/pci.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/videodev2.h>
  25 #include "solo6x10.h"
  26 #include "tw28.h"
  27
  28 MODULE_DESCRIPTION("Softlogic 6x10 MP4/H.264 Encoder/Decoder V4L2/ALSA Driver");
  29 MODULE_AUTHOR("Ben Collins <bcollins@bluecherry.net>");
  30 MODULE_VERSION(SOLO6X10_VERSION);
  31 MODULE_LICENSE("GPL");
  32
  33 void solo_irq_on(struct solo_dev *solo_dev, u32 mask)
  34 {
  35         solo_dev->irq_mask |= mask;
  36         solo_reg_write(solo_dev, SOLO_IRQ_ENABLE, solo_dev->irq_mask);
  37 }
  38
  39 void solo_irq_off(struct solo_dev *solo_dev, u32 mask)
  40 {
  41         solo_dev->irq_mask &= ~mask;
  42         solo_reg_write(solo_dev, SOLO_IRQ_ENABLE, solo_dev->irq_mask);
  43 }
  44
  45 /* XXX We should check the return value of the sub-device ISR's */
  46 static irqreturn_t solo_isr(int irq, void *data)
  47 {
  48         struct solo_dev *solo_dev = data;
  49         u32 status;
  50         int i;
  51
  52         status = solo_reg_read(solo_dev, SOLO_IRQ_STAT);
  53         if (!status)
  54                 return IRQ_NONE;
  55
  56         if (status & ~solo_dev->irq_mask) {
  57                 solo_reg_write(solo_dev, SOLO_IRQ_STAT,
  58                                status & ~solo_dev->irq_mask);
  59                 status &= solo_dev->irq_mask;
  60         }
  61
  62         if (status & SOLO_IRQ_PCI_ERR) {
  63                 u32 err = solo_reg_read(solo_dev, SOLO_PCI_ERR);
  64                 solo_p2m_error_isr(solo_dev, err);
  65                 solo_reg_write(solo_dev, SOLO_IRQ_STAT, SOLO_IRQ_PCI_ERR);
  66         }
  67
  68         for (i = 0; i < SOLO_NR_P2M; i++)
  69                 if (status & SOLO_IRQ_P2M(i))
  70                         solo_p2m_isr(solo_dev, i);
  71
  72         if (status & SOLO_IRQ_IIC)
  73                 solo_i2c_isr(solo_dev);
  74
  75         if (status & SOLO_IRQ_VIDEO_IN)
  76                 solo_video_in_isr(solo_dev);
  77
  78         /* Call this first so enc gets detected flag set */
  79         if (status & SOLO_IRQ_MOTION)
  80                 solo_motion_isr(solo_dev);
  81
  82         if (status & SOLO_IRQ_ENCODER)
  83                 solo_enc_v4l2_isr(solo_dev);
  84
  85         if (status & SOLO_IRQ_G723)
  86                 solo_g723_isr(solo_dev);
  87
  88         return IRQ_HANDLED;
  89 }
  90
  91 static void free_solo_dev(struct solo_dev *solo_dev)
  92 {
  93         struct pci_dev *pdev;
  94
  95         if (!solo_dev)
  96                 return;
  97
  98         pdev = solo_dev->pdev;
  99
 100         /* If we never initialized the PCI device, then nothing else
 101          * below here needs cleanup */
 102         if (!pdev) {
 103                 kfree(solo_dev);
 104                 return;
 105         }
 106
 107         /* Bring down the sub-devices first */
 108         solo_g723_exit(solo_dev);
 109         solo_enc_v4l2_exit(solo_dev);
 110         solo_enc_exit(solo_dev);
 111         solo_v4l2_exit(solo_dev);
 112         solo_disp_exit(solo_dev);
 113         solo_gpio_exit(solo_dev);
 114         solo_p2m_exit(solo_dev);
 115         solo_i2c_exit(solo_dev);
 116
 117         /* Now cleanup the PCI device */
 118         if (solo_dev->reg_base) {
 119                 solo_irq_off(solo_dev, ~0);
 120                 pci_iounmap(pdev, solo_dev->reg_base);
 121                 free_irq(pdev->irq, solo_dev);
 122         }
 123
 124         pci_release_regions(pdev);
 125         pci_disable_device(pdev);
 126         pci_set_drvdata(pdev, NULL);
 127
 128         kfree(solo_dev);
 129 }
 130
 131 static int __devinit solo_pci_probe(struct pci_dev *pdev,
 132                                     const struct pci_device_id *id)
 133 {
 134         struct solo_dev *solo_dev;
 135         int ret;
 136         int sdram;
 137         u8 chip_id;
 138         u32 reg;
 139
 140         solo_dev = kzalloc(sizeof(*solo_dev), GFP_KERNEL);
 141         if (solo_dev == NULL)
 142                 return -ENOMEM;
 143
 144         solo_dev->pdev = pdev;
 145         spin_lock_init(&solo_dev->reg_io_lock);
 146         pci_set_drvdata(pdev, solo_dev);
 147
 148         ret = pci_enable_device(pdev);
 149         if (ret)
 150                 goto fail_probe;
 151
 152         pci_set_master(pdev);
 153
 154         ret = pci_request_regions(pdev, SOLO6X10_NAME);
 155         if (ret)
 156                 goto fail_probe;
 157
 158         solo_dev->reg_base = pci_ioremap_bar(pdev, 0);
 159         if (solo_dev->reg_base == NULL) {
 160                 ret = -ENOMEM;
 161                 goto fail_probe;
 162         }
 163
 164         chip_id = solo_reg_read(solo_dev, SOLO_CHIP_OPTION) &
 165                                         SOLO_CHIP_ID_MASK;
 166         switch (chip_id) {
 167         case 7:
 168                 solo_dev->nr_chans = 16;
 169                 solo_dev->nr_ext = 5;
 170                 break;
 171         case 6:
 172                 solo_dev->nr_chans = 8;
 173                 solo_dev->nr_ext = 2;
 174                 break;
 175         default:
 176                 dev_warn(&pdev->dev, "Invalid chip_id 0x%02x, "
 177                          "defaulting to 4 channels\n",
 178                          chip_id);
 179         case 5:
 180                 solo_dev->nr_chans = 4;
 181                 solo_dev->nr_ext = 1;
 182         }
 183
 184         solo_dev->flags = id->driver_data;
 185
 186         /* Disable all interrupts to start */
 187         solo_irq_off(solo_dev, ~0);
 188
 189         reg = SOLO_SYS_CFG_SDRAM64BIT;
 190         /* Initial global settings */
 191         if (!(solo_dev->flags & FLAGS_6110))
 192                 reg |= SOLO6010_SYS_CFG_INPUTDIV(25) |
 193                         SOLO6010_SYS_CFG_FEEDBACKDIV((SOLO_CLOCK_MHZ * 2) - 2) |
 194                         SOLO6010_SYS_CFG_OUTDIV(3);
 195         solo_reg_write(solo_dev, SOLO_SYS_CFG, reg);
 196
 197         if (solo_dev->flags & FLAGS_6110) {
 198                 u32 sys_clock_MHz = SOLO_CLOCK_MHZ;
 199                 u32 pll_DIVQ;
 200                 u32 pll_DIVF;
 201
 202                 if (sys_clock_MHz < 125) {
 203                         pll_DIVQ = 3;
 204                         pll_DIVF = (sys_clock_MHz * 4) / 3;
 205                 } else {
 206                         pll_DIVQ = 2;
 207                         pll_DIVF = (sys_clock_MHz * 2) / 3;
 208                 }
 209
 210                 solo_reg_write(solo_dev, SOLO6110_PLL_CONFIG,
 211                                SOLO6110_PLL_RANGE_5_10MHZ |
 212                                SOLO6110_PLL_DIVR(9) |
 213                                SOLO6110_PLL_DIVQ_EXP(pll_DIVQ) |
 214                                SOLO6110_PLL_DIVF(pll_DIVF) | SOLO6110_PLL_FSEN);
 215                 mdelay(1);      // PLL Locking time (1ms)
 216
 217                 solo_reg_write(solo_dev, SOLO_DMA_CTRL1, 3 << 8); /* ? */
 218         } else
 219                 solo_reg_write(solo_dev, SOLO_DMA_CTRL1, 1 << 8); /* ? */
 220
 221         solo_reg_write(solo_dev, SOLO_TIMER_CLOCK_NUM, SOLO_CLOCK_MHZ - 1);
 222
 223         /* PLL locking time of 1ms */
 224         mdelay(1);
 225
 226         ret = request_irq(pdev->irq, solo_isr, IRQF_SHARED, SOLO6X10_NAME,
 227                           solo_dev);
 228         if (ret)
 229                 goto fail_probe;
 230
 231         /* Handle this from the start */
 232         solo_irq_on(solo_dev, SOLO_IRQ_PCI_ERR);
 233
 234         ret = solo_i2c_init(solo_dev);
 235         if (ret)
 236                 goto fail_probe;
 237
 238         /* Setup the DMA engine */
 239         sdram = (solo_dev->nr_chans >= 8) ? 2 : 1;
 240         solo_reg_write(solo_dev, SOLO_DMA_CTRL,
 241                        SOLO_DMA_CTRL_REFRESH_CYCLE(1) |
 242                        SOLO_DMA_CTRL_SDRAM_SIZE(sdram) |
 243                        SOLO_DMA_CTRL_SDRAM_CLK_INVERT |
 244                        SOLO_DMA_CTRL_READ_CLK_SELECT |
 245                        SOLO_DMA_CTRL_LATENCY(1));
 246
 247         ret = solo_p2m_init(solo_dev);
 248         if (ret)
 249                 goto fail_probe;
 250
 251         ret = solo_disp_init(solo_dev);
 252         if (ret)
 253                 goto fail_probe;
 254
 255         ret = solo_gpio_init(solo_dev);
 256         if (ret)
 257                 goto fail_probe;
 258
 259         ret = solo_tw28_init(solo_dev);
 260         if (ret)
 261                 goto fail_probe;
 262
 263         ret = solo_v4l2_init(solo_dev);
 264         if (ret)
 265                 goto fail_probe;
 266
 267         ret = solo_enc_init(solo_dev);
 268         if (ret)
 269                 goto fail_probe;
 270
 271         ret = solo_enc_v4l2_init(solo_dev);
 272         if (ret)
 273                 goto fail_probe;
 274
 275         ret = solo_g723_init(solo_dev);
 276         if (ret)
 277                 goto fail_probe;
 278
 279         return 0;
 280
 281 fail_probe:
 282         free_solo_dev(solo_dev);
 283         return ret;
 284 }
 285
 286 static void __devexit solo_pci_remove(struct pci_dev *pdev)
 287 {
 288         struct solo_dev *solo_dev = pci_get_drvdata(pdev);
 289
 290         free_solo_dev(solo_dev);
 291 }
 292
 293 static struct pci_device_id solo_id_table[] = {
 294         /* 6010 based cards */
 295         {PCI_DEVICE(PCI_VENDOR_ID_SOFTLOGIC, PCI_DEVICE_ID_SOLO6010)},
 296         {PCI_DEVICE(PCI_VENDOR_ID_SOFTLOGIC, PCI_DEVICE_ID_SOLO6110),
 297          .driver_data = FLAGS_6110},
 298         {PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_NEUSOLO_4)},
 299         {PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_NEUSOLO_9)},
 300         {PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_NEUSOLO_16)},
 301         {PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_BC_SOLO_4)},
 302         {PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_BC_SOLO_9)},
 303         {PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_BC_SOLO_16)},
 304         /* 6110 based cards */
 305         {PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_BC_6110_4)},
 306         {PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_BC_6110_8)},
 307         {PCI_DEVICE(PCI_VENDOR_ID_BLUECHERRY, PCI_DEVICE_ID_BC_6110_16)},
 308         {0,}
 309 };
 310
 311 MODULE_DEVICE_TABLE(pci, solo_id_table);
 312
 313 static struct pci_driver solo_pci_driver = {
 314         .name = SOLO6X10_NAME,
 315         .id_table = solo_id_table,
 316         .probe = solo_pci_probe,
 317         .remove = solo_pci_remove,
 318 };
 319
 320 static int __init solo_module_init(void)
 321 {
 322         return pci_register_driver(&solo_pci_driver);
 323 }
 324
 325 static void __exit solo_module_exit(void)
 326 {
 327         pci_unregister_driver(&solo_pci_driver);
 328 }
 329
 330 module_init(solo_module_init);
 331 module_exit(solo_module_exit);