drm/radeon/kms: split MSI check into a separate function
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / gpu / drm / radeon / radeon_irq_kms.c
blobf0e660b10febe1be3bc01360fcd7d106fa2f16fa
1 /*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
28 #include "drmP.h"
29 #include "drm_crtc_helper.h"
30 #include "radeon_drm.h"
31 #include "radeon_reg.h"
32 #include "radeon.h"
33 #include "atom.h"
35 irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS)
37 struct drm_device *dev = (struct drm_device *) arg;
38 struct radeon_device *rdev = dev->dev_private;
40 return radeon_irq_process(rdev);
44 * Handle hotplug events outside the interrupt handler proper.
46 static void radeon_hotplug_work_func(struct work_struct *work)
48 struct radeon_device *rdev = container_of(work, struct radeon_device,
49 hotplug_work);
50 struct drm_device *dev = rdev->ddev;
51 struct drm_mode_config *mode_config = &dev->mode_config;
52 struct drm_connector *connector;
54 if (mode_config->num_connector) {
55 list_for_each_entry(connector, &mode_config->connector_list, head)
56 radeon_connector_hotplug(connector);
58 /* Just fire off a uevent and let userspace tell us what to do */
59 drm_helper_hpd_irq_event(dev);
62 void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
64 struct radeon_device *rdev = dev->dev_private;
65 unsigned i;
67 /* Disable *all* interrupts */
68 rdev->irq.sw_int = false;
69 rdev->irq.gui_idle = false;
70 for (i = 0; i < rdev->num_crtc; i++)
71 rdev->irq.crtc_vblank_int[i] = false;
72 for (i = 0; i < 6; i++) {
73 rdev->irq.hpd[i] = false;
74 rdev->irq.pflip[i] = false;
76 radeon_irq_set(rdev);
77 /* Clear bits */
78 radeon_irq_process(rdev);
81 int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
83 struct radeon_device *rdev = dev->dev_private;
85 dev->max_vblank_count = 0x001fffff;
86 rdev->irq.sw_int = true;
87 radeon_irq_set(rdev);
88 return 0;
91 void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
93 struct radeon_device *rdev = dev->dev_private;
94 unsigned i;
96 if (rdev == NULL) {
97 return;
99 /* Disable *all* interrupts */
100 rdev->irq.sw_int = false;
101 rdev->irq.gui_idle = false;
102 for (i = 0; i < rdev->num_crtc; i++)
103 rdev->irq.crtc_vblank_int[i] = false;
104 for (i = 0; i < 6; i++) {
105 rdev->irq.hpd[i] = false;
106 rdev->irq.pflip[i] = false;
108 radeon_irq_set(rdev);
111 static bool radeon_msi_ok(struct radeon_device *rdev)
113 /* RV370/RV380 was first asic with MSI support */
114 if (rdev->family < CHIP_RV380)
115 return false;
117 /* MSIs don't work on AGP */
118 if (rdev->flags & RADEON_IS_AGP)
119 return false;
121 if (rdev->flags & RADEON_IS_IGP) {
122 /* APUs work fine with MSIs */
123 if (rdev->family >= CHIP_PALM)
124 return true;
125 /* lots of IGPs have problems with MSIs */
126 return false;
129 return true;
132 int radeon_irq_kms_init(struct radeon_device *rdev)
134 int i;
135 int r = 0;
137 INIT_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
139 spin_lock_init(&rdev->irq.sw_lock);
140 for (i = 0; i < rdev->num_crtc; i++)
141 spin_lock_init(&rdev->irq.pflip_lock[i]);
142 r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
143 if (r) {
144 return r;
146 /* enable msi */
147 rdev->msi_enabled = 0;
149 if (radeon_msi_ok(rdev)) {
150 int ret = pci_enable_msi(rdev->pdev);
151 if (!ret) {
152 rdev->msi_enabled = 1;
153 dev_info(rdev->dev, "radeon: using MSI.\n");
156 rdev->irq.installed = true;
157 r = drm_irq_install(rdev->ddev);
158 if (r) {
159 rdev->irq.installed = false;
160 return r;
162 DRM_INFO("radeon: irq initialized.\n");
163 return 0;
166 void radeon_irq_kms_fini(struct radeon_device *rdev)
168 drm_vblank_cleanup(rdev->ddev);
169 if (rdev->irq.installed) {
170 drm_irq_uninstall(rdev->ddev);
171 rdev->irq.installed = false;
172 if (rdev->msi_enabled)
173 pci_disable_msi(rdev->pdev);
175 flush_work_sync(&rdev->hotplug_work);
178 void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev)
180 unsigned long irqflags;
182 spin_lock_irqsave(&rdev->irq.sw_lock, irqflags);
183 if (rdev->ddev->irq_enabled && (++rdev->irq.sw_refcount == 1)) {
184 rdev->irq.sw_int = true;
185 radeon_irq_set(rdev);
187 spin_unlock_irqrestore(&rdev->irq.sw_lock, irqflags);
190 void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev)
192 unsigned long irqflags;
194 spin_lock_irqsave(&rdev->irq.sw_lock, irqflags);
195 BUG_ON(rdev->ddev->irq_enabled && rdev->irq.sw_refcount <= 0);
196 if (rdev->ddev->irq_enabled && (--rdev->irq.sw_refcount == 0)) {
197 rdev->irq.sw_int = false;
198 radeon_irq_set(rdev);
200 spin_unlock_irqrestore(&rdev->irq.sw_lock, irqflags);
203 void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
205 unsigned long irqflags;
207 if (crtc < 0 || crtc >= rdev->num_crtc)
208 return;
210 spin_lock_irqsave(&rdev->irq.pflip_lock[crtc], irqflags);
211 if (rdev->ddev->irq_enabled && (++rdev->irq.pflip_refcount[crtc] == 1)) {
212 rdev->irq.pflip[crtc] = true;
213 radeon_irq_set(rdev);
215 spin_unlock_irqrestore(&rdev->irq.pflip_lock[crtc], irqflags);
218 void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
220 unsigned long irqflags;
222 if (crtc < 0 || crtc >= rdev->num_crtc)
223 return;
225 spin_lock_irqsave(&rdev->irq.pflip_lock[crtc], irqflags);
226 BUG_ON(rdev->ddev->irq_enabled && rdev->irq.pflip_refcount[crtc] <= 0);
227 if (rdev->ddev->irq_enabled && (--rdev->irq.pflip_refcount[crtc] == 0)) {
228 rdev->irq.pflip[crtc] = false;
229 radeon_irq_set(rdev);
231 spin_unlock_irqrestore(&rdev->irq.pflip_lock[crtc], irqflags);