iwlagn: add PAN to tx flush
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / iwlwifi / iwl-commands.h
blob189bc181c36d5b31df4b730c990f9c43b4617417
1 /******************************************************************************
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
6 * GPL LICENSE SUMMARY
8 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
24 * The full GNU General Public License is included in this distribution
25 * in the file called LICENSE.GPL.
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 * BSD LICENSE
33 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
34 * All rights reserved.
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
45 * distribution.
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 *****************************************************************************/
64 * Please use this file (iwl-commands.h) only for uCode API definitions.
65 * Please use iwl-xxxx-hw.h for hardware-related definitions.
66 * Please use iwl-dev.h for driver implementation definitions.
69 #ifndef __iwl_commands_h__
70 #define __iwl_commands_h__
72 struct iwl_priv;
74 /* uCode version contains 4 values: Major/Minor/API/Serial */
75 #define IWL_UCODE_MAJOR(ver) (((ver) & 0xFF000000) >> 24)
76 #define IWL_UCODE_MINOR(ver) (((ver) & 0x00FF0000) >> 16)
77 #define IWL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8)
78 #define IWL_UCODE_SERIAL(ver) ((ver) & 0x000000FF)
81 /* Tx rates */
82 #define IWL_CCK_RATES 4
83 #define IWL_OFDM_RATES 8
84 #define IWL_MAX_RATES (IWL_CCK_RATES + IWL_OFDM_RATES)
86 enum {
87 REPLY_ALIVE = 0x1,
88 REPLY_ERROR = 0x2,
90 /* RXON and QOS commands */
91 REPLY_RXON = 0x10,
92 REPLY_RXON_ASSOC = 0x11,
93 REPLY_QOS_PARAM = 0x13,
94 REPLY_RXON_TIMING = 0x14,
96 /* Multi-Station support */
97 REPLY_ADD_STA = 0x18,
98 REPLY_REMOVE_STA = 0x19,
99 REPLY_REMOVE_ALL_STA = 0x1a, /* not used */
100 REPLY_TXFIFO_FLUSH = 0x1e,
102 /* Security */
103 REPLY_WEPKEY = 0x20,
105 /* RX, TX, LEDs */
106 REPLY_TX = 0x1c,
107 REPLY_LEDS_CMD = 0x48,
108 REPLY_TX_LINK_QUALITY_CMD = 0x4e, /* for 4965 and up */
110 /* WiMAX coexistence */
111 COEX_PRIORITY_TABLE_CMD = 0x5a, /* for 5000 series and up */
112 COEX_MEDIUM_NOTIFICATION = 0x5b,
113 COEX_EVENT_CMD = 0x5c,
115 /* Calibration */
116 TEMPERATURE_NOTIFICATION = 0x62,
117 CALIBRATION_CFG_CMD = 0x65,
118 CALIBRATION_RES_NOTIFICATION = 0x66,
119 CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
121 /* 802.11h related */
122 REPLY_QUIET_CMD = 0x71, /* not used */
123 REPLY_CHANNEL_SWITCH = 0x72,
124 CHANNEL_SWITCH_NOTIFICATION = 0x73,
125 REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74,
126 SPECTRUM_MEASURE_NOTIFICATION = 0x75,
128 /* Power Management */
129 POWER_TABLE_CMD = 0x77,
130 PM_SLEEP_NOTIFICATION = 0x7A,
131 PM_DEBUG_STATISTIC_NOTIFIC = 0x7B,
133 /* Scan commands and notifications */
134 REPLY_SCAN_CMD = 0x80,
135 REPLY_SCAN_ABORT_CMD = 0x81,
136 SCAN_START_NOTIFICATION = 0x82,
137 SCAN_RESULTS_NOTIFICATION = 0x83,
138 SCAN_COMPLETE_NOTIFICATION = 0x84,
140 /* IBSS/AP commands */
141 BEACON_NOTIFICATION = 0x90,
142 REPLY_TX_BEACON = 0x91,
143 WHO_IS_AWAKE_NOTIFICATION = 0x94, /* not used */
145 /* Miscellaneous commands */
146 REPLY_TX_POWER_DBM_CMD = 0x95,
147 QUIET_NOTIFICATION = 0x96, /* not used */
148 REPLY_TX_PWR_TABLE_CMD = 0x97,
149 REPLY_TX_POWER_DBM_CMD_V1 = 0x98, /* old version of API */
150 TX_ANT_CONFIGURATION_CMD = 0x98,
151 MEASURE_ABORT_NOTIFICATION = 0x99, /* not used */
153 /* Bluetooth device coexistence config command */
154 REPLY_BT_CONFIG = 0x9b,
156 /* Statistics */
157 REPLY_STATISTICS_CMD = 0x9c,
158 STATISTICS_NOTIFICATION = 0x9d,
160 /* RF-KILL commands and notifications */
161 REPLY_CARD_STATE_CMD = 0xa0,
162 CARD_STATE_NOTIFICATION = 0xa1,
164 /* Missed beacons notification */
165 MISSED_BEACONS_NOTIFICATION = 0xa2,
167 REPLY_CT_KILL_CONFIG_CMD = 0xa4,
168 SENSITIVITY_CMD = 0xa8,
169 REPLY_PHY_CALIBRATION_CMD = 0xb0,
170 REPLY_RX_PHY_CMD = 0xc0,
171 REPLY_RX_MPDU_CMD = 0xc1,
172 REPLY_RX = 0xc3,
173 REPLY_COMPRESSED_BA = 0xc5,
175 /* BT Coex */
176 REPLY_BT_COEX_PRIO_TABLE = 0xcc,
177 REPLY_BT_COEX_PROT_ENV = 0xcd,
178 REPLY_BT_COEX_PROFILE_NOTIF = 0xce,
180 /* PAN commands */
181 REPLY_WIPAN_PARAMS = 0xb2,
182 REPLY_WIPAN_RXON = 0xb3, /* use REPLY_RXON structure */
183 REPLY_WIPAN_RXON_TIMING = 0xb4, /* use REPLY_RXON_TIMING structure */
184 REPLY_WIPAN_RXON_ASSOC = 0xb6, /* use REPLY_RXON_ASSOC structure */
185 REPLY_WIPAN_QOS_PARAM = 0xb7, /* use REPLY_QOS_PARAM structure */
186 REPLY_WIPAN_WEPKEY = 0xb8, /* use REPLY_WEPKEY structure */
187 REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9,
188 REPLY_WIPAN_NOA_NOTIFICATION = 0xbc,
189 REPLY_WIPAN_DEACTIVATION_COMPLETE = 0xbd,
191 REPLY_MAX = 0xff
194 /******************************************************************************
195 * (0)
196 * Commonly used structures and definitions:
197 * Command header, rate_n_flags, txpower
199 *****************************************************************************/
201 /* iwl_cmd_header flags value */
202 #define IWL_CMD_FAILED_MSK 0x40
204 #define SEQ_TO_QUEUE(s) (((s) >> 8) & 0x1f)
205 #define QUEUE_TO_SEQ(q) (((q) & 0x1f) << 8)
206 #define SEQ_TO_INDEX(s) ((s) & 0xff)
207 #define INDEX_TO_SEQ(i) ((i) & 0xff)
208 #define SEQ_RX_FRAME cpu_to_le16(0x8000)
211 * struct iwl_cmd_header
213 * This header format appears in the beginning of each command sent from the
214 * driver, and each response/notification received from uCode.
216 struct iwl_cmd_header {
217 u8 cmd; /* Command ID: REPLY_RXON, etc. */
218 u8 flags; /* 0:5 reserved, 6 abort, 7 internal */
220 * The driver sets up the sequence number to values of its choosing.
221 * uCode does not use this value, but passes it back to the driver
222 * when sending the response to each driver-originated command, so
223 * the driver can match the response to the command. Since the values
224 * don't get used by uCode, the driver may set up an arbitrary format.
226 * There is one exception: uCode sets bit 15 when it originates
227 * the response/notification, i.e. when the response/notification
228 * is not a direct response to a command sent by the driver. For
229 * example, uCode issues REPLY_RX when it sends a received frame
230 * to the driver; it is not a direct response to any driver command.
232 * The Linux driver uses the following format:
234 * 0:7 tfd index - position within TX queue
235 * 8:12 TX queue id
236 * 13:14 reserved
237 * 15 unsolicited RX or uCode-originated notification
239 __le16 sequence;
241 /* command or response/notification data follows immediately */
242 u8 data[0];
243 } __packed;
247 * iwlagn rate_n_flags bit fields
249 * rate_n_flags format is used in following iwlagn commands:
250 * REPLY_RX (response only)
251 * REPLY_RX_MPDU (response only)
252 * REPLY_TX (both command and response)
253 * REPLY_TX_LINK_QUALITY_CMD
255 * High-throughput (HT) rate format for bits 7:0 (bit 8 must be "1"):
256 * 2-0: 0) 6 Mbps
257 * 1) 12 Mbps
258 * 2) 18 Mbps
259 * 3) 24 Mbps
260 * 4) 36 Mbps
261 * 5) 48 Mbps
262 * 6) 54 Mbps
263 * 7) 60 Mbps
265 * 4-3: 0) Single stream (SISO)
266 * 1) Dual stream (MIMO)
267 * 2) Triple stream (MIMO)
269 * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data
271 * Legacy OFDM rate format for bits 7:0 (bit 8 must be "0", bit 9 "0"):
272 * 3-0: 0xD) 6 Mbps
273 * 0xF) 9 Mbps
274 * 0x5) 12 Mbps
275 * 0x7) 18 Mbps
276 * 0x9) 24 Mbps
277 * 0xB) 36 Mbps
278 * 0x1) 48 Mbps
279 * 0x3) 54 Mbps
281 * Legacy CCK rate format for bits 7:0 (bit 8 must be "0", bit 9 "1"):
282 * 6-0: 10) 1 Mbps
283 * 20) 2 Mbps
284 * 55) 5.5 Mbps
285 * 110) 11 Mbps
287 #define RATE_MCS_CODE_MSK 0x7
288 #define RATE_MCS_SPATIAL_POS 3
289 #define RATE_MCS_SPATIAL_MSK 0x18
290 #define RATE_MCS_HT_DUP_POS 5
291 #define RATE_MCS_HT_DUP_MSK 0x20
292 /* Both legacy and HT use bits 7:0 as the CCK/OFDM rate or HT MCS */
293 #define RATE_MCS_RATE_MSK 0xff
295 /* Bit 8: (1) HT format, (0) legacy format in bits 7:0 */
296 #define RATE_MCS_FLAGS_POS 8
297 #define RATE_MCS_HT_POS 8
298 #define RATE_MCS_HT_MSK 0x100
300 /* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */
301 #define RATE_MCS_CCK_POS 9
302 #define RATE_MCS_CCK_MSK 0x200
304 /* Bit 10: (1) Use Green Field preamble */
305 #define RATE_MCS_GF_POS 10
306 #define RATE_MCS_GF_MSK 0x400
308 /* Bit 11: (1) Use 40Mhz HT40 chnl width, (0) use 20 MHz legacy chnl width */
309 #define RATE_MCS_HT40_POS 11
310 #define RATE_MCS_HT40_MSK 0x800
312 /* Bit 12: (1) Duplicate data on both 20MHz chnls. HT40 (bit 11) must be set. */
313 #define RATE_MCS_DUP_POS 12
314 #define RATE_MCS_DUP_MSK 0x1000
316 /* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
317 #define RATE_MCS_SGI_POS 13
318 #define RATE_MCS_SGI_MSK 0x2000
321 * rate_n_flags Tx antenna masks
322 * 4965 has 2 transmitters
323 * 5100 has 1 transmitter B
324 * 5150 has 1 transmitter A
325 * 5300 has 3 transmitters
326 * 5350 has 3 transmitters
327 * bit14:16
329 #define RATE_MCS_ANT_POS 14
330 #define RATE_MCS_ANT_A_MSK 0x04000
331 #define RATE_MCS_ANT_B_MSK 0x08000
332 #define RATE_MCS_ANT_C_MSK 0x10000
333 #define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | RATE_MCS_ANT_B_MSK)
334 #define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | RATE_MCS_ANT_C_MSK)
335 #define RATE_ANT_NUM 3
337 #define POWER_TABLE_NUM_ENTRIES 33
338 #define POWER_TABLE_NUM_HT_OFDM_ENTRIES 32
339 #define POWER_TABLE_CCK_ENTRY 32
341 #define IWL_PWR_NUM_HT_OFDM_ENTRIES 24
342 #define IWL_PWR_CCK_ENTRIES 2
345 * struct tx_power_dual_stream
347 * Table entries in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH
349 * Same format as iwl_tx_power_dual_stream, but __le32
351 struct tx_power_dual_stream {
352 __le32 dw;
353 } __packed;
356 * Command REPLY_TX_POWER_DBM_CMD = 0x98
357 * struct iwlagn_tx_power_dbm_cmd
359 #define IWLAGN_TX_POWER_AUTO 0x7f
360 #define IWLAGN_TX_POWER_NO_CLOSED (0x1 << 6)
362 struct iwlagn_tx_power_dbm_cmd {
363 s8 global_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
364 u8 flags;
365 s8 srv_chan_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
366 u8 reserved;
367 } __packed;
370 * Command TX_ANT_CONFIGURATION_CMD = 0x98
371 * This command is used to configure valid Tx antenna.
372 * By default uCode concludes the valid antenna according to the radio flavor.
373 * This command enables the driver to override/modify this conclusion.
375 struct iwl_tx_ant_config_cmd {
376 __le32 valid;
377 } __packed;
379 /******************************************************************************
380 * (0a)
381 * Alive and Error Commands & Responses:
383 *****************************************************************************/
385 #define UCODE_VALID_OK cpu_to_le32(0x1)
388 * REPLY_ALIVE = 0x1 (response only, not a command)
390 * uCode issues this "alive" notification once the runtime image is ready
391 * to receive commands from the driver. This is the *second* "alive"
392 * notification that the driver will receive after rebooting uCode;
393 * this "alive" is indicated by subtype field != 9.
395 * See comments documenting "BSM" (bootstrap state machine).
397 * This response includes two pointers to structures within the device's
398 * data SRAM (access via HBUS_TARG_MEM_* regs) that are useful for debugging:
400 * 1) log_event_table_ptr indicates base of the event log. This traces
401 * a 256-entry history of uCode execution within a circular buffer.
402 * Its header format is:
404 * __le32 log_size; log capacity (in number of entries)
405 * __le32 type; (1) timestamp with each entry, (0) no timestamp
406 * __le32 wraps; # times uCode has wrapped to top of circular buffer
407 * __le32 write_index; next circular buffer entry that uCode would fill
409 * The header is followed by the circular buffer of log entries. Entries
410 * with timestamps have the following format:
412 * __le32 event_id; range 0 - 1500
413 * __le32 timestamp; low 32 bits of TSF (of network, if associated)
414 * __le32 data; event_id-specific data value
416 * Entries without timestamps contain only event_id and data.
419 * 2) error_event_table_ptr indicates base of the error log. This contains
420 * information about any uCode error that occurs. For agn, the format
421 * of the error log is defined by struct iwl_error_event_table.
423 * The Linux driver can print both logs to the system log when a uCode error
424 * occurs.
428 * Note: This structure is read from the device with IO accesses,
429 * and the reading already does the endian conversion. As it is
430 * read with u32-sized accesses, any members with a different size
431 * need to be ordered correctly though!
433 struct iwl_error_event_table {
434 u32 valid; /* (nonzero) valid, (0) log is empty */
435 u32 error_id; /* type of error */
436 u32 pc; /* program counter */
437 u32 blink1; /* branch link */
438 u32 blink2; /* branch link */
439 u32 ilink1; /* interrupt link */
440 u32 ilink2; /* interrupt link */
441 u32 data1; /* error-specific data */
442 u32 data2; /* error-specific data */
443 u32 line; /* source code line of error */
444 u32 bcon_time; /* beacon timer */
445 u32 tsf_low; /* network timestamp function timer */
446 u32 tsf_hi; /* network timestamp function timer */
447 u32 gp1; /* GP1 timer register */
448 u32 gp2; /* GP2 timer register */
449 u32 gp3; /* GP3 timer register */
450 u32 ucode_ver; /* uCode version */
451 u32 hw_ver; /* HW Silicon version */
452 u32 brd_ver; /* HW board version */
453 u32 log_pc; /* log program counter */
454 u32 frame_ptr; /* frame pointer */
455 u32 stack_ptr; /* stack pointer */
456 u32 hcmd; /* last host command header */
457 #if 0
458 /* no need to read the remainder, we don't use the values */
459 u32 isr0; /* isr status register LMPM_NIC_ISR0: rxtx_flag */
460 u32 isr1; /* isr status register LMPM_NIC_ISR1: host_flag */
461 u32 isr2; /* isr status register LMPM_NIC_ISR2: enc_flag */
462 u32 isr3; /* isr status register LMPM_NIC_ISR3: time_flag */
463 u32 isr4; /* isr status register LMPM_NIC_ISR4: wico interrupt */
464 u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */
465 u32 wait_event; /* wait event() caller address */
466 u32 l2p_control; /* L2pControlField */
467 u32 l2p_duration; /* L2pDurationField */
468 u32 l2p_mhvalid; /* L2pMhValidBits */
469 u32 l2p_addr_match; /* L2pAddrMatchStat */
470 u32 lmpm_pmg_sel; /* indicate which clocks are turned on (LMPM_PMG_SEL) */
471 u32 u_timestamp; /* indicate when the date and time of the compilation */
472 u32 flow_handler; /* FH read/write pointers, RX credit */
473 #endif
474 } __packed;
476 struct iwl_alive_resp {
477 u8 ucode_minor;
478 u8 ucode_major;
479 __le16 reserved1;
480 u8 sw_rev[8];
481 u8 ver_type;
482 u8 ver_subtype; /* not "9" for runtime alive */
483 __le16 reserved2;
484 __le32 log_event_table_ptr; /* SRAM address for event log */
485 __le32 error_event_table_ptr; /* SRAM address for error log */
486 __le32 timestamp;
487 __le32 is_valid;
488 } __packed;
491 * REPLY_ERROR = 0x2 (response only, not a command)
493 struct iwl_error_resp {
494 __le32 error_type;
495 u8 cmd_id;
496 u8 reserved1;
497 __le16 bad_cmd_seq_num;
498 __le32 error_info;
499 __le64 timestamp;
500 } __packed;
502 /******************************************************************************
503 * (1)
504 * RXON Commands & Responses:
506 *****************************************************************************/
509 * Rx config defines & structure
511 /* rx_config device types */
512 enum {
513 RXON_DEV_TYPE_AP = 1,
514 RXON_DEV_TYPE_ESS = 3,
515 RXON_DEV_TYPE_IBSS = 4,
516 RXON_DEV_TYPE_SNIFFER = 6,
517 RXON_DEV_TYPE_CP = 7,
518 RXON_DEV_TYPE_2STA = 8,
519 RXON_DEV_TYPE_P2P = 9,
523 #define RXON_RX_CHAIN_DRIVER_FORCE_MSK cpu_to_le16(0x1 << 0)
524 #define RXON_RX_CHAIN_DRIVER_FORCE_POS (0)
525 #define RXON_RX_CHAIN_VALID_MSK cpu_to_le16(0x7 << 1)
526 #define RXON_RX_CHAIN_VALID_POS (1)
527 #define RXON_RX_CHAIN_FORCE_SEL_MSK cpu_to_le16(0x7 << 4)
528 #define RXON_RX_CHAIN_FORCE_SEL_POS (4)
529 #define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK cpu_to_le16(0x7 << 7)
530 #define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
531 #define RXON_RX_CHAIN_CNT_MSK cpu_to_le16(0x3 << 10)
532 #define RXON_RX_CHAIN_CNT_POS (10)
533 #define RXON_RX_CHAIN_MIMO_CNT_MSK cpu_to_le16(0x3 << 12)
534 #define RXON_RX_CHAIN_MIMO_CNT_POS (12)
535 #define RXON_RX_CHAIN_MIMO_FORCE_MSK cpu_to_le16(0x1 << 14)
536 #define RXON_RX_CHAIN_MIMO_FORCE_POS (14)
538 /* rx_config flags */
539 /* band & modulation selection */
540 #define RXON_FLG_BAND_24G_MSK cpu_to_le32(1 << 0)
541 #define RXON_FLG_CCK_MSK cpu_to_le32(1 << 1)
542 /* auto detection enable */
543 #define RXON_FLG_AUTO_DETECT_MSK cpu_to_le32(1 << 2)
544 /* TGg protection when tx */
545 #define RXON_FLG_TGG_PROTECT_MSK cpu_to_le32(1 << 3)
546 /* cck short slot & preamble */
547 #define RXON_FLG_SHORT_SLOT_MSK cpu_to_le32(1 << 4)
548 #define RXON_FLG_SHORT_PREAMBLE_MSK cpu_to_le32(1 << 5)
549 /* antenna selection */
550 #define RXON_FLG_DIS_DIV_MSK cpu_to_le32(1 << 7)
551 #define RXON_FLG_ANT_SEL_MSK cpu_to_le32(0x0f00)
552 #define RXON_FLG_ANT_A_MSK cpu_to_le32(1 << 8)
553 #define RXON_FLG_ANT_B_MSK cpu_to_le32(1 << 9)
554 /* radar detection enable */
555 #define RXON_FLG_RADAR_DETECT_MSK cpu_to_le32(1 << 12)
556 #define RXON_FLG_TGJ_NARROW_BAND_MSK cpu_to_le32(1 << 13)
557 /* rx response to host with 8-byte TSF
558 * (according to ON_AIR deassertion) */
559 #define RXON_FLG_TSF2HOST_MSK cpu_to_le32(1 << 15)
562 /* HT flags */
563 #define RXON_FLG_CTRL_CHANNEL_LOC_POS (22)
564 #define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK cpu_to_le32(0x1 << 22)
566 #define RXON_FLG_HT_OPERATING_MODE_POS (23)
568 #define RXON_FLG_HT_PROT_MSK cpu_to_le32(0x1 << 23)
569 #define RXON_FLG_HT40_PROT_MSK cpu_to_le32(0x2 << 23)
571 #define RXON_FLG_CHANNEL_MODE_POS (25)
572 #define RXON_FLG_CHANNEL_MODE_MSK cpu_to_le32(0x3 << 25)
574 /* channel mode */
575 enum {
576 CHANNEL_MODE_LEGACY = 0,
577 CHANNEL_MODE_PURE_40 = 1,
578 CHANNEL_MODE_MIXED = 2,
579 CHANNEL_MODE_RESERVED = 3,
581 #define RXON_FLG_CHANNEL_MODE_LEGACY cpu_to_le32(CHANNEL_MODE_LEGACY << RXON_FLG_CHANNEL_MODE_POS)
582 #define RXON_FLG_CHANNEL_MODE_PURE_40 cpu_to_le32(CHANNEL_MODE_PURE_40 << RXON_FLG_CHANNEL_MODE_POS)
583 #define RXON_FLG_CHANNEL_MODE_MIXED cpu_to_le32(CHANNEL_MODE_MIXED << RXON_FLG_CHANNEL_MODE_POS)
585 /* CTS to self (if spec allows) flag */
586 #define RXON_FLG_SELF_CTS_EN cpu_to_le32(0x1<<30)
588 /* rx_config filter flags */
589 /* accept all data frames */
590 #define RXON_FILTER_PROMISC_MSK cpu_to_le32(1 << 0)
591 /* pass control & management to host */
592 #define RXON_FILTER_CTL2HOST_MSK cpu_to_le32(1 << 1)
593 /* accept multi-cast */
594 #define RXON_FILTER_ACCEPT_GRP_MSK cpu_to_le32(1 << 2)
595 /* don't decrypt uni-cast frames */
596 #define RXON_FILTER_DIS_DECRYPT_MSK cpu_to_le32(1 << 3)
597 /* don't decrypt multi-cast frames */
598 #define RXON_FILTER_DIS_GRP_DECRYPT_MSK cpu_to_le32(1 << 4)
599 /* STA is associated */
600 #define RXON_FILTER_ASSOC_MSK cpu_to_le32(1 << 5)
601 /* transfer to host non bssid beacons in associated state */
602 #define RXON_FILTER_BCON_AWARE_MSK cpu_to_le32(1 << 6)
605 * REPLY_RXON = 0x10 (command, has simple generic response)
607 * RXON tunes the radio tuner to a service channel, and sets up a number
608 * of parameters that are used primarily for Rx, but also for Tx operations.
610 * NOTE: When tuning to a new channel, driver must set the
611 * RXON_FILTER_ASSOC_MSK to 0. This will clear station-dependent
612 * info within the device, including the station tables, tx retry
613 * rate tables, and txpower tables. Driver must build a new station
614 * table and txpower table before transmitting anything on the RXON
615 * channel.
617 * NOTE: All RXONs wipe clean the internal txpower table. Driver must
618 * issue a new REPLY_TX_PWR_TABLE_CMD after each REPLY_RXON (0x10),
619 * regardless of whether RXON_FILTER_ASSOC_MSK is set.
622 struct iwl_rxon_cmd {
623 u8 node_addr[6];
624 __le16 reserved1;
625 u8 bssid_addr[6];
626 __le16 reserved2;
627 u8 wlap_bssid_addr[6];
628 __le16 reserved3;
629 u8 dev_type;
630 u8 air_propagation;
631 __le16 rx_chain;
632 u8 ofdm_basic_rates;
633 u8 cck_basic_rates;
634 __le16 assoc_id;
635 __le32 flags;
636 __le32 filter_flags;
637 __le16 channel;
638 u8 ofdm_ht_single_stream_basic_rates;
639 u8 ofdm_ht_dual_stream_basic_rates;
640 u8 ofdm_ht_triple_stream_basic_rates;
641 u8 reserved5;
642 __le16 acquisition_data;
643 __le16 reserved6;
644 } __packed;
647 * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response)
649 struct iwl_rxon_assoc_cmd {
650 __le32 flags;
651 __le32 filter_flags;
652 u8 ofdm_basic_rates;
653 u8 cck_basic_rates;
654 __le16 reserved1;
655 u8 ofdm_ht_single_stream_basic_rates;
656 u8 ofdm_ht_dual_stream_basic_rates;
657 u8 ofdm_ht_triple_stream_basic_rates;
658 u8 reserved2;
659 __le16 rx_chain_select_flags;
660 __le16 acquisition_data;
661 __le32 reserved3;
662 } __packed;
664 #define IWL_CONN_MAX_LISTEN_INTERVAL 10
665 #define IWL_MAX_UCODE_BEACON_INTERVAL 4 /* 4096 */
666 #define IWL39_MAX_UCODE_BEACON_INTERVAL 1 /* 1024 */
669 * REPLY_RXON_TIMING = 0x14 (command, has simple generic response)
671 struct iwl_rxon_time_cmd {
672 __le64 timestamp;
673 __le16 beacon_interval;
674 __le16 atim_window;
675 __le32 beacon_init_val;
676 __le16 listen_interval;
677 u8 dtim_period;
678 u8 delta_cp_bss_tbtts;
679 } __packed;
682 * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response)
685 * struct iwl5000_channel_switch_cmd
686 * @band: 0- 5.2GHz, 1- 2.4GHz
687 * @expect_beacon: 0- resume transmits after channel switch
688 * 1- wait for beacon to resume transmits
689 * @channel: new channel number
690 * @rxon_flags: Rx on flags
691 * @rxon_filter_flags: filtering parameters
692 * @switch_time: switch time in extended beacon format
693 * @reserved: reserved bytes
695 struct iwl5000_channel_switch_cmd {
696 u8 band;
697 u8 expect_beacon;
698 __le16 channel;
699 __le32 rxon_flags;
700 __le32 rxon_filter_flags;
701 __le32 switch_time;
702 __le32 reserved[2][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
703 } __packed;
706 * struct iwl6000_channel_switch_cmd
707 * @band: 0- 5.2GHz, 1- 2.4GHz
708 * @expect_beacon: 0- resume transmits after channel switch
709 * 1- wait for beacon to resume transmits
710 * @channel: new channel number
711 * @rxon_flags: Rx on flags
712 * @rxon_filter_flags: filtering parameters
713 * @switch_time: switch time in extended beacon format
714 * @reserved: reserved bytes
716 struct iwl6000_channel_switch_cmd {
717 u8 band;
718 u8 expect_beacon;
719 __le16 channel;
720 __le32 rxon_flags;
721 __le32 rxon_filter_flags;
722 __le32 switch_time;
723 __le32 reserved[3][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
724 } __packed;
727 * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command)
729 struct iwl_csa_notification {
730 __le16 band;
731 __le16 channel;
732 __le32 status; /* 0 - OK, 1 - fail */
733 } __packed;
735 /******************************************************************************
736 * (2)
737 * Quality-of-Service (QOS) Commands & Responses:
739 *****************************************************************************/
742 * struct iwl_ac_qos -- QOS timing params for REPLY_QOS_PARAM
743 * One for each of 4 EDCA access categories in struct iwl_qosparam_cmd
745 * @cw_min: Contention window, start value in numbers of slots.
746 * Should be a power-of-2, minus 1. Device's default is 0x0f.
747 * @cw_max: Contention window, max value in numbers of slots.
748 * Should be a power-of-2, minus 1. Device's default is 0x3f.
749 * @aifsn: Number of slots in Arbitration Interframe Space (before
750 * performing random backoff timing prior to Tx). Device default 1.
751 * @edca_txop: Length of Tx opportunity, in uSecs. Device default is 0.
753 * Device will automatically increase contention window by (2*CW) + 1 for each
754 * transmission retry. Device uses cw_max as a bit mask, ANDed with new CW
755 * value, to cap the CW value.
757 struct iwl_ac_qos {
758 __le16 cw_min;
759 __le16 cw_max;
760 u8 aifsn;
761 u8 reserved1;
762 __le16 edca_txop;
763 } __packed;
765 /* QoS flags defines */
766 #define QOS_PARAM_FLG_UPDATE_EDCA_MSK cpu_to_le32(0x01)
767 #define QOS_PARAM_FLG_TGN_MSK cpu_to_le32(0x02)
768 #define QOS_PARAM_FLG_TXOP_TYPE_MSK cpu_to_le32(0x10)
770 /* Number of Access Categories (AC) (EDCA), queues 0..3 */
771 #define AC_NUM 4
774 * REPLY_QOS_PARAM = 0x13 (command, has simple generic response)
776 * This command sets up timings for each of the 4 prioritized EDCA Tx FIFOs
777 * 0: Background, 1: Best Effort, 2: Video, 3: Voice.
779 struct iwl_qosparam_cmd {
780 __le32 qos_flags;
781 struct iwl_ac_qos ac[AC_NUM];
782 } __packed;
784 /******************************************************************************
785 * (3)
786 * Add/Modify Stations Commands & Responses:
788 *****************************************************************************/
790 * Multi station support
793 /* Special, dedicated locations within device's station table */
794 #define IWL_AP_ID 0
795 #define IWL_AP_ID_PAN 1
796 #define IWL_STA_ID 2
797 #define IWLAGN_PAN_BCAST_ID 14
798 #define IWLAGN_BROADCAST_ID 15
799 #define IWLAGN_STATION_COUNT 16
801 #define IWL_INVALID_STATION 255
803 #define STA_FLG_TX_RATE_MSK cpu_to_le32(1 << 2)
804 #define STA_FLG_PWR_SAVE_MSK cpu_to_le32(1 << 8)
805 #define STA_FLG_PAN_STATION cpu_to_le32(1 << 13)
806 #define STA_FLG_RTS_MIMO_PROT_MSK cpu_to_le32(1 << 17)
807 #define STA_FLG_AGG_MPDU_8US_MSK cpu_to_le32(1 << 18)
808 #define STA_FLG_MAX_AGG_SIZE_POS (19)
809 #define STA_FLG_MAX_AGG_SIZE_MSK cpu_to_le32(3 << 19)
810 #define STA_FLG_HT40_EN_MSK cpu_to_le32(1 << 21)
811 #define STA_FLG_MIMO_DIS_MSK cpu_to_le32(1 << 22)
812 #define STA_FLG_AGG_MPDU_DENSITY_POS (23)
813 #define STA_FLG_AGG_MPDU_DENSITY_MSK cpu_to_le32(7 << 23)
815 /* Use in mode field. 1: modify existing entry, 0: add new station entry */
816 #define STA_CONTROL_MODIFY_MSK 0x01
818 /* key flags __le16*/
819 #define STA_KEY_FLG_ENCRYPT_MSK cpu_to_le16(0x0007)
820 #define STA_KEY_FLG_NO_ENC cpu_to_le16(0x0000)
821 #define STA_KEY_FLG_WEP cpu_to_le16(0x0001)
822 #define STA_KEY_FLG_CCMP cpu_to_le16(0x0002)
823 #define STA_KEY_FLG_TKIP cpu_to_le16(0x0003)
825 #define STA_KEY_FLG_KEYID_POS 8
826 #define STA_KEY_FLG_INVALID cpu_to_le16(0x0800)
827 /* wep key is either from global key (0) or from station info array (1) */
828 #define STA_KEY_FLG_MAP_KEY_MSK cpu_to_le16(0x0008)
830 /* wep key in STA: 5-bytes (0) or 13-bytes (1) */
831 #define STA_KEY_FLG_KEY_SIZE_MSK cpu_to_le16(0x1000)
832 #define STA_KEY_MULTICAST_MSK cpu_to_le16(0x4000)
833 #define STA_KEY_MAX_NUM 8
834 #define STA_KEY_MAX_NUM_PAN 16
836 /* Flags indicate whether to modify vs. don't change various station params */
837 #define STA_MODIFY_KEY_MASK 0x01
838 #define STA_MODIFY_TID_DISABLE_TX 0x02
839 #define STA_MODIFY_TX_RATE_MSK 0x04
840 #define STA_MODIFY_ADDBA_TID_MSK 0x08
841 #define STA_MODIFY_DELBA_TID_MSK 0x10
842 #define STA_MODIFY_SLEEP_TX_COUNT_MSK 0x20
844 /* Receiver address (actually, Rx station's index into station table),
845 * combined with Traffic ID (QOS priority), in format used by Tx Scheduler */
846 #define BUILD_RAxTID(sta_id, tid) (((sta_id) << 4) + (tid))
848 /* agn */
849 struct iwl_keyinfo {
850 __le16 key_flags;
851 u8 tkip_rx_tsc_byte2; /* TSC[2] for key mix ph1 detection */
852 u8 reserved1;
853 __le16 tkip_rx_ttak[5]; /* 10-byte unicast TKIP TTAK */
854 u8 key_offset;
855 u8 reserved2;
856 u8 key[16]; /* 16-byte unicast decryption key */
857 __le64 tx_secur_seq_cnt;
858 __le64 hw_tkip_mic_rx_key;
859 __le64 hw_tkip_mic_tx_key;
860 } __packed;
863 * struct sta_id_modify
864 * @addr[ETH_ALEN]: station's MAC address
865 * @sta_id: index of station in uCode's station table
866 * @modify_mask: STA_MODIFY_*, 1: modify, 0: don't change
868 * Driver selects unused table index when adding new station,
869 * or the index to a pre-existing station entry when modifying that station.
870 * Some indexes have special purposes (IWL_AP_ID, index 0, is for AP).
872 * modify_mask flags select which parameters to modify vs. leave alone.
874 struct sta_id_modify {
875 u8 addr[ETH_ALEN];
876 __le16 reserved1;
877 u8 sta_id;
878 u8 modify_mask;
879 __le16 reserved2;
880 } __packed;
883 * REPLY_ADD_STA = 0x18 (command)
885 * The device contains an internal table of per-station information,
886 * with info on security keys, aggregation parameters, and Tx rates for
887 * initial Tx attempt and any retries (agn devices uses
888 * REPLY_TX_LINK_QUALITY_CMD,
890 * REPLY_ADD_STA sets up the table entry for one station, either creating
891 * a new entry, or modifying a pre-existing one.
893 * NOTE: RXON command (without "associated" bit set) wipes the station table
894 * clean. Moving into RF_KILL state does this also. Driver must set up
895 * new station table before transmitting anything on the RXON channel
896 * (except active scans or active measurements; those commands carry
897 * their own txpower/rate setup data).
899 * When getting started on a new channel, driver must set up the
900 * IWL_BROADCAST_ID entry (last entry in the table). For a client
901 * station in a BSS, once an AP is selected, driver sets up the AP STA
902 * in the IWL_AP_ID entry (1st entry in the table). BROADCAST and AP
903 * are all that are needed for a BSS client station. If the device is
904 * used as AP, or in an IBSS network, driver must set up station table
905 * entries for all STAs in network, starting with index IWL_STA_ID.
908 struct iwl_addsta_cmd {
909 u8 mode; /* 1: modify existing, 0: add new station */
910 u8 reserved[3];
911 struct sta_id_modify sta;
912 struct iwl_keyinfo key;
913 __le32 station_flags; /* STA_FLG_* */
914 __le32 station_flags_msk; /* STA_FLG_* */
916 /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID)
917 * corresponding to bit (e.g. bit 5 controls TID 5).
918 * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */
919 __le16 tid_disable_tx;
921 __le16 rate_n_flags; /* 3945 only */
923 /* TID for which to add block-ack support.
924 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
925 u8 add_immediate_ba_tid;
927 /* TID for which to remove block-ack support.
928 * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */
929 u8 remove_immediate_ba_tid;
931 /* Starting Sequence Number for added block-ack support.
932 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
933 __le16 add_immediate_ba_ssn;
936 * Number of packets OK to transmit to station even though
937 * it is asleep -- used to synchronise PS-poll and u-APSD
938 * responses while ucode keeps track of STA sleep state.
940 __le16 sleep_tx_count;
942 __le16 reserved2;
943 } __packed;
946 #define ADD_STA_SUCCESS_MSK 0x1
947 #define ADD_STA_NO_ROOM_IN_TABLE 0x2
948 #define ADD_STA_NO_BLOCK_ACK_RESOURCE 0x4
949 #define ADD_STA_MODIFY_NON_EXIST_STA 0x8
951 * REPLY_ADD_STA = 0x18 (response)
953 struct iwl_add_sta_resp {
954 u8 status; /* ADD_STA_* */
955 } __packed;
957 #define REM_STA_SUCCESS_MSK 0x1
959 * REPLY_REM_STA = 0x19 (response)
961 struct iwl_rem_sta_resp {
962 u8 status;
963 } __packed;
966 * REPLY_REM_STA = 0x19 (command)
968 struct iwl_rem_sta_cmd {
969 u8 num_sta; /* number of removed stations */
970 u8 reserved[3];
971 u8 addr[ETH_ALEN]; /* MAC addr of the first station */
972 u8 reserved2[2];
973 } __packed;
976 /* WiFi queues mask */
977 #define IWL_SCD_BK_MSK cpu_to_le32(BIT(0))
978 #define IWL_SCD_BE_MSK cpu_to_le32(BIT(1))
979 #define IWL_SCD_VI_MSK cpu_to_le32(BIT(2))
980 #define IWL_SCD_VO_MSK cpu_to_le32(BIT(3))
981 #define IWL_SCD_MGMT_MSK cpu_to_le32(BIT(3))
983 /* PAN queues mask */
984 #define IWL_PAN_SCD_BK_MSK cpu_to_le32(BIT(4))
985 #define IWL_PAN_SCD_BE_MSK cpu_to_le32(BIT(5))
986 #define IWL_PAN_SCD_VI_MSK cpu_to_le32(BIT(6))
987 #define IWL_PAN_SCD_VO_MSK cpu_to_le32(BIT(7))
988 #define IWL_PAN_SCD_MGMT_MSK cpu_to_le32(BIT(7))
989 #define IWL_PAN_SCD_MULTICAST_MSK cpu_to_le32(BIT(8))
991 #define IWL_AGG_TX_QUEUE_MSK cpu_to_le32(0xffc00)
993 #define IWL_DROP_SINGLE 0
994 #define IWL_DROP_SELECTED 1
995 #define IWL_DROP_ALL 2
998 * REPLY_TXFIFO_FLUSH = 0x1e(command and response)
1000 * When using full FIFO flush this command checks the scheduler HW block WR/RD
1001 * pointers to check if all the frames were transferred by DMA into the
1002 * relevant TX FIFO queue. Only when the DMA is finished and the queue is
1003 * empty the command can finish.
1004 * This command is used to flush the TXFIFO from transmit commands, it may
1005 * operate on single or multiple queues, the command queue can't be flushed by
1006 * this command. The command response is returned when all the queue flush
1007 * operations are done. Each TX command flushed return response with the FLUSH
1008 * status set in the TX response status. When FIFO flush operation is used,
1009 * the flush operation ends when both the scheduler DMA done and TXFIFO empty
1010 * are set.
1012 * @fifo_control: bit mask for which queues to flush
1013 * @flush_control: flush controls
1014 * 0: Dump single MSDU
1015 * 1: Dump multiple MSDU according to PS, INVALID STA, TTL, TID disable.
1016 * 2: Dump all FIFO
1018 struct iwl_txfifo_flush_cmd {
1019 __le32 fifo_control;
1020 __le16 flush_control;
1021 __le16 reserved;
1022 } __packed;
1025 * REPLY_WEP_KEY = 0x20
1027 struct iwl_wep_key {
1028 u8 key_index;
1029 u8 key_offset;
1030 u8 reserved1[2];
1031 u8 key_size;
1032 u8 reserved2[3];
1033 u8 key[16];
1034 } __packed;
1036 struct iwl_wep_cmd {
1037 u8 num_keys;
1038 u8 global_key_type;
1039 u8 flags;
1040 u8 reserved;
1041 struct iwl_wep_key key[0];
1042 } __packed;
1044 #define WEP_KEY_WEP_TYPE 1
1045 #define WEP_KEYS_MAX 4
1046 #define WEP_INVALID_OFFSET 0xff
1047 #define WEP_KEY_LEN_64 5
1048 #define WEP_KEY_LEN_128 13
1050 /******************************************************************************
1051 * (4)
1052 * Rx Responses:
1054 *****************************************************************************/
1056 #define RX_RES_STATUS_NO_CRC32_ERROR cpu_to_le32(1 << 0)
1057 #define RX_RES_STATUS_NO_RXE_OVERFLOW cpu_to_le32(1 << 1)
1059 #define RX_RES_PHY_FLAGS_BAND_24_MSK cpu_to_le16(1 << 0)
1060 #define RX_RES_PHY_FLAGS_MOD_CCK_MSK cpu_to_le16(1 << 1)
1061 #define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK cpu_to_le16(1 << 2)
1062 #define RX_RES_PHY_FLAGS_NARROW_BAND_MSK cpu_to_le16(1 << 3)
1063 #define RX_RES_PHY_FLAGS_ANTENNA_MSK 0xf0
1064 #define RX_RES_PHY_FLAGS_ANTENNA_POS 4
1066 #define RX_RES_STATUS_SEC_TYPE_MSK (0x7 << 8)
1067 #define RX_RES_STATUS_SEC_TYPE_NONE (0x0 << 8)
1068 #define RX_RES_STATUS_SEC_TYPE_WEP (0x1 << 8)
1069 #define RX_RES_STATUS_SEC_TYPE_CCMP (0x2 << 8)
1070 #define RX_RES_STATUS_SEC_TYPE_TKIP (0x3 << 8)
1071 #define RX_RES_STATUS_SEC_TYPE_ERR (0x7 << 8)
1073 #define RX_RES_STATUS_STATION_FOUND (1<<6)
1074 #define RX_RES_STATUS_NO_STATION_INFO_MISMATCH (1<<7)
1076 #define RX_RES_STATUS_DECRYPT_TYPE_MSK (0x3 << 11)
1077 #define RX_RES_STATUS_NOT_DECRYPT (0x0 << 11)
1078 #define RX_RES_STATUS_DECRYPT_OK (0x3 << 11)
1079 #define RX_RES_STATUS_BAD_ICV_MIC (0x1 << 11)
1080 #define RX_RES_STATUS_BAD_KEY_TTAK (0x2 << 11)
1082 #define RX_MPDU_RES_STATUS_ICV_OK (0x20)
1083 #define RX_MPDU_RES_STATUS_MIC_OK (0x40)
1084 #define RX_MPDU_RES_STATUS_TTAK_OK (1 << 7)
1085 #define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800)
1088 #define IWLAGN_RX_RES_PHY_CNT 8
1089 #define IWLAGN_RX_RES_AGC_IDX 1
1090 #define IWLAGN_RX_RES_RSSI_AB_IDX 2
1091 #define IWLAGN_RX_RES_RSSI_C_IDX 3
1092 #define IWLAGN_OFDM_AGC_MSK 0xfe00
1093 #define IWLAGN_OFDM_AGC_BIT_POS 9
1094 #define IWLAGN_OFDM_RSSI_INBAND_A_BITMSK 0x00ff
1095 #define IWLAGN_OFDM_RSSI_ALLBAND_A_BITMSK 0xff00
1096 #define IWLAGN_OFDM_RSSI_A_BIT_POS 0
1097 #define IWLAGN_OFDM_RSSI_INBAND_B_BITMSK 0xff0000
1098 #define IWLAGN_OFDM_RSSI_ALLBAND_B_BITMSK 0xff000000
1099 #define IWLAGN_OFDM_RSSI_B_BIT_POS 16
1100 #define IWLAGN_OFDM_RSSI_INBAND_C_BITMSK 0x00ff
1101 #define IWLAGN_OFDM_RSSI_ALLBAND_C_BITMSK 0xff00
1102 #define IWLAGN_OFDM_RSSI_C_BIT_POS 0
1104 struct iwlagn_non_cfg_phy {
1105 __le32 non_cfg_phy[IWLAGN_RX_RES_PHY_CNT]; /* up to 8 phy entries */
1106 } __packed;
1110 * REPLY_RX = 0xc3 (response only, not a command)
1111 * Used only for legacy (non 11n) frames.
1113 struct iwl_rx_phy_res {
1114 u8 non_cfg_phy_cnt; /* non configurable DSP phy data byte count */
1115 u8 cfg_phy_cnt; /* configurable DSP phy data byte count */
1116 u8 stat_id; /* configurable DSP phy data set ID */
1117 u8 reserved1;
1118 __le64 timestamp; /* TSF at on air rise */
1119 __le32 beacon_time_stamp; /* beacon at on-air rise */
1120 __le16 phy_flags; /* general phy flags: band, modulation, ... */
1121 __le16 channel; /* channel number */
1122 u8 non_cfg_phy_buf[32]; /* for various implementations of non_cfg_phy */
1123 __le32 rate_n_flags; /* RATE_MCS_* */
1124 __le16 byte_count; /* frame's byte-count */
1125 __le16 frame_time; /* frame's time on the air */
1126 } __packed;
1128 struct iwl_rx_mpdu_res_start {
1129 __le16 byte_count;
1130 __le16 reserved;
1131 } __packed;
1134 /******************************************************************************
1135 * (5)
1136 * Tx Commands & Responses:
1138 * Driver must place each REPLY_TX command into one of the prioritized Tx
1139 * queues in host DRAM, shared between driver and device (see comments for
1140 * SCD registers and Tx/Rx Queues). When the device's Tx scheduler and uCode
1141 * are preparing to transmit, the device pulls the Tx command over the PCI
1142 * bus via one of the device's Tx DMA channels, to fill an internal FIFO
1143 * from which data will be transmitted.
1145 * uCode handles all timing and protocol related to control frames
1146 * (RTS/CTS/ACK), based on flags in the Tx command. uCode and Tx scheduler
1147 * handle reception of block-acks; uCode updates the host driver via
1148 * REPLY_COMPRESSED_BA.
1150 * uCode handles retrying Tx when an ACK is expected but not received.
1151 * This includes trying lower data rates than the one requested in the Tx
1152 * command, as set up by the REPLY_RATE_SCALE (for 3945) or
1153 * REPLY_TX_LINK_QUALITY_CMD (agn).
1155 * Driver sets up transmit power for various rates via REPLY_TX_PWR_TABLE_CMD.
1156 * This command must be executed after every RXON command, before Tx can occur.
1157 *****************************************************************************/
1159 /* REPLY_TX Tx flags field */
1162 * 1: Use RTS/CTS protocol or CTS-to-self if spec allows it
1163 * before this frame. if CTS-to-self required check
1164 * RXON_FLG_SELF_CTS_EN status.
1165 * unused in 3945/4965, used in 5000 series and after
1167 #define TX_CMD_FLG_PROT_REQUIRE_MSK cpu_to_le32(1 << 0)
1170 * 1: Use Request-To-Send protocol before this frame.
1171 * Mutually exclusive vs. TX_CMD_FLG_CTS_MSK.
1172 * used in 3945/4965, unused in 5000 series and after
1174 #define TX_CMD_FLG_RTS_MSK cpu_to_le32(1 << 1)
1177 * 1: Transmit Clear-To-Send to self before this frame.
1178 * Driver should set this for AUTH/DEAUTH/ASSOC-REQ/REASSOC mgmnt frames.
1179 * Mutually exclusive vs. TX_CMD_FLG_RTS_MSK.
1180 * used in 3945/4965, unused in 5000 series and after
1182 #define TX_CMD_FLG_CTS_MSK cpu_to_le32(1 << 2)
1184 /* 1: Expect ACK from receiving station
1185 * 0: Don't expect ACK (MAC header's duration field s/b 0)
1186 * Set this for unicast frames, but not broadcast/multicast. */
1187 #define TX_CMD_FLG_ACK_MSK cpu_to_le32(1 << 3)
1189 /* For agn devices:
1190 * 1: Use rate scale table (see REPLY_TX_LINK_QUALITY_CMD).
1191 * Tx command's initial_rate_index indicates first rate to try;
1192 * uCode walks through table for additional Tx attempts.
1193 * 0: Use Tx rate/MCS from Tx command's rate_n_flags field.
1194 * This rate will be used for all Tx attempts; it will not be scaled. */
1195 #define TX_CMD_FLG_STA_RATE_MSK cpu_to_le32(1 << 4)
1197 /* 1: Expect immediate block-ack.
1198 * Set when Txing a block-ack request frame. Also set TX_CMD_FLG_ACK_MSK. */
1199 #define TX_CMD_FLG_IMM_BA_RSP_MASK cpu_to_le32(1 << 6)
1202 * 1: Frame requires full Tx-Op protection.
1203 * Set this if either RTS or CTS Tx Flag gets set.
1204 * used in 3945/4965, unused in 5000 series and after
1206 #define TX_CMD_FLG_FULL_TXOP_PROT_MSK cpu_to_le32(1 << 7)
1208 /* Tx antenna selection field; used only for 3945, reserved (0) for agn devices.
1209 * Set field to "0" to allow 3945 uCode to select antenna (normal usage). */
1210 #define TX_CMD_FLG_ANT_SEL_MSK cpu_to_le32(0xf00)
1211 #define TX_CMD_FLG_ANT_A_MSK cpu_to_le32(1 << 8)
1212 #define TX_CMD_FLG_ANT_B_MSK cpu_to_le32(1 << 9)
1214 /* 1: Ignore Bluetooth priority for this frame.
1215 * 0: Delay Tx until Bluetooth device is done (normal usage). */
1216 #define TX_CMD_FLG_IGNORE_BT cpu_to_le32(1 << 12)
1218 /* 1: uCode overrides sequence control field in MAC header.
1219 * 0: Driver provides sequence control field in MAC header.
1220 * Set this for management frames, non-QOS data frames, non-unicast frames,
1221 * and also in Tx command embedded in REPLY_SCAN_CMD for active scans. */
1222 #define TX_CMD_FLG_SEQ_CTL_MSK cpu_to_le32(1 << 13)
1224 /* 1: This frame is non-last MPDU; more fragments are coming.
1225 * 0: Last fragment, or not using fragmentation. */
1226 #define TX_CMD_FLG_MORE_FRAG_MSK cpu_to_le32(1 << 14)
1228 /* 1: uCode calculates and inserts Timestamp Function (TSF) in outgoing frame.
1229 * 0: No TSF required in outgoing frame.
1230 * Set this for transmitting beacons and probe responses. */
1231 #define TX_CMD_FLG_TSF_MSK cpu_to_le32(1 << 16)
1233 /* 1: Driver inserted 2 bytes pad after the MAC header, for (required) dword
1234 * alignment of frame's payload data field.
1235 * 0: No pad
1236 * Set this for MAC headers with 26 or 30 bytes, i.e. those with QOS or ADDR4
1237 * field (but not both). Driver must align frame data (i.e. data following
1238 * MAC header) to DWORD boundary. */
1239 #define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(1 << 20)
1241 /* accelerate aggregation support
1242 * 0 - no CCMP encryption; 1 - CCMP encryption */
1243 #define TX_CMD_FLG_AGG_CCMP_MSK cpu_to_le32(1 << 22)
1245 /* HCCA-AP - disable duration overwriting. */
1246 #define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25)
1250 * TX command security control
1252 #define TX_CMD_SEC_WEP 0x01
1253 #define TX_CMD_SEC_CCM 0x02
1254 #define TX_CMD_SEC_TKIP 0x03
1255 #define TX_CMD_SEC_MSK 0x03
1256 #define TX_CMD_SEC_SHIFT 6
1257 #define TX_CMD_SEC_KEY128 0x08
1260 * security overhead sizes
1262 #define WEP_IV_LEN 4
1263 #define WEP_ICV_LEN 4
1264 #define CCMP_MIC_LEN 8
1265 #define TKIP_ICV_LEN 4
1268 * REPLY_TX = 0x1c (command)
1272 * 4965 uCode updates these Tx attempt count values in host DRAM.
1273 * Used for managing Tx retries when expecting block-acks.
1274 * Driver should set these fields to 0.
1276 struct iwl_dram_scratch {
1277 u8 try_cnt; /* Tx attempts */
1278 u8 bt_kill_cnt; /* Tx attempts blocked by Bluetooth device */
1279 __le16 reserved;
1280 } __packed;
1282 struct iwl_tx_cmd {
1284 * MPDU byte count:
1285 * MAC header (24/26/30/32 bytes) + 2 bytes pad if 26/30 header size,
1286 * + 8 byte IV for CCM or TKIP (not used for WEP)
1287 * + Data payload
1288 * + 8-byte MIC (not used for CCM/WEP)
1289 * NOTE: Does not include Tx command bytes, post-MAC pad bytes,
1290 * MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.i
1291 * Range: 14-2342 bytes.
1293 __le16 len;
1296 * MPDU or MSDU byte count for next frame.
1297 * Used for fragmentation and bursting, but not 11n aggregation.
1298 * Same as "len", but for next frame. Set to 0 if not applicable.
1300 __le16 next_frame_len;
1302 __le32 tx_flags; /* TX_CMD_FLG_* */
1304 /* uCode may modify this field of the Tx command (in host DRAM!).
1305 * Driver must also set dram_lsb_ptr and dram_msb_ptr in this cmd. */
1306 struct iwl_dram_scratch scratch;
1308 /* Rate for *all* Tx attempts, if TX_CMD_FLG_STA_RATE_MSK is cleared. */
1309 __le32 rate_n_flags; /* RATE_MCS_* */
1311 /* Index of destination station in uCode's station table */
1312 u8 sta_id;
1314 /* Type of security encryption: CCM or TKIP */
1315 u8 sec_ctl; /* TX_CMD_SEC_* */
1318 * Index into rate table (see REPLY_TX_LINK_QUALITY_CMD) for initial
1319 * Tx attempt, if TX_CMD_FLG_STA_RATE_MSK is set. Normally "0" for
1320 * data frames, this field may be used to selectively reduce initial
1321 * rate (via non-0 value) for special frames (e.g. management), while
1322 * still supporting rate scaling for all frames.
1324 u8 initial_rate_index;
1325 u8 reserved;
1326 u8 key[16];
1327 __le16 next_frame_flags;
1328 __le16 reserved2;
1329 union {
1330 __le32 life_time;
1331 __le32 attempt;
1332 } stop_time;
1334 /* Host DRAM physical address pointer to "scratch" in this command.
1335 * Must be dword aligned. "0" in dram_lsb_ptr disables usage. */
1336 __le32 dram_lsb_ptr;
1337 u8 dram_msb_ptr;
1339 u8 rts_retry_limit; /*byte 50 */
1340 u8 data_retry_limit; /*byte 51 */
1341 u8 tid_tspec;
1342 union {
1343 __le16 pm_frame_timeout;
1344 __le16 attempt_duration;
1345 } timeout;
1348 * Duration of EDCA burst Tx Opportunity, in 32-usec units.
1349 * Set this if txop time is not specified by HCCA protocol (e.g. by AP).
1351 __le16 driver_txop;
1354 * MAC header goes here, followed by 2 bytes padding if MAC header
1355 * length is 26 or 30 bytes, followed by payload data
1357 u8 payload[0];
1358 struct ieee80211_hdr hdr[0];
1359 } __packed;
1362 * TX command response is sent after *agn* transmission attempts.
1364 * both postpone and abort status are expected behavior from uCode. there is
1365 * no special operation required from driver; except for RFKILL_FLUSH,
1366 * which required tx flush host command to flush all the tx frames in queues
1368 enum {
1369 TX_STATUS_SUCCESS = 0x01,
1370 TX_STATUS_DIRECT_DONE = 0x02,
1371 /* postpone TX */
1372 TX_STATUS_POSTPONE_DELAY = 0x40,
1373 TX_STATUS_POSTPONE_FEW_BYTES = 0x41,
1374 TX_STATUS_POSTPONE_BT_PRIO = 0x42,
1375 TX_STATUS_POSTPONE_QUIET_PERIOD = 0x43,
1376 TX_STATUS_POSTPONE_CALC_TTAK = 0x44,
1377 /* abort TX */
1378 TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY = 0x81,
1379 TX_STATUS_FAIL_SHORT_LIMIT = 0x82,
1380 TX_STATUS_FAIL_LONG_LIMIT = 0x83,
1381 TX_STATUS_FAIL_FIFO_UNDERRUN = 0x84,
1382 TX_STATUS_FAIL_DRAIN_FLOW = 0x85,
1383 TX_STATUS_FAIL_RFKILL_FLUSH = 0x86,
1384 TX_STATUS_FAIL_LIFE_EXPIRE = 0x87,
1385 TX_STATUS_FAIL_DEST_PS = 0x88,
1386 TX_STATUS_FAIL_HOST_ABORTED = 0x89,
1387 TX_STATUS_FAIL_BT_RETRY = 0x8a,
1388 TX_STATUS_FAIL_STA_INVALID = 0x8b,
1389 TX_STATUS_FAIL_FRAG_DROPPED = 0x8c,
1390 TX_STATUS_FAIL_TID_DISABLE = 0x8d,
1391 TX_STATUS_FAIL_FIFO_FLUSHED = 0x8e,
1392 TX_STATUS_FAIL_INSUFFICIENT_CF_POLL = 0x8f,
1393 TX_STATUS_FAIL_PASSIVE_NO_RX = 0x90,
1394 TX_STATUS_FAIL_NO_BEACON_ON_RADAR = 0x91,
1397 #define TX_PACKET_MODE_REGULAR 0x0000
1398 #define TX_PACKET_MODE_BURST_SEQ 0x0100
1399 #define TX_PACKET_MODE_BURST_FIRST 0x0200
1401 enum {
1402 TX_POWER_PA_NOT_ACTIVE = 0x0,
1405 enum {
1406 TX_STATUS_MSK = 0x000000ff, /* bits 0:7 */
1407 TX_STATUS_DELAY_MSK = 0x00000040,
1408 TX_STATUS_ABORT_MSK = 0x00000080,
1409 TX_PACKET_MODE_MSK = 0x0000ff00, /* bits 8:15 */
1410 TX_FIFO_NUMBER_MSK = 0x00070000, /* bits 16:18 */
1411 TX_RESERVED = 0x00780000, /* bits 19:22 */
1412 TX_POWER_PA_DETECT_MSK = 0x7f800000, /* bits 23:30 */
1413 TX_ABORT_REQUIRED_MSK = 0x80000000, /* bits 31:31 */
1416 /* *******************************
1417 * TX aggregation status
1418 ******************************* */
1420 enum {
1421 AGG_TX_STATE_TRANSMITTED = 0x00,
1422 AGG_TX_STATE_UNDERRUN_MSK = 0x01,
1423 AGG_TX_STATE_BT_PRIO_MSK = 0x02,
1424 AGG_TX_STATE_FEW_BYTES_MSK = 0x04,
1425 AGG_TX_STATE_ABORT_MSK = 0x08,
1426 AGG_TX_STATE_LAST_SENT_TTL_MSK = 0x10,
1427 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK = 0x20,
1428 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK = 0x40,
1429 AGG_TX_STATE_SCD_QUERY_MSK = 0x80,
1430 AGG_TX_STATE_TEST_BAD_CRC32_MSK = 0x100,
1431 AGG_TX_STATE_RESPONSE_MSK = 0x1ff,
1432 AGG_TX_STATE_DUMP_TX_MSK = 0x200,
1433 AGG_TX_STATE_DELAY_TX_MSK = 0x400
1436 #define AGG_TX_STATUS_MSK 0x00000fff /* bits 0:11 */
1437 #define AGG_TX_TRY_MSK 0x0000f000 /* bits 12:15 */
1439 #define AGG_TX_STATE_LAST_SENT_MSK (AGG_TX_STATE_LAST_SENT_TTL_MSK | \
1440 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK | \
1441 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK)
1443 /* # tx attempts for first frame in aggregation */
1444 #define AGG_TX_STATE_TRY_CNT_POS 12
1445 #define AGG_TX_STATE_TRY_CNT_MSK 0xf000
1447 /* Command ID and sequence number of Tx command for this frame */
1448 #define AGG_TX_STATE_SEQ_NUM_POS 16
1449 #define AGG_TX_STATE_SEQ_NUM_MSK 0xffff0000
1452 * REPLY_TX = 0x1c (response)
1454 * This response may be in one of two slightly different formats, indicated
1455 * by the frame_count field:
1457 * 1) No aggregation (frame_count == 1). This reports Tx results for
1458 * a single frame. Multiple attempts, at various bit rates, may have
1459 * been made for this frame.
1461 * 2) Aggregation (frame_count > 1). This reports Tx results for
1462 * 2 or more frames that used block-acknowledge. All frames were
1463 * transmitted at same rate. Rate scaling may have been used if first
1464 * frame in this new agg block failed in previous agg block(s).
1466 * Note that, for aggregation, ACK (block-ack) status is not delivered here;
1467 * block-ack has not been received by the time the agn device records
1468 * this status.
1469 * This status relates to reasons the tx might have been blocked or aborted
1470 * within the sending station (this agn device), rather than whether it was
1471 * received successfully by the destination station.
1473 struct agg_tx_status {
1474 __le16 status;
1475 __le16 sequence;
1476 } __packed;
1479 * definitions for initial rate index field
1480 * bits [3:0] initial rate index
1481 * bits [6:4] rate table color, used for the initial rate
1482 * bit-7 invalid rate indication
1483 * i.e. rate was not chosen from rate table
1484 * or rate table color was changed during frame retries
1485 * refer tlc rate info
1488 #define IWL50_TX_RES_INIT_RATE_INDEX_POS 0
1489 #define IWL50_TX_RES_INIT_RATE_INDEX_MSK 0x0f
1490 #define IWL50_TX_RES_RATE_TABLE_COLOR_POS 4
1491 #define IWL50_TX_RES_RATE_TABLE_COLOR_MSK 0x70
1492 #define IWL50_TX_RES_INV_RATE_INDEX_MSK 0x80
1494 /* refer to ra_tid */
1495 #define IWLAGN_TX_RES_TID_POS 0
1496 #define IWLAGN_TX_RES_TID_MSK 0x0f
1497 #define IWLAGN_TX_RES_RA_POS 4
1498 #define IWLAGN_TX_RES_RA_MSK 0xf0
1500 struct iwlagn_tx_resp {
1501 u8 frame_count; /* 1 no aggregation, >1 aggregation */
1502 u8 bt_kill_count; /* # blocked by bluetooth (unused for agg) */
1503 u8 failure_rts; /* # failures due to unsuccessful RTS */
1504 u8 failure_frame; /* # failures due to no ACK (unused for agg) */
1506 /* For non-agg: Rate at which frame was successful.
1507 * For agg: Rate at which all frames were transmitted. */
1508 __le32 rate_n_flags; /* RATE_MCS_* */
1510 /* For non-agg: RTS + CTS + frame tx attempts time + ACK.
1511 * For agg: RTS + CTS + aggregation tx time + block-ack time. */
1512 __le16 wireless_media_time; /* uSecs */
1514 u8 pa_status; /* RF power amplifier measurement (not used) */
1515 u8 pa_integ_res_a[3];
1516 u8 pa_integ_res_b[3];
1517 u8 pa_integ_res_C[3];
1519 __le32 tfd_info;
1520 __le16 seq_ctl;
1521 __le16 byte_cnt;
1522 u8 tlc_info;
1523 u8 ra_tid; /* tid (0:3), sta_id (4:7) */
1524 __le16 frame_ctrl;
1526 * For non-agg: frame status TX_STATUS_*
1527 * For agg: status of 1st frame, AGG_TX_STATE_*; other frame status
1528 * fields follow this one, up to frame_count.
1529 * Bit fields:
1530 * 11- 0: AGG_TX_STATE_* status code
1531 * 15-12: Retry count for 1st frame in aggregation (retries
1532 * occur if tx failed for this frame when it was a
1533 * member of a previous aggregation block). If rate
1534 * scaling is used, retry count indicates the rate
1535 * table entry used for all frames in the new agg.
1536 * 31-16: Sequence # for this frame's Tx cmd (not SSN!)
1538 struct agg_tx_status status; /* TX status (in aggregation -
1539 * status of 1st frame) */
1540 } __packed;
1542 * REPLY_COMPRESSED_BA = 0xc5 (response only, not a command)
1544 * Reports Block-Acknowledge from recipient station
1546 struct iwl_compressed_ba_resp {
1547 __le32 sta_addr_lo32;
1548 __le16 sta_addr_hi16;
1549 __le16 reserved;
1551 /* Index of recipient (BA-sending) station in uCode's station table */
1552 u8 sta_id;
1553 u8 tid;
1554 __le16 seq_ctl;
1555 __le64 bitmap;
1556 __le16 scd_flow;
1557 __le16 scd_ssn;
1558 /* following only for 5000 series and up */
1559 u8 txed; /* number of frames sent */
1560 u8 txed_2_done; /* number of frames acked */
1561 } __packed;
1564 * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response)
1568 /*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */
1569 #define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1 << 0)
1571 /* # of EDCA prioritized tx fifos */
1572 #define LINK_QUAL_AC_NUM AC_NUM
1574 /* # entries in rate scale table to support Tx retries */
1575 #define LINK_QUAL_MAX_RETRY_NUM 16
1577 /* Tx antenna selection values */
1578 #define LINK_QUAL_ANT_A_MSK (1 << 0)
1579 #define LINK_QUAL_ANT_B_MSK (1 << 1)
1580 #define LINK_QUAL_ANT_MSK (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK)
1584 * struct iwl_link_qual_general_params
1586 * Used in REPLY_TX_LINK_QUALITY_CMD
1588 struct iwl_link_qual_general_params {
1589 u8 flags;
1591 /* No entries at or above this (driver chosen) index contain MIMO */
1592 u8 mimo_delimiter;
1594 /* Best single antenna to use for single stream (legacy, SISO). */
1595 u8 single_stream_ant_msk; /* LINK_QUAL_ANT_* */
1597 /* Best antennas to use for MIMO (unused for 4965, assumes both). */
1598 u8 dual_stream_ant_msk; /* LINK_QUAL_ANT_* */
1601 * If driver needs to use different initial rates for different
1602 * EDCA QOS access categories (as implemented by tx fifos 0-3),
1603 * this table will set that up, by indicating the indexes in the
1604 * rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table at which to start.
1605 * Otherwise, driver should set all entries to 0.
1607 * Entry usage:
1608 * 0 = Background, 1 = Best Effort (normal), 2 = Video, 3 = Voice
1609 * TX FIFOs above 3 use same value (typically 0) as TX FIFO 3.
1611 u8 start_rate_index[LINK_QUAL_AC_NUM];
1612 } __packed;
1614 #define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) /* 4 milliseconds */
1615 #define LINK_QUAL_AGG_TIME_LIMIT_MAX (8000)
1616 #define LINK_QUAL_AGG_TIME_LIMIT_MIN (100)
1618 #define LINK_QUAL_AGG_DISABLE_START_DEF (3)
1619 #define LINK_QUAL_AGG_DISABLE_START_MAX (255)
1620 #define LINK_QUAL_AGG_DISABLE_START_MIN (0)
1622 #define LINK_QUAL_AGG_FRAME_LIMIT_DEF (63)
1623 #define LINK_QUAL_AGG_FRAME_LIMIT_MAX (63)
1624 #define LINK_QUAL_AGG_FRAME_LIMIT_MIN (0)
1627 * struct iwl_link_qual_agg_params
1629 * Used in REPLY_TX_LINK_QUALITY_CMD
1631 struct iwl_link_qual_agg_params {
1634 *Maximum number of uSec in aggregation.
1635 * default set to 4000 (4 milliseconds) if not configured in .cfg
1637 __le16 agg_time_limit;
1640 * Number of Tx retries allowed for a frame, before that frame will
1641 * no longer be considered for the start of an aggregation sequence
1642 * (scheduler will then try to tx it as single frame).
1643 * Driver should set this to 3.
1645 u8 agg_dis_start_th;
1648 * Maximum number of frames in aggregation.
1649 * 0 = no limit (default). 1 = no aggregation.
1650 * Other values = max # frames in aggregation.
1652 u8 agg_frame_cnt_limit;
1654 __le32 reserved;
1655 } __packed;
1658 * REPLY_TX_LINK_QUALITY_CMD = 0x4e (command, has simple generic response)
1660 * For agn devices only; 3945 uses REPLY_RATE_SCALE.
1662 * Each station in the agn device's internal station table has its own table
1663 * of 16
1664 * Tx rates and modulation modes (e.g. legacy/SISO/MIMO) for retrying Tx when
1665 * an ACK is not received. This command replaces the entire table for
1666 * one station.
1668 * NOTE: Station must already be in agn device's station table.
1669 * Use REPLY_ADD_STA.
1671 * The rate scaling procedures described below work well. Of course, other
1672 * procedures are possible, and may work better for particular environments.
1675 * FILLING THE RATE TABLE
1677 * Given a particular initial rate and mode, as determined by the rate
1678 * scaling algorithm described below, the Linux driver uses the following
1679 * formula to fill the rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table in the
1680 * Link Quality command:
1683 * 1) If using High-throughput (HT) (SISO or MIMO) initial rate:
1684 * a) Use this same initial rate for first 3 entries.
1685 * b) Find next lower available rate using same mode (SISO or MIMO),
1686 * use for next 3 entries. If no lower rate available, switch to
1687 * legacy mode (no HT40 channel, no MIMO, no short guard interval).
1688 * c) If using MIMO, set command's mimo_delimiter to number of entries
1689 * using MIMO (3 or 6).
1690 * d) After trying 2 HT rates, switch to legacy mode (no HT40 channel,
1691 * no MIMO, no short guard interval), at the next lower bit rate
1692 * (e.g. if second HT bit rate was 54, try 48 legacy), and follow
1693 * legacy procedure for remaining table entries.
1695 * 2) If using legacy initial rate:
1696 * a) Use the initial rate for only one entry.
1697 * b) For each following entry, reduce the rate to next lower available
1698 * rate, until reaching the lowest available rate.
1699 * c) When reducing rate, also switch antenna selection.
1700 * d) Once lowest available rate is reached, repeat this rate until
1701 * rate table is filled (16 entries), switching antenna each entry.
1704 * ACCUMULATING HISTORY
1706 * The rate scaling algorithm for agn devices, as implemented in Linux driver,
1707 * uses two sets of frame Tx success history: One for the current/active
1708 * modulation mode, and one for a speculative/search mode that is being
1709 * attempted. If the speculative mode turns out to be more effective (i.e.
1710 * actual transfer rate is better), then the driver continues to use the
1711 * speculative mode as the new current active mode.
1713 * Each history set contains, separately for each possible rate, data for a
1714 * sliding window of the 62 most recent tx attempts at that rate. The data
1715 * includes a shifting bitmap of success(1)/failure(0), and sums of successful
1716 * and attempted frames, from which the driver can additionally calculate a
1717 * success ratio (success / attempted) and number of failures
1718 * (attempted - success), and control the size of the window (attempted).
1719 * The driver uses the bit map to remove successes from the success sum, as
1720 * the oldest tx attempts fall out of the window.
1722 * When the agn device makes multiple tx attempts for a given frame, each
1723 * attempt might be at a different rate, and have different modulation
1724 * characteristics (e.g. antenna, fat channel, short guard interval), as set
1725 * up in the rate scaling table in the Link Quality command. The driver must
1726 * determine which rate table entry was used for each tx attempt, to determine
1727 * which rate-specific history to update, and record only those attempts that
1728 * match the modulation characteristics of the history set.
1730 * When using block-ack (aggregation), all frames are transmitted at the same
1731 * rate, since there is no per-attempt acknowledgment from the destination
1732 * station. The Tx response struct iwl_tx_resp indicates the Tx rate in
1733 * rate_n_flags field. After receiving a block-ack, the driver can update
1734 * history for the entire block all at once.
1737 * FINDING BEST STARTING RATE:
1739 * When working with a selected initial modulation mode (see below), the
1740 * driver attempts to find a best initial rate. The initial rate is the
1741 * first entry in the Link Quality command's rate table.
1743 * 1) Calculate actual throughput (success ratio * expected throughput, see
1744 * table below) for current initial rate. Do this only if enough frames
1745 * have been attempted to make the value meaningful: at least 6 failed
1746 * tx attempts, or at least 8 successes. If not enough, don't try rate
1747 * scaling yet.
1749 * 2) Find available rates adjacent to current initial rate. Available means:
1750 * a) supported by hardware &&
1751 * b) supported by association &&
1752 * c) within any constraints selected by user
1754 * 3) Gather measured throughputs for adjacent rates. These might not have
1755 * enough history to calculate a throughput. That's okay, we might try
1756 * using one of them anyway!
1758 * 4) Try decreasing rate if, for current rate:
1759 * a) success ratio is < 15% ||
1760 * b) lower adjacent rate has better measured throughput ||
1761 * c) higher adjacent rate has worse throughput, and lower is unmeasured
1763 * As a sanity check, if decrease was determined above, leave rate
1764 * unchanged if:
1765 * a) lower rate unavailable
1766 * b) success ratio at current rate > 85% (very good)
1767 * c) current measured throughput is better than expected throughput
1768 * of lower rate (under perfect 100% tx conditions, see table below)
1770 * 5) Try increasing rate if, for current rate:
1771 * a) success ratio is < 15% ||
1772 * b) both adjacent rates' throughputs are unmeasured (try it!) ||
1773 * b) higher adjacent rate has better measured throughput ||
1774 * c) lower adjacent rate has worse throughput, and higher is unmeasured
1776 * As a sanity check, if increase was determined above, leave rate
1777 * unchanged if:
1778 * a) success ratio at current rate < 70%. This is not particularly
1779 * good performance; higher rate is sure to have poorer success.
1781 * 6) Re-evaluate the rate after each tx frame. If working with block-
1782 * acknowledge, history and statistics may be calculated for the entire
1783 * block (including prior history that fits within the history windows),
1784 * before re-evaluation.
1786 * FINDING BEST STARTING MODULATION MODE:
1788 * After working with a modulation mode for a "while" (and doing rate scaling),
1789 * the driver searches for a new initial mode in an attempt to improve
1790 * throughput. The "while" is measured by numbers of attempted frames:
1792 * For legacy mode, search for new mode after:
1793 * 480 successful frames, or 160 failed frames
1794 * For high-throughput modes (SISO or MIMO), search for new mode after:
1795 * 4500 successful frames, or 400 failed frames
1797 * Mode switch possibilities are (3 for each mode):
1799 * For legacy:
1800 * Change antenna, try SISO (if HT association), try MIMO (if HT association)
1801 * For SISO:
1802 * Change antenna, try MIMO, try shortened guard interval (SGI)
1803 * For MIMO:
1804 * Try SISO antenna A, SISO antenna B, try shortened guard interval (SGI)
1806 * When trying a new mode, use the same bit rate as the old/current mode when
1807 * trying antenna switches and shortened guard interval. When switching to
1808 * SISO from MIMO or legacy, or to MIMO from SISO or legacy, use a rate
1809 * for which the expected throughput (under perfect conditions) is about the
1810 * same or slightly better than the actual measured throughput delivered by
1811 * the old/current mode.
1813 * Actual throughput can be estimated by multiplying the expected throughput
1814 * by the success ratio (successful / attempted tx frames). Frame size is
1815 * not considered in this calculation; it assumes that frame size will average
1816 * out to be fairly consistent over several samples. The following are
1817 * metric values for expected throughput assuming 100% success ratio.
1818 * Only G band has support for CCK rates:
1820 * RATE: 1 2 5 11 6 9 12 18 24 36 48 54 60
1822 * G: 7 13 35 58 40 57 72 98 121 154 177 186 186
1823 * A: 0 0 0 0 40 57 72 98 121 154 177 186 186
1824 * SISO 20MHz: 0 0 0 0 42 42 76 102 124 159 183 193 202
1825 * SGI SISO 20MHz: 0 0 0 0 46 46 82 110 132 168 192 202 211
1826 * MIMO 20MHz: 0 0 0 0 74 74 123 155 179 214 236 244 251
1827 * SGI MIMO 20MHz: 0 0 0 0 81 81 131 164 188 222 243 251 257
1828 * SISO 40MHz: 0 0 0 0 77 77 127 160 184 220 242 250 257
1829 * SGI SISO 40MHz: 0 0 0 0 83 83 135 169 193 229 250 257 264
1830 * MIMO 40MHz: 0 0 0 0 123 123 182 214 235 264 279 285 289
1831 * SGI MIMO 40MHz: 0 0 0 0 131 131 191 222 242 270 284 289 293
1833 * After the new mode has been tried for a short while (minimum of 6 failed
1834 * frames or 8 successful frames), compare success ratio and actual throughput
1835 * estimate of the new mode with the old. If either is better with the new
1836 * mode, continue to use the new mode.
1838 * Continue comparing modes until all 3 possibilities have been tried.
1839 * If moving from legacy to HT, try all 3 possibilities from the new HT
1840 * mode. After trying all 3, a best mode is found. Continue to use this mode
1841 * for the longer "while" described above (e.g. 480 successful frames for
1842 * legacy), and then repeat the search process.
1845 struct iwl_link_quality_cmd {
1847 /* Index of destination/recipient station in uCode's station table */
1848 u8 sta_id;
1849 u8 reserved1;
1850 __le16 control; /* not used */
1851 struct iwl_link_qual_general_params general_params;
1852 struct iwl_link_qual_agg_params agg_params;
1855 * Rate info; when using rate-scaling, Tx command's initial_rate_index
1856 * specifies 1st Tx rate attempted, via index into this table.
1857 * agn devices works its way through table when retrying Tx.
1859 struct {
1860 __le32 rate_n_flags; /* RATE_MCS_*, IWL_RATE_* */
1861 } rs_table[LINK_QUAL_MAX_RETRY_NUM];
1862 __le32 reserved2;
1863 } __packed;
1866 * BT configuration enable flags:
1867 * bit 0 - 1: BT channel announcement enabled
1868 * 0: disable
1869 * bit 1 - 1: priority of BT device enabled
1870 * 0: disable
1871 * bit 2 - 1: BT 2 wire support enabled
1872 * 0: disable
1874 #define BT_COEX_DISABLE (0x0)
1875 #define BT_ENABLE_CHANNEL_ANNOUNCE BIT(0)
1876 #define BT_ENABLE_PRIORITY BIT(1)
1877 #define BT_ENABLE_2_WIRE BIT(2)
1879 #define BT_COEX_DISABLE (0x0)
1880 #define BT_COEX_ENABLE (BT_ENABLE_CHANNEL_ANNOUNCE | BT_ENABLE_PRIORITY)
1882 #define BT_LEAD_TIME_MIN (0x0)
1883 #define BT_LEAD_TIME_DEF (0x1E)
1884 #define BT_LEAD_TIME_MAX (0xFF)
1886 #define BT_MAX_KILL_MIN (0x1)
1887 #define BT_MAX_KILL_DEF (0x5)
1888 #define BT_MAX_KILL_MAX (0xFF)
1890 #define BT_DURATION_LIMIT_DEF 625
1891 #define BT_DURATION_LIMIT_MAX 1250
1892 #define BT_DURATION_LIMIT_MIN 625
1894 #define BT_ON_THRESHOLD_DEF 4
1895 #define BT_ON_THRESHOLD_MAX 1000
1896 #define BT_ON_THRESHOLD_MIN 1
1898 #define BT_FRAG_THRESHOLD_DEF 0
1899 #define BT_FRAG_THRESHOLD_MAX 0
1900 #define BT_FRAG_THRESHOLD_MIN 0
1902 #define BT_AGG_THRESHOLD_DEF 1200
1903 #define BT_AGG_THRESHOLD_MAX 8000
1904 #define BT_AGG_THRESHOLD_MIN 400
1907 * REPLY_BT_CONFIG = 0x9b (command, has simple generic response)
1909 * 3945 and agn devices support hardware handshake with Bluetooth device on
1910 * same platform. Bluetooth device alerts wireless device when it will Tx;
1911 * wireless device can delay or kill its own Tx to accommodate.
1913 struct iwl_bt_cmd {
1914 u8 flags;
1915 u8 lead_time;
1916 u8 max_kill;
1917 u8 reserved;
1918 __le32 kill_ack_mask;
1919 __le32 kill_cts_mask;
1920 } __packed;
1922 #define IWLAGN_BT_FLAG_CHANNEL_INHIBITION BIT(0)
1924 #define IWLAGN_BT_FLAG_COEX_MODE_MASK (BIT(3)|BIT(4)|BIT(5))
1925 #define IWLAGN_BT_FLAG_COEX_MODE_SHIFT 3
1926 #define IWLAGN_BT_FLAG_COEX_MODE_DISABLED 0
1927 #define IWLAGN_BT_FLAG_COEX_MODE_LEGACY_2W 1
1928 #define IWLAGN_BT_FLAG_COEX_MODE_3W 2
1929 #define IWLAGN_BT_FLAG_COEX_MODE_4W 3
1931 #define IWLAGN_BT_FLAG_UCODE_DEFAULT BIT(6)
1932 /* Disable Sync PSPoll on SCO/eSCO */
1933 #define IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE BIT(7)
1935 #define IWLAGN_BT_PRIO_BOOST_MAX 0xFF
1936 #define IWLAGN_BT_PRIO_BOOST_MIN 0x00
1937 #define IWLAGN_BT_PRIO_BOOST_DEFAULT 0xF0
1939 #define IWLAGN_BT_MAX_KILL_DEFAULT 5
1941 #define IWLAGN_BT3_T7_DEFAULT 1
1943 #define IWLAGN_BT_KILL_ACK_MASK_DEFAULT cpu_to_le32(0xffff0000)
1944 #define IWLAGN_BT_KILL_CTS_MASK_DEFAULT cpu_to_le32(0xffff0000)
1945 #define IWLAGN_BT_KILL_ACK_CTS_MASK_SCO cpu_to_le32(0xffffffff)
1947 #define IWLAGN_BT3_PRIO_SAMPLE_DEFAULT 2
1949 #define IWLAGN_BT3_T2_DEFAULT 0xc
1951 #define IWLAGN_BT_VALID_ENABLE_FLAGS cpu_to_le16(BIT(0))
1952 #define IWLAGN_BT_VALID_BOOST cpu_to_le16(BIT(1))
1953 #define IWLAGN_BT_VALID_MAX_KILL cpu_to_le16(BIT(2))
1954 #define IWLAGN_BT_VALID_3W_TIMERS cpu_to_le16(BIT(3))
1955 #define IWLAGN_BT_VALID_KILL_ACK_MASK cpu_to_le16(BIT(4))
1956 #define IWLAGN_BT_VALID_KILL_CTS_MASK cpu_to_le16(BIT(5))
1957 #define IWLAGN_BT_VALID_BT4_TIMES cpu_to_le16(BIT(6))
1958 #define IWLAGN_BT_VALID_3W_LUT cpu_to_le16(BIT(7))
1960 #define IWLAGN_BT_ALL_VALID_MSK (IWLAGN_BT_VALID_ENABLE_FLAGS | \
1961 IWLAGN_BT_VALID_BOOST | \
1962 IWLAGN_BT_VALID_MAX_KILL | \
1963 IWLAGN_BT_VALID_3W_TIMERS | \
1964 IWLAGN_BT_VALID_KILL_ACK_MASK | \
1965 IWLAGN_BT_VALID_KILL_CTS_MASK | \
1966 IWLAGN_BT_VALID_BT4_TIMES | \
1967 IWLAGN_BT_VALID_3W_LUT)
1969 struct iwl_basic_bt_cmd {
1970 u8 flags;
1971 u8 ledtime; /* unused */
1972 u8 max_kill;
1973 u8 bt3_timer_t7_value;
1974 __le32 kill_ack_mask;
1975 __le32 kill_cts_mask;
1976 u8 bt3_prio_sample_time;
1977 u8 bt3_timer_t2_value;
1978 __le16 bt4_reaction_time; /* unused */
1979 __le32 bt3_lookup_table[12];
1980 __le16 bt4_decision_time; /* unused */
1981 __le16 valid;
1984 struct iwl6000_bt_cmd {
1985 struct iwl_basic_bt_cmd basic;
1986 u8 prio_boost;
1988 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
1989 * if configure the following patterns
1991 u8 tx_prio_boost; /* SW boost of WiFi tx priority */
1992 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */
1995 struct iwl2000_bt_cmd {
1996 struct iwl_basic_bt_cmd basic;
1997 __le32 prio_boost;
1999 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
2000 * if configure the following patterns
2002 u8 reserved;
2003 u8 tx_prio_boost; /* SW boost of WiFi tx priority */
2004 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */
2007 #define IWLAGN_BT_SCO_ACTIVE cpu_to_le32(BIT(0))
2009 struct iwlagn_bt_sco_cmd {
2010 __le32 flags;
2013 /******************************************************************************
2014 * (6)
2015 * Spectrum Management (802.11h) Commands, Responses, Notifications:
2017 *****************************************************************************/
2020 * Spectrum Management
2022 #define MEASUREMENT_FILTER_FLAG (RXON_FILTER_PROMISC_MSK | \
2023 RXON_FILTER_CTL2HOST_MSK | \
2024 RXON_FILTER_ACCEPT_GRP_MSK | \
2025 RXON_FILTER_DIS_DECRYPT_MSK | \
2026 RXON_FILTER_DIS_GRP_DECRYPT_MSK | \
2027 RXON_FILTER_ASSOC_MSK | \
2028 RXON_FILTER_BCON_AWARE_MSK)
2030 struct iwl_measure_channel {
2031 __le32 duration; /* measurement duration in extended beacon
2032 * format */
2033 u8 channel; /* channel to measure */
2034 u8 type; /* see enum iwl_measure_type */
2035 __le16 reserved;
2036 } __packed;
2039 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (command)
2041 struct iwl_spectrum_cmd {
2042 __le16 len; /* number of bytes starting from token */
2043 u8 token; /* token id */
2044 u8 id; /* measurement id -- 0 or 1 */
2045 u8 origin; /* 0 = TGh, 1 = other, 2 = TGk */
2046 u8 periodic; /* 1 = periodic */
2047 __le16 path_loss_timeout;
2048 __le32 start_time; /* start time in extended beacon format */
2049 __le32 reserved2;
2050 __le32 flags; /* rxon flags */
2051 __le32 filter_flags; /* rxon filter flags */
2052 __le16 channel_count; /* minimum 1, maximum 10 */
2053 __le16 reserved3;
2054 struct iwl_measure_channel channels[10];
2055 } __packed;
2058 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (response)
2060 struct iwl_spectrum_resp {
2061 u8 token;
2062 u8 id; /* id of the prior command replaced, or 0xff */
2063 __le16 status; /* 0 - command will be handled
2064 * 1 - cannot handle (conflicts with another
2065 * measurement) */
2066 } __packed;
2068 enum iwl_measurement_state {
2069 IWL_MEASUREMENT_START = 0,
2070 IWL_MEASUREMENT_STOP = 1,
2073 enum iwl_measurement_status {
2074 IWL_MEASUREMENT_OK = 0,
2075 IWL_MEASUREMENT_CONCURRENT = 1,
2076 IWL_MEASUREMENT_CSA_CONFLICT = 2,
2077 IWL_MEASUREMENT_TGH_CONFLICT = 3,
2078 /* 4-5 reserved */
2079 IWL_MEASUREMENT_STOPPED = 6,
2080 IWL_MEASUREMENT_TIMEOUT = 7,
2081 IWL_MEASUREMENT_PERIODIC_FAILED = 8,
2084 #define NUM_ELEMENTS_IN_HISTOGRAM 8
2086 struct iwl_measurement_histogram {
2087 __le32 ofdm[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 0.8usec counts */
2088 __le32 cck[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 1usec counts */
2089 } __packed;
2091 /* clear channel availability counters */
2092 struct iwl_measurement_cca_counters {
2093 __le32 ofdm;
2094 __le32 cck;
2095 } __packed;
2097 enum iwl_measure_type {
2098 IWL_MEASURE_BASIC = (1 << 0),
2099 IWL_MEASURE_CHANNEL_LOAD = (1 << 1),
2100 IWL_MEASURE_HISTOGRAM_RPI = (1 << 2),
2101 IWL_MEASURE_HISTOGRAM_NOISE = (1 << 3),
2102 IWL_MEASURE_FRAME = (1 << 4),
2103 /* bits 5:6 are reserved */
2104 IWL_MEASURE_IDLE = (1 << 7),
2108 * SPECTRUM_MEASURE_NOTIFICATION = 0x75 (notification only, not a command)
2110 struct iwl_spectrum_notification {
2111 u8 id; /* measurement id -- 0 or 1 */
2112 u8 token;
2113 u8 channel_index; /* index in measurement channel list */
2114 u8 state; /* 0 - start, 1 - stop */
2115 __le32 start_time; /* lower 32-bits of TSF */
2116 u8 band; /* 0 - 5.2GHz, 1 - 2.4GHz */
2117 u8 channel;
2118 u8 type; /* see enum iwl_measurement_type */
2119 u8 reserved1;
2120 /* NOTE: cca_ofdm, cca_cck, basic_type, and histogram are only only
2121 * valid if applicable for measurement type requested. */
2122 __le32 cca_ofdm; /* cca fraction time in 40Mhz clock periods */
2123 __le32 cca_cck; /* cca fraction time in 44Mhz clock periods */
2124 __le32 cca_time; /* channel load time in usecs */
2125 u8 basic_type; /* 0 - bss, 1 - ofdm preamble, 2 -
2126 * unidentified */
2127 u8 reserved2[3];
2128 struct iwl_measurement_histogram histogram;
2129 __le32 stop_time; /* lower 32-bits of TSF */
2130 __le32 status; /* see iwl_measurement_status */
2131 } __packed;
2133 /******************************************************************************
2134 * (7)
2135 * Power Management Commands, Responses, Notifications:
2137 *****************************************************************************/
2140 * struct iwl_powertable_cmd - Power Table Command
2141 * @flags: See below:
2143 * POWER_TABLE_CMD = 0x77 (command, has simple generic response)
2145 * PM allow:
2146 * bit 0 - '0' Driver not allow power management
2147 * '1' Driver allow PM (use rest of parameters)
2149 * uCode send sleep notifications:
2150 * bit 1 - '0' Don't send sleep notification
2151 * '1' send sleep notification (SEND_PM_NOTIFICATION)
2153 * Sleep over DTIM
2154 * bit 2 - '0' PM have to walk up every DTIM
2155 * '1' PM could sleep over DTIM till listen Interval.
2157 * PCI power managed
2158 * bit 3 - '0' (PCI_CFG_LINK_CTRL & 0x1)
2159 * '1' !(PCI_CFG_LINK_CTRL & 0x1)
2161 * Fast PD
2162 * bit 4 - '1' Put radio to sleep when receiving frame for others
2164 * Force sleep Modes
2165 * bit 31/30- '00' use both mac/xtal sleeps
2166 * '01' force Mac sleep
2167 * '10' force xtal sleep
2168 * '11' Illegal set
2170 * NOTE: if sleep_interval[SLEEP_INTRVL_TABLE_SIZE-1] > DTIM period then
2171 * ucode assume sleep over DTIM is allowed and we don't need to wake up
2172 * for every DTIM.
2174 #define IWL_POWER_VEC_SIZE 5
2176 #define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le16(BIT(0))
2177 #define IWL_POWER_POWER_SAVE_ENA_MSK cpu_to_le16(BIT(0))
2178 #define IWL_POWER_POWER_MANAGEMENT_ENA_MSK cpu_to_le16(BIT(1))
2179 #define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le16(BIT(2))
2180 #define IWL_POWER_PCI_PM_MSK cpu_to_le16(BIT(3))
2181 #define IWL_POWER_FAST_PD cpu_to_le16(BIT(4))
2182 #define IWL_POWER_BEACON_FILTERING cpu_to_le16(BIT(5))
2183 #define IWL_POWER_SHADOW_REG_ENA cpu_to_le16(BIT(6))
2184 #define IWL_POWER_CT_KILL_SET cpu_to_le16(BIT(7))
2185 #define IWL_POWER_BT_SCO_ENA cpu_to_le16(BIT(8))
2186 #define IWL_POWER_ADVANCE_PM_ENA_MSK cpu_to_le16(BIT(9))
2188 struct iwl_powertable_cmd {
2189 __le16 flags;
2190 u8 keep_alive_seconds; /* 3945 reserved */
2191 u8 debug_flags; /* 3945 reserved */
2192 __le32 rx_data_timeout;
2193 __le32 tx_data_timeout;
2194 __le32 sleep_interval[IWL_POWER_VEC_SIZE];
2195 __le32 keep_alive_beacons;
2196 } __packed;
2199 * PM_SLEEP_NOTIFICATION = 0x7A (notification only, not a command)
2200 * all devices identical.
2202 struct iwl_sleep_notification {
2203 u8 pm_sleep_mode;
2204 u8 pm_wakeup_src;
2205 __le16 reserved;
2206 __le32 sleep_time;
2207 __le32 tsf_low;
2208 __le32 bcon_timer;
2209 } __packed;
2211 /* Sleep states. all devices identical. */
2212 enum {
2213 IWL_PM_NO_SLEEP = 0,
2214 IWL_PM_SLP_MAC = 1,
2215 IWL_PM_SLP_FULL_MAC_UNASSOCIATE = 2,
2216 IWL_PM_SLP_FULL_MAC_CARD_STATE = 3,
2217 IWL_PM_SLP_PHY = 4,
2218 IWL_PM_SLP_REPENT = 5,
2219 IWL_PM_WAKEUP_BY_TIMER = 6,
2220 IWL_PM_WAKEUP_BY_DRIVER = 7,
2221 IWL_PM_WAKEUP_BY_RFKILL = 8,
2222 /* 3 reserved */
2223 IWL_PM_NUM_OF_MODES = 12,
2227 * REPLY_CARD_STATE_CMD = 0xa0 (command, has simple generic response)
2229 #define CARD_STATE_CMD_DISABLE 0x00 /* Put card to sleep */
2230 #define CARD_STATE_CMD_ENABLE 0x01 /* Wake up card */
2231 #define CARD_STATE_CMD_HALT 0x02 /* Power down permanently */
2232 struct iwl_card_state_cmd {
2233 __le32 status; /* CARD_STATE_CMD_* request new power state */
2234 } __packed;
2237 * CARD_STATE_NOTIFICATION = 0xa1 (notification only, not a command)
2239 struct iwl_card_state_notif {
2240 __le32 flags;
2241 } __packed;
2243 #define HW_CARD_DISABLED 0x01
2244 #define SW_CARD_DISABLED 0x02
2245 #define CT_CARD_DISABLED 0x04
2246 #define RXON_CARD_DISABLED 0x10
2248 struct iwl_ct_kill_config {
2249 __le32 reserved;
2250 __le32 critical_temperature_M;
2251 __le32 critical_temperature_R;
2252 } __packed;
2254 /* 1000, and 6x00 */
2255 struct iwl_ct_kill_throttling_config {
2256 __le32 critical_temperature_exit;
2257 __le32 reserved;
2258 __le32 critical_temperature_enter;
2259 } __packed;
2261 /******************************************************************************
2262 * (8)
2263 * Scan Commands, Responses, Notifications:
2265 *****************************************************************************/
2267 #define SCAN_CHANNEL_TYPE_PASSIVE cpu_to_le32(0)
2268 #define SCAN_CHANNEL_TYPE_ACTIVE cpu_to_le32(1)
2271 * struct iwl_scan_channel - entry in REPLY_SCAN_CMD channel table
2273 * One for each channel in the scan list.
2274 * Each channel can independently select:
2275 * 1) SSID for directed active scans
2276 * 2) Txpower setting (for rate specified within Tx command)
2277 * 3) How long to stay on-channel (behavior may be modified by quiet_time,
2278 * quiet_plcp_th, good_CRC_th)
2280 * To avoid uCode errors, make sure the following are true (see comments
2281 * under struct iwl_scan_cmd about max_out_time and quiet_time):
2282 * 1) If using passive_dwell (i.e. passive_dwell != 0):
2283 * active_dwell <= passive_dwell (< max_out_time if max_out_time != 0)
2284 * 2) quiet_time <= active_dwell
2285 * 3) If restricting off-channel time (i.e. max_out_time !=0):
2286 * passive_dwell < max_out_time
2287 * active_dwell < max_out_time
2290 struct iwl_scan_channel {
2292 * type is defined as:
2293 * 0:0 1 = active, 0 = passive
2294 * 1:20 SSID direct bit map; if a bit is set, then corresponding
2295 * SSID IE is transmitted in probe request.
2296 * 21:31 reserved
2298 __le32 type;
2299 __le16 channel; /* band is selected by iwl_scan_cmd "flags" field */
2300 u8 tx_gain; /* gain for analog radio */
2301 u8 dsp_atten; /* gain for DSP */
2302 __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */
2303 __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */
2304 } __packed;
2306 /* set number of direct probes __le32 type */
2307 #define IWL_SCAN_PROBE_MASK(n) cpu_to_le32((BIT(n) | (BIT(n) - BIT(1))))
2310 * struct iwl_ssid_ie - directed scan network information element
2312 * Up to 20 of these may appear in REPLY_SCAN_CMD (Note: Only 4 are in
2313 * 3945 SCAN api), selected by "type" bit field in struct iwl_scan_channel;
2314 * each channel may select different ssids from among the 20 (4) entries.
2315 * SSID IEs get transmitted in reverse order of entry.
2317 struct iwl_ssid_ie {
2318 u8 id;
2319 u8 len;
2320 u8 ssid[32];
2321 } __packed;
2323 #define PROBE_OPTION_MAX_3945 4
2324 #define PROBE_OPTION_MAX 20
2325 #define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF)
2326 #define IWL_GOOD_CRC_TH_DISABLED 0
2327 #define IWL_GOOD_CRC_TH_DEFAULT cpu_to_le16(1)
2328 #define IWL_GOOD_CRC_TH_NEVER cpu_to_le16(0xffff)
2329 #define IWL_MAX_SCAN_SIZE 1024
2330 #define IWL_MAX_CMD_SIZE 4096
2333 * REPLY_SCAN_CMD = 0x80 (command)
2335 * The hardware scan command is very powerful; the driver can set it up to
2336 * maintain (relatively) normal network traffic while doing a scan in the
2337 * background. The max_out_time and suspend_time control the ratio of how
2338 * long the device stays on an associated network channel ("service channel")
2339 * vs. how long it's away from the service channel, i.e. tuned to other channels
2340 * for scanning.
2342 * max_out_time is the max time off-channel (in usec), and suspend_time
2343 * is how long (in "extended beacon" format) that the scan is "suspended"
2344 * after returning to the service channel. That is, suspend_time is the
2345 * time that we stay on the service channel, doing normal work, between
2346 * scan segments. The driver may set these parameters differently to support
2347 * scanning when associated vs. not associated, and light vs. heavy traffic
2348 * loads when associated.
2350 * After receiving this command, the device's scan engine does the following;
2352 * 1) Sends SCAN_START notification to driver
2353 * 2) Checks to see if it has time to do scan for one channel
2354 * 3) Sends NULL packet, with power-save (PS) bit set to 1,
2355 * to tell AP that we're going off-channel
2356 * 4) Tunes to first channel in scan list, does active or passive scan
2357 * 5) Sends SCAN_RESULT notification to driver
2358 * 6) Checks to see if it has time to do scan on *next* channel in list
2359 * 7) Repeats 4-6 until it no longer has time to scan the next channel
2360 * before max_out_time expires
2361 * 8) Returns to service channel
2362 * 9) Sends NULL packet with PS=0 to tell AP that we're back
2363 * 10) Stays on service channel until suspend_time expires
2364 * 11) Repeats entire process 2-10 until list is complete
2365 * 12) Sends SCAN_COMPLETE notification
2367 * For fast, efficient scans, the scan command also has support for staying on
2368 * a channel for just a short time, if doing active scanning and getting no
2369 * responses to the transmitted probe request. This time is controlled by
2370 * quiet_time, and the number of received packets below which a channel is
2371 * considered "quiet" is controlled by quiet_plcp_threshold.
2373 * For active scanning on channels that have regulatory restrictions against
2374 * blindly transmitting, the scan can listen before transmitting, to make sure
2375 * that there is already legitimate activity on the channel. If enough
2376 * packets are cleanly received on the channel (controlled by good_CRC_th,
2377 * typical value 1), the scan engine starts transmitting probe requests.
2379 * Driver must use separate scan commands for 2.4 vs. 5 GHz bands.
2381 * To avoid uCode errors, see timing restrictions described under
2382 * struct iwl_scan_channel.
2385 enum iwl_scan_flags {
2386 /* BIT(0) currently unused */
2387 IWL_SCAN_FLAGS_ACTION_FRAME_TX = BIT(1),
2388 /* bits 2-7 reserved */
2391 struct iwl_scan_cmd {
2392 __le16 len;
2393 u8 scan_flags; /* scan flags: see enum iwl_scan_flags */
2394 u8 channel_count; /* # channels in channel list */
2395 __le16 quiet_time; /* dwell only this # millisecs on quiet channel
2396 * (only for active scan) */
2397 __le16 quiet_plcp_th; /* quiet chnl is < this # pkts (typ. 1) */
2398 __le16 good_CRC_th; /* passive -> active promotion threshold */
2399 __le16 rx_chain; /* RXON_RX_CHAIN_* */
2400 __le32 max_out_time; /* max usec to be away from associated (service)
2401 * channel */
2402 __le32 suspend_time; /* pause scan this long (in "extended beacon
2403 * format") when returning to service chnl:
2404 * 3945; 31:24 # beacons, 19:0 additional usec,
2405 * 4965; 31:22 # beacons, 21:0 additional usec.
2407 __le32 flags; /* RXON_FLG_* */
2408 __le32 filter_flags; /* RXON_FILTER_* */
2410 /* For active scans (set to all-0s for passive scans).
2411 * Does not include payload. Must specify Tx rate; no rate scaling. */
2412 struct iwl_tx_cmd tx_cmd;
2414 /* For directed active scans (set to all-0s otherwise) */
2415 struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX];
2418 * Probe request frame, followed by channel list.
2420 * Size of probe request frame is specified by byte count in tx_cmd.
2421 * Channel list follows immediately after probe request frame.
2422 * Number of channels in list is specified by channel_count.
2423 * Each channel in list is of type:
2425 * struct iwl_scan_channel channels[0];
2427 * NOTE: Only one band of channels can be scanned per pass. You
2428 * must not mix 2.4GHz channels and 5.2GHz channels, and you must wait
2429 * for one scan to complete (i.e. receive SCAN_COMPLETE_NOTIFICATION)
2430 * before requesting another scan.
2432 u8 data[0];
2433 } __packed;
2435 /* Can abort will notify by complete notification with abort status. */
2436 #define CAN_ABORT_STATUS cpu_to_le32(0x1)
2437 /* complete notification statuses */
2438 #define ABORT_STATUS 0x2
2441 * REPLY_SCAN_CMD = 0x80 (response)
2443 struct iwl_scanreq_notification {
2444 __le32 status; /* 1: okay, 2: cannot fulfill request */
2445 } __packed;
2448 * SCAN_START_NOTIFICATION = 0x82 (notification only, not a command)
2450 struct iwl_scanstart_notification {
2451 __le32 tsf_low;
2452 __le32 tsf_high;
2453 __le32 beacon_timer;
2454 u8 channel;
2455 u8 band;
2456 u8 reserved[2];
2457 __le32 status;
2458 } __packed;
2460 #define SCAN_OWNER_STATUS 0x1;
2461 #define MEASURE_OWNER_STATUS 0x2;
2463 #define IWL_PROBE_STATUS_OK 0
2464 #define IWL_PROBE_STATUS_TX_FAILED BIT(0)
2465 /* error statuses combined with TX_FAILED */
2466 #define IWL_PROBE_STATUS_FAIL_TTL BIT(1)
2467 #define IWL_PROBE_STATUS_FAIL_BT BIT(2)
2469 #define NUMBER_OF_STATISTICS 1 /* first __le32 is good CRC */
2471 * SCAN_RESULTS_NOTIFICATION = 0x83 (notification only, not a command)
2473 struct iwl_scanresults_notification {
2474 u8 channel;
2475 u8 band;
2476 u8 probe_status;
2477 u8 num_probe_not_sent; /* not enough time to send */
2478 __le32 tsf_low;
2479 __le32 tsf_high;
2480 __le32 statistics[NUMBER_OF_STATISTICS];
2481 } __packed;
2484 * SCAN_COMPLETE_NOTIFICATION = 0x84 (notification only, not a command)
2486 struct iwl_scancomplete_notification {
2487 u8 scanned_channels;
2488 u8 status;
2489 u8 bt_status; /* BT On/Off status */
2490 u8 last_channel;
2491 __le32 tsf_low;
2492 __le32 tsf_high;
2493 } __packed;
2496 /******************************************************************************
2497 * (9)
2498 * IBSS/AP Commands and Notifications:
2500 *****************************************************************************/
2502 enum iwl_ibss_manager {
2503 IWL_NOT_IBSS_MANAGER = 0,
2504 IWL_IBSS_MANAGER = 1,
2508 * BEACON_NOTIFICATION = 0x90 (notification only, not a command)
2511 struct iwlagn_beacon_notif {
2512 struct iwlagn_tx_resp beacon_notify_hdr;
2513 __le32 low_tsf;
2514 __le32 high_tsf;
2515 __le32 ibss_mgr_status;
2516 } __packed;
2519 * REPLY_TX_BEACON = 0x91 (command, has simple generic response)
2522 struct iwl_tx_beacon_cmd {
2523 struct iwl_tx_cmd tx;
2524 __le16 tim_idx;
2525 u8 tim_size;
2526 u8 reserved1;
2527 struct ieee80211_hdr frame[0]; /* beacon frame */
2528 } __packed;
2530 /******************************************************************************
2531 * (10)
2532 * Statistics Commands and Notifications:
2534 *****************************************************************************/
2536 #define IWL_TEMP_CONVERT 260
2538 #define SUP_RATE_11A_MAX_NUM_CHANNELS 8
2539 #define SUP_RATE_11B_MAX_NUM_CHANNELS 4
2540 #define SUP_RATE_11G_MAX_NUM_CHANNELS 12
2542 /* Used for passing to driver number of successes and failures per rate */
2543 struct rate_histogram {
2544 union {
2545 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
2546 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
2547 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
2548 } success;
2549 union {
2550 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
2551 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
2552 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
2553 } failed;
2554 } __packed;
2556 /* statistics command response */
2558 struct statistics_dbg {
2559 __le32 burst_check;
2560 __le32 burst_count;
2561 __le32 wait_for_silence_timeout_cnt;
2562 __le32 reserved[3];
2563 } __packed;
2565 struct statistics_rx_phy {
2566 __le32 ina_cnt;
2567 __le32 fina_cnt;
2568 __le32 plcp_err;
2569 __le32 crc32_err;
2570 __le32 overrun_err;
2571 __le32 early_overrun_err;
2572 __le32 crc32_good;
2573 __le32 false_alarm_cnt;
2574 __le32 fina_sync_err_cnt;
2575 __le32 sfd_timeout;
2576 __le32 fina_timeout;
2577 __le32 unresponded_rts;
2578 __le32 rxe_frame_limit_overrun;
2579 __le32 sent_ack_cnt;
2580 __le32 sent_cts_cnt;
2581 __le32 sent_ba_rsp_cnt;
2582 __le32 dsp_self_kill;
2583 __le32 mh_format_err;
2584 __le32 re_acq_main_rssi_sum;
2585 __le32 reserved3;
2586 } __packed;
2588 struct statistics_rx_ht_phy {
2589 __le32 plcp_err;
2590 __le32 overrun_err;
2591 __le32 early_overrun_err;
2592 __le32 crc32_good;
2593 __le32 crc32_err;
2594 __le32 mh_format_err;
2595 __le32 agg_crc32_good;
2596 __le32 agg_mpdu_cnt;
2597 __le32 agg_cnt;
2598 __le32 unsupport_mcs;
2599 } __packed;
2601 #define INTERFERENCE_DATA_AVAILABLE cpu_to_le32(1)
2603 struct statistics_rx_non_phy {
2604 __le32 bogus_cts; /* CTS received when not expecting CTS */
2605 __le32 bogus_ack; /* ACK received when not expecting ACK */
2606 __le32 non_bssid_frames; /* number of frames with BSSID that
2607 * doesn't belong to the STA BSSID */
2608 __le32 filtered_frames; /* count frames that were dumped in the
2609 * filtering process */
2610 __le32 non_channel_beacons; /* beacons with our bss id but not on
2611 * our serving channel */
2612 __le32 channel_beacons; /* beacons with our bss id and in our
2613 * serving channel */
2614 __le32 num_missed_bcon; /* number of missed beacons */
2615 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the
2616 * ADC was in saturation */
2617 __le32 ina_detection_search_time;/* total time (in 0.8us) searched
2618 * for INA */
2619 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */
2620 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */
2621 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */
2622 __le32 interference_data_flag; /* flag for interference data
2623 * availability. 1 when data is
2624 * available. */
2625 __le32 channel_load; /* counts RX Enable time in uSec */
2626 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM
2627 * and CCK) counter */
2628 __le32 beacon_rssi_a;
2629 __le32 beacon_rssi_b;
2630 __le32 beacon_rssi_c;
2631 __le32 beacon_energy_a;
2632 __le32 beacon_energy_b;
2633 __le32 beacon_energy_c;
2634 } __packed;
2636 struct statistics_rx_non_phy_bt {
2637 struct statistics_rx_non_phy common;
2638 /* additional stats for bt */
2639 __le32 num_bt_kills;
2640 __le32 reserved[2];
2641 } __packed;
2643 struct statistics_rx {
2644 struct statistics_rx_phy ofdm;
2645 struct statistics_rx_phy cck;
2646 struct statistics_rx_non_phy general;
2647 struct statistics_rx_ht_phy ofdm_ht;
2648 } __packed;
2650 struct statistics_rx_bt {
2651 struct statistics_rx_phy ofdm;
2652 struct statistics_rx_phy cck;
2653 struct statistics_rx_non_phy_bt general;
2654 struct statistics_rx_ht_phy ofdm_ht;
2655 } __packed;
2658 * struct statistics_tx_power - current tx power
2660 * @ant_a: current tx power on chain a in 1/2 dB step
2661 * @ant_b: current tx power on chain b in 1/2 dB step
2662 * @ant_c: current tx power on chain c in 1/2 dB step
2664 struct statistics_tx_power {
2665 u8 ant_a;
2666 u8 ant_b;
2667 u8 ant_c;
2668 u8 reserved;
2669 } __packed;
2671 struct statistics_tx_non_phy_agg {
2672 __le32 ba_timeout;
2673 __le32 ba_reschedule_frames;
2674 __le32 scd_query_agg_frame_cnt;
2675 __le32 scd_query_no_agg;
2676 __le32 scd_query_agg;
2677 __le32 scd_query_mismatch;
2678 __le32 frame_not_ready;
2679 __le32 underrun;
2680 __le32 bt_prio_kill;
2681 __le32 rx_ba_rsp_cnt;
2682 } __packed;
2684 struct statistics_tx {
2685 __le32 preamble_cnt;
2686 __le32 rx_detected_cnt;
2687 __le32 bt_prio_defer_cnt;
2688 __le32 bt_prio_kill_cnt;
2689 __le32 few_bytes_cnt;
2690 __le32 cts_timeout;
2691 __le32 ack_timeout;
2692 __le32 expected_ack_cnt;
2693 __le32 actual_ack_cnt;
2694 __le32 dump_msdu_cnt;
2695 __le32 burst_abort_next_frame_mismatch_cnt;
2696 __le32 burst_abort_missing_next_frame_cnt;
2697 __le32 cts_timeout_collision;
2698 __le32 ack_or_ba_timeout_collision;
2699 struct statistics_tx_non_phy_agg agg;
2701 * "tx_power" are optional parameters provided by uCode,
2702 * 6000 series is the only device provide the information,
2703 * Those are reserved fields for all the other devices
2705 struct statistics_tx_power tx_power;
2706 __le32 reserved1;
2707 } __packed;
2710 struct statistics_div {
2711 __le32 tx_on_a;
2712 __le32 tx_on_b;
2713 __le32 exec_time;
2714 __le32 probe_time;
2715 __le32 reserved1;
2716 __le32 reserved2;
2717 } __packed;
2719 struct statistics_general_common {
2720 __le32 temperature; /* radio temperature */
2721 __le32 temperature_m; /* for 5000 and up, this is radio voltage */
2722 struct statistics_dbg dbg;
2723 __le32 sleep_time;
2724 __le32 slots_out;
2725 __le32 slots_idle;
2726 __le32 ttl_timestamp;
2727 struct statistics_div div;
2728 __le32 rx_enable_counter;
2730 * num_of_sos_states:
2731 * count the number of times we have to re-tune
2732 * in order to get out of bad PHY status
2734 __le32 num_of_sos_states;
2735 } __packed;
2737 struct statistics_bt_activity {
2738 /* Tx statistics */
2739 __le32 hi_priority_tx_req_cnt;
2740 __le32 hi_priority_tx_denied_cnt;
2741 __le32 lo_priority_tx_req_cnt;
2742 __le32 lo_priority_tx_denied_cnt;
2743 /* Rx statistics */
2744 __le32 hi_priority_rx_req_cnt;
2745 __le32 hi_priority_rx_denied_cnt;
2746 __le32 lo_priority_rx_req_cnt;
2747 __le32 lo_priority_rx_denied_cnt;
2748 } __packed;
2750 struct statistics_general {
2751 struct statistics_general_common common;
2752 __le32 reserved2;
2753 __le32 reserved3;
2754 } __packed;
2756 struct statistics_general_bt {
2757 struct statistics_general_common common;
2758 struct statistics_bt_activity activity;
2759 __le32 reserved2;
2760 __le32 reserved3;
2761 } __packed;
2763 #define UCODE_STATISTICS_CLEAR_MSK (0x1 << 0)
2764 #define UCODE_STATISTICS_FREQUENCY_MSK (0x1 << 1)
2765 #define UCODE_STATISTICS_NARROW_BAND_MSK (0x1 << 2)
2768 * REPLY_STATISTICS_CMD = 0x9c,
2769 * all devices identical.
2771 * This command triggers an immediate response containing uCode statistics.
2772 * The response is in the same format as STATISTICS_NOTIFICATION 0x9d, below.
2774 * If the CLEAR_STATS configuration flag is set, uCode will clear its
2775 * internal copy of the statistics (counters) after issuing the response.
2776 * This flag does not affect STATISTICS_NOTIFICATIONs after beacons (see below).
2778 * If the DISABLE_NOTIF configuration flag is set, uCode will not issue
2779 * STATISTICS_NOTIFICATIONs after received beacons (see below). This flag
2780 * does not affect the response to the REPLY_STATISTICS_CMD 0x9c itself.
2782 #define IWL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1) /* see above */
2783 #define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */
2784 struct iwl_statistics_cmd {
2785 __le32 configuration_flags; /* IWL_STATS_CONF_* */
2786 } __packed;
2789 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
2791 * By default, uCode issues this notification after receiving a beacon
2792 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the
2793 * REPLY_STATISTICS_CMD 0x9c, above.
2795 * Statistics counters continue to increment beacon after beacon, but are
2796 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
2797 * 0x9c with CLEAR_STATS bit set (see above).
2799 * uCode also issues this notification during scans. uCode clears statistics
2800 * appropriately so that each notification contains statistics for only the
2801 * one channel that has just been scanned.
2803 #define STATISTICS_REPLY_FLG_BAND_24G_MSK cpu_to_le32(0x2)
2804 #define STATISTICS_REPLY_FLG_HT40_MODE_MSK cpu_to_le32(0x8)
2806 struct iwl_notif_statistics {
2807 __le32 flag;
2808 struct statistics_rx rx;
2809 struct statistics_tx tx;
2810 struct statistics_general general;
2811 } __packed;
2813 struct iwl_bt_notif_statistics {
2814 __le32 flag;
2815 struct statistics_rx_bt rx;
2816 struct statistics_tx tx;
2817 struct statistics_general_bt general;
2818 } __packed;
2821 * MISSED_BEACONS_NOTIFICATION = 0xa2 (notification only, not a command)
2823 * uCode send MISSED_BEACONS_NOTIFICATION to driver when detect beacon missed
2824 * in regardless of how many missed beacons, which mean when driver receive the
2825 * notification, inside the command, it can find all the beacons information
2826 * which include number of total missed beacons, number of consecutive missed
2827 * beacons, number of beacons received and number of beacons expected to
2828 * receive.
2830 * If uCode detected consecutive_missed_beacons > 5, it will reset the radio
2831 * in order to bring the radio/PHY back to working state; which has no relation
2832 * to when driver will perform sensitivity calibration.
2834 * Driver should set it own missed_beacon_threshold to decide when to perform
2835 * sensitivity calibration based on number of consecutive missed beacons in
2836 * order to improve overall performance, especially in noisy environment.
2840 #define IWL_MISSED_BEACON_THRESHOLD_MIN (1)
2841 #define IWL_MISSED_BEACON_THRESHOLD_DEF (5)
2842 #define IWL_MISSED_BEACON_THRESHOLD_MAX IWL_MISSED_BEACON_THRESHOLD_DEF
2844 struct iwl_missed_beacon_notif {
2845 __le32 consecutive_missed_beacons;
2846 __le32 total_missed_becons;
2847 __le32 num_expected_beacons;
2848 __le32 num_recvd_beacons;
2849 } __packed;
2852 /******************************************************************************
2853 * (11)
2854 * Rx Calibration Commands:
2856 * With the uCode used for open source drivers, most Tx calibration (except
2857 * for Tx Power) and most Rx calibration is done by uCode during the
2858 * "initialize" phase of uCode boot. Driver must calibrate only:
2860 * 1) Tx power (depends on temperature), described elsewhere
2861 * 2) Receiver gain balance (optimize MIMO, and detect disconnected antennas)
2862 * 3) Receiver sensitivity (to optimize signal detection)
2864 *****************************************************************************/
2867 * SENSITIVITY_CMD = 0xa8 (command, has simple generic response)
2869 * This command sets up the Rx signal detector for a sensitivity level that
2870 * is high enough to lock onto all signals within the associated network,
2871 * but low enough to ignore signals that are below a certain threshold, so as
2872 * not to have too many "false alarms". False alarms are signals that the
2873 * Rx DSP tries to lock onto, but then discards after determining that they
2874 * are noise.
2876 * The optimum number of false alarms is between 5 and 50 per 200 TUs
2877 * (200 * 1024 uSecs, i.e. 204.8 milliseconds) of actual Rx time (i.e.
2878 * time listening, not transmitting). Driver must adjust sensitivity so that
2879 * the ratio of actual false alarms to actual Rx time falls within this range.
2881 * While associated, uCode delivers STATISTICS_NOTIFICATIONs after each
2882 * received beacon. These provide information to the driver to analyze the
2883 * sensitivity. Don't analyze statistics that come in from scanning, or any
2884 * other non-associated-network source. Pertinent statistics include:
2886 * From "general" statistics (struct statistics_rx_non_phy):
2888 * (beacon_energy_[abc] & 0x0FF00) >> 8 (unsigned, higher value is lower level)
2889 * Measure of energy of desired signal. Used for establishing a level
2890 * below which the device does not detect signals.
2892 * (beacon_silence_rssi_[abc] & 0x0FF00) >> 8 (unsigned, units in dB)
2893 * Measure of background noise in silent period after beacon.
2895 * channel_load
2896 * uSecs of actual Rx time during beacon period (varies according to
2897 * how much time was spent transmitting).
2899 * From "cck" and "ofdm" statistics (struct statistics_rx_phy), separately:
2901 * false_alarm_cnt
2902 * Signal locks abandoned early (before phy-level header).
2904 * plcp_err
2905 * Signal locks abandoned late (during phy-level header).
2907 * NOTE: Both false_alarm_cnt and plcp_err increment monotonically from
2908 * beacon to beacon, i.e. each value is an accumulation of all errors
2909 * before and including the latest beacon. Values will wrap around to 0
2910 * after counting up to 2^32 - 1. Driver must differentiate vs.
2911 * previous beacon's values to determine # false alarms in the current
2912 * beacon period.
2914 * Total number of false alarms = false_alarms + plcp_errs
2916 * For OFDM, adjust the following table entries in struct iwl_sensitivity_cmd
2917 * (notice that the start points for OFDM are at or close to settings for
2918 * maximum sensitivity):
2920 * START / MIN / MAX
2921 * HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX 90 / 85 / 120
2922 * HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX 170 / 170 / 210
2923 * HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX 105 / 105 / 140
2924 * HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX 220 / 220 / 270
2926 * If actual rate of OFDM false alarms (+ plcp_errors) is too high
2927 * (greater than 50 for each 204.8 msecs listening), reduce sensitivity
2928 * by *adding* 1 to all 4 of the table entries above, up to the max for
2929 * each entry. Conversely, if false alarm rate is too low (less than 5
2930 * for each 204.8 msecs listening), *subtract* 1 from each entry to
2931 * increase sensitivity.
2933 * For CCK sensitivity, keep track of the following:
2935 * 1). 20-beacon history of maximum background noise, indicated by
2936 * (beacon_silence_rssi_[abc] & 0x0FF00), units in dB, across the
2937 * 3 receivers. For any given beacon, the "silence reference" is
2938 * the maximum of last 60 samples (20 beacons * 3 receivers).
2940 * 2). 10-beacon history of strongest signal level, as indicated
2941 * by (beacon_energy_[abc] & 0x0FF00) >> 8, across the 3 receivers,
2942 * i.e. the strength of the signal through the best receiver at the
2943 * moment. These measurements are "upside down", with lower values
2944 * for stronger signals, so max energy will be *minimum* value.
2946 * Then for any given beacon, the driver must determine the *weakest*
2947 * of the strongest signals; this is the minimum level that needs to be
2948 * successfully detected, when using the best receiver at the moment.
2949 * "Max cck energy" is the maximum (higher value means lower energy!)
2950 * of the last 10 minima. Once this is determined, driver must add
2951 * a little margin by adding "6" to it.
2953 * 3). Number of consecutive beacon periods with too few false alarms.
2954 * Reset this to 0 at the first beacon period that falls within the
2955 * "good" range (5 to 50 false alarms per 204.8 milliseconds rx).
2957 * Then, adjust the following CCK table entries in struct iwl_sensitivity_cmd
2958 * (notice that the start points for CCK are at maximum sensitivity):
2960 * START / MIN / MAX
2961 * HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX 125 / 125 / 200
2962 * HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX 200 / 200 / 400
2963 * HD_MIN_ENERGY_CCK_DET_INDEX 100 / 0 / 100
2965 * If actual rate of CCK false alarms (+ plcp_errors) is too high
2966 * (greater than 50 for each 204.8 msecs listening), method for reducing
2967 * sensitivity is:
2969 * 1) *Add* 3 to value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
2970 * up to max 400.
2972 * 2) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is < 160,
2973 * sensitivity has been reduced a significant amount; bring it up to
2974 * a moderate 161. Otherwise, *add* 3, up to max 200.
2976 * 3) a) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is > 160,
2977 * sensitivity has been reduced only a moderate or small amount;
2978 * *subtract* 2 from value in HD_MIN_ENERGY_CCK_DET_INDEX,
2979 * down to min 0. Otherwise (if gain has been significantly reduced),
2980 * don't change the HD_MIN_ENERGY_CCK_DET_INDEX value.
2982 * b) Save a snapshot of the "silence reference".
2984 * If actual rate of CCK false alarms (+ plcp_errors) is too low
2985 * (less than 5 for each 204.8 msecs listening), method for increasing
2986 * sensitivity is used only if:
2988 * 1a) Previous beacon did not have too many false alarms
2989 * 1b) AND difference between previous "silence reference" and current
2990 * "silence reference" (prev - current) is 2 or more,
2991 * OR 2) 100 or more consecutive beacon periods have had rate of
2992 * less than 5 false alarms per 204.8 milliseconds rx time.
2994 * Method for increasing sensitivity:
2996 * 1) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX,
2997 * down to min 125.
2999 * 2) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
3000 * down to min 200.
3002 * 3) *Add* 2 to value in HD_MIN_ENERGY_CCK_DET_INDEX, up to max 100.
3004 * If actual rate of CCK false alarms (+ plcp_errors) is within good range
3005 * (between 5 and 50 for each 204.8 msecs listening):
3007 * 1) Save a snapshot of the silence reference.
3009 * 2) If previous beacon had too many CCK false alarms (+ plcp_errors),
3010 * give some extra margin to energy threshold by *subtracting* 8
3011 * from value in HD_MIN_ENERGY_CCK_DET_INDEX.
3013 * For all cases (too few, too many, good range), make sure that the CCK
3014 * detection threshold (energy) is below the energy level for robust
3015 * detection over the past 10 beacon periods, the "Max cck energy".
3016 * Lower values mean higher energy; this means making sure that the value
3017 * in HD_MIN_ENERGY_CCK_DET_INDEX is at or *above* "Max cck energy".
3022 * Table entries in SENSITIVITY_CMD (struct iwl_sensitivity_cmd)
3024 #define HD_TABLE_SIZE (11) /* number of entries */
3025 #define HD_MIN_ENERGY_CCK_DET_INDEX (0) /* table indexes */
3026 #define HD_MIN_ENERGY_OFDM_DET_INDEX (1)
3027 #define HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX (2)
3028 #define HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX (3)
3029 #define HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX (4)
3030 #define HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX (5)
3031 #define HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX (6)
3032 #define HD_BARKER_CORR_TH_ADD_MIN_INDEX (7)
3033 #define HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX (8)
3034 #define HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX (9)
3035 #define HD_OFDM_ENERGY_TH_IN_INDEX (10)
3038 * Additional table entries in enhance SENSITIVITY_CMD
3040 #define HD_INA_NON_SQUARE_DET_OFDM_INDEX (11)
3041 #define HD_INA_NON_SQUARE_DET_CCK_INDEX (12)
3042 #define HD_CORR_11_INSTEAD_OF_CORR_9_EN_INDEX (13)
3043 #define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_INDEX (14)
3044 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (15)
3045 #define HD_OFDM_NON_SQUARE_DET_SLOPE_INDEX (16)
3046 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_INDEX (17)
3047 #define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_INDEX (18)
3048 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (19)
3049 #define HD_CCK_NON_SQUARE_DET_SLOPE_INDEX (20)
3050 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_INDEX (21)
3051 #define HD_RESERVED (22)
3053 /* number of entries for enhanced tbl */
3054 #define ENHANCE_HD_TABLE_SIZE (23)
3056 /* number of additional entries for enhanced tbl */
3057 #define ENHANCE_HD_TABLE_ENTRIES (ENHANCE_HD_TABLE_SIZE - HD_TABLE_SIZE)
3059 #define HD_INA_NON_SQUARE_DET_OFDM_DATA cpu_to_le16(0)
3060 #define HD_INA_NON_SQUARE_DET_CCK_DATA cpu_to_le16(0)
3061 #define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA cpu_to_le16(0)
3062 #define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA cpu_to_le16(668)
3063 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA cpu_to_le16(4)
3064 #define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA cpu_to_le16(486)
3065 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA cpu_to_le16(37)
3066 #define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA cpu_to_le16(853)
3067 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA cpu_to_le16(4)
3068 #define HD_CCK_NON_SQUARE_DET_SLOPE_DATA cpu_to_le16(476)
3069 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA cpu_to_le16(99)
3072 /* Control field in struct iwl_sensitivity_cmd */
3073 #define SENSITIVITY_CMD_CONTROL_DEFAULT_TABLE cpu_to_le16(0)
3074 #define SENSITIVITY_CMD_CONTROL_WORK_TABLE cpu_to_le16(1)
3077 * struct iwl_sensitivity_cmd
3078 * @control: (1) updates working table, (0) updates default table
3079 * @table: energy threshold values, use HD_* as index into table
3081 * Always use "1" in "control" to update uCode's working table and DSP.
3083 struct iwl_sensitivity_cmd {
3084 __le16 control; /* always use "1" */
3085 __le16 table[HD_TABLE_SIZE]; /* use HD_* as index */
3086 } __packed;
3091 struct iwl_enhance_sensitivity_cmd {
3092 __le16 control; /* always use "1" */
3093 __le16 enhance_table[ENHANCE_HD_TABLE_SIZE]; /* use HD_* as index */
3094 } __packed;
3098 * REPLY_PHY_CALIBRATION_CMD = 0xb0 (command, has simple generic response)
3100 * This command sets the relative gains of agn device's 3 radio receiver chains.
3102 * After the first association, driver should accumulate signal and noise
3103 * statistics from the STATISTICS_NOTIFICATIONs that follow the first 20
3104 * beacons from the associated network (don't collect statistics that come
3105 * in from scanning, or any other non-network source).
3107 * DISCONNECTED ANTENNA:
3109 * Driver should determine which antennas are actually connected, by comparing
3110 * average beacon signal levels for the 3 Rx chains. Accumulate (add) the
3111 * following values over 20 beacons, one accumulator for each of the chains
3112 * a/b/c, from struct statistics_rx_non_phy:
3114 * beacon_rssi_[abc] & 0x0FF (unsigned, units in dB)
3116 * Find the strongest signal from among a/b/c. Compare the other two to the
3117 * strongest. If any signal is more than 15 dB (times 20, unless you
3118 * divide the accumulated values by 20) below the strongest, the driver
3119 * considers that antenna to be disconnected, and should not try to use that
3120 * antenna/chain for Rx or Tx. If both A and B seem to be disconnected,
3121 * driver should declare the stronger one as connected, and attempt to use it
3122 * (A and B are the only 2 Tx chains!).
3125 * RX BALANCE:
3127 * Driver should balance the 3 receivers (but just the ones that are connected
3128 * to antennas, see above) for gain, by comparing the average signal levels
3129 * detected during the silence after each beacon (background noise).
3130 * Accumulate (add) the following values over 20 beacons, one accumulator for
3131 * each of the chains a/b/c, from struct statistics_rx_non_phy:
3133 * beacon_silence_rssi_[abc] & 0x0FF (unsigned, units in dB)
3135 * Find the weakest background noise level from among a/b/c. This Rx chain
3136 * will be the reference, with 0 gain adjustment. Attenuate other channels by
3137 * finding noise difference:
3139 * (accum_noise[i] - accum_noise[reference]) / 30
3141 * The "30" adjusts the dB in the 20 accumulated samples to units of 1.5 dB.
3142 * For use in diff_gain_[abc] fields of struct iwl_calibration_cmd, the
3143 * driver should limit the difference results to a range of 0-3 (0-4.5 dB),
3144 * and set bit 2 to indicate "reduce gain". The value for the reference
3145 * (weakest) chain should be "0".
3147 * diff_gain_[abc] bit fields:
3148 * 2: (1) reduce gain, (0) increase gain
3149 * 1-0: amount of gain, units of 1.5 dB
3152 /* Phy calibration command for series */
3153 /* The default calibrate table size if not specified by firmware */
3154 #define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE 18
3155 enum {
3156 IWL_PHY_CALIBRATE_DIFF_GAIN_CMD = 7,
3157 IWL_PHY_CALIBRATE_DC_CMD = 8,
3158 IWL_PHY_CALIBRATE_LO_CMD = 9,
3159 IWL_PHY_CALIBRATE_TX_IQ_CMD = 11,
3160 IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD = 15,
3161 IWL_PHY_CALIBRATE_BASE_BAND_CMD = 16,
3162 IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD = 17,
3163 IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD = 18,
3164 IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE = 19,
3167 #define IWL_MAX_PHY_CALIBRATE_TBL_SIZE (253)
3169 #define IWL_CALIB_INIT_CFG_ALL cpu_to_le32(0xffffffff)
3171 /* This enum defines the bitmap of various calibrations to enable in both
3172 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
3174 enum iwl_ucode_calib_cfg {
3175 IWL_CALIB_CFG_RX_BB_IDX,
3176 IWL_CALIB_CFG_DC_IDX,
3177 IWL_CALIB_CFG_TX_IQ_IDX,
3178 IWL_CALIB_CFG_RX_IQ_IDX,
3179 IWL_CALIB_CFG_NOISE_IDX,
3180 IWL_CALIB_CFG_CRYSTAL_IDX,
3181 IWL_CALIB_CFG_TEMPERATURE_IDX,
3182 IWL_CALIB_CFG_PAPD_IDX,
3186 struct iwl_calib_cfg_elmnt_s {
3187 __le32 is_enable;
3188 __le32 start;
3189 __le32 send_res;
3190 __le32 apply_res;
3191 __le32 reserved;
3192 } __packed;
3194 struct iwl_calib_cfg_status_s {
3195 struct iwl_calib_cfg_elmnt_s once;
3196 struct iwl_calib_cfg_elmnt_s perd;
3197 __le32 flags;
3198 } __packed;
3200 struct iwl_calib_cfg_cmd {
3201 struct iwl_calib_cfg_status_s ucd_calib_cfg;
3202 struct iwl_calib_cfg_status_s drv_calib_cfg;
3203 __le32 reserved1;
3204 } __packed;
3206 struct iwl_calib_hdr {
3207 u8 op_code;
3208 u8 first_group;
3209 u8 groups_num;
3210 u8 data_valid;
3211 } __packed;
3213 struct iwl_calib_cmd {
3214 struct iwl_calib_hdr hdr;
3215 u8 data[0];
3216 } __packed;
3218 /* IWL_PHY_CALIBRATE_DIFF_GAIN_CMD (7) */
3219 struct iwl_calib_diff_gain_cmd {
3220 struct iwl_calib_hdr hdr;
3221 s8 diff_gain_a; /* see above */
3222 s8 diff_gain_b;
3223 s8 diff_gain_c;
3224 u8 reserved1;
3225 } __packed;
3227 struct iwl_calib_xtal_freq_cmd {
3228 struct iwl_calib_hdr hdr;
3229 u8 cap_pin1;
3230 u8 cap_pin2;
3231 u8 pad[2];
3232 } __packed;
3234 #define DEFAULT_RADIO_SENSOR_OFFSET 2700
3235 struct iwl_calib_temperature_offset_cmd {
3236 struct iwl_calib_hdr hdr;
3237 s16 radio_sensor_offset;
3238 s16 reserved;
3239 } __packed;
3241 /* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */
3242 struct iwl_calib_chain_noise_reset_cmd {
3243 struct iwl_calib_hdr hdr;
3244 u8 data[0];
3247 /* IWL_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD */
3248 struct iwl_calib_chain_noise_gain_cmd {
3249 struct iwl_calib_hdr hdr;
3250 u8 delta_gain_1;
3251 u8 delta_gain_2;
3252 u8 pad[2];
3253 } __packed;
3255 /******************************************************************************
3256 * (12)
3257 * Miscellaneous Commands:
3259 *****************************************************************************/
3262 * LEDs Command & Response
3263 * REPLY_LEDS_CMD = 0x48 (command, has simple generic response)
3265 * For each of 3 possible LEDs (Activity/Link/Tech, selected by "id" field),
3266 * this command turns it on or off, or sets up a periodic blinking cycle.
3268 struct iwl_led_cmd {
3269 __le32 interval; /* "interval" in uSec */
3270 u8 id; /* 1: Activity, 2: Link, 3: Tech */
3271 u8 off; /* # intervals off while blinking;
3272 * "0", with >0 "on" value, turns LED on */
3273 u8 on; /* # intervals on while blinking;
3274 * "0", regardless of "off", turns LED off */
3275 u8 reserved;
3276 } __packed;
3279 * station priority table entries
3280 * also used as potential "events" value for both
3281 * COEX_MEDIUM_NOTIFICATION and COEX_EVENT_CMD
3285 * COEX events entry flag masks
3286 * RP - Requested Priority
3287 * WP - Win Medium Priority: priority assigned when the contention has been won
3289 #define COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG (0x1)
3290 #define COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG (0x2)
3291 #define COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG (0x4)
3293 #define COEX_CU_UNASSOC_IDLE_RP 4
3294 #define COEX_CU_UNASSOC_MANUAL_SCAN_RP 4
3295 #define COEX_CU_UNASSOC_AUTO_SCAN_RP 4
3296 #define COEX_CU_CALIBRATION_RP 4
3297 #define COEX_CU_PERIODIC_CALIBRATION_RP 4
3298 #define COEX_CU_CONNECTION_ESTAB_RP 4
3299 #define COEX_CU_ASSOCIATED_IDLE_RP 4
3300 #define COEX_CU_ASSOC_MANUAL_SCAN_RP 4
3301 #define COEX_CU_ASSOC_AUTO_SCAN_RP 4
3302 #define COEX_CU_ASSOC_ACTIVE_LEVEL_RP 4
3303 #define COEX_CU_RF_ON_RP 6
3304 #define COEX_CU_RF_OFF_RP 4
3305 #define COEX_CU_STAND_ALONE_DEBUG_RP 6
3306 #define COEX_CU_IPAN_ASSOC_LEVEL_RP 4
3307 #define COEX_CU_RSRVD1_RP 4
3308 #define COEX_CU_RSRVD2_RP 4
3310 #define COEX_CU_UNASSOC_IDLE_WP 3
3311 #define COEX_CU_UNASSOC_MANUAL_SCAN_WP 3
3312 #define COEX_CU_UNASSOC_AUTO_SCAN_WP 3
3313 #define COEX_CU_CALIBRATION_WP 3
3314 #define COEX_CU_PERIODIC_CALIBRATION_WP 3
3315 #define COEX_CU_CONNECTION_ESTAB_WP 3
3316 #define COEX_CU_ASSOCIATED_IDLE_WP 3
3317 #define COEX_CU_ASSOC_MANUAL_SCAN_WP 3
3318 #define COEX_CU_ASSOC_AUTO_SCAN_WP 3
3319 #define COEX_CU_ASSOC_ACTIVE_LEVEL_WP 3
3320 #define COEX_CU_RF_ON_WP 3
3321 #define COEX_CU_RF_OFF_WP 3
3322 #define COEX_CU_STAND_ALONE_DEBUG_WP 6
3323 #define COEX_CU_IPAN_ASSOC_LEVEL_WP 3
3324 #define COEX_CU_RSRVD1_WP 3
3325 #define COEX_CU_RSRVD2_WP 3
3327 #define COEX_UNASSOC_IDLE_FLAGS 0
3328 #define COEX_UNASSOC_MANUAL_SCAN_FLAGS \
3329 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3330 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3331 #define COEX_UNASSOC_AUTO_SCAN_FLAGS \
3332 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3333 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3334 #define COEX_CALIBRATION_FLAGS \
3335 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3336 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3337 #define COEX_PERIODIC_CALIBRATION_FLAGS 0
3339 * COEX_CONNECTION_ESTAB:
3340 * we need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3342 #define COEX_CONNECTION_ESTAB_FLAGS \
3343 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3344 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3345 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3346 #define COEX_ASSOCIATED_IDLE_FLAGS 0
3347 #define COEX_ASSOC_MANUAL_SCAN_FLAGS \
3348 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3349 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3350 #define COEX_ASSOC_AUTO_SCAN_FLAGS \
3351 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3352 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3353 #define COEX_ASSOC_ACTIVE_LEVEL_FLAGS 0
3354 #define COEX_RF_ON_FLAGS 0
3355 #define COEX_RF_OFF_FLAGS 0
3356 #define COEX_STAND_ALONE_DEBUG_FLAGS \
3357 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3358 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3359 #define COEX_IPAN_ASSOC_LEVEL_FLAGS \
3360 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3361 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3362 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3363 #define COEX_RSRVD1_FLAGS 0
3364 #define COEX_RSRVD2_FLAGS 0
3366 * COEX_CU_RF_ON is the event wrapping all radio ownership.
3367 * We need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3369 #define COEX_CU_RF_ON_FLAGS \
3370 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3371 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3372 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3375 enum {
3376 /* un-association part */
3377 COEX_UNASSOC_IDLE = 0,
3378 COEX_UNASSOC_MANUAL_SCAN = 1,
3379 COEX_UNASSOC_AUTO_SCAN = 2,
3380 /* calibration */
3381 COEX_CALIBRATION = 3,
3382 COEX_PERIODIC_CALIBRATION = 4,
3383 /* connection */
3384 COEX_CONNECTION_ESTAB = 5,
3385 /* association part */
3386 COEX_ASSOCIATED_IDLE = 6,
3387 COEX_ASSOC_MANUAL_SCAN = 7,
3388 COEX_ASSOC_AUTO_SCAN = 8,
3389 COEX_ASSOC_ACTIVE_LEVEL = 9,
3390 /* RF ON/OFF */
3391 COEX_RF_ON = 10,
3392 COEX_RF_OFF = 11,
3393 COEX_STAND_ALONE_DEBUG = 12,
3394 /* IPAN */
3395 COEX_IPAN_ASSOC_LEVEL = 13,
3396 /* reserved */
3397 COEX_RSRVD1 = 14,
3398 COEX_RSRVD2 = 15,
3399 COEX_NUM_OF_EVENTS = 16
3403 * Coexistence WIFI/WIMAX Command
3404 * COEX_PRIORITY_TABLE_CMD = 0x5a
3407 struct iwl_wimax_coex_event_entry {
3408 u8 request_prio;
3409 u8 win_medium_prio;
3410 u8 reserved;
3411 u8 flags;
3412 } __packed;
3414 /* COEX flag masks */
3416 /* Station table is valid */
3417 #define COEX_FLAGS_STA_TABLE_VALID_MSK (0x1)
3418 /* UnMask wake up src at unassociated sleep */
3419 #define COEX_FLAGS_UNASSOC_WA_UNMASK_MSK (0x4)
3420 /* UnMask wake up src at associated sleep */
3421 #define COEX_FLAGS_ASSOC_WA_UNMASK_MSK (0x8)
3422 /* Enable CoEx feature. */
3423 #define COEX_FLAGS_COEX_ENABLE_MSK (0x80)
3425 struct iwl_wimax_coex_cmd {
3426 u8 flags;
3427 u8 reserved[3];
3428 struct iwl_wimax_coex_event_entry sta_prio[COEX_NUM_OF_EVENTS];
3429 } __packed;
3432 * Coexistence MEDIUM NOTIFICATION
3433 * COEX_MEDIUM_NOTIFICATION = 0x5b
3435 * notification from uCode to host to indicate medium changes
3439 * status field
3440 * bit 0 - 2: medium status
3441 * bit 3: medium change indication
3442 * bit 4 - 31: reserved
3444 /* status option values, (0 - 2 bits) */
3445 #define COEX_MEDIUM_BUSY (0x0) /* radio belongs to WiMAX */
3446 #define COEX_MEDIUM_ACTIVE (0x1) /* radio belongs to WiFi */
3447 #define COEX_MEDIUM_PRE_RELEASE (0x2) /* received radio release */
3448 #define COEX_MEDIUM_MSK (0x7)
3450 /* send notification status (1 bit) */
3451 #define COEX_MEDIUM_CHANGED (0x8)
3452 #define COEX_MEDIUM_CHANGED_MSK (0x8)
3453 #define COEX_MEDIUM_SHIFT (3)
3455 struct iwl_coex_medium_notification {
3456 __le32 status;
3457 __le32 events;
3458 } __packed;
3461 * Coexistence EVENT Command
3462 * COEX_EVENT_CMD = 0x5c
3464 * send from host to uCode for coex event request.
3466 /* flags options */
3467 #define COEX_EVENT_REQUEST_MSK (0x1)
3469 struct iwl_coex_event_cmd {
3470 u8 flags;
3471 u8 event;
3472 __le16 reserved;
3473 } __packed;
3475 struct iwl_coex_event_resp {
3476 __le32 status;
3477 } __packed;
3480 /******************************************************************************
3481 * Bluetooth Coexistence commands
3483 *****************************************************************************/
3486 * BT Status notification
3487 * REPLY_BT_COEX_PROFILE_NOTIF = 0xce
3489 enum iwl_bt_coex_profile_traffic_load {
3490 IWL_BT_COEX_TRAFFIC_LOAD_NONE = 0,
3491 IWL_BT_COEX_TRAFFIC_LOAD_LOW = 1,
3492 IWL_BT_COEX_TRAFFIC_LOAD_HIGH = 2,
3493 IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS = 3,
3495 * There are no more even though below is a u8, the
3496 * indication from the BT device only has two bits.
3500 #define BT_SESSION_ACTIVITY_1_UART_MSG 0x1
3501 #define BT_SESSION_ACTIVITY_2_UART_MSG 0x2
3503 /* BT UART message - Share Part (BT -> WiFi) */
3504 #define BT_UART_MSG_FRAME1MSGTYPE_POS (0)
3505 #define BT_UART_MSG_FRAME1MSGTYPE_MSK \
3506 (0x7 << BT_UART_MSG_FRAME1MSGTYPE_POS)
3507 #define BT_UART_MSG_FRAME1SSN_POS (3)
3508 #define BT_UART_MSG_FRAME1SSN_MSK \
3509 (0x3 << BT_UART_MSG_FRAME1SSN_POS)
3510 #define BT_UART_MSG_FRAME1UPDATEREQ_POS (5)
3511 #define BT_UART_MSG_FRAME1UPDATEREQ_MSK \
3512 (0x1 << BT_UART_MSG_FRAME1UPDATEREQ_POS)
3513 #define BT_UART_MSG_FRAME1RESERVED_POS (6)
3514 #define BT_UART_MSG_FRAME1RESERVED_MSK \
3515 (0x3 << BT_UART_MSG_FRAME1RESERVED_POS)
3517 #define BT_UART_MSG_FRAME2OPENCONNECTIONS_POS (0)
3518 #define BT_UART_MSG_FRAME2OPENCONNECTIONS_MSK \
3519 (0x3 << BT_UART_MSG_FRAME2OPENCONNECTIONS_POS)
3520 #define BT_UART_MSG_FRAME2TRAFFICLOAD_POS (2)
3521 #define BT_UART_MSG_FRAME2TRAFFICLOAD_MSK \
3522 (0x3 << BT_UART_MSG_FRAME2TRAFFICLOAD_POS)
3523 #define BT_UART_MSG_FRAME2CHLSEQN_POS (4)
3524 #define BT_UART_MSG_FRAME2CHLSEQN_MSK \
3525 (0x1 << BT_UART_MSG_FRAME2CHLSEQN_POS)
3526 #define BT_UART_MSG_FRAME2INBAND_POS (5)
3527 #define BT_UART_MSG_FRAME2INBAND_MSK \
3528 (0x1 << BT_UART_MSG_FRAME2INBAND_POS)
3529 #define BT_UART_MSG_FRAME2RESERVED_POS (6)
3530 #define BT_UART_MSG_FRAME2RESERVED_MSK \
3531 (0x3 << BT_UART_MSG_FRAME2RESERVED_POS)
3533 #define BT_UART_MSG_FRAME3SCOESCO_POS (0)
3534 #define BT_UART_MSG_FRAME3SCOESCO_MSK \
3535 (0x1 << BT_UART_MSG_FRAME3SCOESCO_POS)
3536 #define BT_UART_MSG_FRAME3SNIFF_POS (1)
3537 #define BT_UART_MSG_FRAME3SNIFF_MSK \
3538 (0x1 << BT_UART_MSG_FRAME3SNIFF_POS)
3539 #define BT_UART_MSG_FRAME3A2DP_POS (2)
3540 #define BT_UART_MSG_FRAME3A2DP_MSK \
3541 (0x1 << BT_UART_MSG_FRAME3A2DP_POS)
3542 #define BT_UART_MSG_FRAME3ACL_POS (3)
3543 #define BT_UART_MSG_FRAME3ACL_MSK \
3544 (0x1 << BT_UART_MSG_FRAME3ACL_POS)
3545 #define BT_UART_MSG_FRAME3MASTER_POS (4)
3546 #define BT_UART_MSG_FRAME3MASTER_MSK \
3547 (0x1 << BT_UART_MSG_FRAME3MASTER_POS)
3548 #define BT_UART_MSG_FRAME3OBEX_POS (5)
3549 #define BT_UART_MSG_FRAME3OBEX_MSK \
3550 (0x1 << BT_UART_MSG_FRAME3OBEX_POS)
3551 #define BT_UART_MSG_FRAME3RESERVED_POS (6)
3552 #define BT_UART_MSG_FRAME3RESERVED_MSK \
3553 (0x3 << BT_UART_MSG_FRAME3RESERVED_POS)
3555 #define BT_UART_MSG_FRAME4IDLEDURATION_POS (0)
3556 #define BT_UART_MSG_FRAME4IDLEDURATION_MSK \
3557 (0x3F << BT_UART_MSG_FRAME4IDLEDURATION_POS)
3558 #define BT_UART_MSG_FRAME4RESERVED_POS (6)
3559 #define BT_UART_MSG_FRAME4RESERVED_MSK \
3560 (0x3 << BT_UART_MSG_FRAME4RESERVED_POS)
3562 #define BT_UART_MSG_FRAME5TXACTIVITY_POS (0)
3563 #define BT_UART_MSG_FRAME5TXACTIVITY_MSK \
3564 (0x3 << BT_UART_MSG_FRAME5TXACTIVITY_POS)
3565 #define BT_UART_MSG_FRAME5RXACTIVITY_POS (2)
3566 #define BT_UART_MSG_FRAME5RXACTIVITY_MSK \
3567 (0x3 << BT_UART_MSG_FRAME5RXACTIVITY_POS)
3568 #define BT_UART_MSG_FRAME5ESCORETRANSMIT_POS (4)
3569 #define BT_UART_MSG_FRAME5ESCORETRANSMIT_MSK \
3570 (0x3 << BT_UART_MSG_FRAME5ESCORETRANSMIT_POS)
3571 #define BT_UART_MSG_FRAME5RESERVED_POS (6)
3572 #define BT_UART_MSG_FRAME5RESERVED_MSK \
3573 (0x3 << BT_UART_MSG_FRAME5RESERVED_POS)
3575 #define BT_UART_MSG_FRAME6SNIFFINTERVAL_POS (0)
3576 #define BT_UART_MSG_FRAME6SNIFFINTERVAL_MSK \
3577 (0x1F << BT_UART_MSG_FRAME6SNIFFINTERVAL_POS)
3578 #define BT_UART_MSG_FRAME6DISCOVERABLE_POS (5)
3579 #define BT_UART_MSG_FRAME6DISCOVERABLE_MSK \
3580 (0x1 << BT_UART_MSG_FRAME6DISCOVERABLE_POS)
3581 #define BT_UART_MSG_FRAME6RESERVED_POS (6)
3582 #define BT_UART_MSG_FRAME6RESERVED_MSK \
3583 (0x3 << BT_UART_MSG_FRAME6RESERVED_POS)
3585 #define BT_UART_MSG_FRAME7SNIFFACTIVITY_POS (0)
3586 #define BT_UART_MSG_FRAME7SNIFFACTIVITY_MSK \
3587 (0x7 << BT_UART_MSG_FRAME7SNIFFACTIVITY_POS)
3588 #define BT_UART_MSG_FRAME7PAGE_POS (3)
3589 #define BT_UART_MSG_FRAME7PAGE_MSK \
3590 (0x1 << BT_UART_MSG_FRAME7PAGE_POS)
3591 #define BT_UART_MSG_FRAME7INQUIRY_POS (4)
3592 #define BT_UART_MSG_FRAME7INQUIRY_MSK \
3593 (0x1 << BT_UART_MSG_FRAME7INQUIRY_POS)
3594 #define BT_UART_MSG_FRAME7CONNECTABLE_POS (5)
3595 #define BT_UART_MSG_FRAME7CONNECTABLE_MSK \
3596 (0x1 << BT_UART_MSG_FRAME7CONNECTABLE_POS)
3597 #define BT_UART_MSG_FRAME7RESERVED_POS (6)
3598 #define BT_UART_MSG_FRAME7RESERVED_MSK \
3599 (0x3 << BT_UART_MSG_FRAME7RESERVED_POS)
3601 /* BT Session Activity 2 UART message (BT -> WiFi) */
3602 #define BT_UART_MSG_2_FRAME1RESERVED1_POS (5)
3603 #define BT_UART_MSG_2_FRAME1RESERVED1_MSK \
3604 (0x1<<BT_UART_MSG_2_FRAME1RESERVED1_POS)
3605 #define BT_UART_MSG_2_FRAME1RESERVED2_POS (6)
3606 #define BT_UART_MSG_2_FRAME1RESERVED2_MSK \
3607 (0x3<<BT_UART_MSG_2_FRAME1RESERVED2_POS)
3609 #define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS (0)
3610 #define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_MSK \
3611 (0x3F<<BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS)
3612 #define BT_UART_MSG_2_FRAME2RESERVED_POS (6)
3613 #define BT_UART_MSG_2_FRAME2RESERVED_MSK \
3614 (0x3<<BT_UART_MSG_2_FRAME2RESERVED_POS)
3616 #define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS (0)
3617 #define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_MSK \
3618 (0xF<<BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS)
3619 #define BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS (4)
3620 #define BT_UART_MSG_2_FRAME3INQPAGESRMODE_MSK \
3621 (0x1<<BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS)
3622 #define BT_UART_MSG_2_FRAME3LEMASTER_POS (5)
3623 #define BT_UART_MSG_2_FRAME3LEMASTER_MSK \
3624 (0x1<<BT_UART_MSG_2_FRAME3LEMASTER_POS)
3625 #define BT_UART_MSG_2_FRAME3RESERVED_POS (6)
3626 #define BT_UART_MSG_2_FRAME3RESERVED_MSK \
3627 (0x3<<BT_UART_MSG_2_FRAME3RESERVED_POS)
3629 #define BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS (0)
3630 #define BT_UART_MSG_2_FRAME4LELASTTXPOWER_MSK \
3631 (0xF<<BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS)
3632 #define BT_UART_MSG_2_FRAME4NUMLECONN_POS (4)
3633 #define BT_UART_MSG_2_FRAME4NUMLECONN_MSK \
3634 (0x3<<BT_UART_MSG_2_FRAME4NUMLECONN_POS)
3635 #define BT_UART_MSG_2_FRAME4RESERVED_POS (6)
3636 #define BT_UART_MSG_2_FRAME4RESERVED_MSK \
3637 (0x3<<BT_UART_MSG_2_FRAME4RESERVED_POS)
3639 #define BT_UART_MSG_2_FRAME5BTMINRSSI_POS (0)
3640 #define BT_UART_MSG_2_FRAME5BTMINRSSI_MSK \
3641 (0xF<<BT_UART_MSG_2_FRAME5BTMINRSSI_POS)
3642 #define BT_UART_MSG_2_FRAME5LESCANINITMODE_POS (4)
3643 #define BT_UART_MSG_2_FRAME5LESCANINITMODE_MSK \
3644 (0x1<<BT_UART_MSG_2_FRAME5LESCANINITMODE_POS)
3645 #define BT_UART_MSG_2_FRAME5LEADVERMODE_POS (5)
3646 #define BT_UART_MSG_2_FRAME5LEADVERMODE_MSK \
3647 (0x1<<BT_UART_MSG_2_FRAME5LEADVERMODE_POS)
3648 #define BT_UART_MSG_2_FRAME5RESERVED_POS (6)
3649 #define BT_UART_MSG_2_FRAME5RESERVED_MSK \
3650 (0x3<<BT_UART_MSG_2_FRAME5RESERVED_POS)
3652 #define BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS (0)
3653 #define BT_UART_MSG_2_FRAME6LECONNINTERVAL_MSK \
3654 (0x1F<<BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS)
3655 #define BT_UART_MSG_2_FRAME6RFU_POS (5)
3656 #define BT_UART_MSG_2_FRAME6RFU_MSK \
3657 (0x1<<BT_UART_MSG_2_FRAME6RFU_POS)
3658 #define BT_UART_MSG_2_FRAME6RESERVED_POS (6)
3659 #define BT_UART_MSG_2_FRAME6RESERVED_MSK \
3660 (0x3<<BT_UART_MSG_2_FRAME6RESERVED_POS)
3662 #define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS (0)
3663 #define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_MSK \
3664 (0x7<<BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS)
3665 #define BT_UART_MSG_2_FRAME7LEPROFILE1_POS (3)
3666 #define BT_UART_MSG_2_FRAME7LEPROFILE1_MSK \
3667 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE1_POS)
3668 #define BT_UART_MSG_2_FRAME7LEPROFILE2_POS (4)
3669 #define BT_UART_MSG_2_FRAME7LEPROFILE2_MSK \
3670 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE2_POS)
3671 #define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS (5)
3672 #define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_MSK \
3673 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS)
3674 #define BT_UART_MSG_2_FRAME7RESERVED_POS (6)
3675 #define BT_UART_MSG_2_FRAME7RESERVED_MSK \
3676 (0x3<<BT_UART_MSG_2_FRAME7RESERVED_POS)
3679 struct iwl_bt_uart_msg {
3680 u8 header;
3681 u8 frame1;
3682 u8 frame2;
3683 u8 frame3;
3684 u8 frame4;
3685 u8 frame5;
3686 u8 frame6;
3687 u8 frame7;
3688 } __attribute__((packed));
3690 struct iwl_bt_coex_profile_notif {
3691 struct iwl_bt_uart_msg last_bt_uart_msg;
3692 u8 bt_status; /* 0 - off, 1 - on */
3693 u8 bt_traffic_load; /* 0 .. 3? */
3694 u8 bt_ci_compliance; /* 0 - not complied, 1 - complied */
3695 u8 reserved;
3696 } __attribute__((packed));
3698 #define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS 0
3699 #define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_MSK 0x1
3700 #define IWL_BT_COEX_PRIO_TBL_PRIO_POS 1
3701 #define IWL_BT_COEX_PRIO_TBL_PRIO_MASK 0x0e
3702 #define IWL_BT_COEX_PRIO_TBL_RESERVED_POS 4
3703 #define IWL_BT_COEX_PRIO_TBL_RESERVED_MASK 0xf0
3704 #define IWL_BT_COEX_PRIO_TBL_PRIO_SHIFT 1
3707 * BT Coexistence Priority table
3708 * REPLY_BT_COEX_PRIO_TABLE = 0xcc
3710 enum bt_coex_prio_table_events {
3711 BT_COEX_PRIO_TBL_EVT_INIT_CALIB1 = 0,
3712 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2 = 1,
3713 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW1 = 2,
3714 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW2 = 3, /* DC calib */
3715 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH1 = 4,
3716 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH2 = 5,
3717 BT_COEX_PRIO_TBL_EVT_DTIM = 6,
3718 BT_COEX_PRIO_TBL_EVT_SCAN52 = 7,
3719 BT_COEX_PRIO_TBL_EVT_SCAN24 = 8,
3720 BT_COEX_PRIO_TBL_EVT_RESERVED0 = 9,
3721 BT_COEX_PRIO_TBL_EVT_RESERVED1 = 10,
3722 BT_COEX_PRIO_TBL_EVT_RESERVED2 = 11,
3723 BT_COEX_PRIO_TBL_EVT_RESERVED3 = 12,
3724 BT_COEX_PRIO_TBL_EVT_RESERVED4 = 13,
3725 BT_COEX_PRIO_TBL_EVT_RESERVED5 = 14,
3726 BT_COEX_PRIO_TBL_EVT_RESERVED6 = 15,
3727 /* BT_COEX_PRIO_TBL_EVT_MAX should always be last */
3728 BT_COEX_PRIO_TBL_EVT_MAX,
3731 enum bt_coex_prio_table_priorities {
3732 BT_COEX_PRIO_TBL_DISABLED = 0,
3733 BT_COEX_PRIO_TBL_PRIO_LOW = 1,
3734 BT_COEX_PRIO_TBL_PRIO_HIGH = 2,
3735 BT_COEX_PRIO_TBL_PRIO_BYPASS = 3,
3736 BT_COEX_PRIO_TBL_PRIO_COEX_OFF = 4,
3737 BT_COEX_PRIO_TBL_PRIO_COEX_ON = 5,
3738 BT_COEX_PRIO_TBL_PRIO_RSRVD1 = 6,
3739 BT_COEX_PRIO_TBL_PRIO_RSRVD2 = 7,
3740 BT_COEX_PRIO_TBL_MAX,
3743 struct iwl_bt_coex_prio_table_cmd {
3744 u8 prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX];
3745 } __attribute__((packed));
3747 #define IWL_BT_COEX_ENV_CLOSE 0
3748 #define IWL_BT_COEX_ENV_OPEN 1
3750 * BT Protection Envelope
3751 * REPLY_BT_COEX_PROT_ENV = 0xcd
3753 struct iwl_bt_coex_prot_env_cmd {
3754 u8 action; /* 0 = closed, 1 = open */
3755 u8 type; /* 0 .. 15 */
3756 u8 reserved[2];
3757 } __attribute__((packed));
3759 /******************************************************************************
3760 * (13)
3761 * Union of all expected notifications/responses:
3763 *****************************************************************************/
3765 struct iwl_rx_packet {
3767 * The first 4 bytes of the RX frame header contain both the RX frame
3768 * size and some flags.
3769 * Bit fields:
3770 * 31: flag flush RB request
3771 * 30: flag ignore TC (terminal counter) request
3772 * 29: flag fast IRQ request
3773 * 28-14: Reserved
3774 * 13-00: RX frame size
3776 __le32 len_n_flags;
3777 struct iwl_cmd_header hdr;
3778 union {
3779 struct iwl_alive_resp alive_frame;
3780 struct iwl_spectrum_notification spectrum_notif;
3781 struct iwl_csa_notification csa_notif;
3782 struct iwl_error_resp err_resp;
3783 struct iwl_card_state_notif card_state_notif;
3784 struct iwl_add_sta_resp add_sta;
3785 struct iwl_rem_sta_resp rem_sta;
3786 struct iwl_sleep_notification sleep_notif;
3787 struct iwl_spectrum_resp spectrum;
3788 struct iwl_notif_statistics stats;
3789 struct iwl_bt_notif_statistics stats_bt;
3790 struct iwl_compressed_ba_resp compressed_ba;
3791 struct iwl_missed_beacon_notif missed_beacon;
3792 struct iwl_coex_medium_notification coex_medium_notif;
3793 struct iwl_coex_event_resp coex_event;
3794 struct iwl_bt_coex_profile_notif bt_coex_profile_notif;
3795 __le32 status;
3796 u8 raw[0];
3797 } u;
3798 } __packed;
3800 int iwl_agn_check_rxon_cmd(struct iwl_priv *priv);
3803 * REPLY_WIPAN_PARAMS = 0xb2 (Commands and Notification)
3807 * Minimum slot time in TU
3809 #define IWL_MIN_SLOT_TIME 20
3812 * struct iwl_wipan_slot
3813 * @width: Time in TU
3814 * @type:
3815 * 0 - BSS
3816 * 1 - PAN
3818 struct iwl_wipan_slot {
3819 __le16 width;
3820 u8 type;
3821 u8 reserved;
3822 } __packed;
3824 #define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_CTS BIT(1) /* reserved */
3825 #define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_QUIET BIT(2) /* reserved */
3826 #define IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE BIT(3) /* reserved */
3827 #define IWL_WIPAN_PARAMS_FLG_FILTER_BEACON_NOTIF BIT(4)
3828 #define IWL_WIPAN_PARAMS_FLG_FULL_SLOTTED_MODE BIT(5)
3831 * struct iwl_wipan_params_cmd
3832 * @flags:
3833 * bit0: reserved
3834 * bit1: CP leave channel with CTS
3835 * bit2: CP leave channel qith Quiet
3836 * bit3: slotted mode
3837 * 1 - work in slotted mode
3838 * 0 - work in non slotted mode
3839 * bit4: filter beacon notification
3840 * bit5: full tx slotted mode. if this flag is set,
3841 * uCode will perform leaving channel methods in context switch
3842 * also when working in same channel mode
3843 * @num_slots: 1 - 10
3845 struct iwl_wipan_params_cmd {
3846 __le16 flags;
3847 u8 reserved;
3848 u8 num_slots;
3849 struct iwl_wipan_slot slots[10];
3850 } __packed;
3853 * REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9
3855 * TODO: Figure out what this is used for,
3856 * it can only switch between 2.4 GHz
3857 * channels!!
3860 struct iwl_wipan_p2p_channel_switch_cmd {
3861 __le16 channel;
3862 __le16 reserved;
3866 * REPLY_WIPAN_NOA_NOTIFICATION = 0xbc
3868 * This is used by the device to notify us of the
3869 * NoA schedule it determined so we can forward it
3870 * to userspace for inclusion in probe responses.
3872 * In beacons, the NoA schedule is simply appended
3873 * to the frame we give the device.
3876 struct iwl_wipan_noa_descriptor {
3877 u8 count;
3878 __le32 duration;
3879 __le32 interval;
3880 __le32 starttime;
3881 } __packed;
3883 struct iwl_wipan_noa_attribute {
3884 u8 id;
3885 __le16 length;
3886 u8 index;
3887 u8 ct_window;
3888 struct iwl_wipan_noa_descriptor descr0, descr1;
3889 u8 reserved;
3890 } __packed;
3892 struct iwl_wipan_noa_notification {
3893 u32 noa_active;
3894 struct iwl_wipan_noa_attribute noa_attribute;
3895 } __packed;
3897 #endif /* __iwl_commands_h__ */