1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2008 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include "net_driver.h"
28 /**************************************************************************
32 **************************************************************************
35 /* Loopback mode names (see LOOPBACK_MODE()) */
36 const unsigned int efx_loopback_mode_max
= LOOPBACK_MAX
;
37 const char *efx_loopback_mode_names
[] = {
38 [LOOPBACK_NONE
] = "NONE",
39 [LOOPBACK_GMAC
] = "GMAC",
40 [LOOPBACK_XGMII
] = "XGMII",
41 [LOOPBACK_XGXS
] = "XGXS",
42 [LOOPBACK_XAUI
] = "XAUI",
43 [LOOPBACK_GPHY
] = "GPHY",
44 [LOOPBACK_PHYXS
] = "PHYXS",
45 [LOOPBACK_PCS
] = "PCS",
46 [LOOPBACK_PMAPMD
] = "PMA/PMD",
47 [LOOPBACK_NETWORK
] = "NETWORK",
50 /* Interrupt mode names (see INT_MODE())) */
51 const unsigned int efx_interrupt_mode_max
= EFX_INT_MODE_MAX
;
52 const char *efx_interrupt_mode_names
[] = {
53 [EFX_INT_MODE_MSIX
] = "MSI-X",
54 [EFX_INT_MODE_MSI
] = "MSI",
55 [EFX_INT_MODE_LEGACY
] = "legacy",
58 const unsigned int efx_reset_type_max
= RESET_TYPE_MAX
;
59 const char *efx_reset_type_names
[] = {
60 [RESET_TYPE_INVISIBLE
] = "INVISIBLE",
61 [RESET_TYPE_ALL
] = "ALL",
62 [RESET_TYPE_WORLD
] = "WORLD",
63 [RESET_TYPE_DISABLE
] = "DISABLE",
64 [RESET_TYPE_TX_WATCHDOG
] = "TX_WATCHDOG",
65 [RESET_TYPE_INT_ERROR
] = "INT_ERROR",
66 [RESET_TYPE_RX_RECOVERY
] = "RX_RECOVERY",
67 [RESET_TYPE_RX_DESC_FETCH
] = "RX_DESC_FETCH",
68 [RESET_TYPE_TX_DESC_FETCH
] = "TX_DESC_FETCH",
69 [RESET_TYPE_TX_SKIP
] = "TX_SKIP",
72 #define EFX_MAX_MTU (9 * 1024)
74 /* RX slow fill workqueue. If memory allocation fails in the fast path,
75 * a work item is pushed onto this work queue to retry the allocation later,
76 * to avoid the NIC being starved of RX buffers. Since this is a per cpu
77 * workqueue, there is nothing to be gained in making it per NIC
79 static struct workqueue_struct
*refill_workqueue
;
81 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
82 * queued onto this work queue. This is not a per-nic work queue, because
83 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
85 static struct workqueue_struct
*reset_workqueue
;
87 /**************************************************************************
91 *************************************************************************/
94 * Use separate channels for TX and RX events
96 * Set this to 1 to use separate channels for TX and RX. It allows us
97 * to control interrupt affinity separately for TX and RX.
99 * This is only used in MSI-X interrupt mode
101 static unsigned int separate_tx_channels
;
102 module_param(separate_tx_channels
, uint
, 0644);
103 MODULE_PARM_DESC(separate_tx_channels
,
104 "Use separate channels for TX and RX");
106 /* This is the weight assigned to each of the (per-channel) virtual
109 static int napi_weight
= 64;
111 /* This is the time (in jiffies) between invocations of the hardware
112 * monitor, which checks for known hardware bugs and resets the
113 * hardware and driver as necessary.
115 unsigned int efx_monitor_interval
= 1 * HZ
;
117 /* This controls whether or not the driver will initialise devices
118 * with invalid MAC addresses stored in the EEPROM or flash. If true,
119 * such devices will be initialised with a random locally-generated
120 * MAC address. This allows for loading the sfc_mtd driver to
121 * reprogram the flash, even if the flash contents (including the MAC
122 * address) have previously been erased.
124 static unsigned int allow_bad_hwaddr
;
126 /* Initial interrupt moderation settings. They can be modified after
127 * module load with ethtool.
129 * The default for RX should strike a balance between increasing the
130 * round-trip latency and reducing overhead.
132 static unsigned int rx_irq_mod_usec
= 60;
134 /* Initial interrupt moderation settings. They can be modified after
135 * module load with ethtool.
137 * This default is chosen to ensure that a 10G link does not go idle
138 * while a TX queue is stopped after it has become full. A queue is
139 * restarted when it drops below half full. The time this takes (assuming
140 * worst case 3 descriptors per packet and 1024 descriptors) is
141 * 512 / 3 * 1.2 = 205 usec.
143 static unsigned int tx_irq_mod_usec
= 150;
145 /* This is the first interrupt mode to try out of:
150 static unsigned int interrupt_mode
;
152 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
153 * i.e. the number of CPUs among which we may distribute simultaneous
154 * interrupt handling.
156 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
157 * The default (0) means to assign an interrupt to each package (level II cache)
159 static unsigned int rss_cpus
;
160 module_param(rss_cpus
, uint
, 0444);
161 MODULE_PARM_DESC(rss_cpus
, "Number of CPUs to use for Receive-Side Scaling");
163 static int phy_flash_cfg
;
164 module_param(phy_flash_cfg
, int, 0644);
165 MODULE_PARM_DESC(phy_flash_cfg
, "Set PHYs into reflash mode initially");
167 static unsigned irq_adapt_low_thresh
= 10000;
168 module_param(irq_adapt_low_thresh
, uint
, 0644);
169 MODULE_PARM_DESC(irq_adapt_low_thresh
,
170 "Threshold score for reducing IRQ moderation");
172 static unsigned irq_adapt_high_thresh
= 20000;
173 module_param(irq_adapt_high_thresh
, uint
, 0644);
174 MODULE_PARM_DESC(irq_adapt_high_thresh
,
175 "Threshold score for increasing IRQ moderation");
177 /**************************************************************************
179 * Utility functions and prototypes
181 *************************************************************************/
182 static void efx_remove_channel(struct efx_channel
*channel
);
183 static void efx_remove_port(struct efx_nic
*efx
);
184 static void efx_fini_napi(struct efx_nic
*efx
);
185 static void efx_fini_channels(struct efx_nic
*efx
);
187 #define EFX_ASSERT_RESET_SERIALISED(efx) \
189 if ((efx->state == STATE_RUNNING) || \
190 (efx->state == STATE_DISABLED)) \
194 /**************************************************************************
196 * Event queue processing
198 *************************************************************************/
200 /* Process channel's event queue
202 * This function is responsible for processing the event queue of a
203 * single channel. The caller must guarantee that this function will
204 * never be concurrently called more than once on the same channel,
205 * though different channels may be being processed concurrently.
207 static int efx_process_channel(struct efx_channel
*channel
, int rx_quota
)
209 struct efx_nic
*efx
= channel
->efx
;
212 if (unlikely(efx
->reset_pending
!= RESET_TYPE_NONE
||
216 rx_packets
= falcon_process_eventq(channel
, rx_quota
);
220 /* Deliver last RX packet. */
221 if (channel
->rx_pkt
) {
222 __efx_rx_packet(channel
, channel
->rx_pkt
,
223 channel
->rx_pkt_csummed
);
224 channel
->rx_pkt
= NULL
;
227 efx_rx_strategy(channel
);
229 efx_fast_push_rx_descriptors(&efx
->rx_queue
[channel
->channel
]);
234 /* Mark channel as finished processing
236 * Note that since we will not receive further interrupts for this
237 * channel before we finish processing and call the eventq_read_ack()
238 * method, there is no need to use the interrupt hold-off timers.
240 static inline void efx_channel_processed(struct efx_channel
*channel
)
242 /* The interrupt handler for this channel may set work_pending
243 * as soon as we acknowledge the events we've seen. Make sure
244 * it's cleared before then. */
245 channel
->work_pending
= false;
248 falcon_eventq_read_ack(channel
);
253 * NAPI guarantees serialisation of polls of the same device, which
254 * provides the guarantee required by efx_process_channel().
256 static int efx_poll(struct napi_struct
*napi
, int budget
)
258 struct efx_channel
*channel
=
259 container_of(napi
, struct efx_channel
, napi_str
);
262 EFX_TRACE(channel
->efx
, "channel %d NAPI poll executing on CPU %d\n",
263 channel
->channel
, raw_smp_processor_id());
265 rx_packets
= efx_process_channel(channel
, budget
);
267 if (rx_packets
< budget
) {
268 struct efx_nic
*efx
= channel
->efx
;
270 if (channel
->used_flags
& EFX_USED_BY_RX
&&
271 efx
->irq_rx_adaptive
&&
272 unlikely(++channel
->irq_count
== 1000)) {
273 if (unlikely(channel
->irq_mod_score
<
274 irq_adapt_low_thresh
)) {
275 if (channel
->irq_moderation
> 1) {
276 channel
->irq_moderation
-= 1;
277 efx
->type
->push_irq_moderation(channel
);
279 } else if (unlikely(channel
->irq_mod_score
>
280 irq_adapt_high_thresh
)) {
281 if (channel
->irq_moderation
<
282 efx
->irq_rx_moderation
) {
283 channel
->irq_moderation
+= 1;
284 efx
->type
->push_irq_moderation(channel
);
287 channel
->irq_count
= 0;
288 channel
->irq_mod_score
= 0;
291 /* There is no race here; although napi_disable() will
292 * only wait for napi_complete(), this isn't a problem
293 * since efx_channel_processed() will have no effect if
294 * interrupts have already been disabled.
297 efx_channel_processed(channel
);
303 /* Process the eventq of the specified channel immediately on this CPU
305 * Disable hardware generated interrupts, wait for any existing
306 * processing to finish, then directly poll (and ack ) the eventq.
307 * Finally reenable NAPI and interrupts.
309 * Since we are touching interrupts the caller should hold the suspend lock
311 void efx_process_channel_now(struct efx_channel
*channel
)
313 struct efx_nic
*efx
= channel
->efx
;
315 BUG_ON(!channel
->used_flags
);
316 BUG_ON(!channel
->enabled
);
318 /* Disable interrupts and wait for ISRs to complete */
319 falcon_disable_interrupts(efx
);
321 synchronize_irq(efx
->legacy_irq
);
323 synchronize_irq(channel
->irq
);
325 /* Wait for any NAPI processing to complete */
326 napi_disable(&channel
->napi_str
);
328 /* Poll the channel */
329 efx_process_channel(channel
, EFX_EVQ_SIZE
);
331 /* Ack the eventq. This may cause an interrupt to be generated
332 * when they are reenabled */
333 efx_channel_processed(channel
);
335 napi_enable(&channel
->napi_str
);
336 falcon_enable_interrupts(efx
);
339 /* Create event queue
340 * Event queue memory allocations are done only once. If the channel
341 * is reset, the memory buffer will be reused; this guards against
342 * errors during channel reset and also simplifies interrupt handling.
344 static int efx_probe_eventq(struct efx_channel
*channel
)
346 EFX_LOG(channel
->efx
, "chan %d create event queue\n", channel
->channel
);
348 return falcon_probe_eventq(channel
);
351 /* Prepare channel's event queue */
352 static void efx_init_eventq(struct efx_channel
*channel
)
354 EFX_LOG(channel
->efx
, "chan %d init event queue\n", channel
->channel
);
356 channel
->eventq_read_ptr
= 0;
358 falcon_init_eventq(channel
);
361 static void efx_fini_eventq(struct efx_channel
*channel
)
363 EFX_LOG(channel
->efx
, "chan %d fini event queue\n", channel
->channel
);
365 falcon_fini_eventq(channel
);
368 static void efx_remove_eventq(struct efx_channel
*channel
)
370 EFX_LOG(channel
->efx
, "chan %d remove event queue\n", channel
->channel
);
372 falcon_remove_eventq(channel
);
375 /**************************************************************************
379 *************************************************************************/
381 static int efx_probe_channel(struct efx_channel
*channel
)
383 struct efx_tx_queue
*tx_queue
;
384 struct efx_rx_queue
*rx_queue
;
387 EFX_LOG(channel
->efx
, "creating channel %d\n", channel
->channel
);
389 rc
= efx_probe_eventq(channel
);
393 efx_for_each_channel_tx_queue(tx_queue
, channel
) {
394 rc
= efx_probe_tx_queue(tx_queue
);
399 efx_for_each_channel_rx_queue(rx_queue
, channel
) {
400 rc
= efx_probe_rx_queue(rx_queue
);
405 channel
->n_rx_frm_trunc
= 0;
410 efx_for_each_channel_rx_queue(rx_queue
, channel
)
411 efx_remove_rx_queue(rx_queue
);
413 efx_for_each_channel_tx_queue(tx_queue
, channel
)
414 efx_remove_tx_queue(tx_queue
);
420 static void efx_set_channel_names(struct efx_nic
*efx
)
422 struct efx_channel
*channel
;
423 const char *type
= "";
426 efx_for_each_channel(channel
, efx
) {
427 number
= channel
->channel
;
428 if (efx
->n_channels
> efx
->n_rx_queues
) {
429 if (channel
->channel
< efx
->n_rx_queues
) {
433 number
-= efx
->n_rx_queues
;
436 snprintf(channel
->name
, sizeof(channel
->name
),
437 "%s%s-%d", efx
->name
, type
, number
);
441 /* Channels are shutdown and reinitialised whilst the NIC is running
442 * to propagate configuration changes (mtu, checksum offload), or
443 * to clear hardware error conditions
445 static void efx_init_channels(struct efx_nic
*efx
)
447 struct efx_tx_queue
*tx_queue
;
448 struct efx_rx_queue
*rx_queue
;
449 struct efx_channel
*channel
;
451 /* Calculate the rx buffer allocation parameters required to
452 * support the current MTU, including padding for header
453 * alignment and overruns.
455 efx
->rx_buffer_len
= (max(EFX_PAGE_IP_ALIGN
, NET_IP_ALIGN
) +
456 EFX_MAX_FRAME_LEN(efx
->net_dev
->mtu
) +
457 efx
->type
->rx_buffer_padding
);
458 efx
->rx_buffer_order
= get_order(efx
->rx_buffer_len
);
460 /* Initialise the channels */
461 efx_for_each_channel(channel
, efx
) {
462 EFX_LOG(channel
->efx
, "init chan %d\n", channel
->channel
);
464 efx_init_eventq(channel
);
466 efx_for_each_channel_tx_queue(tx_queue
, channel
)
467 efx_init_tx_queue(tx_queue
);
469 /* The rx buffer allocation strategy is MTU dependent */
470 efx_rx_strategy(channel
);
472 efx_for_each_channel_rx_queue(rx_queue
, channel
)
473 efx_init_rx_queue(rx_queue
);
475 WARN_ON(channel
->rx_pkt
!= NULL
);
476 efx_rx_strategy(channel
);
480 /* This enables event queue processing and packet transmission.
482 * Note that this function is not allowed to fail, since that would
483 * introduce too much complexity into the suspend/resume path.
485 static void efx_start_channel(struct efx_channel
*channel
)
487 struct efx_rx_queue
*rx_queue
;
489 EFX_LOG(channel
->efx
, "starting chan %d\n", channel
->channel
);
491 /* The interrupt handler for this channel may set work_pending
492 * as soon as we enable it. Make sure it's cleared before
493 * then. Similarly, make sure it sees the enabled flag set. */
494 channel
->work_pending
= false;
495 channel
->enabled
= true;
498 napi_enable(&channel
->napi_str
);
500 /* Load up RX descriptors */
501 efx_for_each_channel_rx_queue(rx_queue
, channel
)
502 efx_fast_push_rx_descriptors(rx_queue
);
505 /* This disables event queue processing and packet transmission.
506 * This function does not guarantee that all queue processing
507 * (e.g. RX refill) is complete.
509 static void efx_stop_channel(struct efx_channel
*channel
)
511 struct efx_rx_queue
*rx_queue
;
513 if (!channel
->enabled
)
516 EFX_LOG(channel
->efx
, "stop chan %d\n", channel
->channel
);
518 channel
->enabled
= false;
519 napi_disable(&channel
->napi_str
);
521 /* Ensure that any worker threads have exited or will be no-ops */
522 efx_for_each_channel_rx_queue(rx_queue
, channel
) {
523 spin_lock_bh(&rx_queue
->add_lock
);
524 spin_unlock_bh(&rx_queue
->add_lock
);
528 static void efx_fini_channels(struct efx_nic
*efx
)
530 struct efx_channel
*channel
;
531 struct efx_tx_queue
*tx_queue
;
532 struct efx_rx_queue
*rx_queue
;
535 EFX_ASSERT_RESET_SERIALISED(efx
);
536 BUG_ON(efx
->port_enabled
);
538 rc
= falcon_flush_queues(efx
);
540 EFX_ERR(efx
, "failed to flush queues\n");
542 EFX_LOG(efx
, "successfully flushed all queues\n");
544 efx_for_each_channel(channel
, efx
) {
545 EFX_LOG(channel
->efx
, "shut down chan %d\n", channel
->channel
);
547 efx_for_each_channel_rx_queue(rx_queue
, channel
)
548 efx_fini_rx_queue(rx_queue
);
549 efx_for_each_channel_tx_queue(tx_queue
, channel
)
550 efx_fini_tx_queue(tx_queue
);
551 efx_fini_eventq(channel
);
555 static void efx_remove_channel(struct efx_channel
*channel
)
557 struct efx_tx_queue
*tx_queue
;
558 struct efx_rx_queue
*rx_queue
;
560 EFX_LOG(channel
->efx
, "destroy chan %d\n", channel
->channel
);
562 efx_for_each_channel_rx_queue(rx_queue
, channel
)
563 efx_remove_rx_queue(rx_queue
);
564 efx_for_each_channel_tx_queue(tx_queue
, channel
)
565 efx_remove_tx_queue(tx_queue
);
566 efx_remove_eventq(channel
);
568 channel
->used_flags
= 0;
571 void efx_schedule_slow_fill(struct efx_rx_queue
*rx_queue
, int delay
)
573 queue_delayed_work(refill_workqueue
, &rx_queue
->work
, delay
);
576 /**************************************************************************
580 **************************************************************************/
582 /* This ensures that the kernel is kept informed (via
583 * netif_carrier_on/off) of the link status, and also maintains the
584 * link status's stop on the port's TX queue.
586 void efx_link_status_changed(struct efx_nic
*efx
)
588 struct efx_link_state
*link_state
= &efx
->link_state
;
590 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
591 * that no events are triggered between unregister_netdev() and the
592 * driver unloading. A more general condition is that NETDEV_CHANGE
593 * can only be generated between NETDEV_UP and NETDEV_DOWN */
594 if (!netif_running(efx
->net_dev
))
597 if (efx
->port_inhibited
) {
598 netif_carrier_off(efx
->net_dev
);
602 if (link_state
->up
!= netif_carrier_ok(efx
->net_dev
)) {
603 efx
->n_link_state_changes
++;
606 netif_carrier_on(efx
->net_dev
);
608 netif_carrier_off(efx
->net_dev
);
611 /* Status message for kernel log */
612 if (link_state
->up
) {
613 EFX_INFO(efx
, "link up at %uMbps %s-duplex (MTU %d)%s\n",
614 link_state
->speed
, link_state
->fd
? "full" : "half",
616 (efx
->promiscuous
? " [PROMISC]" : ""));
618 EFX_INFO(efx
, "link down\n");
623 static void efx_fini_port(struct efx_nic
*efx
);
625 /* This call reinitialises the MAC to pick up new PHY settings. The
626 * caller must hold the mac_lock */
627 void __efx_reconfigure_port(struct efx_nic
*efx
)
629 WARN_ON(!mutex_is_locked(&efx
->mac_lock
));
631 EFX_LOG(efx
, "reconfiguring MAC from PHY settings on CPU %d\n",
632 raw_smp_processor_id());
634 /* Serialise the promiscuous flag with efx_set_multicast_list. */
635 if (efx_dev_registered(efx
)) {
636 netif_addr_lock_bh(efx
->net_dev
);
637 netif_addr_unlock_bh(efx
->net_dev
);
640 efx
->type
->stop_stats(efx
);
641 falcon_deconfigure_mac_wrapper(efx
);
643 /* Reconfigure the PHY, disabling transmit in mac level loopback. */
644 if (LOOPBACK_INTERNAL(efx
))
645 efx
->phy_mode
|= PHY_MODE_TX_DISABLED
;
647 efx
->phy_mode
&= ~PHY_MODE_TX_DISABLED
;
648 efx
->phy_op
->reconfigure(efx
);
650 if (falcon_switch_mac(efx
))
653 efx
->mac_op
->reconfigure(efx
);
655 efx
->type
->start_stats(efx
);
657 /* Inform kernel of loss/gain of carrier */
658 efx_link_status_changed(efx
);
662 EFX_ERR(efx
, "failed to reconfigure MAC\n");
663 efx
->port_enabled
= false;
667 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
669 void efx_reconfigure_port(struct efx_nic
*efx
)
671 EFX_ASSERT_RESET_SERIALISED(efx
);
673 mutex_lock(&efx
->mac_lock
);
674 __efx_reconfigure_port(efx
);
675 mutex_unlock(&efx
->mac_lock
);
678 /* Asynchronous work item for changing MAC promiscuity and multicast
679 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
681 static void efx_mac_work(struct work_struct
*data
)
683 struct efx_nic
*efx
= container_of(data
, struct efx_nic
, mac_work
);
685 mutex_lock(&efx
->mac_lock
);
686 if (efx
->port_enabled
) {
687 efx
->type
->push_multicast_hash(efx
);
688 efx
->mac_op
->reconfigure(efx
);
690 mutex_unlock(&efx
->mac_lock
);
693 static int efx_probe_port(struct efx_nic
*efx
)
697 EFX_LOG(efx
, "create port\n");
699 /* Connect up MAC/PHY operations table */
700 rc
= efx
->type
->probe_port(efx
);
705 efx
->phy_mode
= PHY_MODE_SPECIAL
;
707 /* Sanity check MAC address */
708 if (is_valid_ether_addr(efx
->mac_address
)) {
709 memcpy(efx
->net_dev
->dev_addr
, efx
->mac_address
, ETH_ALEN
);
711 EFX_ERR(efx
, "invalid MAC address %pM\n",
713 if (!allow_bad_hwaddr
) {
717 random_ether_addr(efx
->net_dev
->dev_addr
);
718 EFX_INFO(efx
, "using locally-generated MAC %pM\n",
719 efx
->net_dev
->dev_addr
);
725 efx_remove_port(efx
);
729 static int efx_init_port(struct efx_nic
*efx
)
733 EFX_LOG(efx
, "init port\n");
735 mutex_lock(&efx
->mac_lock
);
737 rc
= efx
->phy_op
->init(efx
);
740 efx
->phy_op
->reconfigure(efx
);
741 rc
= falcon_switch_mac(efx
);
744 efx
->mac_op
->reconfigure(efx
);
746 efx
->port_initialized
= true;
748 mutex_unlock(&efx
->mac_lock
);
752 efx
->phy_op
->fini(efx
);
754 mutex_unlock(&efx
->mac_lock
);
758 static void efx_start_port(struct efx_nic
*efx
)
760 EFX_LOG(efx
, "start port\n");
761 BUG_ON(efx
->port_enabled
);
763 mutex_lock(&efx
->mac_lock
);
764 efx
->port_enabled
= true;
766 /* efx_mac_work() might have been scheduled after efx_stop_port(),
767 * and then cancelled by efx_flush_all() */
768 efx
->type
->push_multicast_hash(efx
);
769 efx
->mac_op
->reconfigure(efx
);
771 mutex_unlock(&efx
->mac_lock
);
774 /* Prevent efx_mac_work() and efx_monitor() from working */
775 static void efx_stop_port(struct efx_nic
*efx
)
777 EFX_LOG(efx
, "stop port\n");
779 mutex_lock(&efx
->mac_lock
);
780 efx
->port_enabled
= false;
781 mutex_unlock(&efx
->mac_lock
);
783 /* Serialise against efx_set_multicast_list() */
784 if (efx_dev_registered(efx
)) {
785 netif_addr_lock_bh(efx
->net_dev
);
786 netif_addr_unlock_bh(efx
->net_dev
);
790 static void efx_fini_port(struct efx_nic
*efx
)
792 EFX_LOG(efx
, "shut down port\n");
794 if (!efx
->port_initialized
)
797 efx
->phy_op
->fini(efx
);
798 efx
->port_initialized
= false;
800 efx
->link_state
.up
= false;
801 efx_link_status_changed(efx
);
804 static void efx_remove_port(struct efx_nic
*efx
)
806 EFX_LOG(efx
, "destroying port\n");
808 efx
->type
->remove_port(efx
);
811 /**************************************************************************
815 **************************************************************************/
817 /* This configures the PCI device to enable I/O and DMA. */
818 static int efx_init_io(struct efx_nic
*efx
)
820 struct pci_dev
*pci_dev
= efx
->pci_dev
;
821 dma_addr_t dma_mask
= efx
->type
->max_dma_mask
;
824 EFX_LOG(efx
, "initialising I/O\n");
826 rc
= pci_enable_device(pci_dev
);
828 EFX_ERR(efx
, "failed to enable PCI device\n");
832 pci_set_master(pci_dev
);
834 /* Set the PCI DMA mask. Try all possibilities from our
835 * genuine mask down to 32 bits, because some architectures
836 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
837 * masks event though they reject 46 bit masks.
839 while (dma_mask
> 0x7fffffffUL
) {
840 if (pci_dma_supported(pci_dev
, dma_mask
) &&
841 ((rc
= pci_set_dma_mask(pci_dev
, dma_mask
)) == 0))
846 EFX_ERR(efx
, "could not find a suitable DMA mask\n");
849 EFX_LOG(efx
, "using DMA mask %llx\n", (unsigned long long) dma_mask
);
850 rc
= pci_set_consistent_dma_mask(pci_dev
, dma_mask
);
852 /* pci_set_consistent_dma_mask() is not *allowed* to
853 * fail with a mask that pci_set_dma_mask() accepted,
854 * but just in case...
856 EFX_ERR(efx
, "failed to set consistent DMA mask\n");
860 efx
->membase_phys
= pci_resource_start(efx
->pci_dev
, EFX_MEM_BAR
);
861 rc
= pci_request_region(pci_dev
, EFX_MEM_BAR
, "sfc");
863 EFX_ERR(efx
, "request for memory BAR failed\n");
867 efx
->membase
= ioremap_nocache(efx
->membase_phys
,
868 efx
->type
->mem_map_size
);
870 EFX_ERR(efx
, "could not map memory BAR at %llx+%x\n",
871 (unsigned long long)efx
->membase_phys
,
872 efx
->type
->mem_map_size
);
876 EFX_LOG(efx
, "memory BAR at %llx+%x (virtual %p)\n",
877 (unsigned long long)efx
->membase_phys
,
878 efx
->type
->mem_map_size
, efx
->membase
);
883 pci_release_region(efx
->pci_dev
, EFX_MEM_BAR
);
885 efx
->membase_phys
= 0;
887 pci_disable_device(efx
->pci_dev
);
892 static void efx_fini_io(struct efx_nic
*efx
)
894 EFX_LOG(efx
, "shutting down I/O\n");
897 iounmap(efx
->membase
);
901 if (efx
->membase_phys
) {
902 pci_release_region(efx
->pci_dev
, EFX_MEM_BAR
);
903 efx
->membase_phys
= 0;
906 pci_disable_device(efx
->pci_dev
);
909 /* Get number of RX queues wanted. Return number of online CPU
910 * packages in the expectation that an IRQ balancer will spread
911 * interrupts across them. */
912 static int efx_wanted_rx_queues(void)
914 cpumask_var_t core_mask
;
918 if (unlikely(!zalloc_cpumask_var(&core_mask
, GFP_KERNEL
))) {
920 "sfc: RSS disabled due to allocation failure\n");
925 for_each_online_cpu(cpu
) {
926 if (!cpumask_test_cpu(cpu
, core_mask
)) {
928 cpumask_or(core_mask
, core_mask
,
929 topology_core_cpumask(cpu
));
933 free_cpumask_var(core_mask
);
937 /* Probe the number and type of interrupts we are able to obtain, and
938 * the resulting numbers of channels and RX queues.
940 static void efx_probe_interrupts(struct efx_nic
*efx
)
943 min_t(int, efx
->type
->phys_addr_channels
, EFX_MAX_CHANNELS
);
946 if (efx
->interrupt_mode
== EFX_INT_MODE_MSIX
) {
947 struct msix_entry xentries
[EFX_MAX_CHANNELS
];
951 /* We want one RX queue and interrupt per CPU package
952 * (or as specified by the rss_cpus module parameter).
953 * We will need one channel per interrupt.
955 rx_queues
= rss_cpus
? rss_cpus
: efx_wanted_rx_queues();
956 wanted_ints
= rx_queues
+ (separate_tx_channels
? 1 : 0);
957 wanted_ints
= min(wanted_ints
, max_channels
);
959 for (i
= 0; i
< wanted_ints
; i
++)
960 xentries
[i
].entry
= i
;
961 rc
= pci_enable_msix(efx
->pci_dev
, xentries
, wanted_ints
);
963 EFX_ERR(efx
, "WARNING: Insufficient MSI-X vectors"
964 " available (%d < %d).\n", rc
, wanted_ints
);
965 EFX_ERR(efx
, "WARNING: Performance may be reduced.\n");
966 EFX_BUG_ON_PARANOID(rc
>= wanted_ints
);
968 rc
= pci_enable_msix(efx
->pci_dev
, xentries
,
973 efx
->n_rx_queues
= min(rx_queues
, wanted_ints
);
974 efx
->n_channels
= wanted_ints
;
975 for (i
= 0; i
< wanted_ints
; i
++)
976 efx
->channel
[i
].irq
= xentries
[i
].vector
;
978 /* Fall back to single channel MSI */
979 efx
->interrupt_mode
= EFX_INT_MODE_MSI
;
980 EFX_ERR(efx
, "could not enable MSI-X\n");
984 /* Try single interrupt MSI */
985 if (efx
->interrupt_mode
== EFX_INT_MODE_MSI
) {
986 efx
->n_rx_queues
= 1;
988 rc
= pci_enable_msi(efx
->pci_dev
);
990 efx
->channel
[0].irq
= efx
->pci_dev
->irq
;
992 EFX_ERR(efx
, "could not enable MSI\n");
993 efx
->interrupt_mode
= EFX_INT_MODE_LEGACY
;
997 /* Assume legacy interrupts */
998 if (efx
->interrupt_mode
== EFX_INT_MODE_LEGACY
) {
999 efx
->n_rx_queues
= 1;
1000 efx
->n_channels
= 1 + (separate_tx_channels
? 1 : 0);
1001 efx
->legacy_irq
= efx
->pci_dev
->irq
;
1005 static void efx_remove_interrupts(struct efx_nic
*efx
)
1007 struct efx_channel
*channel
;
1009 /* Remove MSI/MSI-X interrupts */
1010 efx_for_each_channel(channel
, efx
)
1012 pci_disable_msi(efx
->pci_dev
);
1013 pci_disable_msix(efx
->pci_dev
);
1015 /* Remove legacy interrupt */
1016 efx
->legacy_irq
= 0;
1019 static void efx_set_channels(struct efx_nic
*efx
)
1021 struct efx_tx_queue
*tx_queue
;
1022 struct efx_rx_queue
*rx_queue
;
1024 efx_for_each_tx_queue(tx_queue
, efx
) {
1025 if (separate_tx_channels
)
1026 tx_queue
->channel
= &efx
->channel
[efx
->n_channels
-1];
1028 tx_queue
->channel
= &efx
->channel
[0];
1029 tx_queue
->channel
->used_flags
|= EFX_USED_BY_TX
;
1032 efx_for_each_rx_queue(rx_queue
, efx
) {
1033 rx_queue
->channel
= &efx
->channel
[rx_queue
->queue
];
1034 rx_queue
->channel
->used_flags
|= EFX_USED_BY_RX
;
1038 static int efx_probe_nic(struct efx_nic
*efx
)
1042 EFX_LOG(efx
, "creating NIC\n");
1044 /* Carry out hardware-type specific initialisation */
1045 rc
= efx
->type
->probe(efx
);
1049 /* Determine the number of channels and RX queues by trying to hook
1050 * in MSI-X interrupts. */
1051 efx_probe_interrupts(efx
);
1053 efx_set_channels(efx
);
1055 /* Initialise the interrupt moderation settings */
1056 efx_init_irq_moderation(efx
, tx_irq_mod_usec
, rx_irq_mod_usec
, true);
1061 static void efx_remove_nic(struct efx_nic
*efx
)
1063 EFX_LOG(efx
, "destroying NIC\n");
1065 efx_remove_interrupts(efx
);
1066 efx
->type
->remove(efx
);
1069 /**************************************************************************
1071 * NIC startup/shutdown
1073 *************************************************************************/
1075 static int efx_probe_all(struct efx_nic
*efx
)
1077 struct efx_channel
*channel
;
1081 rc
= efx_probe_nic(efx
);
1083 EFX_ERR(efx
, "failed to create NIC\n");
1088 rc
= efx_probe_port(efx
);
1090 EFX_ERR(efx
, "failed to create port\n");
1094 /* Create channels */
1095 efx_for_each_channel(channel
, efx
) {
1096 rc
= efx_probe_channel(channel
);
1098 EFX_ERR(efx
, "failed to create channel %d\n",
1103 efx_set_channel_names(efx
);
1108 efx_for_each_channel(channel
, efx
)
1109 efx_remove_channel(channel
);
1110 efx_remove_port(efx
);
1112 efx_remove_nic(efx
);
1117 /* Called after previous invocation(s) of efx_stop_all, restarts the
1118 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1119 * and ensures that the port is scheduled to be reconfigured.
1120 * This function is safe to call multiple times when the NIC is in any
1122 static void efx_start_all(struct efx_nic
*efx
)
1124 struct efx_channel
*channel
;
1126 EFX_ASSERT_RESET_SERIALISED(efx
);
1128 /* Check that it is appropriate to restart the interface. All
1129 * of these flags are safe to read under just the rtnl lock */
1130 if (efx
->port_enabled
)
1132 if ((efx
->state
!= STATE_RUNNING
) && (efx
->state
!= STATE_INIT
))
1134 if (efx_dev_registered(efx
) && !netif_running(efx
->net_dev
))
1137 /* Mark the port as enabled so port reconfigurations can start, then
1138 * restart the transmit interface early so the watchdog timer stops */
1139 efx_start_port(efx
);
1140 if (efx_dev_registered(efx
))
1141 efx_wake_queue(efx
);
1143 efx_for_each_channel(channel
, efx
)
1144 efx_start_channel(channel
);
1146 falcon_enable_interrupts(efx
);
1148 /* Start the hardware monitor (if there is one) if we're in RUNNING */
1149 if (efx
->state
== STATE_RUNNING
&& efx
->type
->monitor
!= NULL
)
1150 queue_delayed_work(efx
->workqueue
, &efx
->monitor_work
,
1151 efx_monitor_interval
);
1153 efx
->type
->start_stats(efx
);
1156 /* Flush all delayed work. Should only be called when no more delayed work
1157 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1158 * since we're holding the rtnl_lock at this point. */
1159 static void efx_flush_all(struct efx_nic
*efx
)
1161 struct efx_rx_queue
*rx_queue
;
1163 /* Make sure the hardware monitor is stopped */
1164 cancel_delayed_work_sync(&efx
->monitor_work
);
1166 /* Ensure that all RX slow refills are complete. */
1167 efx_for_each_rx_queue(rx_queue
, efx
)
1168 cancel_delayed_work_sync(&rx_queue
->work
);
1170 /* Stop scheduled port reconfigurations */
1171 cancel_work_sync(&efx
->mac_work
);
1174 /* Quiesce hardware and software without bringing the link down.
1175 * Safe to call multiple times, when the nic and interface is in any
1176 * state. The caller is guaranteed to subsequently be in a position
1177 * to modify any hardware and software state they see fit without
1179 static void efx_stop_all(struct efx_nic
*efx
)
1181 struct efx_channel
*channel
;
1183 EFX_ASSERT_RESET_SERIALISED(efx
);
1185 /* port_enabled can be read safely under the rtnl lock */
1186 if (!efx
->port_enabled
)
1189 efx
->type
->stop_stats(efx
);
1191 /* Disable interrupts and wait for ISR to complete */
1192 falcon_disable_interrupts(efx
);
1193 if (efx
->legacy_irq
)
1194 synchronize_irq(efx
->legacy_irq
);
1195 efx_for_each_channel(channel
, efx
) {
1197 synchronize_irq(channel
->irq
);
1200 /* Stop all NAPI processing and synchronous rx refills */
1201 efx_for_each_channel(channel
, efx
)
1202 efx_stop_channel(channel
);
1204 /* Stop all asynchronous port reconfigurations. Since all
1205 * event processing has already been stopped, there is no
1206 * window to loose phy events */
1209 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1212 /* Isolate the MAC from the TX and RX engines, so that queue
1213 * flushes will complete in a timely fashion. */
1214 falcon_deconfigure_mac_wrapper(efx
);
1215 msleep(10); /* Let the Rx FIFO drain */
1216 falcon_drain_tx_fifo(efx
);
1218 /* Stop the kernel transmit interface late, so the watchdog
1219 * timer isn't ticking over the flush */
1220 if (efx_dev_registered(efx
)) {
1221 efx_stop_queue(efx
);
1222 netif_tx_lock_bh(efx
->net_dev
);
1223 netif_tx_unlock_bh(efx
->net_dev
);
1227 static void efx_remove_all(struct efx_nic
*efx
)
1229 struct efx_channel
*channel
;
1231 efx_for_each_channel(channel
, efx
)
1232 efx_remove_channel(channel
);
1233 efx_remove_port(efx
);
1234 efx_remove_nic(efx
);
1237 /**************************************************************************
1239 * Interrupt moderation
1241 **************************************************************************/
1243 static unsigned irq_mod_ticks(int usecs
, int resolution
)
1246 return 0; /* cannot receive interrupts ahead of time :-) */
1247 if (usecs
< resolution
)
1248 return 1; /* never round down to 0 */
1249 return usecs
/ resolution
;
1252 /* Set interrupt moderation parameters */
1253 void efx_init_irq_moderation(struct efx_nic
*efx
, int tx_usecs
, int rx_usecs
,
1256 struct efx_tx_queue
*tx_queue
;
1257 struct efx_rx_queue
*rx_queue
;
1258 unsigned tx_ticks
= irq_mod_ticks(tx_usecs
, FALCON_IRQ_MOD_RESOLUTION
);
1259 unsigned rx_ticks
= irq_mod_ticks(rx_usecs
, FALCON_IRQ_MOD_RESOLUTION
);
1261 EFX_ASSERT_RESET_SERIALISED(efx
);
1263 efx_for_each_tx_queue(tx_queue
, efx
)
1264 tx_queue
->channel
->irq_moderation
= tx_ticks
;
1266 efx
->irq_rx_adaptive
= rx_adaptive
;
1267 efx
->irq_rx_moderation
= rx_ticks
;
1268 efx_for_each_rx_queue(rx_queue
, efx
)
1269 rx_queue
->channel
->irq_moderation
= rx_ticks
;
1272 /**************************************************************************
1276 **************************************************************************/
1278 /* Run periodically off the general workqueue. Serialised against
1279 * efx_reconfigure_port via the mac_lock */
1280 static void efx_monitor(struct work_struct
*data
)
1282 struct efx_nic
*efx
= container_of(data
, struct efx_nic
,
1285 EFX_TRACE(efx
, "hardware monitor executing on CPU %d\n",
1286 raw_smp_processor_id());
1287 BUG_ON(efx
->type
->monitor
== NULL
);
1289 /* If the mac_lock is already held then it is likely a port
1290 * reconfiguration is already in place, which will likely do
1291 * most of the work of check_hw() anyway. */
1292 if (!mutex_trylock(&efx
->mac_lock
))
1294 if (!efx
->port_enabled
)
1296 efx
->type
->monitor(efx
);
1299 mutex_unlock(&efx
->mac_lock
);
1301 queue_delayed_work(efx
->workqueue
, &efx
->monitor_work
,
1302 efx_monitor_interval
);
1305 /**************************************************************************
1309 *************************************************************************/
1312 * Context: process, rtnl_lock() held.
1314 static int efx_ioctl(struct net_device
*net_dev
, struct ifreq
*ifr
, int cmd
)
1316 struct efx_nic
*efx
= netdev_priv(net_dev
);
1317 struct mii_ioctl_data
*data
= if_mii(ifr
);
1319 EFX_ASSERT_RESET_SERIALISED(efx
);
1321 /* Convert phy_id from older PRTAD/DEVAD format */
1322 if ((cmd
== SIOCGMIIREG
|| cmd
== SIOCSMIIREG
) &&
1323 (data
->phy_id
& 0xfc00) == 0x0400)
1324 data
->phy_id
^= MDIO_PHY_ID_C45
| 0x0400;
1326 return mdio_mii_ioctl(&efx
->mdio
, data
, cmd
);
1329 /**************************************************************************
1333 **************************************************************************/
1335 static int efx_init_napi(struct efx_nic
*efx
)
1337 struct efx_channel
*channel
;
1339 efx_for_each_channel(channel
, efx
) {
1340 channel
->napi_dev
= efx
->net_dev
;
1341 netif_napi_add(channel
->napi_dev
, &channel
->napi_str
,
1342 efx_poll
, napi_weight
);
1347 static void efx_fini_napi(struct efx_nic
*efx
)
1349 struct efx_channel
*channel
;
1351 efx_for_each_channel(channel
, efx
) {
1352 if (channel
->napi_dev
)
1353 netif_napi_del(&channel
->napi_str
);
1354 channel
->napi_dev
= NULL
;
1358 /**************************************************************************
1360 * Kernel netpoll interface
1362 *************************************************************************/
1364 #ifdef CONFIG_NET_POLL_CONTROLLER
1366 /* Although in the common case interrupts will be disabled, this is not
1367 * guaranteed. However, all our work happens inside the NAPI callback,
1368 * so no locking is required.
1370 static void efx_netpoll(struct net_device
*net_dev
)
1372 struct efx_nic
*efx
= netdev_priv(net_dev
);
1373 struct efx_channel
*channel
;
1375 efx_for_each_channel(channel
, efx
)
1376 efx_schedule_channel(channel
);
1381 /**************************************************************************
1383 * Kernel net device interface
1385 *************************************************************************/
1387 /* Context: process, rtnl_lock() held. */
1388 static int efx_net_open(struct net_device
*net_dev
)
1390 struct efx_nic
*efx
= netdev_priv(net_dev
);
1391 EFX_ASSERT_RESET_SERIALISED(efx
);
1393 EFX_LOG(efx
, "opening device %s on CPU %d\n", net_dev
->name
,
1394 raw_smp_processor_id());
1396 if (efx
->state
== STATE_DISABLED
)
1398 if (efx
->phy_mode
& PHY_MODE_SPECIAL
)
1405 /* Context: process, rtnl_lock() held.
1406 * Note that the kernel will ignore our return code; this method
1407 * should really be a void.
1409 static int efx_net_stop(struct net_device
*net_dev
)
1411 struct efx_nic
*efx
= netdev_priv(net_dev
);
1413 EFX_LOG(efx
, "closing %s on CPU %d\n", net_dev
->name
,
1414 raw_smp_processor_id());
1416 if (efx
->state
!= STATE_DISABLED
) {
1417 /* Stop the device and flush all the channels */
1419 efx_fini_channels(efx
);
1420 efx_init_channels(efx
);
1426 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1427 static struct net_device_stats
*efx_net_stats(struct net_device
*net_dev
)
1429 struct efx_nic
*efx
= netdev_priv(net_dev
);
1430 struct efx_mac_stats
*mac_stats
= &efx
->mac_stats
;
1431 struct net_device_stats
*stats
= &net_dev
->stats
;
1433 spin_lock_bh(&efx
->stats_lock
);
1434 efx
->type
->update_stats(efx
);
1435 spin_unlock_bh(&efx
->stats_lock
);
1437 stats
->rx_packets
= mac_stats
->rx_packets
;
1438 stats
->tx_packets
= mac_stats
->tx_packets
;
1439 stats
->rx_bytes
= mac_stats
->rx_bytes
;
1440 stats
->tx_bytes
= mac_stats
->tx_bytes
;
1441 stats
->multicast
= mac_stats
->rx_multicast
;
1442 stats
->collisions
= mac_stats
->tx_collision
;
1443 stats
->rx_length_errors
= (mac_stats
->rx_gtjumbo
+
1444 mac_stats
->rx_length_error
);
1445 stats
->rx_over_errors
= efx
->n_rx_nodesc_drop_cnt
;
1446 stats
->rx_crc_errors
= mac_stats
->rx_bad
;
1447 stats
->rx_frame_errors
= mac_stats
->rx_align_error
;
1448 stats
->rx_fifo_errors
= mac_stats
->rx_overflow
;
1449 stats
->rx_missed_errors
= mac_stats
->rx_missed
;
1450 stats
->tx_window_errors
= mac_stats
->tx_late_collision
;
1452 stats
->rx_errors
= (stats
->rx_length_errors
+
1453 stats
->rx_over_errors
+
1454 stats
->rx_crc_errors
+
1455 stats
->rx_frame_errors
+
1456 stats
->rx_fifo_errors
+
1457 stats
->rx_missed_errors
+
1458 mac_stats
->rx_symbol_error
);
1459 stats
->tx_errors
= (stats
->tx_window_errors
+
1465 /* Context: netif_tx_lock held, BHs disabled. */
1466 static void efx_watchdog(struct net_device
*net_dev
)
1468 struct efx_nic
*efx
= netdev_priv(net_dev
);
1470 EFX_ERR(efx
, "TX stuck with stop_count=%d port_enabled=%d:"
1471 " resetting channels\n",
1472 atomic_read(&efx
->netif_stop_count
), efx
->port_enabled
);
1474 efx_schedule_reset(efx
, RESET_TYPE_TX_WATCHDOG
);
1478 /* Context: process, rtnl_lock() held. */
1479 static int efx_change_mtu(struct net_device
*net_dev
, int new_mtu
)
1481 struct efx_nic
*efx
= netdev_priv(net_dev
);
1484 EFX_ASSERT_RESET_SERIALISED(efx
);
1486 if (new_mtu
> EFX_MAX_MTU
)
1491 EFX_LOG(efx
, "changing MTU to %d\n", new_mtu
);
1493 efx_fini_channels(efx
);
1494 net_dev
->mtu
= new_mtu
;
1495 efx_init_channels(efx
);
1501 static int efx_set_mac_address(struct net_device
*net_dev
, void *data
)
1503 struct efx_nic
*efx
= netdev_priv(net_dev
);
1504 struct sockaddr
*addr
= data
;
1505 char *new_addr
= addr
->sa_data
;
1507 EFX_ASSERT_RESET_SERIALISED(efx
);
1509 if (!is_valid_ether_addr(new_addr
)) {
1510 EFX_ERR(efx
, "invalid ethernet MAC address requested: %pM\n",
1515 memcpy(net_dev
->dev_addr
, new_addr
, net_dev
->addr_len
);
1517 /* Reconfigure the MAC */
1518 efx_reconfigure_port(efx
);
1523 /* Context: netif_addr_lock held, BHs disabled. */
1524 static void efx_set_multicast_list(struct net_device
*net_dev
)
1526 struct efx_nic
*efx
= netdev_priv(net_dev
);
1527 struct dev_mc_list
*mc_list
= net_dev
->mc_list
;
1528 union efx_multicast_hash
*mc_hash
= &efx
->multicast_hash
;
1533 efx
->promiscuous
= !!(net_dev
->flags
& IFF_PROMISC
);
1535 /* Build multicast hash table */
1536 if (efx
->promiscuous
|| (net_dev
->flags
& IFF_ALLMULTI
)) {
1537 memset(mc_hash
, 0xff, sizeof(*mc_hash
));
1539 memset(mc_hash
, 0x00, sizeof(*mc_hash
));
1540 for (i
= 0; i
< net_dev
->mc_count
; i
++) {
1541 crc
= ether_crc_le(ETH_ALEN
, mc_list
->dmi_addr
);
1542 bit
= crc
& (EFX_MCAST_HASH_ENTRIES
- 1);
1543 set_bit_le(bit
, mc_hash
->byte
);
1544 mc_list
= mc_list
->next
;
1547 /* Broadcast packets go through the multicast hash filter.
1548 * ether_crc_le() of the broadcast address is 0xbe2612ff
1549 * so we always add bit 0xff to the mask.
1551 set_bit_le(0xff, mc_hash
->byte
);
1554 if (efx
->port_enabled
)
1555 queue_work(efx
->workqueue
, &efx
->mac_work
);
1556 /* Otherwise efx_start_port() will do this */
1559 static const struct net_device_ops efx_netdev_ops
= {
1560 .ndo_open
= efx_net_open
,
1561 .ndo_stop
= efx_net_stop
,
1562 .ndo_get_stats
= efx_net_stats
,
1563 .ndo_tx_timeout
= efx_watchdog
,
1564 .ndo_start_xmit
= efx_hard_start_xmit
,
1565 .ndo_validate_addr
= eth_validate_addr
,
1566 .ndo_do_ioctl
= efx_ioctl
,
1567 .ndo_change_mtu
= efx_change_mtu
,
1568 .ndo_set_mac_address
= efx_set_mac_address
,
1569 .ndo_set_multicast_list
= efx_set_multicast_list
,
1570 #ifdef CONFIG_NET_POLL_CONTROLLER
1571 .ndo_poll_controller
= efx_netpoll
,
1575 static void efx_update_name(struct efx_nic
*efx
)
1577 strcpy(efx
->name
, efx
->net_dev
->name
);
1578 efx_mtd_rename(efx
);
1579 efx_set_channel_names(efx
);
1582 static int efx_netdev_event(struct notifier_block
*this,
1583 unsigned long event
, void *ptr
)
1585 struct net_device
*net_dev
= ptr
;
1587 if (net_dev
->netdev_ops
== &efx_netdev_ops
&&
1588 event
== NETDEV_CHANGENAME
)
1589 efx_update_name(netdev_priv(net_dev
));
1594 static struct notifier_block efx_netdev_notifier
= {
1595 .notifier_call
= efx_netdev_event
,
1599 show_phy_type(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1601 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
1602 return sprintf(buf
, "%d\n", efx
->phy_type
);
1604 static DEVICE_ATTR(phy_type
, 0644, show_phy_type
, NULL
);
1606 static int efx_register_netdev(struct efx_nic
*efx
)
1608 struct net_device
*net_dev
= efx
->net_dev
;
1611 net_dev
->watchdog_timeo
= 5 * HZ
;
1612 net_dev
->irq
= efx
->pci_dev
->irq
;
1613 net_dev
->netdev_ops
= &efx_netdev_ops
;
1614 SET_NETDEV_DEV(net_dev
, &efx
->pci_dev
->dev
);
1615 SET_ETHTOOL_OPS(net_dev
, &efx_ethtool_ops
);
1617 /* Clear MAC statistics */
1618 efx
->mac_op
->update_stats(efx
);
1619 memset(&efx
->mac_stats
, 0, sizeof(efx
->mac_stats
));
1623 rc
= dev_alloc_name(net_dev
, net_dev
->name
);
1626 efx_update_name(efx
);
1628 rc
= register_netdevice(net_dev
);
1632 /* Always start with carrier off; PHY events will detect the link */
1633 netif_carrier_off(efx
->net_dev
);
1637 rc
= device_create_file(&efx
->pci_dev
->dev
, &dev_attr_phy_type
);
1639 EFX_ERR(efx
, "failed to init net dev attributes\n");
1640 goto fail_registered
;
1647 EFX_ERR(efx
, "could not register net dev\n");
1651 unregister_netdev(net_dev
);
1655 static void efx_unregister_netdev(struct efx_nic
*efx
)
1657 struct efx_tx_queue
*tx_queue
;
1662 BUG_ON(netdev_priv(efx
->net_dev
) != efx
);
1664 /* Free up any skbs still remaining. This has to happen before
1665 * we try to unregister the netdev as running their destructors
1666 * may be needed to get the device ref. count to 0. */
1667 efx_for_each_tx_queue(tx_queue
, efx
)
1668 efx_release_tx_buffers(tx_queue
);
1670 if (efx_dev_registered(efx
)) {
1671 strlcpy(efx
->name
, pci_name(efx
->pci_dev
), sizeof(efx
->name
));
1672 device_remove_file(&efx
->pci_dev
->dev
, &dev_attr_phy_type
);
1673 unregister_netdev(efx
->net_dev
);
1677 /**************************************************************************
1679 * Device reset and suspend
1681 **************************************************************************/
1683 /* Tears down the entire software state and most of the hardware state
1685 void efx_reset_down(struct efx_nic
*efx
, enum reset_type method
,
1686 struct ethtool_cmd
*ecmd
)
1688 EFX_ASSERT_RESET_SERIALISED(efx
);
1691 mutex_lock(&efx
->mac_lock
);
1692 mutex_lock(&efx
->spi_lock
);
1694 efx
->phy_op
->get_settings(efx
, ecmd
);
1696 efx_fini_channels(efx
);
1697 if (efx
->port_initialized
&& method
!= RESET_TYPE_INVISIBLE
)
1698 efx
->phy_op
->fini(efx
);
1699 efx
->type
->fini(efx
);
1702 /* This function will always ensure that the locks acquired in
1703 * efx_reset_down() are released. A failure return code indicates
1704 * that we were unable to reinitialise the hardware, and the
1705 * driver should be disabled. If ok is false, then the rx and tx
1706 * engines are not restarted, pending a RESET_DISABLE. */
1707 int efx_reset_up(struct efx_nic
*efx
, enum reset_type method
,
1708 struct ethtool_cmd
*ecmd
, bool ok
)
1712 EFX_ASSERT_RESET_SERIALISED(efx
);
1714 rc
= efx
->type
->init(efx
);
1716 EFX_ERR(efx
, "failed to initialise NIC\n");
1720 if (efx
->port_initialized
&& method
!= RESET_TYPE_INVISIBLE
) {
1722 rc
= efx
->phy_op
->init(efx
);
1727 efx
->port_initialized
= false;
1731 efx_init_channels(efx
);
1733 if (efx
->phy_op
->set_settings(efx
, ecmd
))
1734 EFX_ERR(efx
, "could not restore PHY settings\n");
1737 mutex_unlock(&efx
->spi_lock
);
1738 mutex_unlock(&efx
->mac_lock
);
1745 /* Reset the NIC as transparently as possible. Do not reset the PHY
1746 * Note that the reset may fail, in which case the card will be left
1747 * in a most-probably-unusable state.
1749 * This function will sleep. You cannot reset from within an atomic
1750 * state; use efx_schedule_reset() instead.
1752 * Grabs the rtnl_lock.
1754 static int efx_reset(struct efx_nic
*efx
)
1756 struct ethtool_cmd ecmd
;
1757 enum reset_type method
= efx
->reset_pending
;
1760 /* Serialise with kernel interfaces */
1763 /* If we're not RUNNING then don't reset. Leave the reset_pending
1764 * flag set so that efx_pci_probe_main will be retried */
1765 if (efx
->state
!= STATE_RUNNING
) {
1766 EFX_INFO(efx
, "scheduled reset quenched. NIC not RUNNING\n");
1770 EFX_INFO(efx
, "resetting (%s)\n", RESET_TYPE(method
));
1772 efx_reset_down(efx
, method
, &ecmd
);
1774 rc
= efx
->type
->reset(efx
, method
);
1776 EFX_ERR(efx
, "failed to reset hardware\n");
1780 /* Allow resets to be rescheduled. */
1781 efx
->reset_pending
= RESET_TYPE_NONE
;
1783 /* Reinitialise bus-mastering, which may have been turned off before
1784 * the reset was scheduled. This is still appropriate, even in the
1785 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
1786 * can respond to requests. */
1787 pci_set_master(efx
->pci_dev
);
1789 /* Leave device stopped if necessary */
1790 if (method
== RESET_TYPE_DISABLE
) {
1791 efx_reset_up(efx
, method
, &ecmd
, false);
1794 rc
= efx_reset_up(efx
, method
, &ecmd
, true);
1799 EFX_ERR(efx
, "has been disabled\n");
1800 efx
->state
= STATE_DISABLED
;
1801 dev_close(efx
->net_dev
);
1803 EFX_LOG(efx
, "reset complete\n");
1811 /* The worker thread exists so that code that cannot sleep can
1812 * schedule a reset for later.
1814 static void efx_reset_work(struct work_struct
*data
)
1816 struct efx_nic
*nic
= container_of(data
, struct efx_nic
, reset_work
);
1821 void efx_schedule_reset(struct efx_nic
*efx
, enum reset_type type
)
1823 enum reset_type method
;
1825 if (efx
->reset_pending
!= RESET_TYPE_NONE
) {
1826 EFX_INFO(efx
, "quenching already scheduled reset\n");
1831 case RESET_TYPE_INVISIBLE
:
1832 case RESET_TYPE_ALL
:
1833 case RESET_TYPE_WORLD
:
1834 case RESET_TYPE_DISABLE
:
1837 case RESET_TYPE_RX_RECOVERY
:
1838 case RESET_TYPE_RX_DESC_FETCH
:
1839 case RESET_TYPE_TX_DESC_FETCH
:
1840 case RESET_TYPE_TX_SKIP
:
1841 method
= RESET_TYPE_INVISIBLE
;
1844 method
= RESET_TYPE_ALL
;
1849 EFX_LOG(efx
, "scheduling %s reset for %s\n",
1850 RESET_TYPE(method
), RESET_TYPE(type
));
1852 EFX_LOG(efx
, "scheduling %s reset\n", RESET_TYPE(method
));
1854 efx
->reset_pending
= method
;
1856 queue_work(reset_workqueue
, &efx
->reset_work
);
1859 /**************************************************************************
1861 * List of NICs we support
1863 **************************************************************************/
1865 /* PCI device ID table */
1866 static struct pci_device_id efx_pci_table
[] __devinitdata
= {
1867 {PCI_DEVICE(EFX_VENDID_SFC
, FALCON_A_P_DEVID
),
1868 .driver_data
= (unsigned long) &falcon_a1_nic_type
},
1869 {PCI_DEVICE(EFX_VENDID_SFC
, FALCON_B_P_DEVID
),
1870 .driver_data
= (unsigned long) &falcon_b0_nic_type
},
1871 {0} /* end of list */
1874 /**************************************************************************
1876 * Dummy PHY/MAC operations
1878 * Can be used for some unimplemented operations
1879 * Needed so all function pointers are valid and do not have to be tested
1882 **************************************************************************/
1883 int efx_port_dummy_op_int(struct efx_nic
*efx
)
1887 void efx_port_dummy_op_void(struct efx_nic
*efx
) {}
1888 void efx_port_dummy_op_set_id_led(struct efx_nic
*efx
, enum efx_led_mode mode
)
1891 bool efx_port_dummy_op_poll(struct efx_nic
*efx
)
1896 static struct efx_phy_operations efx_dummy_phy_operations
= {
1897 .init
= efx_port_dummy_op_int
,
1898 .reconfigure
= efx_port_dummy_op_void
,
1899 .poll
= efx_port_dummy_op_poll
,
1900 .fini
= efx_port_dummy_op_void
,
1903 /**************************************************************************
1907 **************************************************************************/
1909 /* This zeroes out and then fills in the invariants in a struct
1910 * efx_nic (including all sub-structures).
1912 static int efx_init_struct(struct efx_nic
*efx
, struct efx_nic_type
*type
,
1913 struct pci_dev
*pci_dev
, struct net_device
*net_dev
)
1915 struct efx_channel
*channel
;
1916 struct efx_tx_queue
*tx_queue
;
1917 struct efx_rx_queue
*rx_queue
;
1920 /* Initialise common structures */
1921 memset(efx
, 0, sizeof(*efx
));
1922 spin_lock_init(&efx
->biu_lock
);
1923 mutex_init(&efx
->mdio_lock
);
1924 mutex_init(&efx
->spi_lock
);
1925 INIT_WORK(&efx
->reset_work
, efx_reset_work
);
1926 INIT_DELAYED_WORK(&efx
->monitor_work
, efx_monitor
);
1927 efx
->pci_dev
= pci_dev
;
1928 efx
->state
= STATE_INIT
;
1929 efx
->reset_pending
= RESET_TYPE_NONE
;
1930 strlcpy(efx
->name
, pci_name(pci_dev
), sizeof(efx
->name
));
1932 efx
->net_dev
= net_dev
;
1933 efx
->rx_checksum_enabled
= true;
1934 spin_lock_init(&efx
->netif_stop_lock
);
1935 spin_lock_init(&efx
->stats_lock
);
1936 mutex_init(&efx
->mac_lock
);
1937 efx
->mac_op
= type
->default_mac_ops
;
1938 efx
->phy_op
= &efx_dummy_phy_operations
;
1939 efx
->mdio
.dev
= net_dev
;
1940 INIT_WORK(&efx
->mac_work
, efx_mac_work
);
1941 atomic_set(&efx
->netif_stop_count
, 1);
1943 for (i
= 0; i
< EFX_MAX_CHANNELS
; i
++) {
1944 channel
= &efx
->channel
[i
];
1946 channel
->channel
= i
;
1947 channel
->work_pending
= false;
1949 for (i
= 0; i
< EFX_TX_QUEUE_COUNT
; i
++) {
1950 tx_queue
= &efx
->tx_queue
[i
];
1951 tx_queue
->efx
= efx
;
1952 tx_queue
->queue
= i
;
1953 tx_queue
->buffer
= NULL
;
1954 tx_queue
->channel
= &efx
->channel
[0]; /* for safety */
1955 tx_queue
->tso_headers_free
= NULL
;
1957 for (i
= 0; i
< EFX_MAX_RX_QUEUES
; i
++) {
1958 rx_queue
= &efx
->rx_queue
[i
];
1959 rx_queue
->efx
= efx
;
1960 rx_queue
->queue
= i
;
1961 rx_queue
->channel
= &efx
->channel
[0]; /* for safety */
1962 rx_queue
->buffer
= NULL
;
1963 spin_lock_init(&rx_queue
->add_lock
);
1964 INIT_DELAYED_WORK(&rx_queue
->work
, efx_rx_work
);
1969 /* As close as we can get to guaranteeing that we don't overflow */
1970 BUILD_BUG_ON(EFX_EVQ_SIZE
< EFX_TXQ_SIZE
+ EFX_RXQ_SIZE
);
1972 EFX_BUG_ON_PARANOID(efx
->type
->phys_addr_channels
> EFX_MAX_CHANNELS
);
1974 /* Higher numbered interrupt modes are less capable! */
1975 efx
->interrupt_mode
= max(efx
->type
->max_interrupt_mode
,
1978 /* Would be good to use the net_dev name, but we're too early */
1979 snprintf(efx
->workqueue_name
, sizeof(efx
->workqueue_name
), "sfc%s",
1981 efx
->workqueue
= create_singlethread_workqueue(efx
->workqueue_name
);
1982 if (!efx
->workqueue
)
1988 static void efx_fini_struct(struct efx_nic
*efx
)
1990 if (efx
->workqueue
) {
1991 destroy_workqueue(efx
->workqueue
);
1992 efx
->workqueue
= NULL
;
1996 /**************************************************************************
2000 **************************************************************************/
2002 /* Main body of final NIC shutdown code
2003 * This is called only at module unload (or hotplug removal).
2005 static void efx_pci_remove_main(struct efx_nic
*efx
)
2007 falcon_fini_interrupt(efx
);
2008 efx_fini_channels(efx
);
2010 efx
->type
->fini(efx
);
2012 efx_remove_all(efx
);
2015 /* Final NIC shutdown
2016 * This is called only at module unload (or hotplug removal).
2018 static void efx_pci_remove(struct pci_dev
*pci_dev
)
2020 struct efx_nic
*efx
;
2022 efx
= pci_get_drvdata(pci_dev
);
2026 /* Mark the NIC as fini, then stop the interface */
2028 efx
->state
= STATE_FINI
;
2029 dev_close(efx
->net_dev
);
2031 /* Allow any queued efx_resets() to complete */
2034 efx_unregister_netdev(efx
);
2036 efx_mtd_remove(efx
);
2038 /* Wait for any scheduled resets to complete. No more will be
2039 * scheduled from this point because efx_stop_all() has been
2040 * called, we are no longer registered with driverlink, and
2041 * the net_device's have been removed. */
2042 cancel_work_sync(&efx
->reset_work
);
2044 efx_pci_remove_main(efx
);
2047 EFX_LOG(efx
, "shutdown successful\n");
2049 pci_set_drvdata(pci_dev
, NULL
);
2050 efx_fini_struct(efx
);
2051 free_netdev(efx
->net_dev
);
2054 /* Main body of NIC initialisation
2055 * This is called at module load (or hotplug insertion, theoretically).
2057 static int efx_pci_probe_main(struct efx_nic
*efx
)
2061 /* Do start-of-day initialisation */
2062 rc
= efx_probe_all(efx
);
2066 rc
= efx_init_napi(efx
);
2070 rc
= efx
->type
->init(efx
);
2072 EFX_ERR(efx
, "failed to initialise NIC\n");
2076 rc
= efx_init_port(efx
);
2078 EFX_ERR(efx
, "failed to initialise port\n");
2082 efx_init_channels(efx
);
2084 rc
= falcon_init_interrupt(efx
);
2091 efx_fini_channels(efx
);
2094 efx
->type
->fini(efx
);
2098 efx_remove_all(efx
);
2103 /* NIC initialisation
2105 * This is called at module load (or hotplug insertion,
2106 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2107 * sets up and registers the network devices with the kernel and hooks
2108 * the interrupt service routine. It does not prepare the device for
2109 * transmission; this is left to the first time one of the network
2110 * interfaces is brought up (i.e. efx_net_open).
2112 static int __devinit
efx_pci_probe(struct pci_dev
*pci_dev
,
2113 const struct pci_device_id
*entry
)
2115 struct efx_nic_type
*type
= (struct efx_nic_type
*) entry
->driver_data
;
2116 struct net_device
*net_dev
;
2117 struct efx_nic
*efx
;
2120 /* Allocate and initialise a struct net_device and struct efx_nic */
2121 net_dev
= alloc_etherdev(sizeof(*efx
));
2124 net_dev
->features
|= (NETIF_F_IP_CSUM
| NETIF_F_SG
|
2125 NETIF_F_HIGHDMA
| NETIF_F_TSO
|
2127 /* Mask for features that also apply to VLAN devices */
2128 net_dev
->vlan_features
|= (NETIF_F_ALL_CSUM
| NETIF_F_SG
|
2129 NETIF_F_HIGHDMA
| NETIF_F_TSO
);
2130 efx
= netdev_priv(net_dev
);
2131 pci_set_drvdata(pci_dev
, efx
);
2132 rc
= efx_init_struct(efx
, type
, pci_dev
, net_dev
);
2136 EFX_INFO(efx
, "Solarflare Communications NIC detected\n");
2138 /* Set up basic I/O (BAR mappings etc) */
2139 rc
= efx_init_io(efx
);
2143 /* No serialisation is required with the reset path because
2144 * we're in STATE_INIT. */
2145 for (i
= 0; i
< 5; i
++) {
2146 rc
= efx_pci_probe_main(efx
);
2148 /* Serialise against efx_reset(). No more resets will be
2149 * scheduled since efx_stop_all() has been called, and we
2150 * have not and never have been registered with either
2151 * the rtnetlink or driverlink layers. */
2152 cancel_work_sync(&efx
->reset_work
);
2155 if (efx
->reset_pending
!= RESET_TYPE_NONE
) {
2156 /* If there was a scheduled reset during
2157 * probe, the NIC is probably hosed anyway */
2158 efx_pci_remove_main(efx
);
2165 /* Retry if a recoverably reset event has been scheduled */
2166 if ((efx
->reset_pending
!= RESET_TYPE_INVISIBLE
) &&
2167 (efx
->reset_pending
!= RESET_TYPE_ALL
))
2170 efx
->reset_pending
= RESET_TYPE_NONE
;
2174 EFX_ERR(efx
, "Could not reset NIC\n");
2178 /* Switch to the running state before we expose the device to the OS,
2179 * so that dev_open()|efx_start_all() will actually start the device */
2180 efx
->state
= STATE_RUNNING
;
2182 rc
= efx_register_netdev(efx
);
2186 EFX_LOG(efx
, "initialisation successful\n");
2189 efx_mtd_probe(efx
); /* allowed to fail */
2194 efx_pci_remove_main(efx
);
2199 efx_fini_struct(efx
);
2201 EFX_LOG(efx
, "initialisation failed. rc=%d\n", rc
);
2202 free_netdev(net_dev
);
2206 static struct pci_driver efx_pci_driver
= {
2207 .name
= EFX_DRIVER_NAME
,
2208 .id_table
= efx_pci_table
,
2209 .probe
= efx_pci_probe
,
2210 .remove
= efx_pci_remove
,
2213 /**************************************************************************
2215 * Kernel module interface
2217 *************************************************************************/
2219 module_param(interrupt_mode
, uint
, 0444);
2220 MODULE_PARM_DESC(interrupt_mode
,
2221 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2223 static int __init
efx_init_module(void)
2227 printk(KERN_INFO
"Solarflare NET driver v" EFX_DRIVER_VERSION
"\n");
2229 rc
= register_netdevice_notifier(&efx_netdev_notifier
);
2233 refill_workqueue
= create_workqueue("sfc_refill");
2234 if (!refill_workqueue
) {
2238 reset_workqueue
= create_singlethread_workqueue("sfc_reset");
2239 if (!reset_workqueue
) {
2244 rc
= pci_register_driver(&efx_pci_driver
);
2251 destroy_workqueue(reset_workqueue
);
2253 destroy_workqueue(refill_workqueue
);
2255 unregister_netdevice_notifier(&efx_netdev_notifier
);
2260 static void __exit
efx_exit_module(void)
2262 printk(KERN_INFO
"Solarflare NET driver unloading\n");
2264 pci_unregister_driver(&efx_pci_driver
);
2265 destroy_workqueue(reset_workqueue
);
2266 destroy_workqueue(refill_workqueue
);
2267 unregister_netdevice_notifier(&efx_netdev_notifier
);
2271 module_init(efx_init_module
);
2272 module_exit(efx_exit_module
);
2274 MODULE_AUTHOR("Michael Brown <mbrown@fensystems.co.uk> and "
2275 "Solarflare Communications");
2276 MODULE_DESCRIPTION("Solarflare Communications network driver");
2277 MODULE_LICENSE("GPL");
2278 MODULE_DEVICE_TABLE(pci
, efx_pci_table
);