2 * linux/drivers/serial/pmac_zilog.c
4 * Driver for PowerMac Z85c30 based ESCC cell found in the
5 * "macio" ASICs of various PowerMac models
7 * Copyright (C) 2003 Ben. Herrenschmidt (benh@kernel.crashing.org)
9 * Derived from drivers/macintosh/macserial.c by Paul Mackerras
10 * and drivers/serial/sunzilog.c by David S. Miller
12 * Hrm... actually, I ripped most of sunzilog (Thanks David !) and
13 * adapted special tweaks needed for us. I don't think it's worth
14 * merging back those though. The DMA code still has to get in
15 * and once done, I expect that driver to remain fairly stable in
16 * the long term, unless we change the driver model again...
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
32 * 2004-08-06 Harald Welte <laforge@gnumonks.org>
33 * - Enable BREAK interrupt
34 * - Add support for sysreq
36 * TODO: - Add DMA support
37 * - Defer port shutdown to a few seconds after close
38 * - maybe put something right into uap->clk_divisor
43 #undef USE_CTRL_O_SYSRQ
45 #include <linux/module.h>
46 #include <linux/tty.h>
48 #include <linux/tty_flip.h>
49 #include <linux/major.h>
50 #include <linux/string.h>
51 #include <linux/fcntl.h>
53 #include <linux/kernel.h>
54 #include <linux/delay.h>
55 #include <linux/init.h>
56 #include <linux/console.h>
57 #include <linux/slab.h>
58 #include <linux/adb.h>
59 #include <linux/pmu.h>
60 #include <linux/bitops.h>
61 #include <linux/sysrq.h>
62 #include <linux/mutex.h>
63 #include <asm/sections.h>
67 #include <asm/machdep.h>
68 #include <asm/pmac_feature.h>
69 #include <asm/dbdma.h>
70 #include <asm/macio.h>
72 #if defined (CONFIG_SERIAL_PMACZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
76 #include <linux/serial.h>
77 #include <linux/serial_core.h>
79 #include "pmac_zilog.h"
81 /* Not yet implemented */
84 static char version
[] __initdata
= "pmac_zilog: 0.6 (Benjamin Herrenschmidt <benh@kernel.crashing.org>)";
85 MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
86 MODULE_DESCRIPTION("Driver for the PowerMac serial ports.");
87 MODULE_LICENSE("GPL");
89 #define PWRDBG(fmt, arg...) printk(KERN_DEBUG fmt , ## arg)
91 #ifdef CONFIG_SERIAL_PMACZILOG_TTYS
92 #define PMACZILOG_MAJOR TTY_MAJOR
93 #define PMACZILOG_MINOR 64
94 #define PMACZILOG_NAME "ttyS"
96 #define PMACZILOG_MAJOR 204
97 #define PMACZILOG_MINOR 192
98 #define PMACZILOG_NAME "ttyPZ"
103 * For the sake of early serial console, we can do a pre-probe
104 * (optional) of the ports at rather early boot time.
106 static struct uart_pmac_port pmz_ports
[MAX_ZS_PORTS
];
107 static int pmz_ports_count
;
108 static DEFINE_MUTEX(pmz_irq_mutex
);
110 static struct uart_driver pmz_uart_reg
= {
111 .owner
= THIS_MODULE
,
112 .driver_name
= PMACZILOG_NAME
,
113 .dev_name
= PMACZILOG_NAME
,
114 .major
= PMACZILOG_MAJOR
,
115 .minor
= PMACZILOG_MINOR
,
120 * Load all registers to reprogram the port
121 * This function must only be called when the TX is not busy. The UART
122 * port lock must be held and local interrupts disabled.
124 static void pmz_load_zsregs(struct uart_pmac_port
*uap
, u8
*regs
)
128 if (ZS_IS_ASLEEP(uap
))
131 /* Let pending transmits finish. */
132 for (i
= 0; i
< 1000; i
++) {
133 unsigned char stat
= read_zsreg(uap
, R1
);
145 /* Disable all interrupts. */
147 regs
[R1
] & ~(RxINT_MASK
| TxINT_ENAB
| EXT_INT_ENAB
));
149 /* Set parity, sync config, stop bits, and clock divisor. */
150 write_zsreg(uap
, R4
, regs
[R4
]);
152 /* Set misc. TX/RX control bits. */
153 write_zsreg(uap
, R10
, regs
[R10
]);
155 /* Set TX/RX controls sans the enable bits. */
156 write_zsreg(uap
, R3
, regs
[R3
] & ~RxENABLE
);
157 write_zsreg(uap
, R5
, regs
[R5
] & ~TxENABLE
);
159 /* now set R7 "prime" on ESCC */
160 write_zsreg(uap
, R15
, regs
[R15
] | EN85C30
);
161 write_zsreg(uap
, R7
, regs
[R7P
]);
163 /* make sure we use R7 "non-prime" on ESCC */
164 write_zsreg(uap
, R15
, regs
[R15
] & ~EN85C30
);
166 /* Synchronous mode config. */
167 write_zsreg(uap
, R6
, regs
[R6
]);
168 write_zsreg(uap
, R7
, regs
[R7
]);
170 /* Disable baud generator. */
171 write_zsreg(uap
, R14
, regs
[R14
] & ~BRENAB
);
173 /* Clock mode control. */
174 write_zsreg(uap
, R11
, regs
[R11
]);
176 /* Lower and upper byte of baud rate generator divisor. */
177 write_zsreg(uap
, R12
, regs
[R12
]);
178 write_zsreg(uap
, R13
, regs
[R13
]);
180 /* Now rewrite R14, with BRENAB (if set). */
181 write_zsreg(uap
, R14
, regs
[R14
]);
183 /* Reset external status interrupts. */
184 write_zsreg(uap
, R0
, RES_EXT_INT
);
185 write_zsreg(uap
, R0
, RES_EXT_INT
);
187 /* Rewrite R3/R5, this time without enables masked. */
188 write_zsreg(uap
, R3
, regs
[R3
]);
189 write_zsreg(uap
, R5
, regs
[R5
]);
191 /* Rewrite R1, this time without IRQ enabled masked. */
192 write_zsreg(uap
, R1
, regs
[R1
]);
194 /* Enable interrupts */
195 write_zsreg(uap
, R9
, regs
[R9
]);
199 * We do like sunzilog to avoid disrupting pending Tx
200 * Reprogram the Zilog channel HW registers with the copies found in the
201 * software state struct. If the transmitter is busy, we defer this update
202 * until the next TX complete interrupt. Else, we do it right now.
204 * The UART port lock must be held and local interrupts disabled.
206 static void pmz_maybe_update_regs(struct uart_pmac_port
*uap
)
208 if (!ZS_REGS_HELD(uap
)) {
209 if (ZS_TX_ACTIVE(uap
)) {
210 uap
->flags
|= PMACZILOG_FLAG_REGS_HELD
;
212 pmz_debug("pmz: maybe_update_regs: updating\n");
213 pmz_load_zsregs(uap
, uap
->curregs
);
218 static struct tty_struct
*pmz_receive_chars(struct uart_pmac_port
*uap
)
220 struct tty_struct
*tty
= NULL
;
221 unsigned char ch
, r1
, drop
, error
, flag
;
224 /* The interrupt can be enabled when the port isn't open, typically
225 * that happens when using one port is open and the other closed (stale
226 * interrupt) or when one port is used as a console.
228 if (!ZS_IS_OPEN(uap
)) {
229 pmz_debug("pmz: draining input\n");
230 /* Port is closed, drain input data */
232 if ((++loops
) > 1000)
234 (void)read_zsreg(uap
, R1
);
235 write_zsreg(uap
, R0
, ERR_RES
);
236 (void)read_zsdata(uap
);
237 ch
= read_zsreg(uap
, R0
);
238 if (!(ch
& Rx_CH_AV
))
244 /* Sanity check, make sure the old bug is no longer happening */
245 if (uap
->port
.state
== NULL
|| uap
->port
.state
->port
.tty
== NULL
) {
247 (void)read_zsdata(uap
);
250 tty
= uap
->port
.state
->port
.tty
;
256 r1
= read_zsreg(uap
, R1
);
257 ch
= read_zsdata(uap
);
259 if (r1
& (PAR_ERR
| Rx_OVR
| CRC_ERR
)) {
260 write_zsreg(uap
, R0
, ERR_RES
);
264 ch
&= uap
->parity_mask
;
265 if (ch
== 0 && uap
->flags
& PMACZILOG_FLAG_BREAK
) {
266 uap
->flags
&= ~PMACZILOG_FLAG_BREAK
;
269 #if defined(CONFIG_MAGIC_SYSRQ) && defined(CONFIG_SERIAL_CORE_CONSOLE)
270 #ifdef USE_CTRL_O_SYSRQ
271 /* Handle the SysRq ^O Hack */
273 uap
->port
.sysrq
= jiffies
+ HZ
*5;
276 #endif /* USE_CTRL_O_SYSRQ */
277 if (uap
->port
.sysrq
) {
279 spin_unlock(&uap
->port
.lock
);
280 swallow
= uart_handle_sysrq_char(&uap
->port
, ch
);
281 spin_lock(&uap
->port
.lock
);
285 #endif /* CONFIG_MAGIC_SYSRQ && CONFIG_SERIAL_CORE_CONSOLE */
287 /* A real serial line, record the character and status. */
292 uap
->port
.icount
.rx
++;
294 if (r1
& (PAR_ERR
| Rx_OVR
| CRC_ERR
| BRK_ABRT
)) {
297 pmz_debug("pmz: got break !\n");
298 r1
&= ~(PAR_ERR
| CRC_ERR
);
299 uap
->port
.icount
.brk
++;
300 if (uart_handle_break(&uap
->port
))
303 else if (r1
& PAR_ERR
)
304 uap
->port
.icount
.parity
++;
305 else if (r1
& CRC_ERR
)
306 uap
->port
.icount
.frame
++;
308 uap
->port
.icount
.overrun
++;
309 r1
&= uap
->port
.read_status_mask
;
312 else if (r1
& PAR_ERR
)
314 else if (r1
& CRC_ERR
)
318 if (uap
->port
.ignore_status_mask
== 0xff ||
319 (r1
& uap
->port
.ignore_status_mask
) == 0) {
320 tty_insert_flip_char(tty
, ch
, flag
);
323 tty_insert_flip_char(tty
, 0, TTY_OVERRUN
);
325 /* We can get stuck in an infinite loop getting char 0 when the
326 * line is in a wrong HW state, we break that here.
327 * When that happens, I disable the receive side of the driver.
328 * Note that what I've been experiencing is a real irq loop where
329 * I'm getting flooded regardless of the actual port speed.
330 * Something stange is going on with the HW
332 if ((++loops
) > 1000)
334 ch
= read_zsreg(uap
, R0
);
335 if (!(ch
& Rx_CH_AV
))
341 uap
->curregs
[R1
] &= ~(EXT_INT_ENAB
| TxINT_ENAB
| RxINT_MASK
);
342 write_zsreg(uap
, R1
, uap
->curregs
[R1
]);
344 dev_err(&uap
->dev
->ofdev
.dev
, "pmz: rx irq flood !\n");
348 static void pmz_status_handle(struct uart_pmac_port
*uap
)
350 unsigned char status
;
352 status
= read_zsreg(uap
, R0
);
353 write_zsreg(uap
, R0
, RES_EXT_INT
);
356 if (ZS_IS_OPEN(uap
) && ZS_WANTS_MODEM_STATUS(uap
)) {
357 if (status
& SYNC_HUNT
)
358 uap
->port
.icount
.dsr
++;
360 /* The Zilog just gives us an interrupt when DCD/CTS/etc. change.
361 * But it does not tell us which bit has changed, we have to keep
362 * track of this ourselves.
363 * The CTS input is inverted for some reason. -- paulus
365 if ((status
^ uap
->prev_status
) & DCD
)
366 uart_handle_dcd_change(&uap
->port
,
368 if ((status
^ uap
->prev_status
) & CTS
)
369 uart_handle_cts_change(&uap
->port
,
372 wake_up_interruptible(&uap
->port
.state
->port
.delta_msr_wait
);
375 if (status
& BRK_ABRT
)
376 uap
->flags
|= PMACZILOG_FLAG_BREAK
;
378 uap
->prev_status
= status
;
381 static void pmz_transmit_chars(struct uart_pmac_port
*uap
)
383 struct circ_buf
*xmit
;
385 if (ZS_IS_ASLEEP(uap
))
387 if (ZS_IS_CONS(uap
)) {
388 unsigned char status
= read_zsreg(uap
, R0
);
390 /* TX still busy? Just wait for the next TX done interrupt.
392 * It can occur because of how we do serial console writes. It would
393 * be nice to transmit console writes just like we normally would for
394 * a TTY line. (ie. buffered and TX interrupt driven). That is not
395 * easy because console writes cannot sleep. One solution might be
396 * to poll on enough port->xmit space becomming free. -DaveM
398 if (!(status
& Tx_BUF_EMP
))
402 uap
->flags
&= ~PMACZILOG_FLAG_TX_ACTIVE
;
404 if (ZS_REGS_HELD(uap
)) {
405 pmz_load_zsregs(uap
, uap
->curregs
);
406 uap
->flags
&= ~PMACZILOG_FLAG_REGS_HELD
;
409 if (ZS_TX_STOPPED(uap
)) {
410 uap
->flags
&= ~PMACZILOG_FLAG_TX_STOPPED
;
414 /* Under some circumstances, we see interrupts reported for
415 * a closed channel. The interrupt mask in R1 is clear, but
416 * R3 still signals the interrupts and we see them when taking
417 * an interrupt for the other channel (this could be a qemu
418 * bug but since the ESCC doc doesn't specify precsiely whether
419 * R3 interrup status bits are masked by R1 interrupt enable
420 * bits, better safe than sorry). --BenH.
422 if (!ZS_IS_OPEN(uap
))
425 if (uap
->port
.x_char
) {
426 uap
->flags
|= PMACZILOG_FLAG_TX_ACTIVE
;
427 write_zsdata(uap
, uap
->port
.x_char
);
429 uap
->port
.icount
.tx
++;
430 uap
->port
.x_char
= 0;
434 if (uap
->port
.state
== NULL
)
436 xmit
= &uap
->port
.state
->xmit
;
437 if (uart_circ_empty(xmit
)) {
438 uart_write_wakeup(&uap
->port
);
441 if (uart_tx_stopped(&uap
->port
))
444 uap
->flags
|= PMACZILOG_FLAG_TX_ACTIVE
;
445 write_zsdata(uap
, xmit
->buf
[xmit
->tail
]);
448 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
449 uap
->port
.icount
.tx
++;
451 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
452 uart_write_wakeup(&uap
->port
);
457 write_zsreg(uap
, R0
, RES_Tx_P
);
461 /* Hrm... we register that twice, fixme later.... */
462 static irqreturn_t
pmz_interrupt(int irq
, void *dev_id
)
464 struct uart_pmac_port
*uap
= dev_id
;
465 struct uart_pmac_port
*uap_a
;
466 struct uart_pmac_port
*uap_b
;
468 struct tty_struct
*tty
;
471 uap_a
= pmz_get_port_A(uap
);
474 spin_lock(&uap_a
->port
.lock
);
475 r3
= read_zsreg(uap_a
, R3
);
478 pmz_debug("irq, r3: %x\n", r3
);
482 if (r3
& (CHAEXT
| CHATxIP
| CHARxIP
)) {
483 write_zsreg(uap_a
, R0
, RES_H_IUS
);
486 pmz_status_handle(uap_a
);
488 tty
= pmz_receive_chars(uap_a
);
490 pmz_transmit_chars(uap_a
);
493 spin_unlock(&uap_a
->port
.lock
);
495 tty_flip_buffer_push(tty
);
497 if (uap_b
->node
== NULL
)
500 spin_lock(&uap_b
->port
.lock
);
502 if (r3
& (CHBEXT
| CHBTxIP
| CHBRxIP
)) {
503 write_zsreg(uap_b
, R0
, RES_H_IUS
);
506 pmz_status_handle(uap_b
);
508 tty
= pmz_receive_chars(uap_b
);
510 pmz_transmit_chars(uap_b
);
513 spin_unlock(&uap_b
->port
.lock
);
515 tty_flip_buffer_push(tty
);
519 pmz_debug("irq done.\n");
525 * Peek the status register, lock not held by caller
527 static inline u8
pmz_peek_status(struct uart_pmac_port
*uap
)
532 spin_lock_irqsave(&uap
->port
.lock
, flags
);
533 status
= read_zsreg(uap
, R0
);
534 spin_unlock_irqrestore(&uap
->port
.lock
, flags
);
540 * Check if transmitter is empty
541 * The port lock is not held.
543 static unsigned int pmz_tx_empty(struct uart_port
*port
)
545 struct uart_pmac_port
*uap
= to_pmz(port
);
546 unsigned char status
;
548 if (ZS_IS_ASLEEP(uap
) || uap
->node
== NULL
)
551 status
= pmz_peek_status(to_pmz(port
));
552 if (status
& Tx_BUF_EMP
)
558 * Set Modem Control (RTS & DTR) bits
559 * The port lock is held and interrupts are disabled.
560 * Note: Shall we really filter out RTS on external ports or
561 * should that be dealt at higher level only ?
563 static void pmz_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
565 struct uart_pmac_port
*uap
= to_pmz(port
);
566 unsigned char set_bits
, clear_bits
;
568 /* Do nothing for irda for now... */
571 /* We get called during boot with a port not up yet */
572 if (ZS_IS_ASLEEP(uap
) ||
573 !(ZS_IS_OPEN(uap
) || ZS_IS_CONS(uap
)))
576 set_bits
= clear_bits
= 0;
578 if (ZS_IS_INTMODEM(uap
)) {
579 if (mctrl
& TIOCM_RTS
)
584 if (mctrl
& TIOCM_DTR
)
589 /* NOTE: Not subject to 'transmitter active' rule. */
590 uap
->curregs
[R5
] |= set_bits
;
591 uap
->curregs
[R5
] &= ~clear_bits
;
592 if (ZS_IS_ASLEEP(uap
))
594 write_zsreg(uap
, R5
, uap
->curregs
[R5
]);
595 pmz_debug("pmz_set_mctrl: set bits: %x, clear bits: %x -> %x\n",
596 set_bits
, clear_bits
, uap
->curregs
[R5
]);
601 * Get Modem Control bits (only the input ones, the core will
602 * or that with a cached value of the control ones)
603 * The port lock is held and interrupts are disabled.
605 static unsigned int pmz_get_mctrl(struct uart_port
*port
)
607 struct uart_pmac_port
*uap
= to_pmz(port
);
608 unsigned char status
;
611 if (ZS_IS_ASLEEP(uap
) || uap
->node
== NULL
)
614 status
= read_zsreg(uap
, R0
);
619 if (status
& SYNC_HUNT
)
628 * Stop TX side. Dealt like sunzilog at next Tx interrupt,
629 * though for DMA, we will have to do a bit more.
630 * The port lock is held and interrupts are disabled.
632 static void pmz_stop_tx(struct uart_port
*port
)
634 to_pmz(port
)->flags
|= PMACZILOG_FLAG_TX_STOPPED
;
639 * The port lock is held and interrupts are disabled.
641 static void pmz_start_tx(struct uart_port
*port
)
643 struct uart_pmac_port
*uap
= to_pmz(port
);
644 unsigned char status
;
646 pmz_debug("pmz: start_tx()\n");
648 uap
->flags
|= PMACZILOG_FLAG_TX_ACTIVE
;
649 uap
->flags
&= ~PMACZILOG_FLAG_TX_STOPPED
;
651 if (ZS_IS_ASLEEP(uap
) || uap
->node
== NULL
)
654 status
= read_zsreg(uap
, R0
);
656 /* TX busy? Just wait for the TX done interrupt. */
657 if (!(status
& Tx_BUF_EMP
))
660 /* Send the first character to jump-start the TX done
661 * IRQ sending engine.
664 write_zsdata(uap
, port
->x_char
);
669 struct circ_buf
*xmit
= &port
->state
->xmit
;
671 write_zsdata(uap
, xmit
->buf
[xmit
->tail
]);
673 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
676 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
677 uart_write_wakeup(&uap
->port
);
679 pmz_debug("pmz: start_tx() done.\n");
683 * Stop Rx side, basically disable emitting of
684 * Rx interrupts on the port. We don't disable the rx
685 * side of the chip proper though
686 * The port lock is held.
688 static void pmz_stop_rx(struct uart_port
*port
)
690 struct uart_pmac_port
*uap
= to_pmz(port
);
692 if (ZS_IS_ASLEEP(uap
) || uap
->node
== NULL
)
695 pmz_debug("pmz: stop_rx()()\n");
697 /* Disable all RX interrupts. */
698 uap
->curregs
[R1
] &= ~RxINT_MASK
;
699 pmz_maybe_update_regs(uap
);
701 pmz_debug("pmz: stop_rx() done.\n");
705 * Enable modem status change interrupts
706 * The port lock is held.
708 static void pmz_enable_ms(struct uart_port
*port
)
710 struct uart_pmac_port
*uap
= to_pmz(port
);
711 unsigned char new_reg
;
713 if (ZS_IS_IRDA(uap
) || uap
->node
== NULL
)
715 new_reg
= uap
->curregs
[R15
] | (DCDIE
| SYNCIE
| CTSIE
);
716 if (new_reg
!= uap
->curregs
[R15
]) {
717 uap
->curregs
[R15
] = new_reg
;
719 if (ZS_IS_ASLEEP(uap
))
721 /* NOTE: Not subject to 'transmitter active' rule. */
722 write_zsreg(uap
, R15
, uap
->curregs
[R15
]);
727 * Control break state emission
728 * The port lock is not held.
730 static void pmz_break_ctl(struct uart_port
*port
, int break_state
)
732 struct uart_pmac_port
*uap
= to_pmz(port
);
733 unsigned char set_bits
, clear_bits
, new_reg
;
736 if (uap
->node
== NULL
)
738 set_bits
= clear_bits
= 0;
743 clear_bits
|= SND_BRK
;
745 spin_lock_irqsave(&port
->lock
, flags
);
747 new_reg
= (uap
->curregs
[R5
] | set_bits
) & ~clear_bits
;
748 if (new_reg
!= uap
->curregs
[R5
]) {
749 uap
->curregs
[R5
] = new_reg
;
751 /* NOTE: Not subject to 'transmitter active' rule. */
752 if (ZS_IS_ASLEEP(uap
))
754 write_zsreg(uap
, R5
, uap
->curregs
[R5
]);
757 spin_unlock_irqrestore(&port
->lock
, flags
);
761 * Turn power on or off to the SCC and associated stuff
762 * (port drivers, modem, IR port, etc.)
763 * Returns the number of milliseconds we should wait before
764 * trying to use the port.
766 static int pmz_set_scc_power(struct uart_pmac_port
*uap
, int state
)
772 rc
= pmac_call_feature(
773 PMAC_FTR_SCC_ENABLE
, uap
->node
, uap
->port_type
, 1);
774 pmz_debug("port power on result: %d\n", rc
);
775 if (ZS_IS_INTMODEM(uap
)) {
776 rc
= pmac_call_feature(
777 PMAC_FTR_MODEM_ENABLE
, uap
->node
, 0, 1);
778 delay
= 2500; /* wait for 2.5s before using */
779 pmz_debug("modem power result: %d\n", rc
);
782 /* TODO: Make that depend on a timer, don't power down
785 if (ZS_IS_INTMODEM(uap
)) {
786 rc
= pmac_call_feature(
787 PMAC_FTR_MODEM_ENABLE
, uap
->node
, 0, 0);
788 pmz_debug("port power off result: %d\n", rc
);
790 pmac_call_feature(PMAC_FTR_SCC_ENABLE
, uap
->node
, uap
->port_type
, 0);
796 * FixZeroBug....Works around a bug in the SCC receving channel.
797 * Inspired from Darwin code, 15 Sept. 2000 -DanM
799 * The following sequence prevents a problem that is seen with O'Hare ASICs
800 * (most versions -- also with some Heathrow and Hydra ASICs) where a zero
801 * at the input to the receiver becomes 'stuck' and locks up the receiver.
802 * This problem can occur as a result of a zero bit at the receiver input
803 * coincident with any of the following events:
805 * The SCC is initialized (hardware or software).
806 * A framing error is detected.
807 * The clocking option changes from synchronous or X1 asynchronous
808 * clocking to X16, X32, or X64 asynchronous clocking.
809 * The decoding mode is changed among NRZ, NRZI, FM0, or FM1.
811 * This workaround attempts to recover from the lockup condition by placing
812 * the SCC in synchronous loopback mode with a fast clock before programming
813 * any of the asynchronous modes.
815 static void pmz_fix_zero_bug_scc(struct uart_pmac_port
*uap
)
817 write_zsreg(uap
, 9, ZS_IS_CHANNEL_A(uap
) ? CHRA
: CHRB
);
820 write_zsreg(uap
, 9, (ZS_IS_CHANNEL_A(uap
) ? CHRA
: CHRB
) | NV
);
823 write_zsreg(uap
, 4, X1CLK
| MONSYNC
);
824 write_zsreg(uap
, 3, Rx8
);
825 write_zsreg(uap
, 5, Tx8
| RTS
);
826 write_zsreg(uap
, 9, NV
); /* Didn't we already do this? */
827 write_zsreg(uap
, 11, RCBR
| TCBR
);
828 write_zsreg(uap
, 12, 0);
829 write_zsreg(uap
, 13, 0);
830 write_zsreg(uap
, 14, (LOOPBAK
| BRSRC
));
831 write_zsreg(uap
, 14, (LOOPBAK
| BRSRC
| BRENAB
));
832 write_zsreg(uap
, 3, Rx8
| RxENABLE
);
833 write_zsreg(uap
, 0, RES_EXT_INT
);
834 write_zsreg(uap
, 0, RES_EXT_INT
);
835 write_zsreg(uap
, 0, RES_EXT_INT
); /* to kill some time */
837 /* The channel should be OK now, but it is probably receiving
839 * Switch to asynchronous mode, disable the receiver,
840 * and discard everything in the receive buffer.
842 write_zsreg(uap
, 9, NV
);
843 write_zsreg(uap
, 4, X16CLK
| SB_MASK
);
844 write_zsreg(uap
, 3, Rx8
);
846 while (read_zsreg(uap
, 0) & Rx_CH_AV
) {
847 (void)read_zsreg(uap
, 8);
848 write_zsreg(uap
, 0, RES_EXT_INT
);
849 write_zsreg(uap
, 0, ERR_RES
);
854 * Real startup routine, powers up the hardware and sets up
855 * the SCC. Returns a delay in ms where you need to wait before
856 * actually using the port, this is typically the internal modem
857 * powerup delay. This routine expect the lock to be taken.
859 static int __pmz_startup(struct uart_pmac_port
*uap
)
863 memset(&uap
->curregs
, 0, sizeof(uap
->curregs
));
865 /* Power up the SCC & underlying hardware (modem/irda) */
866 pwr_delay
= pmz_set_scc_power(uap
, 1);
868 /* Nice buggy HW ... */
869 pmz_fix_zero_bug_scc(uap
);
871 /* Reset the channel */
872 uap
->curregs
[R9
] = 0;
873 write_zsreg(uap
, 9, ZS_IS_CHANNEL_A(uap
) ? CHRA
: CHRB
);
876 write_zsreg(uap
, 9, 0);
879 /* Clear the interrupt registers */
880 write_zsreg(uap
, R1
, 0);
881 write_zsreg(uap
, R0
, ERR_RES
);
882 write_zsreg(uap
, R0
, ERR_RES
);
883 write_zsreg(uap
, R0
, RES_H_IUS
);
884 write_zsreg(uap
, R0
, RES_H_IUS
);
886 /* Setup some valid baud rate */
887 uap
->curregs
[R4
] = X16CLK
| SB1
;
888 uap
->curregs
[R3
] = Rx8
;
889 uap
->curregs
[R5
] = Tx8
| RTS
;
890 if (!ZS_IS_IRDA(uap
))
891 uap
->curregs
[R5
] |= DTR
;
892 uap
->curregs
[R12
] = 0;
893 uap
->curregs
[R13
] = 0;
894 uap
->curregs
[R14
] = BRENAB
;
896 /* Clear handshaking, enable BREAK interrupts */
897 uap
->curregs
[R15
] = BRKIE
;
899 /* Master interrupt enable */
900 uap
->curregs
[R9
] |= NV
| MIE
;
902 pmz_load_zsregs(uap
, uap
->curregs
);
904 /* Enable receiver and transmitter. */
905 write_zsreg(uap
, R3
, uap
->curregs
[R3
] |= RxENABLE
);
906 write_zsreg(uap
, R5
, uap
->curregs
[R5
] |= TxENABLE
);
908 /* Remember status for DCD/CTS changes */
909 uap
->prev_status
= read_zsreg(uap
, R0
);
915 static void pmz_irda_reset(struct uart_pmac_port
*uap
)
917 uap
->curregs
[R5
] |= DTR
;
918 write_zsreg(uap
, R5
, uap
->curregs
[R5
]);
921 uap
->curregs
[R5
] &= ~DTR
;
922 write_zsreg(uap
, R5
, uap
->curregs
[R5
]);
928 * This is the "normal" startup routine, using the above one
929 * wrapped with the lock and doing a schedule delay
931 static int pmz_startup(struct uart_port
*port
)
933 struct uart_pmac_port
*uap
= to_pmz(port
);
937 pmz_debug("pmz: startup()\n");
939 if (ZS_IS_ASLEEP(uap
))
941 if (uap
->node
== NULL
)
944 mutex_lock(&pmz_irq_mutex
);
946 uap
->flags
|= PMACZILOG_FLAG_IS_OPEN
;
948 /* A console is never powered down. Else, power up and
949 * initialize the chip
951 if (!ZS_IS_CONS(uap
)) {
952 spin_lock_irqsave(&port
->lock
, flags
);
953 pwr_delay
= __pmz_startup(uap
);
954 spin_unlock_irqrestore(&port
->lock
, flags
);
957 pmz_get_port_A(uap
)->flags
|= PMACZILOG_FLAG_IS_IRQ_ON
;
958 if (request_irq(uap
->port
.irq
, pmz_interrupt
, IRQF_SHARED
, "PowerMac Zilog", uap
)) {
959 dev_err(&uap
->dev
->ofdev
.dev
,
960 "Unable to register zs interrupt handler.\n");
961 pmz_set_scc_power(uap
, 0);
962 mutex_unlock(&pmz_irq_mutex
);
966 mutex_unlock(&pmz_irq_mutex
);
968 /* Right now, we deal with delay by blocking here, I'll be
971 if (pwr_delay
!= 0) {
972 pmz_debug("pmz: delaying %d ms\n", pwr_delay
);
976 /* IrDA reset is done now */
980 /* Enable interrupts emission from the chip */
981 spin_lock_irqsave(&port
->lock
, flags
);
982 uap
->curregs
[R1
] |= INT_ALL_Rx
| TxINT_ENAB
;
983 if (!ZS_IS_EXTCLK(uap
))
984 uap
->curregs
[R1
] |= EXT_INT_ENAB
;
985 write_zsreg(uap
, R1
, uap
->curregs
[R1
]);
986 spin_unlock_irqrestore(&port
->lock
, flags
);
988 pmz_debug("pmz: startup() done.\n");
993 static void pmz_shutdown(struct uart_port
*port
)
995 struct uart_pmac_port
*uap
= to_pmz(port
);
998 pmz_debug("pmz: shutdown()\n");
1000 if (uap
->node
== NULL
)
1003 mutex_lock(&pmz_irq_mutex
);
1005 /* Release interrupt handler */
1006 free_irq(uap
->port
.irq
, uap
);
1008 spin_lock_irqsave(&port
->lock
, flags
);
1010 uap
->flags
&= ~PMACZILOG_FLAG_IS_OPEN
;
1012 if (!ZS_IS_OPEN(uap
->mate
))
1013 pmz_get_port_A(uap
)->flags
&= ~PMACZILOG_FLAG_IS_IRQ_ON
;
1015 /* Disable interrupts */
1016 if (!ZS_IS_ASLEEP(uap
)) {
1017 uap
->curregs
[R1
] &= ~(EXT_INT_ENAB
| TxINT_ENAB
| RxINT_MASK
);
1018 write_zsreg(uap
, R1
, uap
->curregs
[R1
]);
1022 if (ZS_IS_CONS(uap
) || ZS_IS_ASLEEP(uap
)) {
1023 spin_unlock_irqrestore(&port
->lock
, flags
);
1024 mutex_unlock(&pmz_irq_mutex
);
1028 /* Disable receiver and transmitter. */
1029 uap
->curregs
[R3
] &= ~RxENABLE
;
1030 uap
->curregs
[R5
] &= ~TxENABLE
;
1032 /* Disable all interrupts and BRK assertion. */
1033 uap
->curregs
[R5
] &= ~SND_BRK
;
1034 pmz_maybe_update_regs(uap
);
1036 /* Shut the chip down */
1037 pmz_set_scc_power(uap
, 0);
1039 spin_unlock_irqrestore(&port
->lock
, flags
);
1041 mutex_unlock(&pmz_irq_mutex
);
1043 pmz_debug("pmz: shutdown() done.\n");
1046 /* Shared by TTY driver and serial console setup. The port lock is held
1047 * and local interrupts are disabled.
1049 static void pmz_convert_to_zs(struct uart_pmac_port
*uap
, unsigned int cflag
,
1050 unsigned int iflag
, unsigned long baud
)
1055 /* Switch to external clocking for IrDA high clock rates. That
1056 * code could be re-used for Midi interfaces with different
1059 if (baud
>= 115200 && ZS_IS_IRDA(uap
)) {
1060 uap
->curregs
[R4
] = X1CLK
;
1061 uap
->curregs
[R11
] = RCTRxCP
| TCTRxCP
;
1062 uap
->curregs
[R14
] = 0; /* BRG off */
1063 uap
->curregs
[R12
] = 0;
1064 uap
->curregs
[R13
] = 0;
1065 uap
->flags
|= PMACZILOG_FLAG_IS_EXTCLK
;
1068 case ZS_CLOCK
/16: /* 230400 */
1069 uap
->curregs
[R4
] = X16CLK
;
1070 uap
->curregs
[R11
] = 0;
1071 uap
->curregs
[R14
] = 0;
1073 case ZS_CLOCK
/32: /* 115200 */
1074 uap
->curregs
[R4
] = X32CLK
;
1075 uap
->curregs
[R11
] = 0;
1076 uap
->curregs
[R14
] = 0;
1079 uap
->curregs
[R4
] = X16CLK
;
1080 uap
->curregs
[R11
] = TCBR
| RCBR
;
1081 brg
= BPS_TO_BRG(baud
, ZS_CLOCK
/ 16);
1082 uap
->curregs
[R12
] = (brg
& 255);
1083 uap
->curregs
[R13
] = ((brg
>> 8) & 255);
1084 uap
->curregs
[R14
] = BRENAB
;
1086 uap
->flags
&= ~PMACZILOG_FLAG_IS_EXTCLK
;
1089 /* Character size, stop bits, and parity. */
1090 uap
->curregs
[3] &= ~RxN_MASK
;
1091 uap
->curregs
[5] &= ~TxN_MASK
;
1093 switch (cflag
& CSIZE
) {
1095 uap
->curregs
[3] |= Rx5
;
1096 uap
->curregs
[5] |= Tx5
;
1097 uap
->parity_mask
= 0x1f;
1100 uap
->curregs
[3] |= Rx6
;
1101 uap
->curregs
[5] |= Tx6
;
1102 uap
->parity_mask
= 0x3f;
1105 uap
->curregs
[3] |= Rx7
;
1106 uap
->curregs
[5] |= Tx7
;
1107 uap
->parity_mask
= 0x7f;
1111 uap
->curregs
[3] |= Rx8
;
1112 uap
->curregs
[5] |= Tx8
;
1113 uap
->parity_mask
= 0xff;
1116 uap
->curregs
[4] &= ~(SB_MASK
);
1118 uap
->curregs
[4] |= SB2
;
1120 uap
->curregs
[4] |= SB1
;
1122 uap
->curregs
[4] |= PAR_ENAB
;
1124 uap
->curregs
[4] &= ~PAR_ENAB
;
1125 if (!(cflag
& PARODD
))
1126 uap
->curregs
[4] |= PAR_EVEN
;
1128 uap
->curregs
[4] &= ~PAR_EVEN
;
1130 uap
->port
.read_status_mask
= Rx_OVR
;
1132 uap
->port
.read_status_mask
|= CRC_ERR
| PAR_ERR
;
1133 if (iflag
& (BRKINT
| PARMRK
))
1134 uap
->port
.read_status_mask
|= BRK_ABRT
;
1136 uap
->port
.ignore_status_mask
= 0;
1138 uap
->port
.ignore_status_mask
|= CRC_ERR
| PAR_ERR
;
1139 if (iflag
& IGNBRK
) {
1140 uap
->port
.ignore_status_mask
|= BRK_ABRT
;
1142 uap
->port
.ignore_status_mask
|= Rx_OVR
;
1145 if ((cflag
& CREAD
) == 0)
1146 uap
->port
.ignore_status_mask
= 0xff;
1151 * Set the irda codec on the imac to the specified baud rate.
1153 static void pmz_irda_setup(struct uart_pmac_port
*uap
, unsigned long *baud
)
1181 /* The FIR modes aren't really supported at this point, how
1182 * do we select the speed ? via the FCR on KeyLargo ?
1196 /* Wait for transmitter to drain */
1198 while ((read_zsreg(uap
, R0
) & Tx_BUF_EMP
) == 0
1199 || (read_zsreg(uap
, R1
) & ALL_SNT
) == 0) {
1201 dev_err(&uap
->dev
->ofdev
.dev
, "transmitter didn't drain\n");
1207 /* Drain the receiver too */
1209 (void)read_zsdata(uap
);
1210 (void)read_zsdata(uap
);
1211 (void)read_zsdata(uap
);
1213 while (read_zsreg(uap
, R0
) & Rx_CH_AV
) {
1217 dev_err(&uap
->dev
->ofdev
.dev
, "receiver didn't drain\n");
1222 /* Switch to command mode */
1223 uap
->curregs
[R5
] |= DTR
;
1224 write_zsreg(uap
, R5
, uap
->curregs
[R5
]);
1228 /* Switch SCC to 19200 */
1229 pmz_convert_to_zs(uap
, CS8
, 0, 19200);
1230 pmz_load_zsregs(uap
, uap
->curregs
);
1233 /* Write get_version command byte */
1234 write_zsdata(uap
, 1);
1236 while ((read_zsreg(uap
, R0
) & Rx_CH_AV
) == 0) {
1238 dev_err(&uap
->dev
->ofdev
.dev
,
1239 "irda_setup timed out on get_version byte\n");
1244 version
= read_zsdata(uap
);
1247 dev_info(&uap
->dev
->ofdev
.dev
, "IrDA: dongle version %d not supported\n",
1252 /* Send speed mode */
1253 write_zsdata(uap
, cmdbyte
);
1255 while ((read_zsreg(uap
, R0
) & Rx_CH_AV
) == 0) {
1257 dev_err(&uap
->dev
->ofdev
.dev
,
1258 "irda_setup timed out on speed mode byte\n");
1263 t
= read_zsdata(uap
);
1265 dev_err(&uap
->dev
->ofdev
.dev
,
1266 "irda_setup speed mode byte = %x (%x)\n", t
, cmdbyte
);
1268 dev_info(&uap
->dev
->ofdev
.dev
, "IrDA setup for %ld bps, dongle version: %d\n",
1271 (void)read_zsdata(uap
);
1272 (void)read_zsdata(uap
);
1273 (void)read_zsdata(uap
);
1276 /* Switch back to data mode */
1277 uap
->curregs
[R5
] &= ~DTR
;
1278 write_zsreg(uap
, R5
, uap
->curregs
[R5
]);
1281 (void)read_zsdata(uap
);
1282 (void)read_zsdata(uap
);
1283 (void)read_zsdata(uap
);
1287 static void __pmz_set_termios(struct uart_port
*port
, struct ktermios
*termios
,
1288 struct ktermios
*old
)
1290 struct uart_pmac_port
*uap
= to_pmz(port
);
1293 pmz_debug("pmz: set_termios()\n");
1295 if (ZS_IS_ASLEEP(uap
))
1298 memcpy(&uap
->termios_cache
, termios
, sizeof(struct ktermios
));
1300 /* XXX Check which revs of machines actually allow 1 and 4Mb speeds
1301 * on the IR dongle. Note that the IRTTY driver currently doesn't know
1302 * about the FIR mode and high speed modes. So these are unused. For
1303 * implementing proper support for these, we should probably add some
1304 * DMA as well, at least on the Rx side, which isn't a simple thing
1307 if (ZS_IS_IRDA(uap
)) {
1308 /* Calc baud rate */
1309 baud
= uart_get_baud_rate(port
, termios
, old
, 1200, 4000000);
1310 pmz_debug("pmz: switch IRDA to %ld bauds\n", baud
);
1311 /* Cet the irda codec to the right rate */
1312 pmz_irda_setup(uap
, &baud
);
1313 /* Set final baud rate */
1314 pmz_convert_to_zs(uap
, termios
->c_cflag
, termios
->c_iflag
, baud
);
1315 pmz_load_zsregs(uap
, uap
->curregs
);
1318 baud
= uart_get_baud_rate(port
, termios
, old
, 1200, 230400);
1319 pmz_convert_to_zs(uap
, termios
->c_cflag
, termios
->c_iflag
, baud
);
1320 /* Make sure modem status interrupts are correctly configured */
1321 if (UART_ENABLE_MS(&uap
->port
, termios
->c_cflag
)) {
1322 uap
->curregs
[R15
] |= DCDIE
| SYNCIE
| CTSIE
;
1323 uap
->flags
|= PMACZILOG_FLAG_MODEM_STATUS
;
1325 uap
->curregs
[R15
] &= ~(DCDIE
| SYNCIE
| CTSIE
);
1326 uap
->flags
&= ~PMACZILOG_FLAG_MODEM_STATUS
;
1329 /* Load registers to the chip */
1330 pmz_maybe_update_regs(uap
);
1332 uart_update_timeout(port
, termios
->c_cflag
, baud
);
1334 pmz_debug("pmz: set_termios() done.\n");
1337 /* The port lock is not held. */
1338 static void pmz_set_termios(struct uart_port
*port
, struct ktermios
*termios
,
1339 struct ktermios
*old
)
1341 struct uart_pmac_port
*uap
= to_pmz(port
);
1342 unsigned long flags
;
1344 spin_lock_irqsave(&port
->lock
, flags
);
1346 /* Disable IRQs on the port */
1347 uap
->curregs
[R1
] &= ~(EXT_INT_ENAB
| TxINT_ENAB
| RxINT_MASK
);
1348 write_zsreg(uap
, R1
, uap
->curregs
[R1
]);
1350 /* Setup new port configuration */
1351 __pmz_set_termios(port
, termios
, old
);
1353 /* Re-enable IRQs on the port */
1354 if (ZS_IS_OPEN(uap
)) {
1355 uap
->curregs
[R1
] |= INT_ALL_Rx
| TxINT_ENAB
;
1356 if (!ZS_IS_EXTCLK(uap
))
1357 uap
->curregs
[R1
] |= EXT_INT_ENAB
;
1358 write_zsreg(uap
, R1
, uap
->curregs
[R1
]);
1360 spin_unlock_irqrestore(&port
->lock
, flags
);
1363 static const char *pmz_type(struct uart_port
*port
)
1365 struct uart_pmac_port
*uap
= to_pmz(port
);
1367 if (ZS_IS_IRDA(uap
))
1368 return "Z85c30 ESCC - Infrared port";
1369 else if (ZS_IS_INTMODEM(uap
))
1370 return "Z85c30 ESCC - Internal modem";
1371 return "Z85c30 ESCC - Serial port";
1374 /* We do not request/release mappings of the registers here, this
1375 * happens at early serial probe time.
1377 static void pmz_release_port(struct uart_port
*port
)
1381 static int pmz_request_port(struct uart_port
*port
)
1386 /* These do not need to do anything interesting either. */
1387 static void pmz_config_port(struct uart_port
*port
, int flags
)
1391 /* We do not support letting the user mess with the divisor, IRQ, etc. */
1392 static int pmz_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
1397 #ifdef CONFIG_CONSOLE_POLL
1399 static int pmz_poll_get_char(struct uart_port
*port
)
1401 struct uart_pmac_port
*uap
= (struct uart_pmac_port
*)port
;
1403 while ((read_zsreg(uap
, R0
) & Rx_CH_AV
) == 0)
1405 return read_zsdata(uap
);
1408 static void pmz_poll_put_char(struct uart_port
*port
, unsigned char c
)
1410 struct uart_pmac_port
*uap
= (struct uart_pmac_port
*)port
;
1412 /* Wait for the transmit buffer to empty. */
1413 while ((read_zsreg(uap
, R0
) & Tx_BUF_EMP
) == 0)
1415 write_zsdata(uap
, c
);
1420 static struct uart_ops pmz_pops
= {
1421 .tx_empty
= pmz_tx_empty
,
1422 .set_mctrl
= pmz_set_mctrl
,
1423 .get_mctrl
= pmz_get_mctrl
,
1424 .stop_tx
= pmz_stop_tx
,
1425 .start_tx
= pmz_start_tx
,
1426 .stop_rx
= pmz_stop_rx
,
1427 .enable_ms
= pmz_enable_ms
,
1428 .break_ctl
= pmz_break_ctl
,
1429 .startup
= pmz_startup
,
1430 .shutdown
= pmz_shutdown
,
1431 .set_termios
= pmz_set_termios
,
1433 .release_port
= pmz_release_port
,
1434 .request_port
= pmz_request_port
,
1435 .config_port
= pmz_config_port
,
1436 .verify_port
= pmz_verify_port
,
1437 #ifdef CONFIG_CONSOLE_POLL
1438 .poll_get_char
= pmz_poll_get_char
,
1439 .poll_put_char
= pmz_poll_put_char
,
1444 * Setup one port structure after probing, HW is down at this point,
1445 * Unlike sunzilog, we don't need to pre-init the spinlock as we don't
1446 * register our console before uart_add_one_port() is called
1448 static int __init
pmz_init_port(struct uart_pmac_port
*uap
)
1450 struct device_node
*np
= uap
->node
;
1452 const struct slot_names_prop
{
1457 struct resource r_ports
, r_rxdma
, r_txdma
;
1460 * Request & map chip registers
1462 if (of_address_to_resource(np
, 0, &r_ports
))
1464 uap
->port
.mapbase
= r_ports
.start
;
1465 uap
->port
.membase
= ioremap(uap
->port
.mapbase
, 0x1000);
1467 uap
->control_reg
= uap
->port
.membase
;
1468 uap
->data_reg
= uap
->control_reg
+ 0x10;
1471 * Request & map DBDMA registers
1474 if (of_address_to_resource(np
, 1, &r_txdma
) == 0 &&
1475 of_address_to_resource(np
, 2, &r_rxdma
) == 0)
1476 uap
->flags
|= PMACZILOG_FLAG_HAS_DMA
;
1478 memset(&r_txdma
, 0, sizeof(struct resource
));
1479 memset(&r_rxdma
, 0, sizeof(struct resource
));
1481 if (ZS_HAS_DMA(uap
)) {
1482 uap
->tx_dma_regs
= ioremap(r_txdma
.start
, 0x100);
1483 if (uap
->tx_dma_regs
== NULL
) {
1484 uap
->flags
&= ~PMACZILOG_FLAG_HAS_DMA
;
1487 uap
->rx_dma_regs
= ioremap(r_rxdma
.start
, 0x100);
1488 if (uap
->rx_dma_regs
== NULL
) {
1489 iounmap(uap
->tx_dma_regs
);
1490 uap
->tx_dma_regs
= NULL
;
1491 uap
->flags
&= ~PMACZILOG_FLAG_HAS_DMA
;
1494 uap
->tx_dma_irq
= irq_of_parse_and_map(np
, 1);
1495 uap
->rx_dma_irq
= irq_of_parse_and_map(np
, 2);
1502 if (of_device_is_compatible(np
, "cobalt"))
1503 uap
->flags
|= PMACZILOG_FLAG_IS_INTMODEM
;
1504 conn
= of_get_property(np
, "AAPL,connector", &len
);
1505 if (conn
&& (strcmp(conn
, "infrared") == 0))
1506 uap
->flags
|= PMACZILOG_FLAG_IS_IRDA
;
1507 uap
->port_type
= PMAC_SCC_ASYNC
;
1508 /* 1999 Powerbook G3 has slot-names property instead */
1509 slots
= of_get_property(np
, "slot-names", &len
);
1510 if (slots
&& slots
->count
> 0) {
1511 if (strcmp(slots
->name
, "IrDA") == 0)
1512 uap
->flags
|= PMACZILOG_FLAG_IS_IRDA
;
1513 else if (strcmp(slots
->name
, "Modem") == 0)
1514 uap
->flags
|= PMACZILOG_FLAG_IS_INTMODEM
;
1516 if (ZS_IS_IRDA(uap
))
1517 uap
->port_type
= PMAC_SCC_IRDA
;
1518 if (ZS_IS_INTMODEM(uap
)) {
1519 struct device_node
* i2c_modem
=
1520 of_find_node_by_name(NULL
, "i2c-modem");
1523 of_get_property(i2c_modem
, "modem-id", NULL
);
1524 if (mid
) switch(*mid
) {
1531 uap
->port_type
= PMAC_SCC_I2S1
;
1533 printk(KERN_INFO
"pmac_zilog: i2c-modem detected, id: %d\n",
1535 of_node_put(i2c_modem
);
1537 printk(KERN_INFO
"pmac_zilog: serial modem detected\n");
1542 * Init remaining bits of "port" structure
1544 uap
->port
.iotype
= UPIO_MEM
;
1545 uap
->port
.irq
= irq_of_parse_and_map(np
, 0);
1546 uap
->port
.uartclk
= ZS_CLOCK
;
1547 uap
->port
.fifosize
= 1;
1548 uap
->port
.ops
= &pmz_pops
;
1549 uap
->port
.type
= PORT_PMAC_ZILOG
;
1550 uap
->port
.flags
= 0;
1553 * Fixup for the port on Gatwick for which the device-tree has
1554 * missing interrupts. Normally, the macio_dev would contain
1555 * fixed up interrupt info, but we use the device-tree directly
1556 * here due to early probing so we need the fixup too.
1558 if (uap
->port
.irq
== NO_IRQ
&&
1559 np
->parent
&& np
->parent
->parent
&&
1560 of_device_is_compatible(np
->parent
->parent
, "gatwick")) {
1561 /* IRQs on gatwick are offset by 64 */
1562 uap
->port
.irq
= irq_create_mapping(NULL
, 64 + 15);
1563 uap
->tx_dma_irq
= irq_create_mapping(NULL
, 64 + 4);
1564 uap
->rx_dma_irq
= irq_create_mapping(NULL
, 64 + 5);
1567 /* Setup some valid baud rate information in the register
1568 * shadows so we don't write crap there before baud rate is
1569 * first initialized.
1571 pmz_convert_to_zs(uap
, CS8
, 0, 9600);
1577 * Get rid of a port on module removal
1579 static void pmz_dispose_port(struct uart_pmac_port
*uap
)
1581 struct device_node
*np
;
1584 iounmap(uap
->rx_dma_regs
);
1585 iounmap(uap
->tx_dma_regs
);
1586 iounmap(uap
->control_reg
);
1589 memset(uap
, 0, sizeof(struct uart_pmac_port
));
1593 * Called upon match with an escc node in the devive-tree.
1595 static int pmz_attach(struct macio_dev
*mdev
, const struct of_device_id
*match
)
1599 /* Iterate the pmz_ports array to find a matching entry
1601 for (i
= 0; i
< MAX_ZS_PORTS
; i
++)
1602 if (pmz_ports
[i
].node
== mdev
->ofdev
.node
) {
1603 struct uart_pmac_port
*uap
= &pmz_ports
[i
];
1606 dev_set_drvdata(&mdev
->ofdev
.dev
, uap
);
1607 if (macio_request_resources(uap
->dev
, "pmac_zilog"))
1608 printk(KERN_WARNING
"%s: Failed to request resource"
1609 ", port still active\n",
1612 uap
->flags
|= PMACZILOG_FLAG_RSRC_REQUESTED
;
1619 * That one should not be called, macio isn't really a hotswap device,
1620 * we don't expect one of those serial ports to go away...
1622 static int pmz_detach(struct macio_dev
*mdev
)
1624 struct uart_pmac_port
*uap
= dev_get_drvdata(&mdev
->ofdev
.dev
);
1629 if (uap
->flags
& PMACZILOG_FLAG_RSRC_REQUESTED
) {
1630 macio_release_resources(uap
->dev
);
1631 uap
->flags
&= ~PMACZILOG_FLAG_RSRC_REQUESTED
;
1633 dev_set_drvdata(&mdev
->ofdev
.dev
, NULL
);
1640 static int pmz_suspend(struct macio_dev
*mdev
, pm_message_t pm_state
)
1642 struct uart_pmac_port
*uap
= dev_get_drvdata(&mdev
->ofdev
.dev
);
1643 struct uart_state
*state
;
1644 unsigned long flags
;
1647 printk("HRM... pmz_suspend with NULL uap\n");
1651 if (pm_state
.event
== mdev
->ofdev
.dev
.power
.power_state
.event
)
1654 pmz_debug("suspend, switching to state %d\n", pm_state
.event
);
1656 state
= pmz_uart_reg
.state
+ uap
->port
.line
;
1658 mutex_lock(&pmz_irq_mutex
);
1659 mutex_lock(&state
->port
.mutex
);
1661 spin_lock_irqsave(&uap
->port
.lock
, flags
);
1663 if (ZS_IS_OPEN(uap
) || ZS_IS_CONS(uap
)) {
1664 /* Disable receiver and transmitter. */
1665 uap
->curregs
[R3
] &= ~RxENABLE
;
1666 uap
->curregs
[R5
] &= ~TxENABLE
;
1668 /* Disable all interrupts and BRK assertion. */
1669 uap
->curregs
[R1
] &= ~(EXT_INT_ENAB
| TxINT_ENAB
| RxINT_MASK
);
1670 uap
->curregs
[R5
] &= ~SND_BRK
;
1671 pmz_load_zsregs(uap
, uap
->curregs
);
1672 uap
->flags
|= PMACZILOG_FLAG_IS_ASLEEP
;
1676 spin_unlock_irqrestore(&uap
->port
.lock
, flags
);
1678 if (ZS_IS_OPEN(uap
) || ZS_IS_OPEN(uap
->mate
))
1679 if (ZS_IS_ASLEEP(uap
->mate
) && ZS_IS_IRQ_ON(pmz_get_port_A(uap
))) {
1680 pmz_get_port_A(uap
)->flags
&= ~PMACZILOG_FLAG_IS_IRQ_ON
;
1681 disable_irq(uap
->port
.irq
);
1684 if (ZS_IS_CONS(uap
))
1685 uap
->port
.cons
->flags
&= ~CON_ENABLED
;
1687 /* Shut the chip down */
1688 pmz_set_scc_power(uap
, 0);
1690 mutex_unlock(&state
->port
.mutex
);
1691 mutex_unlock(&pmz_irq_mutex
);
1693 pmz_debug("suspend, switching complete\n");
1695 mdev
->ofdev
.dev
.power
.power_state
= pm_state
;
1701 static int pmz_resume(struct macio_dev
*mdev
)
1703 struct uart_pmac_port
*uap
= dev_get_drvdata(&mdev
->ofdev
.dev
);
1704 struct uart_state
*state
;
1705 unsigned long flags
;
1711 if (mdev
->ofdev
.dev
.power
.power_state
.event
== PM_EVENT_ON
)
1714 pmz_debug("resume, switching to state 0\n");
1716 state
= pmz_uart_reg
.state
+ uap
->port
.line
;
1718 mutex_lock(&pmz_irq_mutex
);
1719 mutex_lock(&state
->port
.mutex
);
1721 spin_lock_irqsave(&uap
->port
.lock
, flags
);
1722 if (!ZS_IS_OPEN(uap
) && !ZS_IS_CONS(uap
)) {
1723 spin_unlock_irqrestore(&uap
->port
.lock
, flags
);
1726 pwr_delay
= __pmz_startup(uap
);
1728 /* Take care of config that may have changed while asleep */
1729 __pmz_set_termios(&uap
->port
, &uap
->termios_cache
, NULL
);
1731 if (ZS_IS_OPEN(uap
)) {
1732 /* Enable interrupts */
1733 uap
->curregs
[R1
] |= INT_ALL_Rx
| TxINT_ENAB
;
1734 if (!ZS_IS_EXTCLK(uap
))
1735 uap
->curregs
[R1
] |= EXT_INT_ENAB
;
1736 write_zsreg(uap
, R1
, uap
->curregs
[R1
]);
1739 spin_unlock_irqrestore(&uap
->port
.lock
, flags
);
1741 if (ZS_IS_CONS(uap
))
1742 uap
->port
.cons
->flags
|= CON_ENABLED
;
1744 /* Re-enable IRQ on the controller */
1745 if (ZS_IS_OPEN(uap
) && !ZS_IS_IRQ_ON(pmz_get_port_A(uap
))) {
1746 pmz_get_port_A(uap
)->flags
|= PMACZILOG_FLAG_IS_IRQ_ON
;
1747 enable_irq(uap
->port
.irq
);
1751 mutex_unlock(&state
->port
.mutex
);
1752 mutex_unlock(&pmz_irq_mutex
);
1754 /* Right now, we deal with delay by blocking here, I'll be
1757 if (pwr_delay
!= 0) {
1758 pmz_debug("pmz: delaying %d ms\n", pwr_delay
);
1762 pmz_debug("resume, switching complete\n");
1764 mdev
->ofdev
.dev
.power
.power_state
.event
= PM_EVENT_ON
;
1770 * Probe all ports in the system and build the ports array, we register
1771 * with the serial layer at this point, the macio-type probing is only
1772 * used later to "attach" to the sysfs tree so we get power management
1775 static int __init
pmz_probe(void)
1777 struct device_node
*node_p
, *node_a
, *node_b
, *np
;
1782 * Find all escc chips in the system
1784 node_p
= of_find_node_by_name(NULL
, "escc");
1787 * First get channel A/B node pointers
1789 * TODO: Add routines with proper locking to do that...
1791 node_a
= node_b
= NULL
;
1792 for (np
= NULL
; (np
= of_get_next_child(node_p
, np
)) != NULL
;) {
1793 if (strncmp(np
->name
, "ch-a", 4) == 0)
1794 node_a
= of_node_get(np
);
1795 else if (strncmp(np
->name
, "ch-b", 4) == 0)
1796 node_b
= of_node_get(np
);
1798 if (!node_a
&& !node_b
) {
1799 of_node_put(node_a
);
1800 of_node_put(node_b
);
1801 printk(KERN_ERR
"pmac_zilog: missing node %c for escc %s\n",
1802 (!node_a
) ? 'a' : 'b', node_p
->full_name
);
1807 * Fill basic fields in the port structures
1809 pmz_ports
[count
].mate
= &pmz_ports
[count
+1];
1810 pmz_ports
[count
+1].mate
= &pmz_ports
[count
];
1811 pmz_ports
[count
].flags
= PMACZILOG_FLAG_IS_CHANNEL_A
;
1812 pmz_ports
[count
].node
= node_a
;
1813 pmz_ports
[count
+1].node
= node_b
;
1814 pmz_ports
[count
].port
.line
= count
;
1815 pmz_ports
[count
+1].port
.line
= count
+1;
1818 * Setup the ports for real
1820 rc
= pmz_init_port(&pmz_ports
[count
]);
1821 if (rc
== 0 && node_b
!= NULL
)
1822 rc
= pmz_init_port(&pmz_ports
[count
+1]);
1824 of_node_put(node_a
);
1825 of_node_put(node_b
);
1826 memset(&pmz_ports
[count
], 0, sizeof(struct uart_pmac_port
));
1827 memset(&pmz_ports
[count
+1], 0, sizeof(struct uart_pmac_port
));
1832 node_p
= of_find_node_by_name(node_p
, "escc");
1834 pmz_ports_count
= count
;
1839 #ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE
1841 static void pmz_console_write(struct console
*con
, const char *s
, unsigned int count
);
1842 static int __init
pmz_console_setup(struct console
*co
, char *options
);
1844 static struct console pmz_console
= {
1845 .name
= PMACZILOG_NAME
,
1846 .write
= pmz_console_write
,
1847 .device
= uart_console_device
,
1848 .setup
= pmz_console_setup
,
1849 .flags
= CON_PRINTBUFFER
,
1851 .data
= &pmz_uart_reg
,
1854 #define PMACZILOG_CONSOLE &pmz_console
1855 #else /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
1856 #define PMACZILOG_CONSOLE (NULL)
1857 #endif /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
1860 * Register the driver, console driver and ports with the serial
1863 static int __init
pmz_register(void)
1867 pmz_uart_reg
.nr
= pmz_ports_count
;
1868 pmz_uart_reg
.cons
= PMACZILOG_CONSOLE
;
1871 * Register this driver with the serial core
1873 rc
= uart_register_driver(&pmz_uart_reg
);
1878 * Register each port with the serial core
1880 for (i
= 0; i
< pmz_ports_count
; i
++) {
1881 struct uart_pmac_port
*uport
= &pmz_ports
[i
];
1882 /* NULL node may happen on wallstreet */
1883 if (uport
->node
!= NULL
)
1884 rc
= uart_add_one_port(&pmz_uart_reg
, &uport
->port
);
1892 struct uart_pmac_port
*uport
= &pmz_ports
[i
];
1893 uart_remove_one_port(&pmz_uart_reg
, &uport
->port
);
1895 uart_unregister_driver(&pmz_uart_reg
);
1899 static struct of_device_id pmz_match
[] =
1909 MODULE_DEVICE_TABLE (of
, pmz_match
);
1911 static struct macio_driver pmz_driver
=
1913 .name
= "pmac_zilog",
1914 .match_table
= pmz_match
,
1915 .probe
= pmz_attach
,
1916 .remove
= pmz_detach
,
1917 .suspend
= pmz_suspend
,
1918 .resume
= pmz_resume
,
1921 static int __init
init_pmz(void)
1924 printk(KERN_INFO
"%s\n", version
);
1927 * First, we need to do a direct OF-based probe pass. We
1928 * do that because we want serial console up before the
1929 * macio stuffs calls us back, and since that makes it
1930 * easier to pass the proper number of channels to
1931 * uart_register_driver()
1933 if (pmz_ports_count
== 0)
1937 * Bail early if no port found
1939 if (pmz_ports_count
== 0)
1943 * Now we register with the serial layer
1945 rc
= pmz_register();
1948 "pmac_zilog: Error registering serial device, disabling pmac_zilog.\n"
1949 "pmac_zilog: Did another serial driver already claim the minors?\n");
1950 /* effectively "pmz_unprobe()" */
1951 for (i
=0; i
< pmz_ports_count
; i
++)
1952 pmz_dispose_port(&pmz_ports
[i
]);
1957 * Then we register the macio driver itself
1959 return macio_register_driver(&pmz_driver
);
1962 static void __exit
exit_pmz(void)
1966 /* Get rid of macio-driver (detach from macio) */
1967 macio_unregister_driver(&pmz_driver
);
1969 for (i
= 0; i
< pmz_ports_count
; i
++) {
1970 struct uart_pmac_port
*uport
= &pmz_ports
[i
];
1971 if (uport
->node
!= NULL
) {
1972 uart_remove_one_port(&pmz_uart_reg
, &uport
->port
);
1973 pmz_dispose_port(uport
);
1976 /* Unregister UART driver */
1977 uart_unregister_driver(&pmz_uart_reg
);
1980 #ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE
1982 static void pmz_console_putchar(struct uart_port
*port
, int ch
)
1984 struct uart_pmac_port
*uap
= (struct uart_pmac_port
*)port
;
1986 /* Wait for the transmit buffer to empty. */
1987 while ((read_zsreg(uap
, R0
) & Tx_BUF_EMP
) == 0)
1989 write_zsdata(uap
, ch
);
1993 * Print a string to the serial port trying not to disturb
1994 * any possible real use of the port...
1996 static void pmz_console_write(struct console
*con
, const char *s
, unsigned int count
)
1998 struct uart_pmac_port
*uap
= &pmz_ports
[con
->index
];
1999 unsigned long flags
;
2001 if (ZS_IS_ASLEEP(uap
))
2003 spin_lock_irqsave(&uap
->port
.lock
, flags
);
2005 /* Turn of interrupts and enable the transmitter. */
2006 write_zsreg(uap
, R1
, uap
->curregs
[1] & ~TxINT_ENAB
);
2007 write_zsreg(uap
, R5
, uap
->curregs
[5] | TxENABLE
| RTS
| DTR
);
2009 uart_console_write(&uap
->port
, s
, count
, pmz_console_putchar
);
2011 /* Restore the values in the registers. */
2012 write_zsreg(uap
, R1
, uap
->curregs
[1]);
2013 /* Don't disable the transmitter. */
2015 spin_unlock_irqrestore(&uap
->port
.lock
, flags
);
2019 * Setup the serial console
2021 static int __init
pmz_console_setup(struct console
*co
, char *options
)
2023 struct uart_pmac_port
*uap
;
2024 struct uart_port
*port
;
2029 unsigned long pwr_delay
;
2032 * XServe's default to 57600 bps
2034 if (machine_is_compatible("RackMac1,1")
2035 || machine_is_compatible("RackMac1,2")
2036 || machine_is_compatible("MacRISC4"))
2040 * Check whether an invalid uart number has been specified, and
2041 * if so, search for the first available port that does have
2044 if (co
->index
>= pmz_ports_count
)
2046 uap
= &pmz_ports
[co
->index
];
2047 if (uap
->node
== NULL
)
2052 * Mark port as beeing a console
2054 uap
->flags
|= PMACZILOG_FLAG_IS_CONS
;
2057 * Temporary fix for uart layer who didn't setup the spinlock yet
2059 spin_lock_init(&port
->lock
);
2062 * Enable the hardware
2064 pwr_delay
= __pmz_startup(uap
);
2069 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
2071 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
2074 static int __init
pmz_console_init(void)
2079 /* TODO: Autoprobe console based on OF */
2080 /* pmz_console.index = i; */
2081 register_console(&pmz_console
);
2086 console_initcall(pmz_console_init
);
2087 #endif /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
2089 module_init(init_pmz
);
2090 module_exit(exit_pmz
);