drivers/rtc/rtc-cmos.c

   1 /*
   2  * RTC class driver for "CMOS RTC":  PCs, ACPI, etc
   3  *
   4  * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
   5  * Copyright (C) 2006 David Brownell (convert to new framework)
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License
   9  * as published by the Free Software Foundation; either version
  10  * 2 of the License, or (at your option) any later version.
  11  */
  12
  13 /*
  14  * The original "cmos clock" chip was an MC146818 chip, now obsolete.
  15  * That defined the register interface now provided by all PCs, some
  16  * non-PC systems, and incorporated into ACPI.  Modern PC chipsets
  17  * integrate an MC146818 clone in their southbridge, and boards use
  18  * that instead of discrete clones like the DS12887 or M48T86.  There
  19  * are also clones that connect using the LPC bus.
  20  *
  21  * That register API is also used directly by various other drivers
  22  * (notably for integrated NVRAM), infrastructure (x86 has code to
  23  * bypass the RTC framework, directly reading the RTC during boot
  24  * and updating minutes/seconds for systems using NTP synch) and
  25  * utilities (like userspace 'hwclock', if no /dev node exists).
  26  *
  27  * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
  28  * interrupts disabled, holding the global rtc_lock, to exclude those
  29  * other drivers and utilities on correctly configured systems.
  30  */
  31 #include <linux/kernel.h>
  32 #include <linux/module.h>
  33 #include <linux/init.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/spinlock.h>
  36 #include <linux/platform_device.h>
  37 #include <linux/mod_devicetable.h>
  38 #include <linux/log2.h>
  39 #include <linux/pm.h>
  40
  41 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
  42 #include <asm-generic/rtc.h>
  43
  44 struct cmos_rtc {
  45         struct rtc_device       *rtc;
  46         struct device           *dev;
  47         int                     irq;
  48         struct resource         *iomem;
  49
  50         void                    (*wake_on)(struct device *);
  51         void                    (*wake_off)(struct device *);
  52
  53         u8                      enabled_wake;
  54         u8                      suspend_ctrl;
  55
  56         /* newer hardware extends the original register set */
  57         u8                      day_alrm;
  58         u8                      mon_alrm;
  59         u8                      century;
  60 };
  61
  62 /* both platform and pnp busses use negative numbers for invalid irqs */
  63 #define is_valid_irq(n)         ((n) > 0)
  64
  65 static const char driver_name[] = "rtc_cmos";
  66
  67 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
  68  * always mask it against the irq enable bits in RTC_CONTROL.  Bit values
  69  * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
  70  */
  71 #define RTC_IRQMASK     (RTC_PF | RTC_AF | RTC_UF)
  72
  73 static inline int is_intr(u8 rtc_intr)
  74 {
  75         if (!(rtc_intr & RTC_IRQF))
  76                 return 0;
  77         return rtc_intr & RTC_IRQMASK;
  78 }
  79
  80 /*----------------------------------------------------------------*/
  81
  82 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
  83  * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
  84  * used in a broken "legacy replacement" mode.  The breakage includes
  85  * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
  86  * other (better) use.
  87  *
  88  * When that broken mode is in use, platform glue provides a partial
  89  * emulation of hardware RTC IRQ facilities using HPET #1.  We don't
  90  * want to use HPET for anything except those IRQs though...
  91  */
  92 #ifdef CONFIG_HPET_EMULATE_RTC
  93 #include <asm/hpet.h>
  94 #else
  95
  96 static inline int is_hpet_enabled(void)
  97 {
  98         return 0;
  99 }
 100
 101 static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
 102 {
 103         return 0;
 104 }
 105
 106 static inline int hpet_set_rtc_irq_bit(unsigned long mask)
 107 {
 108         return 0;
 109 }
 110
 111 static inline int
 112 hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
 113 {
 114         return 0;
 115 }
 116
 117 static inline int hpet_set_periodic_freq(unsigned long freq)
 118 {
 119         return 0;
 120 }
 121
 122 static inline int hpet_rtc_dropped_irq(void)
 123 {
 124         return 0;
 125 }
 126
 127 static inline int hpet_rtc_timer_init(void)
 128 {
 129         return 0;
 130 }
 131
 132 extern irq_handler_t hpet_rtc_interrupt;
 133
 134 static inline int hpet_register_irq_handler(irq_handler_t handler)
 135 {
 136         return 0;
 137 }
 138
 139 static inline int hpet_unregister_irq_handler(irq_handler_t handler)
 140 {
 141         return 0;
 142 }
 143
 144 #endif
 145
 146 /*----------------------------------------------------------------*/
 147
 148 #ifdef RTC_PORT
 149
 150 /* Most newer x86 systems have two register banks, the first used
 151  * for RTC and NVRAM and the second only for NVRAM.  Caller must
 152  * own rtc_lock ... and we won't worry about access during NMI.
 153  */
 154 #define can_bank2       true
 155
 156 static inline unsigned char cmos_read_bank2(unsigned char addr)
 157 {
 158         outb(addr, RTC_PORT(2));
 159         return inb(RTC_PORT(3));
 160 }
 161
 162 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
 163 {
 164         outb(addr, RTC_PORT(2));
 165         outb(val, RTC_PORT(2));
 166 }
 167
 168 #else
 169
 170 #define can_bank2       false
 171
 172 static inline unsigned char cmos_read_bank2(unsigned char addr)
 173 {
 174         return 0;
 175 }
 176
 177 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
 178 {
 179 }
 180
 181 #endif
 182
 183 /*----------------------------------------------------------------*/
 184
 185 static int cmos_read_time(struct device *dev, struct rtc_time *t)
 186 {
 187         /* REVISIT:  if the clock has a "century" register, use
 188          * that instead of the heuristic in get_rtc_time().
 189          * That'll make Y3K compatility (year > 2070) easy!
 190          */
 191         get_rtc_time(t);
 192         return 0;
 193 }
 194
 195 static int cmos_set_time(struct device *dev, struct rtc_time *t)
 196 {
 197         /* REVISIT:  set the "century" register if available
 198          *
 199          * NOTE: this ignores the issue whereby updating the seconds
 200          * takes effect exactly 500ms after we write the register.
 201          * (Also queueing and other delays before we get this far.)
 202          */
 203         return set_rtc_time(t);
 204 }
 205
 206 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
 207 {
 208         struct cmos_rtc *cmos = dev_get_drvdata(dev);
 209         unsigned char   rtc_control;
 210
 211         if (!is_valid_irq(cmos->irq))
 212                 return -EIO;
 213
 214         /* Basic alarms only support hour, minute, and seconds fields.
 215          * Some also support day and month, for alarms up to a year in
 216          * the future.
 217          */
 218         t->time.tm_mday = -1;
 219         t->time.tm_mon = -1;
 220
 221         spin_lock_irq(&rtc_lock);
 222         t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
 223         t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
 224         t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
 225
 226         if (cmos->day_alrm) {
 227                 /* ignore upper bits on readback per ACPI spec */
 228                 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
 229                 if (!t->time.tm_mday)
 230                         t->time.tm_mday = -1;
 231
 232                 if (cmos->mon_alrm) {
 233                         t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
 234                         if (!t->time.tm_mon)
 235                                 t->time.tm_mon = -1;
 236                 }
 237         }
 238
 239         rtc_control = CMOS_READ(RTC_CONTROL);
 240         spin_unlock_irq(&rtc_lock);
 241
 242         /* REVISIT this assumes PC style usage:  always BCD */
 243
 244         if (((unsigned)t->time.tm_sec) < 0x60)
 245                 t->time.tm_sec = bcd2bin(t->time.tm_sec);
 246         else
 247                 t->time.tm_sec = -1;
 248         if (((unsigned)t->time.tm_min) < 0x60)
 249                 t->time.tm_min = bcd2bin(t->time.tm_min);
 250         else
 251                 t->time.tm_min = -1;
 252         if (((unsigned)t->time.tm_hour) < 0x24)
 253                 t->time.tm_hour = bcd2bin(t->time.tm_hour);
 254         else
 255                 t->time.tm_hour = -1;
 256
 257         if (cmos->day_alrm) {
 258                 if (((unsigned)t->time.tm_mday) <= 0x31)
 259                         t->time.tm_mday = bcd2bin(t->time.tm_mday);
 260                 else
 261                         t->time.tm_mday = -1;
 262                 if (cmos->mon_alrm) {
 263                         if (((unsigned)t->time.tm_mon) <= 0x12)
 264                                 t->time.tm_mon = bcd2bin(t->time.tm_mon) - 1;
 265                         else
 266                                 t->time.tm_mon = -1;
 267                 }
 268         }
 269         t->time.tm_year = -1;
 270
 271         t->enabled = !!(rtc_control & RTC_AIE);
 272         t->pending = 0;
 273
 274         return 0;
 275 }
 276
 277 static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
 278 {
 279         unsigned char   rtc_intr;
 280
 281         /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
 282          * allegedly some older rtcs need that to handle irqs properly
 283          */
 284         rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
 285
 286         if (is_hpet_enabled())
 287                 return;
 288
 289         rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
 290         if (is_intr(rtc_intr))
 291                 rtc_update_irq(cmos->rtc, 1, rtc_intr);
 292 }
 293
 294 static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
 295 {
 296         unsigned char   rtc_control;
 297
 298         /* flush any pending IRQ status, notably for update irqs,
 299          * before we enable new IRQs
 300          */
 301         rtc_control = CMOS_READ(RTC_CONTROL);
 302         cmos_checkintr(cmos, rtc_control);
 303
 304         rtc_control |= mask;
 305         CMOS_WRITE(rtc_control, RTC_CONTROL);
 306         hpet_set_rtc_irq_bit(mask);
 307
 308         cmos_checkintr(cmos, rtc_control);
 309 }
 310
 311 static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
 312 {
 313         unsigned char   rtc_control;
 314
 315         rtc_control = CMOS_READ(RTC_CONTROL);
 316         rtc_control &= ~mask;
 317         CMOS_WRITE(rtc_control, RTC_CONTROL);
 318         hpet_mask_rtc_irq_bit(mask);
 319
 320         cmos_checkintr(cmos, rtc_control);
 321 }
 322
 323 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
 324 {
 325         struct cmos_rtc *cmos = dev_get_drvdata(dev);
 326         unsigned char   mon, mday, hrs, min, sec;
 327
 328         if (!is_valid_irq(cmos->irq))
 329                 return -EIO;
 330
 331         /* REVISIT this assumes PC style usage:  always BCD */
 332
 333         /* Writing 0xff means "don't care" or "match all".  */
 334
 335         mon = t->time.tm_mon + 1;
 336         mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
 337
 338         mday = t->time.tm_mday;
 339         mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
 340
 341         hrs = t->time.tm_hour;
 342         hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
 343
 344         min = t->time.tm_min;
 345         min = (min < 60) ? bin2bcd(min) : 0xff;
 346
 347         sec = t->time.tm_sec;
 348         sec = (sec < 60) ? bin2bcd(sec) : 0xff;
 349
 350         spin_lock_irq(&rtc_lock);
 351
 352         /* next rtc irq must not be from previous alarm setting */
 353         cmos_irq_disable(cmos, RTC_AIE);
 354
 355         /* update alarm */
 356         CMOS_WRITE(hrs, RTC_HOURS_ALARM);
 357         CMOS_WRITE(min, RTC_MINUTES_ALARM);
 358         CMOS_WRITE(sec, RTC_SECONDS_ALARM);
 359
 360         /* the system may support an "enhanced" alarm */
 361         if (cmos->day_alrm) {
 362                 CMOS_WRITE(mday, cmos->day_alrm);
 363                 if (cmos->mon_alrm)
 364                         CMOS_WRITE(mon, cmos->mon_alrm);
 365         }
 366
 367         /* FIXME the HPET alarm glue currently ignores day_alrm
 368          * and mon_alrm ...
 369          */
 370         hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
 371
 372         if (t->enabled)
 373                 cmos_irq_enable(cmos, RTC_AIE);
 374
 375         spin_unlock_irq(&rtc_lock);
 376
 377         return 0;
 378 }
 379
 380 static int cmos_irq_set_freq(struct device *dev, int freq)
 381 {
 382         struct cmos_rtc *cmos = dev_get_drvdata(dev);
 383         int             f;
 384         unsigned long   flags;
 385
 386         if (!is_valid_irq(cmos->irq))
 387                 return -ENXIO;
 388
 389         if (!is_power_of_2(freq))
 390                 return -EINVAL;
 391         /* 0 = no irqs; 1 = 2^15 Hz ... 15 = 2^0 Hz */
 392         f = ffs(freq);
 393         if (f-- > 16)
 394                 return -EINVAL;
 395         f = 16 - f;
 396
 397         spin_lock_irqsave(&rtc_lock, flags);
 398         hpet_set_periodic_freq(freq);
 399         CMOS_WRITE(RTC_REF_CLCK_32KHZ | f, RTC_FREQ_SELECT);
 400         spin_unlock_irqrestore(&rtc_lock, flags);
 401
 402         return 0;
 403 }
 404
 405 static int cmos_irq_set_state(struct device *dev, int enabled)
 406 {
 407         struct cmos_rtc *cmos = dev_get_drvdata(dev);
 408         unsigned long   flags;
 409
 410         if (!is_valid_irq(cmos->irq))
 411                 return -ENXIO;
 412
 413         spin_lock_irqsave(&rtc_lock, flags);
 414
 415         if (enabled)
 416                 cmos_irq_enable(cmos, RTC_PIE);
 417         else
 418                 cmos_irq_disable(cmos, RTC_PIE);
 419
 420         spin_unlock_irqrestore(&rtc_lock, flags);
 421         return 0;
 422 }
 423
 424 static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
 425 {
 426         struct cmos_rtc *cmos = dev_get_drvdata(dev);
 427         unsigned long   flags;
 428
 429         if (!is_valid_irq(cmos->irq))
 430                 return -EINVAL;
 431
 432         spin_lock_irqsave(&rtc_lock, flags);
 433
 434         if (enabled)
 435                 cmos_irq_enable(cmos, RTC_AIE);
 436         else
 437                 cmos_irq_disable(cmos, RTC_AIE);
 438
 439         spin_unlock_irqrestore(&rtc_lock, flags);
 440         return 0;
 441 }
 442
 443 static int cmos_update_irq_enable(struct device *dev, unsigned int enabled)
 444 {
 445         struct cmos_rtc *cmos = dev_get_drvdata(dev);
 446         unsigned long   flags;
 447
 448         if (!is_valid_irq(cmos->irq))
 449                 return -EINVAL;
 450
 451         spin_lock_irqsave(&rtc_lock, flags);
 452
 453         if (enabled)
 454                 cmos_irq_enable(cmos, RTC_UIE);
 455         else
 456                 cmos_irq_disable(cmos, RTC_UIE);
 457
 458         spin_unlock_irqrestore(&rtc_lock, flags);
 459         return 0;
 460 }
 461
 462 #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
 463
 464 static int cmos_procfs(struct device *dev, struct seq_file *seq)
 465 {
 466         struct cmos_rtc *cmos = dev_get_drvdata(dev);
 467         unsigned char   rtc_control, valid;
 468
 469         spin_lock_irq(&rtc_lock);
 470         rtc_control = CMOS_READ(RTC_CONTROL);
 471         valid = CMOS_READ(RTC_VALID);
 472         spin_unlock_irq(&rtc_lock);
 473
 474         /* NOTE:  at least ICH6 reports battery status using a different
 475          * (non-RTC) bit; and SQWE is ignored on many current systems.
 476          */
 477         return seq_printf(seq,
 478                         "periodic_IRQ\t: %s\n"
 479                         "update_IRQ\t: %s\n"
 480                         "HPET_emulated\t: %s\n"
 481                         // "square_wave\t: %s\n"
 482                         // "BCD\t\t: %s\n"
 483                         "DST_enable\t: %s\n"
 484                         "periodic_freq\t: %d\n"
 485                         "batt_status\t: %s\n",
 486                         (rtc_control & RTC_PIE) ? "yes" : "no",
 487                         (rtc_control & RTC_UIE) ? "yes" : "no",
 488                         is_hpet_enabled() ? "yes" : "no",
 489                         // (rtc_control & RTC_SQWE) ? "yes" : "no",
 490                         // (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
 491                         (rtc_control & RTC_DST_EN) ? "yes" : "no",
 492                         cmos->rtc->irq_freq,
 493                         (valid & RTC_VRT) ? "okay" : "dead");
 494 }
 495
 496 #else
 497 #define cmos_procfs     NULL
 498 #endif
 499
 500 static const struct rtc_class_ops cmos_rtc_ops = {
 501         .read_time              = cmos_read_time,
 502         .set_time               = cmos_set_time,
 503         .read_alarm             = cmos_read_alarm,
 504         .set_alarm              = cmos_set_alarm,
 505         .proc                   = cmos_procfs,
 506         .irq_set_freq           = cmos_irq_set_freq,
 507         .irq_set_state          = cmos_irq_set_state,
 508         .alarm_irq_enable       = cmos_alarm_irq_enable,
 509         .update_irq_enable      = cmos_update_irq_enable,
 510 };
 511
 512 /*----------------------------------------------------------------*/
 513
 514 /*
 515  * All these chips have at least 64 bytes of address space, shared by
 516  * RTC registers and NVRAM.  Most of those bytes of NVRAM are used
 517  * by boot firmware.  Modern chips have 128 or 256 bytes.
 518  */
 519
 520 #define NVRAM_OFFSET    (RTC_REG_D + 1)
 521
 522 static ssize_t
 523 cmos_nvram_read(struct kobject *kobj, struct bin_attribute *attr,
 524                 char *buf, loff_t off, size_t count)
 525 {
 526         int     retval;
 527
 528         if (unlikely(off >= attr->size))
 529                 return 0;
 530         if (unlikely(off < 0))
 531                 return -EINVAL;
 532         if ((off + count) > attr->size)
 533                 count = attr->size - off;
 534
 535         off += NVRAM_OFFSET;
 536         spin_lock_irq(&rtc_lock);
 537         for (retval = 0; count; count--, off++, retval++) {
 538                 if (off < 128)
 539                         *buf++ = CMOS_READ(off);
 540                 else if (can_bank2)
 541                         *buf++ = cmos_read_bank2(off);
 542                 else
 543                         break;
 544         }
 545         spin_unlock_irq(&rtc_lock);
 546
 547         return retval;
 548 }
 549
 550 static ssize_t
 551 cmos_nvram_write(struct kobject *kobj, struct bin_attribute *attr,
 552                 char *buf, loff_t off, size_t count)
 553 {
 554         struct cmos_rtc *cmos;
 555         int             retval;
 556
 557         cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
 558         if (unlikely(off >= attr->size))
 559                 return -EFBIG;
 560         if (unlikely(off < 0))
 561                 return -EINVAL;
 562         if ((off + count) > attr->size)
 563                 count = attr->size - off;
 564
 565         /* NOTE:  on at least PCs and Ataris, the boot firmware uses a
 566          * checksum on part of the NVRAM data.  That's currently ignored
 567          * here.  If userspace is smart enough to know what fields of
 568          * NVRAM to update, updating checksums is also part of its job.
 569          */
 570         off += NVRAM_OFFSET;
 571         spin_lock_irq(&rtc_lock);
 572         for (retval = 0; count; count--, off++, retval++) {
 573                 /* don't trash RTC registers */
 574                 if (off == cmos->day_alrm
 575                                 || off == cmos->mon_alrm
 576                                 || off == cmos->century)
 577                         buf++;
 578                 else if (off < 128)
 579                         CMOS_WRITE(*buf++, off);
 580                 else if (can_bank2)
 581                         cmos_write_bank2(*buf++, off);
 582                 else
 583                         break;
 584         }
 585         spin_unlock_irq(&rtc_lock);
 586
 587         return retval;
 588 }
 589
 590 static struct bin_attribute nvram = {
 591         .attr = {
 592                 .name   = "nvram",
 593                 .mode   = S_IRUGO | S_IWUSR,
 594         },
 595
 596         .read   = cmos_nvram_read,
 597         .write  = cmos_nvram_write,
 598         /* size gets set up later */
 599 };
 600
 601 /*----------------------------------------------------------------*/
 602
 603 static struct cmos_rtc  cmos_rtc;
 604
 605 static irqreturn_t cmos_interrupt(int irq, void *p)
 606 {
 607         u8              irqstat;
 608         u8              rtc_control;
 609
 610         spin_lock(&rtc_lock);
 611
 612         /* When the HPET interrupt handler calls us, the interrupt
 613          * status is passed as arg1 instead of the irq number.  But
 614          * always clear irq status, even when HPET is in the way.
 615          *
 616          * Note that HPET and RTC are almost certainly out of phase,
 617          * giving different IRQ status ...
 618          */
 619         irqstat = CMOS_READ(RTC_INTR_FLAGS);
 620         rtc_control = CMOS_READ(RTC_CONTROL);
 621         if (is_hpet_enabled())
 622                 irqstat = (unsigned long)irq & 0xF0;
 623         irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
 624
 625         /* All Linux RTC alarms should be treated as if they were oneshot.
 626          * Similar code may be needed in system wakeup paths, in case the
 627          * alarm woke the system.
 628          */
 629         if (irqstat & RTC_AIE) {
 630                 rtc_control &= ~RTC_AIE;
 631                 CMOS_WRITE(rtc_control, RTC_CONTROL);
 632                 hpet_mask_rtc_irq_bit(RTC_AIE);
 633
 634                 CMOS_READ(RTC_INTR_FLAGS);
 635         }
 636         spin_unlock(&rtc_lock);
 637
 638         if (is_intr(irqstat)) {
 639                 rtc_update_irq(p, 1, irqstat);
 640                 return IRQ_HANDLED;
 641         } else
 642                 return IRQ_NONE;
 643 }
 644
 645 #ifdef  CONFIG_PNP
 646 #define INITSECTION
 647
 648 #else
 649 #define INITSECTION     __init
 650 #endif
 651
 652 static int INITSECTION
 653 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
 654 {
 655         struct cmos_rtc_board_info      *info = dev->platform_data;
 656         int                             retval = 0;
 657         unsigned char                   rtc_control;
 658         unsigned                        address_space;
 659
 660         /* there can be only one ... */
 661         if (cmos_rtc.dev)
 662                 return -EBUSY;
 663
 664         if (!ports)
 665                 return -ENODEV;
 666
 667         /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
 668          *
 669          * REVISIT non-x86 systems may instead use memory space resources
 670          * (needing ioremap etc), not i/o space resources like this ...
 671          */
 672         ports = request_region(ports->start,
 673                         ports->end + 1 - ports->start,
 674                         driver_name);
 675         if (!ports) {
 676                 dev_dbg(dev, "i/o registers already in use\n");
 677                 return -EBUSY;
 678         }
 679
 680         cmos_rtc.irq = rtc_irq;
 681         cmos_rtc.iomem = ports;
 682
 683         /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
 684          * driver did, but don't reject unknown configs.   Old hardware
 685          * won't address 128 bytes.  Newer chips have multiple banks,
 686          * though they may not be listed in one I/O resource.
 687          */
 688 #if     defined(CONFIG_ATARI)
 689         address_space = 64;
 690 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
 691                         || defined(__sparc__) || defined(__mips__)
 692         address_space = 128;
 693 #else
 694 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
 695         address_space = 128;
 696 #endif
 697         if (can_bank2 && ports->end > (ports->start + 1))
 698                 address_space = 256;
 699
 700         /* For ACPI systems extension info comes from the FADT.  On others,
 701          * board specific setup provides it as appropriate.  Systems where
 702          * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
 703          * some almost-clones) can provide hooks to make that behave.
 704          *
 705          * Note that ACPI doesn't preclude putting these registers into
 706          * "extended" areas of the chip, including some that we won't yet
 707          * expect CMOS_READ and friends to handle.
 708          */
 709         if (info) {
 710                 if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
 711                         cmos_rtc.day_alrm = info->rtc_day_alarm;
 712                 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
 713                         cmos_rtc.mon_alrm = info->rtc_mon_alarm;
 714                 if (info->rtc_century && info->rtc_century < 128)
 715                         cmos_rtc.century = info->rtc_century;
 716
 717                 if (info->wake_on && info->wake_off) {
 718                         cmos_rtc.wake_on = info->wake_on;
 719                         cmos_rtc.wake_off = info->wake_off;
 720                 }
 721         }
 722
 723         cmos_rtc.dev = dev;
 724         dev_set_drvdata(dev, &cmos_rtc);
 725
 726         cmos_rtc.rtc = rtc_device_register(driver_name, dev,
 727                                 &cmos_rtc_ops, THIS_MODULE);
 728         if (IS_ERR(cmos_rtc.rtc)) {
 729                 retval = PTR_ERR(cmos_rtc.rtc);
 730                 goto cleanup0;
 731         }
 732
 733         rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
 734
 735         spin_lock_irq(&rtc_lock);
 736
 737         /* force periodic irq to CMOS reset default of 1024Hz;
 738          *
 739          * REVISIT it's been reported that at least one x86_64 ALI mobo
 740          * doesn't use 32KHz here ... for portability we might need to
 741          * do something about other clock frequencies.
 742          */
 743         cmos_rtc.rtc->irq_freq = 1024;
 744         hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
 745         CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
 746
 747         /* disable irqs */
 748         cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
 749
 750         rtc_control = CMOS_READ(RTC_CONTROL);
 751
 752         spin_unlock_irq(&rtc_lock);
 753
 754         /* FIXME teach the alarm code how to handle binary mode;
 755          * <asm-generic/rtc.h> doesn't know 12-hour mode either.
 756          */
 757         if (is_valid_irq(rtc_irq) &&
 758             (!(rtc_control & RTC_24H) || (rtc_control & (RTC_DM_BINARY)))) {
 759                 dev_dbg(dev, "only 24-hr BCD mode supported\n");
 760                 retval = -ENXIO;
 761                 goto cleanup1;
 762         }
 763
 764         if (is_valid_irq(rtc_irq)) {
 765                 irq_handler_t rtc_cmos_int_handler;
 766
 767                 if (is_hpet_enabled()) {
 768                         int err;
 769
 770                         rtc_cmos_int_handler = hpet_rtc_interrupt;
 771                         err = hpet_register_irq_handler(cmos_interrupt);
 772                         if (err != 0) {
 773                                 printk(KERN_WARNING "hpet_register_irq_handler "
 774                                                 " failed in rtc_init().");
 775                                 goto cleanup1;
 776                         }
 777                 } else
 778                         rtc_cmos_int_handler = cmos_interrupt;
 779
 780                 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
 781                                 IRQF_DISABLED, dev_name(&cmos_rtc.rtc->dev),
 782                                 cmos_rtc.rtc);
 783                 if (retval < 0) {
 784                         dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
 785                         goto cleanup1;
 786                 }
 787         }
 788         hpet_rtc_timer_init();
 789
 790         /* export at least the first block of NVRAM */
 791         nvram.size = address_space - NVRAM_OFFSET;
 792         retval = sysfs_create_bin_file(&dev->kobj, &nvram);
 793         if (retval < 0) {
 794                 dev_dbg(dev, "can't create nvram file? %d\n", retval);
 795                 goto cleanup2;
 796         }
 797
 798         pr_info("%s: %s%s, %zd bytes nvram%s\n",
 799                 dev_name(&cmos_rtc.rtc->dev),
 800                 !is_valid_irq(rtc_irq) ? "no alarms" :
 801                         cmos_rtc.mon_alrm ? "alarms up to one year" :
 802                         cmos_rtc.day_alrm ? "alarms up to one month" :
 803                         "alarms up to one day",
 804                 cmos_rtc.century ? ", y3k" : "",
 805                 nvram.size,
 806                 is_hpet_enabled() ? ", hpet irqs" : "");
 807
 808         return 0;
 809
 810 cleanup2:
 811         if (is_valid_irq(rtc_irq))
 812                 free_irq(rtc_irq, cmos_rtc.rtc);
 813 cleanup1:
 814         cmos_rtc.dev = NULL;
 815         rtc_device_unregister(cmos_rtc.rtc);
 816 cleanup0:
 817         release_region(ports->start, ports->end + 1 - ports->start);
 818         return retval;
 819 }
 820
 821 static void cmos_do_shutdown(void)
 822 {
 823         spin_lock_irq(&rtc_lock);
 824         cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
 825         spin_unlock_irq(&rtc_lock);
 826 }
 827
 828 static void __exit cmos_do_remove(struct device *dev)
 829 {
 830         struct cmos_rtc *cmos = dev_get_drvdata(dev);
 831         struct resource *ports;
 832
 833         cmos_do_shutdown();
 834
 835         sysfs_remove_bin_file(&dev->kobj, &nvram);
 836
 837         if (is_valid_irq(cmos->irq)) {
 838                 free_irq(cmos->irq, cmos->rtc);
 839                 hpet_unregister_irq_handler(cmos_interrupt);
 840         }
 841
 842         rtc_device_unregister(cmos->rtc);
 843         cmos->rtc = NULL;
 844
 845         ports = cmos->iomem;
 846         release_region(ports->start, ports->end + 1 - ports->start);
 847         cmos->iomem = NULL;
 848
 849         cmos->dev = NULL;
 850         dev_set_drvdata(dev, NULL);
 851 }
 852
 853 #ifdef  CONFIG_PM
 854
 855 static int cmos_suspend(struct device *dev)
 856 {
 857         struct cmos_rtc *cmos = dev_get_drvdata(dev);
 858         unsigned char   tmp;
 859
 860         /* only the alarm might be a wakeup event source */
 861         spin_lock_irq(&rtc_lock);
 862         cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
 863         if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
 864                 unsigned char   mask;
 865
 866                 if (device_may_wakeup(dev))
 867                         mask = RTC_IRQMASK & ~RTC_AIE;
 868                 else
 869                         mask = RTC_IRQMASK;
 870                 tmp &= ~mask;
 871                 CMOS_WRITE(tmp, RTC_CONTROL);
 872
 873                 /* shut down hpet emulation - we don't need it for alarm */
 874                 hpet_mask_rtc_irq_bit(RTC_PIE|RTC_AIE|RTC_UIE);
 875                 cmos_checkintr(cmos, tmp);
 876         }
 877         spin_unlock_irq(&rtc_lock);
 878
 879         if (tmp & RTC_AIE) {
 880                 cmos->enabled_wake = 1;
 881                 if (cmos->wake_on)
 882                         cmos->wake_on(dev);
 883                 else
 884                         enable_irq_wake(cmos->irq);
 885         }
 886
 887         pr_debug("%s: suspend%s, ctrl %02x\n",
 888                         dev_name(&cmos_rtc.rtc->dev),
 889                         (tmp & RTC_AIE) ? ", alarm may wake" : "",
 890                         tmp);
 891
 892         return 0;
 893 }
 894
 895 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
 896  * after a detour through G3 "mechanical off", although the ACPI spec
 897  * says wakeup should only work from G1/S4 "hibernate".  To most users,
 898  * distinctions between S4 and S5 are pointless.  So when the hardware
 899  * allows, don't draw that distinction.
 900  */
 901 static inline int cmos_poweroff(struct device *dev)
 902 {
 903         return cmos_suspend(dev);
 904 }
 905
 906 static int cmos_resume(struct device *dev)
 907 {
 908         struct cmos_rtc *cmos = dev_get_drvdata(dev);
 909         unsigned char   tmp = cmos->suspend_ctrl;
 910
 911         /* re-enable any irqs previously active */
 912         if (tmp & RTC_IRQMASK) {
 913                 unsigned char   mask;
 914
 915                 if (cmos->enabled_wake) {
 916                         if (cmos->wake_off)
 917                                 cmos->wake_off(dev);
 918                         else
 919                                 disable_irq_wake(cmos->irq);
 920                         cmos->enabled_wake = 0;
 921                 }
 922
 923                 spin_lock_irq(&rtc_lock);
 924                 do {
 925                         CMOS_WRITE(tmp, RTC_CONTROL);
 926                         hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
 927
 928                         mask = CMOS_READ(RTC_INTR_FLAGS);
 929                         mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
 930                         if (!is_hpet_enabled() || !is_intr(mask))
 931                                 break;
 932
 933                         /* force one-shot behavior if HPET blocked
 934                          * the wake alarm's irq
 935                          */
 936                         rtc_update_irq(cmos->rtc, 1, mask);
 937                         tmp &= ~RTC_AIE;
 938                         hpet_mask_rtc_irq_bit(RTC_AIE);
 939                 } while (mask & RTC_AIE);
 940                 spin_unlock_irq(&rtc_lock);
 941         }
 942
 943         pr_debug("%s: resume, ctrl %02x\n",
 944                         dev_name(&cmos_rtc.rtc->dev),
 945                         tmp);
 946
 947         return 0;
 948 }
 949
 950 static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
 951
 952 #else
 953
 954 static inline int cmos_poweroff(struct device *dev)
 955 {
 956         return -ENOSYS;
 957 }
 958
 959 #endif
 960
 961 /*----------------------------------------------------------------*/
 962
 963 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
 964  * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
 965  * probably list them in similar PNPBIOS tables; so PNP is more common.
 966  *
 967  * We don't use legacy "poke at the hardware" probing.  Ancient PCs that
 968  * predate even PNPBIOS should set up platform_bus devices.
 969  */
 970
 971 #ifdef  CONFIG_ACPI
 972
 973 #include <linux/acpi.h>
 974
 975 #ifdef  CONFIG_PM
 976 static u32 rtc_handler(void *context)
 977 {
 978         acpi_clear_event(ACPI_EVENT_RTC);
 979         acpi_disable_event(ACPI_EVENT_RTC, 0);
 980         return ACPI_INTERRUPT_HANDLED;
 981 }
 982
 983 static inline void rtc_wake_setup(void)
 984 {
 985         acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, NULL);
 986         /*
 987          * After the RTC handler is installed, the Fixed_RTC event should
 988          * be disabled. Only when the RTC alarm is set will it be enabled.
 989          */
 990         acpi_clear_event(ACPI_EVENT_RTC);
 991         acpi_disable_event(ACPI_EVENT_RTC, 0);
 992 }
 993
 994 static void rtc_wake_on(struct device *dev)
 995 {
 996         acpi_clear_event(ACPI_EVENT_RTC);
 997         acpi_enable_event(ACPI_EVENT_RTC, 0);
 998 }
 999
1000 static void rtc_wake_off(struct device *dev)
1001 {
1002         acpi_disable_event(ACPI_EVENT_RTC, 0);
1003 }
1004 #else
1005 #define rtc_wake_setup()        do{}while(0)
1006 #define rtc_wake_on             NULL
1007 #define rtc_wake_off            NULL
1008 #endif
1009
1010 /* Every ACPI platform has a mc146818 compatible "cmos rtc".  Here we find
1011  * its device node and pass extra config data.  This helps its driver use
1012  * capabilities that the now-obsolete mc146818 didn't have, and informs it
1013  * that this board's RTC is wakeup-capable (per ACPI spec).
1014  */
1015 static struct cmos_rtc_board_info acpi_rtc_info;
1016
1017 static void __devinit
1018 cmos_wake_setup(struct device *dev)
1019 {
1020         if (acpi_disabled)
1021                 return;
1022
1023         rtc_wake_setup();
1024         acpi_rtc_info.wake_on = rtc_wake_on;
1025         acpi_rtc_info.wake_off = rtc_wake_off;
1026
1027         /* workaround bug in some ACPI tables */
1028         if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
1029                 dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
1030                         acpi_gbl_FADT.month_alarm);
1031                 acpi_gbl_FADT.month_alarm = 0;
1032         }
1033
1034         acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
1035         acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
1036         acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
1037
1038         /* NOTE:  S4_RTC_WAKE is NOT currently useful to Linux */
1039         if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
1040                 dev_info(dev, "RTC can wake from S4\n");
1041
1042         dev->platform_data = &acpi_rtc_info;
1043
1044         /* RTC always wakes from S1/S2/S3, and often S4/STD */
1045         device_init_wakeup(dev, 1);
1046 }
1047
1048 #else
1049
1050 static void __devinit
1051 cmos_wake_setup(struct device *dev)
1052 {
1053 }
1054
1055 #endif
1056
1057 #ifdef  CONFIG_PNP
1058
1059 #include <linux/pnp.h>
1060
1061 static int __devinit
1062 cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1063 {
1064         cmos_wake_setup(&pnp->dev);
1065
1066         if (pnp_port_start(pnp,0) == 0x70 && !pnp_irq_valid(pnp,0))
1067                 /* Some machines contain a PNP entry for the RTC, but
1068                  * don't define the IRQ. It should always be safe to
1069                  * hardcode it in these cases
1070                  */
1071                 return cmos_do_probe(&pnp->dev,
1072                                 pnp_get_resource(pnp, IORESOURCE_IO, 0), 8);
1073         else
1074                 return cmos_do_probe(&pnp->dev,
1075                                 pnp_get_resource(pnp, IORESOURCE_IO, 0),
1076                                 pnp_irq(pnp, 0));
1077 }
1078
1079 static void __exit cmos_pnp_remove(struct pnp_dev *pnp)
1080 {
1081         cmos_do_remove(&pnp->dev);
1082 }
1083
1084 #ifdef  CONFIG_PM
1085
1086 static int cmos_pnp_suspend(struct pnp_dev *pnp, pm_message_t mesg)
1087 {
1088         return cmos_suspend(&pnp->dev);
1089 }
1090
1091 static int cmos_pnp_resume(struct pnp_dev *pnp)
1092 {
1093         return cmos_resume(&pnp->dev);
1094 }
1095
1096 #else
1097 #define cmos_pnp_suspend        NULL
1098 #define cmos_pnp_resume         NULL
1099 #endif
1100
1101 static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1102 {
1103         if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pnp->dev))
1104                 return;
1105
1106         cmos_do_shutdown();
1107 }
1108
1109 static const struct pnp_device_id rtc_ids[] = {
1110         { .id = "PNP0b00", },
1111         { .id = "PNP0b01", },
1112         { .id = "PNP0b02", },
1113         { },
1114 };
1115 MODULE_DEVICE_TABLE(pnp, rtc_ids);
1116
1117 static struct pnp_driver cmos_pnp_driver = {
1118         .name           = (char *) driver_name,
1119         .id_table       = rtc_ids,
1120         .probe          = cmos_pnp_probe,
1121         .remove         = __exit_p(cmos_pnp_remove),
1122         .shutdown       = cmos_pnp_shutdown,
1123
1124         /* flag ensures resume() gets called, and stops syslog spam */
1125         .flags          = PNP_DRIVER_RES_DO_NOT_CHANGE,
1126         .suspend        = cmos_pnp_suspend,
1127         .resume         = cmos_pnp_resume,
1128 };
1129
1130 #endif  /* CONFIG_PNP */
1131
1132 /*----------------------------------------------------------------*/
1133
1134 /* Platform setup should have set up an RTC device, when PNP is
1135  * unavailable ... this could happen even on (older) PCs.
1136  */
1137
1138 static int __init cmos_platform_probe(struct platform_device *pdev)
1139 {
1140         cmos_wake_setup(&pdev->dev);
1141         return cmos_do_probe(&pdev->dev,
1142                         platform_get_resource(pdev, IORESOURCE_IO, 0),
1143                         platform_get_irq(pdev, 0));
1144 }
1145
1146 static int __exit cmos_platform_remove(struct platform_device *pdev)
1147 {
1148         cmos_do_remove(&pdev->dev);
1149         return 0;
1150 }
1151
1152 static void cmos_platform_shutdown(struct platform_device *pdev)
1153 {
1154         if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pdev->dev))
1155                 return;
1156
1157         cmos_do_shutdown();
1158 }
1159
1160 /* work with hotplug and coldplug */
1161 MODULE_ALIAS("platform:rtc_cmos");
1162
1163 static struct platform_driver cmos_platform_driver = {
1164         .remove         = __exit_p(cmos_platform_remove),
1165         .shutdown       = cmos_platform_shutdown,
1166         .driver = {
1167                 .name           = (char *) driver_name,
1168 #ifdef CONFIG_PM
1169                 .pm             = &cmos_pm_ops,
1170 #endif
1171         }
1172 };
1173
1174 #ifdef CONFIG_PNP
1175 static bool pnp_driver_registered;
1176 #endif
1177 static bool platform_driver_registered;
1178
1179 static int __init cmos_init(void)
1180 {
1181         int retval = 0;
1182
1183 #ifdef  CONFIG_PNP
1184         retval = pnp_register_driver(&cmos_pnp_driver);
1185         if (retval == 0)
1186                 pnp_driver_registered = true;
1187 #endif
1188
1189         if (!cmos_rtc.dev) {
1190                 retval = platform_driver_probe(&cmos_platform_driver,
1191                                                cmos_platform_probe);
1192                 if (retval == 0)
1193                         platform_driver_registered = true;
1194         }
1195
1196         if (retval == 0)
1197                 return 0;
1198
1199 #ifdef  CONFIG_PNP
1200         if (pnp_driver_registered)
1201                 pnp_unregister_driver(&cmos_pnp_driver);
1202 #endif
1203         return retval;
1204 }
1205 module_init(cmos_init);
1206
1207 static void __exit cmos_exit(void)
1208 {
1209 #ifdef  CONFIG_PNP
1210         if (pnp_driver_registered)
1211                 pnp_unregister_driver(&cmos_pnp_driver);
1212 #endif
1213         if (platform_driver_registered)
1214                 platform_driver_unregister(&cmos_platform_driver);
1215 }
1216 module_exit(cmos_exit);
1217
1218
1219 MODULE_AUTHOR("David Brownell");
1220 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1221 MODULE_LICENSE("GPL");