powerpc: mmu_gather rework
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / powerpc / mm / pgtable.c
blob6e72788598f8e49e624b827555884a21e3fb5b8d
1 /*
2 * This file contains common routines for dealing with free of page tables
3 * Along with common page table handling code
5 * Derived from arch/powerpc/mm/tlb_64.c:
6 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
8 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
9 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
10 * Copyright (C) 1996 Paul Mackerras
12 * Derived from "arch/i386/mm/init.c"
13 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
15 * Dave Engebretsen <engebret@us.ibm.com>
16 * Rework for PPC64 port.
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License
20 * as published by the Free Software Foundation; either version
21 * 2 of the License, or (at your option) any later version.
24 #include <linux/kernel.h>
25 #include <linux/gfp.h>
26 #include <linux/mm.h>
27 #include <linux/init.h>
28 #include <linux/percpu.h>
29 #include <linux/hardirq.h>
30 #include <asm/pgalloc.h>
31 #include <asm/tlbflush.h>
32 #include <asm/tlb.h>
34 #include "mmu_decl.h"
36 #ifdef CONFIG_SMP
39 * Handle batching of page table freeing on SMP. Page tables are
40 * queued up and send to be freed later by RCU in order to avoid
41 * freeing a page table page that is being walked without locks
44 static unsigned long pte_freelist_forced_free;
46 struct pte_freelist_batch
48 struct rcu_head rcu;
49 unsigned int index;
50 unsigned long tables[0];
53 #define PTE_FREELIST_SIZE \
54 ((PAGE_SIZE - sizeof(struct pte_freelist_batch)) \
55 / sizeof(unsigned long))
57 static void pte_free_smp_sync(void *arg)
59 /* Do nothing, just ensure we sync with all CPUs */
62 /* This is only called when we are critically out of memory
63 * (and fail to get a page in pte_free_tlb).
65 static void pgtable_free_now(void *table, unsigned shift)
67 pte_freelist_forced_free++;
69 smp_call_function(pte_free_smp_sync, NULL, 1);
71 pgtable_free(table, shift);
74 static void pte_free_rcu_callback(struct rcu_head *head)
76 struct pte_freelist_batch *batch =
77 container_of(head, struct pte_freelist_batch, rcu);
78 unsigned int i;
80 for (i = 0; i < batch->index; i++) {
81 void *table = (void *)(batch->tables[i] & ~MAX_PGTABLE_INDEX_SIZE);
82 unsigned shift = batch->tables[i] & MAX_PGTABLE_INDEX_SIZE;
84 pgtable_free(table, shift);
87 free_page((unsigned long)batch);
90 static void pte_free_submit(struct pte_freelist_batch *batch)
92 call_rcu_sched(&batch->rcu, pte_free_rcu_callback);
95 void pgtable_free_tlb(struct mmu_gather *tlb, void *table, unsigned shift)
97 struct pte_freelist_batch **batchp = &tlb->arch.batch;
98 unsigned long pgf;
100 if (atomic_read(&tlb->mm->mm_users) < 2) {
101 pgtable_free(table, shift);
102 return;
105 if (*batchp == NULL) {
106 *batchp = (struct pte_freelist_batch *)__get_free_page(GFP_ATOMIC);
107 if (*batchp == NULL) {
108 pgtable_free_now(table, shift);
109 return;
111 (*batchp)->index = 0;
113 BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
114 pgf = (unsigned long)table | shift;
115 (*batchp)->tables[(*batchp)->index++] = pgf;
116 if ((*batchp)->index == PTE_FREELIST_SIZE) {
117 pte_free_submit(*batchp);
118 *batchp = NULL;
122 void pte_free_finish(struct mmu_gather *tlb)
124 struct pte_freelist_batch **batchp = &tlb->arch.batch;
126 if (*batchp == NULL)
127 return;
128 pte_free_submit(*batchp);
129 *batchp = NULL;
132 #endif /* CONFIG_SMP */
134 static inline int is_exec_fault(void)
136 return current->thread.regs && TRAP(current->thread.regs) == 0x400;
139 /* We only try to do i/d cache coherency on stuff that looks like
140 * reasonably "normal" PTEs. We currently require a PTE to be present
141 * and we avoid _PAGE_SPECIAL and _PAGE_NO_CACHE. We also only do that
142 * on userspace PTEs
144 static inline int pte_looks_normal(pte_t pte)
146 return (pte_val(pte) &
147 (_PAGE_PRESENT | _PAGE_SPECIAL | _PAGE_NO_CACHE | _PAGE_USER)) ==
148 (_PAGE_PRESENT | _PAGE_USER);
151 struct page * maybe_pte_to_page(pte_t pte)
153 unsigned long pfn = pte_pfn(pte);
154 struct page *page;
156 if (unlikely(!pfn_valid(pfn)))
157 return NULL;
158 page = pfn_to_page(pfn);
159 if (PageReserved(page))
160 return NULL;
161 return page;
164 #if defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 0
166 /* Server-style MMU handles coherency when hashing if HW exec permission
167 * is supposed per page (currently 64-bit only). If not, then, we always
168 * flush the cache for valid PTEs in set_pte. Embedded CPU without HW exec
169 * support falls into the same category.
172 static pte_t set_pte_filter(pte_t pte, unsigned long addr)
174 pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
175 if (pte_looks_normal(pte) && !(cpu_has_feature(CPU_FTR_COHERENT_ICACHE) ||
176 cpu_has_feature(CPU_FTR_NOEXECUTE))) {
177 struct page *pg = maybe_pte_to_page(pte);
178 if (!pg)
179 return pte;
180 if (!test_bit(PG_arch_1, &pg->flags)) {
181 #ifdef CONFIG_8xx
182 /* On 8xx, cache control instructions (particularly
183 * "dcbst" from flush_dcache_icache) fault as write
184 * operation if there is an unpopulated TLB entry
185 * for the address in question. To workaround that,
186 * we invalidate the TLB here, thus avoiding dcbst
187 * misbehaviour.
189 /* 8xx doesn't care about PID, size or ind args */
190 _tlbil_va(addr, 0, 0, 0);
191 #endif /* CONFIG_8xx */
192 flush_dcache_icache_page(pg);
193 set_bit(PG_arch_1, &pg->flags);
196 return pte;
199 static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
200 int dirty)
202 return pte;
205 #else /* defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 0 */
207 /* Embedded type MMU with HW exec support. This is a bit more complicated
208 * as we don't have two bits to spare for _PAGE_EXEC and _PAGE_HWEXEC so
209 * instead we "filter out" the exec permission for non clean pages.
211 static pte_t set_pte_filter(pte_t pte, unsigned long addr)
213 struct page *pg;
215 /* No exec permission in the first place, move on */
216 if (!(pte_val(pte) & _PAGE_EXEC) || !pte_looks_normal(pte))
217 return pte;
219 /* If you set _PAGE_EXEC on weird pages you're on your own */
220 pg = maybe_pte_to_page(pte);
221 if (unlikely(!pg))
222 return pte;
224 /* If the page clean, we move on */
225 if (test_bit(PG_arch_1, &pg->flags))
226 return pte;
228 /* If it's an exec fault, we flush the cache and make it clean */
229 if (is_exec_fault()) {
230 flush_dcache_icache_page(pg);
231 set_bit(PG_arch_1, &pg->flags);
232 return pte;
235 /* Else, we filter out _PAGE_EXEC */
236 return __pte(pte_val(pte) & ~_PAGE_EXEC);
239 static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
240 int dirty)
242 struct page *pg;
244 /* So here, we only care about exec faults, as we use them
245 * to recover lost _PAGE_EXEC and perform I$/D$ coherency
246 * if necessary. Also if _PAGE_EXEC is already set, same deal,
247 * we just bail out
249 if (dirty || (pte_val(pte) & _PAGE_EXEC) || !is_exec_fault())
250 return pte;
252 #ifdef CONFIG_DEBUG_VM
253 /* So this is an exec fault, _PAGE_EXEC is not set. If it was
254 * an error we would have bailed out earlier in do_page_fault()
255 * but let's make sure of it
257 if (WARN_ON(!(vma->vm_flags & VM_EXEC)))
258 return pte;
259 #endif /* CONFIG_DEBUG_VM */
261 /* If you set _PAGE_EXEC on weird pages you're on your own */
262 pg = maybe_pte_to_page(pte);
263 if (unlikely(!pg))
264 goto bail;
266 /* If the page is already clean, we move on */
267 if (test_bit(PG_arch_1, &pg->flags))
268 goto bail;
270 /* Clean the page and set PG_arch_1 */
271 flush_dcache_icache_page(pg);
272 set_bit(PG_arch_1, &pg->flags);
274 bail:
275 return __pte(pte_val(pte) | _PAGE_EXEC);
278 #endif /* !(defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 0) */
281 * set_pte stores a linux PTE into the linux page table.
283 void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
284 pte_t pte)
286 #ifdef CONFIG_DEBUG_VM
287 WARN_ON(pte_present(*ptep));
288 #endif
289 /* Note: mm->context.id might not yet have been assigned as
290 * this context might not have been activated yet when this
291 * is called.
293 pte = set_pte_filter(pte, addr);
295 /* Perform the setting of the PTE */
296 __set_pte_at(mm, addr, ptep, pte, 0);
300 * This is called when relaxing access to a PTE. It's also called in the page
301 * fault path when we don't hit any of the major fault cases, ie, a minor
302 * update of _PAGE_ACCESSED, _PAGE_DIRTY, etc... The generic code will have
303 * handled those two for us, we additionally deal with missing execute
304 * permission here on some processors
306 int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address,
307 pte_t *ptep, pte_t entry, int dirty)
309 int changed;
310 entry = set_access_flags_filter(entry, vma, dirty);
311 changed = !pte_same(*(ptep), entry);
312 if (changed) {
313 if (!(vma->vm_flags & VM_HUGETLB))
314 assert_pte_locked(vma->vm_mm, address);
315 __ptep_set_access_flags(ptep, entry);
316 flush_tlb_page_nohash(vma, address);
318 return changed;
321 #ifdef CONFIG_DEBUG_VM
322 void assert_pte_locked(struct mm_struct *mm, unsigned long addr)
324 pgd_t *pgd;
325 pud_t *pud;
326 pmd_t *pmd;
328 if (mm == &init_mm)
329 return;
330 pgd = mm->pgd + pgd_index(addr);
331 BUG_ON(pgd_none(*pgd));
332 pud = pud_offset(pgd, addr);
333 BUG_ON(pud_none(*pud));
334 pmd = pmd_offset(pud, addr);
335 BUG_ON(!pmd_present(*pmd));
336 assert_spin_locked(pte_lockptr(mm, pmd));
338 #endif /* CONFIG_DEBUG_VM */