iwlagn: move PCI power related functions to the PCI layer
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / iwlwifi / iwl-power.c
blob970c514623b93f802788357b3136941808bc79c4
1 /******************************************************************************
3 * Copyright(c) 2007 - 2011 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/slab.h>
33 #include <linux/init.h>
35 #include <net/mac80211.h>
37 #include "iwl-eeprom.h"
38 #include "iwl-dev.h"
39 #include "iwl-agn.h"
40 #include "iwl-core.h"
41 #include "iwl-io.h"
42 #include "iwl-commands.h"
43 #include "iwl-debug.h"
44 #include "iwl-power.h"
47 * Setting power level allows the card to go to sleep when not busy.
49 * We calculate a sleep command based on the required latency, which
50 * we get from mac80211. In order to handle thermal throttling, we can
51 * also use pre-defined power levels.
55 * This defines the old power levels. They are still used by default
56 * (level 1) and for thermal throttle (levels 3 through 5)
59 struct iwl_power_vec_entry {
60 struct iwl_powertable_cmd cmd;
61 u8 no_dtim; /* number of skip dtim */
64 #define IWL_DTIM_RANGE_0_MAX 2
65 #define IWL_DTIM_RANGE_1_MAX 10
67 #define NOSLP cpu_to_le16(0), 0, 0
68 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
69 #define ASLP (IWL_POWER_POWER_SAVE_ENA_MSK | \
70 IWL_POWER_POWER_MANAGEMENT_ENA_MSK | \
71 IWL_POWER_ADVANCE_PM_ENA_MSK)
72 #define ASLP_TOUT(T) cpu_to_le32(T)
73 #define TU_TO_USEC 1024
74 #define SLP_TOUT(T) cpu_to_le32((T) * TU_TO_USEC)
75 #define SLP_VEC(X0, X1, X2, X3, X4) {cpu_to_le32(X0), \
76 cpu_to_le32(X1), \
77 cpu_to_le32(X2), \
78 cpu_to_le32(X3), \
79 cpu_to_le32(X4)}
80 /* default power management (not Tx power) table values */
81 /* for DTIM period 0 through IWL_DTIM_RANGE_0_MAX */
82 /* DTIM 0 - 2 */
83 static const struct iwl_power_vec_entry range_0[IWL_POWER_NUM] = {
84 {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 1, 2, 2, 0xFF)}, 0},
85 {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0},
86 {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 2, 2, 2, 0xFF)}, 0},
87 {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 2, 4, 4, 0xFF)}, 1},
88 {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 2, 4, 6, 0xFF)}, 2}
92 /* for DTIM period IWL_DTIM_RANGE_0_MAX + 1 through IWL_DTIM_RANGE_1_MAX */
93 /* DTIM 3 - 10 */
94 static const struct iwl_power_vec_entry range_1[IWL_POWER_NUM] = {
95 {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
96 {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 3, 4, 7)}, 0},
97 {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 4, 6, 7, 9)}, 0},
98 {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 4, 6, 9, 10)}, 1},
99 {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 4, 6, 10, 10)}, 2}
102 /* for DTIM period > IWL_DTIM_RANGE_1_MAX */
103 /* DTIM 11 - */
104 static const struct iwl_power_vec_entry range_2[IWL_POWER_NUM] = {
105 {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
106 {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
107 {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
108 {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
109 {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
112 /* advance power management */
113 /* DTIM 0 - 2 */
114 static const struct iwl_power_vec_entry apm_range_0[IWL_POWER_NUM] = {
115 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
116 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
117 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
118 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
119 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
120 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
121 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
122 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
123 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
124 SLP_VEC(1, 2, 6, 8, 0xFF), ASLP_TOUT(2)}, 2}
128 /* for DTIM period IWL_DTIM_RANGE_0_MAX + 1 through IWL_DTIM_RANGE_1_MAX */
129 /* DTIM 3 - 10 */
130 static const struct iwl_power_vec_entry apm_range_1[IWL_POWER_NUM] = {
131 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
132 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
133 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
134 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
135 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
136 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
137 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
138 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
139 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
140 SLP_VEC(1, 2, 6, 8, 0xFF), 0}, 2}
143 /* for DTIM period > IWL_DTIM_RANGE_1_MAX */
144 /* DTIM 11 - */
145 static const struct iwl_power_vec_entry apm_range_2[IWL_POWER_NUM] = {
146 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
147 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
148 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
149 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
150 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
151 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
152 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
153 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
154 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
155 SLP_VEC(1, 2, 6, 8, 0xFF), ASLP_TOUT(2)}, 2}
158 static void iwl_static_sleep_cmd(struct iwl_priv *priv,
159 struct iwl_powertable_cmd *cmd,
160 enum iwl_power_level lvl, int period)
162 const struct iwl_power_vec_entry *table;
163 int max_sleep[IWL_POWER_VEC_SIZE] = { 0 };
164 int i;
165 u8 skip;
166 u32 slp_itrvl;
168 if (priv->cfg->adv_pm) {
169 table = apm_range_2;
170 if (period <= IWL_DTIM_RANGE_1_MAX)
171 table = apm_range_1;
172 if (period <= IWL_DTIM_RANGE_0_MAX)
173 table = apm_range_0;
174 } else {
175 table = range_2;
176 if (period <= IWL_DTIM_RANGE_1_MAX)
177 table = range_1;
178 if (period <= IWL_DTIM_RANGE_0_MAX)
179 table = range_0;
182 if (WARN_ON(lvl < 0 || lvl >= IWL_POWER_NUM))
183 memset(cmd, 0, sizeof(*cmd));
184 else
185 *cmd = table[lvl].cmd;
187 if (period == 0) {
188 skip = 0;
189 period = 1;
190 for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
191 max_sleep[i] = 1;
193 } else {
194 skip = table[lvl].no_dtim;
195 for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
196 max_sleep[i] = le32_to_cpu(cmd->sleep_interval[i]);
197 max_sleep[IWL_POWER_VEC_SIZE - 1] = skip + 1;
200 slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
201 /* figure out the listen interval based on dtim period and skip */
202 if (slp_itrvl == 0xFF)
203 cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
204 cpu_to_le32(period * (skip + 1));
206 slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
207 if (slp_itrvl > period)
208 cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
209 cpu_to_le32((slp_itrvl / period) * period);
211 if (skip)
212 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
213 else
214 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
216 if (priv->cfg->base_params->shadow_reg_enable)
217 cmd->flags |= IWL_POWER_SHADOW_REG_ENA;
218 else
219 cmd->flags &= ~IWL_POWER_SHADOW_REG_ENA;
221 if (iwl_advanced_bt_coexist(priv)) {
222 if (!priv->cfg->bt_params->bt_sco_disable)
223 cmd->flags |= IWL_POWER_BT_SCO_ENA;
224 else
225 cmd->flags &= ~IWL_POWER_BT_SCO_ENA;
229 slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
230 if (slp_itrvl > IWL_CONN_MAX_LISTEN_INTERVAL)
231 cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
232 cpu_to_le32(IWL_CONN_MAX_LISTEN_INTERVAL);
234 /* enforce max sleep interval */
235 for (i = IWL_POWER_VEC_SIZE - 1; i >= 0 ; i--) {
236 if (le32_to_cpu(cmd->sleep_interval[i]) >
237 (max_sleep[i] * period))
238 cmd->sleep_interval[i] =
239 cpu_to_le32(max_sleep[i] * period);
240 if (i != (IWL_POWER_VEC_SIZE - 1)) {
241 if (le32_to_cpu(cmd->sleep_interval[i]) >
242 le32_to_cpu(cmd->sleep_interval[i+1]))
243 cmd->sleep_interval[i] =
244 cmd->sleep_interval[i+1];
248 if (priv->power_data.bus_pm)
249 cmd->flags |= IWL_POWER_PCI_PM_MSK;
250 else
251 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
253 IWL_DEBUG_POWER(priv, "numSkipDtim = %u, dtimPeriod = %d\n",
254 skip, period);
255 IWL_DEBUG_POWER(priv, "Sleep command for index %d\n", lvl + 1);
258 static void iwl_power_sleep_cam_cmd(struct iwl_priv *priv,
259 struct iwl_powertable_cmd *cmd)
261 memset(cmd, 0, sizeof(*cmd));
263 if (priv->power_data.bus_pm)
264 cmd->flags |= IWL_POWER_PCI_PM_MSK;
266 IWL_DEBUG_POWER(priv, "Sleep command for CAM\n");
269 static void iwl_power_fill_sleep_cmd(struct iwl_priv *priv,
270 struct iwl_powertable_cmd *cmd,
271 int dynps_ms, int wakeup_period)
274 * These are the original power level 3 sleep successions. The
275 * device may behave better with such succession and was also
276 * only tested with that. Just like the original sleep commands,
277 * also adjust the succession here to the wakeup_period below.
278 * The ranges are the same as for the sleep commands, 0-2, 3-9
279 * and >10, which is selected based on the DTIM interval for
280 * the sleep index but here we use the wakeup period since that
281 * is what we need to do for the latency requirements.
283 static const u8 slp_succ_r0[IWL_POWER_VEC_SIZE] = { 2, 2, 2, 2, 2 };
284 static const u8 slp_succ_r1[IWL_POWER_VEC_SIZE] = { 2, 4, 6, 7, 9 };
285 static const u8 slp_succ_r2[IWL_POWER_VEC_SIZE] = { 2, 7, 9, 9, 0xFF };
286 const u8 *slp_succ = slp_succ_r0;
287 int i;
289 if (wakeup_period > IWL_DTIM_RANGE_0_MAX)
290 slp_succ = slp_succ_r1;
291 if (wakeup_period > IWL_DTIM_RANGE_1_MAX)
292 slp_succ = slp_succ_r2;
294 memset(cmd, 0, sizeof(*cmd));
296 cmd->flags = IWL_POWER_DRIVER_ALLOW_SLEEP_MSK |
297 IWL_POWER_FAST_PD; /* no use seeing frames for others */
299 if (priv->power_data.bus_pm)
300 cmd->flags |= IWL_POWER_PCI_PM_MSK;
302 if (priv->cfg->base_params->shadow_reg_enable)
303 cmd->flags |= IWL_POWER_SHADOW_REG_ENA;
304 else
305 cmd->flags &= ~IWL_POWER_SHADOW_REG_ENA;
307 if (iwl_advanced_bt_coexist(priv)) {
308 if (!priv->cfg->bt_params->bt_sco_disable)
309 cmd->flags |= IWL_POWER_BT_SCO_ENA;
310 else
311 cmd->flags &= ~IWL_POWER_BT_SCO_ENA;
314 cmd->rx_data_timeout = cpu_to_le32(1000 * dynps_ms);
315 cmd->tx_data_timeout = cpu_to_le32(1000 * dynps_ms);
317 for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
318 cmd->sleep_interval[i] =
319 cpu_to_le32(min_t(int, slp_succ[i], wakeup_period));
321 IWL_DEBUG_POWER(priv, "Automatic sleep command\n");
324 static int iwl_set_power(struct iwl_priv *priv, struct iwl_powertable_cmd *cmd)
326 IWL_DEBUG_POWER(priv, "Sending power/sleep command\n");
327 IWL_DEBUG_POWER(priv, "Flags value = 0x%08X\n", cmd->flags);
328 IWL_DEBUG_POWER(priv, "Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
329 IWL_DEBUG_POWER(priv, "Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
330 IWL_DEBUG_POWER(priv, "Sleep interval vector = { %d , %d , %d , %d , %d }\n",
331 le32_to_cpu(cmd->sleep_interval[0]),
332 le32_to_cpu(cmd->sleep_interval[1]),
333 le32_to_cpu(cmd->sleep_interval[2]),
334 le32_to_cpu(cmd->sleep_interval[3]),
335 le32_to_cpu(cmd->sleep_interval[4]));
337 return iwl_send_cmd_pdu(priv, POWER_TABLE_CMD,
338 sizeof(struct iwl_powertable_cmd), cmd);
341 static void iwl_power_build_cmd(struct iwl_priv *priv,
342 struct iwl_powertable_cmd *cmd)
344 bool enabled = priv->hw->conf.flags & IEEE80211_CONF_PS;
345 int dtimper;
347 dtimper = priv->hw->conf.ps_dtim_period ?: 1;
349 if (priv->hw->conf.flags & IEEE80211_CONF_IDLE)
350 iwl_static_sleep_cmd(priv, cmd, IWL_POWER_INDEX_5, 20);
351 else if (iwl_tt_is_low_power_state(priv)) {
352 /* in thermal throttling low power state */
353 iwl_static_sleep_cmd(priv, cmd,
354 iwl_tt_current_power_mode(priv), dtimper);
355 } else if (!enabled)
356 iwl_power_sleep_cam_cmd(priv, cmd);
357 else if (priv->power_data.debug_sleep_level_override >= 0)
358 iwl_static_sleep_cmd(priv, cmd,
359 priv->power_data.debug_sleep_level_override,
360 dtimper);
361 else if (iwlagn_mod_params.no_sleep_autoadjust)
362 iwl_static_sleep_cmd(priv, cmd, IWL_POWER_INDEX_1, dtimper);
363 else
364 iwl_power_fill_sleep_cmd(priv, cmd,
365 priv->hw->conf.dynamic_ps_timeout,
366 priv->hw->conf.max_sleep_period);
369 int iwl_power_set_mode(struct iwl_priv *priv, struct iwl_powertable_cmd *cmd,
370 bool force)
372 int ret;
373 bool update_chains;
375 lockdep_assert_held(&priv->mutex);
377 /* Don't update the RX chain when chain noise calibration is running */
378 update_chains = priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE ||
379 priv->chain_noise_data.state == IWL_CHAIN_NOISE_ALIVE;
381 if (!memcmp(&priv->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force)
382 return 0;
384 if (!iwl_is_ready_rf(priv))
385 return -EIO;
387 /* scan complete use sleep_power_next, need to be updated */
388 memcpy(&priv->power_data.sleep_cmd_next, cmd, sizeof(*cmd));
389 if (test_bit(STATUS_SCANNING, &priv->status) && !force) {
390 IWL_DEBUG_INFO(priv, "Defer power set mode while scanning\n");
391 return 0;
394 if (cmd->flags & IWL_POWER_DRIVER_ALLOW_SLEEP_MSK)
395 set_bit(STATUS_POWER_PMI, &priv->status);
397 ret = iwl_set_power(priv, cmd);
398 if (!ret) {
399 if (!(cmd->flags & IWL_POWER_DRIVER_ALLOW_SLEEP_MSK))
400 clear_bit(STATUS_POWER_PMI, &priv->status);
402 if (priv->cfg->ops->lib->update_chain_flags && update_chains)
403 priv->cfg->ops->lib->update_chain_flags(priv);
404 else if (priv->cfg->ops->lib->update_chain_flags)
405 IWL_DEBUG_POWER(priv,
406 "Cannot update the power, chain noise "
407 "calibration running: %d\n",
408 priv->chain_noise_data.state);
410 memcpy(&priv->power_data.sleep_cmd, cmd, sizeof(*cmd));
411 } else
412 IWL_ERR(priv, "set power fail, ret = %d", ret);
414 return ret;
417 int iwl_power_update_mode(struct iwl_priv *priv, bool force)
419 struct iwl_powertable_cmd cmd;
421 iwl_power_build_cmd(priv, &cmd);
422 return iwl_power_set_mode(priv, &cmd, force);
425 /* initialize to default */
426 void iwl_power_initialize(struct iwl_priv *priv)
428 priv->power_data.bus_pm = priv->bus.ops->get_pm_support(&priv->bus);
430 priv->power_data.debug_sleep_level_override = -1;
432 memset(&priv->power_data.sleep_cmd, 0,
433 sizeof(priv->power_data.sleep_cmd));