drivers/staging/gma500/mdfld_dsi_dbi.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  * jim liu <jim.liu@intel.com>
  25  * Jackie Li<yaodong.li@intel.com>
  26  */
  27
  28 #ifndef __MDFLD_DSI_DBI_H__
  29 #define __MDFLD_DSI_DBI_H__
  30
  31 #include <linux/backlight.h>
  32 #include <drm/drmP.h>
  33 #include <drm/drm.h>
  34 #include <drm/drm_crtc.h>
  35 #include <drm/drm_edid.h>
  36
  37 #include "psb_drv.h"
  38 #include "psb_intel_drv.h"
  39 #include "psb_intel_reg.h"
  40 #include "power.h"
  41
  42 #include "mdfld_dsi_output.h"
  43 #include "mdfld_output.h"
  44
  45 #define DRM_MODE_ENCODER_MIPI  5
  46
  47
  48 /*
  49  * DBI encoder which inherits from mdfld_dsi_encoder
  50  */
  51 struct mdfld_dsi_dbi_output {
  52         struct mdfld_dsi_encoder base;
  53         struct drm_display_mode *panel_fixed_mode;
  54         u8 last_cmd;
  55         u8 lane_count;
  56         u8 channel_num;
  57         struct drm_device *dev;
  58
  59         /* Backlight operations */
  60
  61         /* DSR timer */
  62         u32 dsr_idle_count;
  63         bool dsr_fb_update_done;
  64
  65         /* Mode setting flags */
  66         u32 mode_flags;
  67
  68         /* Panel status */
  69         bool dbi_panel_on;
  70         bool first_boot;
  71         struct panel_funcs *p_funcs;
  72
  73         /* DPU */
  74         u32 *dbi_cb_addr;
  75         u32 dbi_cb_phy;
  76         spinlock_t cb_lock;
  77         u32 cb_write;
  78 };
  79
  80 #define MDFLD_DSI_DBI_OUTPUT(dsi_encoder) \
  81         container_of(dsi_encoder, struct mdfld_dsi_dbi_output, base)
  82
  83 struct mdfld_dbi_dsr_info {
  84         int dbi_output_num;
  85         struct mdfld_dsi_dbi_output *dbi_outputs[2];
  86
  87         u32 dsr_idle_count;
  88 };
  89
  90 #define DBI_CB_TIMEOUT_COUNT    0xffff
  91
  92 /* Offsets */
  93 #define CMD_MEM_ADDR_OFFSET     0
  94
  95 #define CMD_DATA_SRC_SYSTEM_MEM 0
  96 #define CMD_DATA_SRC_PIPE       1
  97
  98 static inline int mdfld_dsi_dbi_fifo_ready(struct mdfld_dsi_dbi_output *dbi_output)
  99 {
 100         struct drm_device *dev = dbi_output->dev;
 101         u32 retry = DBI_CB_TIMEOUT_COUNT;
 102         int reg_offset = (dbi_output->channel_num == 1) ? MIPIC_REG_OFFSET : 0;
 103         int ret = 0;
 104
 105         /* Query the dbi fifo status*/
 106         while (retry--) {
 107                 if (REG_READ(MIPIA_GEN_FIFO_STAT_REG + reg_offset) & (1 << 27))
 108                         break;
 109         }
 110
 111         if (!retry) {
 112                 DRM_ERROR("Timeout waiting for DBI FIFO empty\n");
 113                 ret = -EAGAIN;
 114         }
 115         return ret;
 116 }
 117
 118 static inline int mdfld_dsi_dbi_cmd_sent(struct mdfld_dsi_dbi_output *dbi_output)
 119 {
 120         struct drm_device *dev = dbi_output->dev;
 121         u32 retry = DBI_CB_TIMEOUT_COUNT;
 122         int reg_offset = (dbi_output->channel_num == 1) ? MIPIC_REG_OFFSET : 0;
 123         int ret = 0;
 124
 125         /* Query the command execution status */
 126         while (retry--)
 127                 if (!(REG_READ(MIPIA_CMD_ADD_REG + reg_offset) & (1 << 0)))
 128                         break;
 129
 130         if (!retry) {
 131                 DRM_ERROR("Timeout waiting for DBI command status\n");
 132                 ret = -EAGAIN;
 133         }
 134
 135         return ret;
 136 }
 137
 138 static inline int mdfld_dsi_dbi_cb_ready(struct mdfld_dsi_dbi_output *dbi_output)
 139 {
 140         int ret = 0;
 141
 142         /* Query the command execution status*/
 143         ret = mdfld_dsi_dbi_cmd_sent(dbi_output);
 144         if (ret) {
 145                 DRM_ERROR("Peripheral is busy\n");
 146                 ret = -EAGAIN;
 147         }
 148         /* Query the dbi fifo status*/
 149         ret = mdfld_dsi_dbi_fifo_ready(dbi_output);
 150         if (ret) {
 151                 DRM_ERROR("DBI FIFO is not empty\n");
 152                 ret = -EAGAIN;
 153         }
 154         return ret;
 155 }
 156
 157 extern void mdfld_dsi_dbi_output_init(struct drm_device *dev,
 158                         struct psb_intel_mode_device *mode_dev, int pipe);
 159 extern void mdfld_dsi_dbi_exit_dsr(struct drm_device *dev, u32 update_src);
 160 extern void mdfld_dsi_dbi_enter_dsr(struct mdfld_dsi_dbi_output *dbi_output,
 161                         int pipe);
 162 extern int mdfld_dbi_dsr_init(struct drm_device *dev);
 163 extern void mdfld_dbi_dsr_exit(struct drm_device *dev);
 164 extern struct mdfld_dsi_encoder *mdfld_dsi_dbi_init(struct drm_device *dev,
 165                         struct mdfld_dsi_connector *dsi_connector,
 166                         struct panel_funcs *p_funcs);
 167 extern int mdfld_dsi_dbi_send_dcs(struct mdfld_dsi_dbi_output *dbi_output,
 168                         u8 dcs, u8 *param, u32 num, u8 data_src);
 169 extern int mdfld_dsi_dbi_update_area(struct mdfld_dsi_dbi_output *dbi_output,
 170                         u16 x1, u16 y1, u16 x2, u16 y2);
 171 extern int mdfld_dsi_dbi_update_power(struct mdfld_dsi_dbi_output *dbi_output,
 172                         int mode);
 173 extern void mdfld_dsi_controller_dbi_init(struct mdfld_dsi_config *dsi_config,
 174                         int pipe);
 175
 176 #endif /*__MDFLD_DSI_DBI_H__*/