xHCI: Implement AMD PLL quirk
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / usb / host / xhci-pci.c
bloba10494c2f3c7749a83fe52b2479c469da47e9d0e
1 /*
2 * xHCI host controller driver PCI Bus Glue.
4 * Copyright (C) 2008 Intel Corp.
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
25 #include "xhci.h"
27 /* Device for a quirk */
28 #define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
29 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
31 static const char hcd_name[] = "xhci_hcd";
33 /* called after powerup, by probe or system-pm "wakeup" */
34 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
37 * TODO: Implement finding debug ports later.
38 * TODO: see if there are any quirks that need to be added to handle
39 * new extended capabilities.
42 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
43 if (!pci_set_mwi(pdev))
44 xhci_dbg(xhci, "MWI active\n");
46 xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
47 return 0;
50 /* called during probe() after chip reset completes */
51 static int xhci_pci_setup(struct usb_hcd *hcd)
53 struct xhci_hcd *xhci;
54 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
55 int retval;
56 u32 temp;
58 hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;
60 if (usb_hcd_is_primary_hcd(hcd)) {
61 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
62 if (!xhci)
63 return -ENOMEM;
64 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
65 xhci->main_hcd = hcd;
66 /* Mark the first roothub as being USB 2.0.
67 * The xHCI driver will register the USB 3.0 roothub.
69 hcd->speed = HCD_USB2;
70 hcd->self.root_hub->speed = USB_SPEED_HIGH;
72 * USB 2.0 roothub under xHCI has an integrated TT,
73 * (rate matching hub) as opposed to having an OHCI/UHCI
74 * companion controller.
76 hcd->has_tt = 1;
77 } else {
78 /* xHCI private pointer was set in xhci_pci_probe for the second
79 * registered roothub.
81 xhci = hcd_to_xhci(hcd);
82 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
83 if (HCC_64BIT_ADDR(temp)) {
84 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
85 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
86 } else {
87 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
89 return 0;
92 xhci->cap_regs = hcd->regs;
93 xhci->op_regs = hcd->regs +
94 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
95 xhci->run_regs = hcd->regs +
96 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
97 /* Cache read-only capability registers */
98 xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
99 xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
100 xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
101 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
102 xhci->hci_version = HC_VERSION(xhci->hcc_params);
103 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
104 xhci_print_registers(xhci);
106 /* Look for vendor-specific quirks */
107 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
108 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
109 pdev->revision == 0x0) {
110 xhci->quirks |= XHCI_RESET_EP_QUIRK;
111 xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
112 " endpoint cmd after reset endpoint\n");
114 if (pdev->vendor == PCI_VENDOR_ID_NEC)
115 xhci->quirks |= XHCI_NEC_HOST;
117 /* AMD PLL quirk */
118 if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
119 xhci->quirks |= XHCI_AMD_PLL_FIX;
121 /* Make sure the HC is halted. */
122 retval = xhci_halt(xhci);
123 if (retval)
124 goto error;
126 xhci_dbg(xhci, "Resetting HCD\n");
127 /* Reset the internal HC memory state and registers. */
128 retval = xhci_reset(xhci);
129 if (retval)
130 goto error;
131 xhci_dbg(xhci, "Reset complete\n");
133 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
134 if (HCC_64BIT_ADDR(temp)) {
135 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
136 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
137 } else {
138 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
141 xhci_dbg(xhci, "Calling HCD init\n");
142 /* Initialize HCD and host controller data structures. */
143 retval = xhci_init(hcd);
144 if (retval)
145 goto error;
146 xhci_dbg(xhci, "Called HCD init\n");
148 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
149 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
151 /* Find any debug ports */
152 retval = xhci_pci_reinit(xhci, pdev);
153 if (!retval)
154 return retval;
156 error:
157 kfree(xhci);
158 return retval;
162 * We need to register our own PCI probe function (instead of the USB core's
163 * function) in order to create a second roothub under xHCI.
165 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
167 int retval;
168 struct xhci_hcd *xhci;
169 struct hc_driver *driver;
170 struct usb_hcd *hcd;
172 driver = (struct hc_driver *)id->driver_data;
173 /* Register the USB 2.0 roothub.
174 * FIXME: USB core must know to register the USB 2.0 roothub first.
175 * This is sort of silly, because we could just set the HCD driver flags
176 * to say USB 2.0, but I'm not sure what the implications would be in
177 * the other parts of the HCD code.
179 retval = usb_hcd_pci_probe(dev, id);
181 if (retval)
182 return retval;
184 /* USB 2.0 roothub is stored in the PCI device now. */
185 hcd = dev_get_drvdata(&dev->dev);
186 xhci = hcd_to_xhci(hcd);
187 xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
188 pci_name(dev), hcd);
189 if (!xhci->shared_hcd) {
190 retval = -ENOMEM;
191 goto dealloc_usb2_hcd;
194 /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
195 * is called by usb_add_hcd().
197 *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
199 retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
200 IRQF_DISABLED | IRQF_SHARED);
201 if (retval)
202 goto put_usb3_hcd;
203 /* Roothub already marked as USB 3.0 speed */
204 return 0;
206 put_usb3_hcd:
207 usb_put_hcd(xhci->shared_hcd);
208 dealloc_usb2_hcd:
209 usb_hcd_pci_remove(dev);
210 return retval;
213 static void xhci_pci_remove(struct pci_dev *dev)
215 struct xhci_hcd *xhci;
217 xhci = hcd_to_xhci(pci_get_drvdata(dev));
218 if (xhci->shared_hcd) {
219 usb_remove_hcd(xhci->shared_hcd);
220 usb_put_hcd(xhci->shared_hcd);
222 usb_hcd_pci_remove(dev);
223 kfree(xhci);
226 #ifdef CONFIG_PM
227 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
229 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
230 int retval = 0;
232 if (hcd->state != HC_STATE_SUSPENDED ||
233 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
234 return -EINVAL;
236 retval = xhci_suspend(xhci);
238 return retval;
241 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
243 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
244 int retval = 0;
246 retval = xhci_resume(xhci, hibernated);
247 return retval;
249 #endif /* CONFIG_PM */
251 static const struct hc_driver xhci_pci_hc_driver = {
252 .description = hcd_name,
253 .product_desc = "xHCI Host Controller",
254 .hcd_priv_size = sizeof(struct xhci_hcd *),
257 * generic hardware linkage
259 .irq = xhci_irq,
260 .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
263 * basic lifecycle operations
265 .reset = xhci_pci_setup,
266 .start = xhci_run,
267 #ifdef CONFIG_PM
268 .pci_suspend = xhci_pci_suspend,
269 .pci_resume = xhci_pci_resume,
270 #endif
271 .stop = xhci_stop,
272 .shutdown = xhci_shutdown,
275 * managing i/o requests and associated device resources
277 .urb_enqueue = xhci_urb_enqueue,
278 .urb_dequeue = xhci_urb_dequeue,
279 .alloc_dev = xhci_alloc_dev,
280 .free_dev = xhci_free_dev,
281 .alloc_streams = xhci_alloc_streams,
282 .free_streams = xhci_free_streams,
283 .add_endpoint = xhci_add_endpoint,
284 .drop_endpoint = xhci_drop_endpoint,
285 .endpoint_reset = xhci_endpoint_reset,
286 .check_bandwidth = xhci_check_bandwidth,
287 .reset_bandwidth = xhci_reset_bandwidth,
288 .address_device = xhci_address_device,
289 .update_hub_device = xhci_update_hub_device,
290 .reset_device = xhci_discover_or_reset_device,
293 * scheduling support
295 .get_frame_number = xhci_get_frame,
297 /* Root hub support */
298 .hub_control = xhci_hub_control,
299 .hub_status_data = xhci_hub_status_data,
300 .bus_suspend = xhci_bus_suspend,
301 .bus_resume = xhci_bus_resume,
304 /*-------------------------------------------------------------------------*/
306 /* PCI driver selection metadata; PCI hotplugging uses this */
307 static const struct pci_device_id pci_ids[] = { {
308 /* handle any USB 3.0 xHCI controller */
309 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
310 .driver_data = (unsigned long) &xhci_pci_hc_driver,
312 { /* end: all zeroes */ }
314 MODULE_DEVICE_TABLE(pci, pci_ids);
316 /* pci driver glue; this is a "new style" PCI driver module */
317 static struct pci_driver xhci_pci_driver = {
318 .name = (char *) hcd_name,
319 .id_table = pci_ids,
321 .probe = xhci_pci_probe,
322 .remove = xhci_pci_remove,
323 /* suspend and resume implemented later */
325 .shutdown = usb_hcd_pci_shutdown,
326 #ifdef CONFIG_PM_SLEEP
327 .driver = {
328 .pm = &usb_hcd_pci_pm_ops
330 #endif
333 int xhci_register_pci(void)
335 return pci_register_driver(&xhci_pci_driver);
338 void xhci_unregister_pci(void)
340 pci_unregister_driver(&xhci_pci_driver);