drivers/net/wireless/iwlwifi/iwl-rx.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/etherdevice.h>
  31 #include <linux/slab.h>
  32 #include <net/mac80211.h>
  33 #include <asm/unaligned.h>
  34 #include "iwl-eeprom.h"
  35 #include "iwl-dev.h"
  36 #include "iwl-core.h"
  37 #include "iwl-sta.h"
  38 #include "iwl-io.h"
  39 #include "iwl-helpers.h"
  40 /************************** RX-FUNCTIONS ****************************/
  41 /*
  42  * Rx theory of operation
  43  *
  44  * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  45  * each of which point to Receive Buffers to be filled by the NIC.  These get
  46  * used not only for Rx frames, but for any command response or notification
  47  * from the NIC.  The driver and NIC manage the Rx buffers by means
  48  * of indexes into the circular buffer.
  49  *
  50  * Rx Queue Indexes
  51  * The host/firmware share two index registers for managing the Rx buffers.
  52  *
  53  * The READ index maps to the first position that the firmware may be writing
  54  * to -- the driver can read up to (but not including) this position and get
  55  * good data.
  56  * The READ index is managed by the firmware once the card is enabled.
  57  *
  58  * The WRITE index maps to the last position the driver has read from -- the
  59  * position preceding WRITE is the last slot the firmware can place a packet.
  60  *
  61  * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  62  * WRITE = READ.
  63  *
  64  * During initialization, the host sets up the READ queue position to the first
  65  * INDEX position, and WRITE to the last (READ - 1 wrapped)
  66  *
  67  * When the firmware places a packet in a buffer, it will advance the READ index
  68  * and fire the RX interrupt.  The driver can then query the READ index and
  69  * process as many packets as possible, moving the WRITE index forward as it
  70  * resets the Rx queue buffers with new memory.
  71  *
  72  * The management in the driver is as follows:
  73  * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free.  When
  74  *   iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  75  *   to replenish the iwl->rxq->rx_free.
  76  * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
  77  *   iwl->rxq is replenished and the READ INDEX is updated (updating the
  78  *   'processed' and 'read' driver indexes as well)
  79  * + A received packet is processed and handed to the kernel network stack,
  80  *   detached from the iwl->rxq.  The driver 'processed' index is updated.
  81  * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  82  *   list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  83  *   INDEX is not incremented and iwl->status(RX_STALLED) is set.  If there
  84  *   were enough free buffers and RX_STALLED is set it is cleared.
  85  *
  86  *
  87  * Driver sequence:
  88  *
  89  * iwl_rx_queue_alloc()   Allocates rx_free
  90  * iwl_rx_replenish()     Replenishes rx_free list from rx_used, and calls
  91  *                            iwl_rx_queue_restock
  92  * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
  93  *                            queue, updates firmware pointers, and updates
  94  *                            the WRITE index.  If insufficient rx_free buffers
  95  *                            are available, schedules iwl_rx_replenish
  96  *
  97  * -- enable interrupts --
  98  * ISR - iwl_rx()         Detach iwl_rx_mem_buffers from pool up to the
  99  *                            READ INDEX, detaching the SKB from the pool.
 100  *                            Moves the packet buffer from queue to rx_used.
 101  *                            Calls iwl_rx_queue_restock to refill any empty
 102  *                            slots.
 103  * ...
 104  *
 105  */
 106
 107 /**
 108  * iwl_rx_queue_space - Return number of free slots available in queue.
 109  */
 110 int iwl_rx_queue_space(const struct iwl_rx_queue *q)
 111 {
 112         int s = q->read - q->write;
 113         if (s <= 0)
 114                 s += RX_QUEUE_SIZE;
 115         /* keep some buffer to not confuse full and empty queue */
 116         s -= 2;
 117         if (s < 0)
 118                 s = 0;
 119         return s;
 120 }
 121
 122 /**
 123  * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
 124  */
 125 void iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
 126 {
 127         unsigned long flags;
 128         u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg;
 129         u32 reg;
 130
 131         spin_lock_irqsave(&q->lock, flags);
 132
 133         if (q->need_update == 0)
 134                 goto exit_unlock;
 135
 136         if (priv->cfg->base_params->shadow_reg_enable) {
 137                 /* shadow register enabled */
 138                 /* Device expects a multiple of 8 */
 139                 q->write_actual = (q->write & ~0x7);
 140                 iwl_write32(priv, rx_wrt_ptr_reg, q->write_actual);
 141         } else {
 142                 /* If power-saving is in use, make sure device is awake */
 143                 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
 144                         reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
 145
 146                         if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
 147                                 IWL_DEBUG_INFO(priv,
 148                                         "Rx queue requesting wakeup,"
 149                                         " GP1 = 0x%x\n", reg);
 150                                 iwl_set_bit(priv, CSR_GP_CNTRL,
 151                                         CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
 152                                 goto exit_unlock;
 153                         }
 154
 155                         q->write_actual = (q->write & ~0x7);
 156                         iwl_write_direct32(priv, rx_wrt_ptr_reg,
 157                                         q->write_actual);
 158
 159                 /* Else device is assumed to be awake */
 160                 } else {
 161                         /* Device expects a multiple of 8 */
 162                         q->write_actual = (q->write & ~0x7);
 163                         iwl_write_direct32(priv, rx_wrt_ptr_reg,
 164                                 q->write_actual);
 165                 }
 166         }
 167         q->need_update = 0;
 168
 169  exit_unlock:
 170         spin_unlock_irqrestore(&q->lock, flags);
 171 }
 172
 173 int iwl_rx_queue_alloc(struct iwl_priv *priv)
 174 {
 175         struct iwl_rx_queue *rxq = &priv->rxq;
 176         struct device *dev = &priv->pci_dev->dev;
 177         int i;
 178
 179         spin_lock_init(&rxq->lock);
 180         INIT_LIST_HEAD(&rxq->rx_free);
 181         INIT_LIST_HEAD(&rxq->rx_used);
 182
 183         /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
 184         rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->bd_dma,
 185                                      GFP_KERNEL);
 186         if (!rxq->bd)
 187                 goto err_bd;
 188
 189         rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct iwl_rb_status),
 190                                           &rxq->rb_stts_dma, GFP_KERNEL);
 191         if (!rxq->rb_stts)
 192                 goto err_rb;
 193
 194         /* Fill the rx_used queue with _all_ of the Rx buffers */
 195         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
 196                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
 197
 198         /* Set us so that we have processed and used all buffers, but have
 199          * not restocked the Rx queue with fresh buffers */
 200         rxq->read = rxq->write = 0;
 201         rxq->write_actual = 0;
 202         rxq->free_count = 0;
 203         rxq->need_update = 0;
 204         return 0;
 205
 206 err_rb:
 207         dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
 208                           rxq->bd_dma);
 209 err_bd:
 210         return -ENOMEM;
 211 }
 212
 213
 214 void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
 215                                           struct iwl_rx_mem_buffer *rxb)
 216 {
 217         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 218         struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
 219
 220         if (!report->state) {
 221                 IWL_DEBUG_11H(priv,
 222                         "Spectrum Measure Notification: Start\n");
 223                 return;
 224         }
 225
 226         memcpy(&priv->measure_report, report, sizeof(*report));
 227         priv->measurement_status |= MEASUREMENT_READY;
 228 }
 229
 230 void iwl_recover_from_statistics(struct iwl_priv *priv,
 231                                 struct iwl_rx_packet *pkt)
 232 {
 233         const struct iwl_mod_params *mod_params = priv->cfg->mod_params;
 234
 235         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
 236             !iwl_is_any_associated(priv))
 237                 return;
 238
 239         if (mod_params->ack_check &&
 240             priv->cfg->ops->lib->check_ack_health &&
 241             !priv->cfg->ops->lib->check_ack_health(priv, pkt)) {
 242                 IWL_ERR(priv, "low ack count detected, restart firmware\n");
 243                 if (!iwl_force_reset(priv, IWL_FW_RESET, false))
 244                         return;
 245         }
 246
 247         if (mod_params->plcp_check &&
 248             priv->cfg->ops->lib->check_plcp_health &&
 249             !priv->cfg->ops->lib->check_plcp_health(priv, pkt))
 250                 iwl_force_reset(priv, IWL_RF_RESET, false);
 251 }
 252
 253 /*
 254  * returns non-zero if packet should be dropped
 255  */
 256 int iwl_set_decrypted_flag(struct iwl_priv *priv,
 257                            struct ieee80211_hdr *hdr,
 258                            u32 decrypt_res,
 259                            struct ieee80211_rx_status *stats)
 260 {
 261         u16 fc = le16_to_cpu(hdr->frame_control);
 262
 263         /*
 264          * All contexts have the same setting here due to it being
 265          * a module parameter, so OK to check any context.
 266          */
 267         if (priv->contexts[IWL_RXON_CTX_BSS].active.filter_flags &
 268                                                 RXON_FILTER_DIS_DECRYPT_MSK)
 269                 return 0;
 270
 271         if (!(fc & IEEE80211_FCTL_PROTECTED))
 272                 return 0;
 273
 274         IWL_DEBUG_RX(priv, "decrypt_res:0x%x\n", decrypt_res);
 275         switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
 276         case RX_RES_STATUS_SEC_TYPE_TKIP:
 277                 /* The uCode has got a bad phase 1 Key, pushes the packet.
 278                  * Decryption will be done in SW. */
 279                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
 280                     RX_RES_STATUS_BAD_KEY_TTAK)
 281                         break;
 282
 283         case RX_RES_STATUS_SEC_TYPE_WEP:
 284                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
 285                     RX_RES_STATUS_BAD_ICV_MIC) {
 286                         /* bad ICV, the packet is destroyed since the
 287                          * decryption is inplace, drop it */
 288                         IWL_DEBUG_RX(priv, "Packet destroyed\n");
 289                         return -1;
 290                 }
 291         case RX_RES_STATUS_SEC_TYPE_CCMP:
 292                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
 293                     RX_RES_STATUS_DECRYPT_OK) {
 294                         IWL_DEBUG_RX(priv, "hw decrypt successfully!!!\n");
 295                         stats->flag |= RX_FLAG_DECRYPTED;
 296                 }
 297                 break;
 298
 299         default:
 300                 break;
 301         }
 302         return 0;
 303 }