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davinci: board-dm646x-evm.c: arrange related code together
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / arm / mach-davinci / board-dm646x-evm.c
blob8c05343bb001841eb69dfd40f8f6c6df0c840938
1 /*
2 * TI DaVinci DM646X EVM board
3 *
4 * Derived from: arch/arm/mach-davinci/board-evm.c
5 * Copyright (C) 2006 Texas Instruments.
6 *
7 * (C) 2007-2008, MontaVista Software, Inc.
8 *
9 * This file is licensed under the terms of the GNU General Public License
10 * version 2. This program is licensed "as is" without any warranty of any
11 * kind, whether express or implied.
12 *
13 */
14
15 /**************************************************************************
16 * Included Files
17 **************************************************************************/
18
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/leds.h>
22 #include <linux/gpio.h>
23 #include <linux/platform_device.h>
24 #include <linux/i2c.h>
25 #include <linux/i2c/at24.h>
26 #include <linux/i2c/pcf857x.h>
27
28 #include <media/tvp514x.h>
29
30 #include <linux/mtd/mtd.h>
31 #include <linux/mtd/nand.h>
32 #include <linux/mtd/partitions.h>
33
34 #include <asm/mach-types.h>
35 #include <asm/mach/arch.h>
36
37 #include <mach/dm646x.h>
38 #include <mach/common.h>
39 #include <mach/serial.h>
40 #include <mach/i2c.h>
41 #include <mach/nand.h>
42
43 #define NAND_BLOCK_SIZE SZ_128K
44
45 /* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
46 * and U-Boot environment this avoids dependency on any particular combination
47 * of UBL, U-Boot or flashing tools etc.
48 */
49 static struct mtd_partition davinci_nand_partitions[] = {
50 {
51 /* UBL, U-Boot with environment */
52 .name = "bootloader",
53 .offset = MTDPART_OFS_APPEND,
54 .size = 16 * NAND_BLOCK_SIZE,
55 .mask_flags = MTD_WRITEABLE, /* force read-only */
56 }, {
57 .name = "kernel",
58 .offset = MTDPART_OFS_APPEND,
59 .size = SZ_4M,
60 .mask_flags = 0,
61 }, {
62 .name = "filesystem",
63 .offset = MTDPART_OFS_APPEND,
64 .size = MTDPART_SIZ_FULL,
65 .mask_flags = 0,
66 }
67 };
68
69 static struct davinci_nand_pdata davinci_nand_data = {
70 .mask_cle = 0x80000,
71 .mask_ale = 0x40000,
72 .parts = davinci_nand_partitions,
73 .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
74 .ecc_mode = NAND_ECC_HW,
75 .options = 0,
76 };
77
78 #define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x20008000
79 #define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x42000000
80
81 static struct resource davinci_nand_resources[] = {
82 {
83 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
84 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
85 .flags = IORESOURCE_MEM,
86 }, {
87 .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
88 .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
89 .flags = IORESOURCE_MEM,
90 },
91 };
92
93 static struct platform_device davinci_nand_device = {
94 .name = "davinci_nand",
95 .id = 0,
96
97 .num_resources = ARRAY_SIZE(davinci_nand_resources),
98 .resource = davinci_nand_resources,
99
100 .dev = {
101 .platform_data = &davinci_nand_data,
102 },
103 };
104
105 #if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
106 defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
107 #define HAS_ATA 1
108 #else
109 #define HAS_ATA 0
110 #endif
111
112 /* CPLD Register 0 bits to control ATA */
113 #define DM646X_EVM_ATA_RST BIT(0)
114 #define DM646X_EVM_ATA_PWD BIT(1)
115
116 /* CPLD Register 0 Client: used for I/O Control */
117 static int cpld_reg0_probe(struct i2c_client *client,
118 const struct i2c_device_id *id)
119 {
120 if (HAS_ATA) {
121 u8 data;
122 struct i2c_msg msg[2] = {
123 {
124 .addr = client->addr,
125 .flags = I2C_M_RD,
126 .len = 1,
127 .buf = &data,
128 },
129 {
130 .addr = client->addr,
131 .flags = 0,
132 .len = 1,
133 .buf = &data,
134 },
135 };
136
137 /* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
138 i2c_transfer(client->adapter, msg, 1);
139 data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
140 i2c_transfer(client->adapter, msg + 1, 1);
141 }
142
143 return 0;
144 }
145
146 static const struct i2c_device_id cpld_reg_ids[] = {
147 { "cpld_reg0", 0, },
148 { },
149 };
150
151 static struct i2c_driver dm6467evm_cpld_driver = {
152 .driver.name = "cpld_reg0",
153 .id_table = cpld_reg_ids,
154 .probe = cpld_reg0_probe,
155 };
156
157 /* LEDS */
158
159 static struct gpio_led evm_leds[] = {
160 { .name = "DS1", .active_low = 1, },
161 { .name = "DS2", .active_low = 1, },
162 { .name = "DS3", .active_low = 1, },
163 { .name = "DS4", .active_low = 1, },
164 };
165
166 static const struct gpio_led_platform_data evm_led_data = {
167 .num_leds = ARRAY_SIZE(evm_leds),
168 .leds = evm_leds,
169 };
170
171 static struct platform_device *evm_led_dev;
172
173 static int evm_led_setup(struct i2c_client *client, int gpio,
174 unsigned int ngpio, void *c)
175 {
176 struct gpio_led *leds = evm_leds;
177 int status;
178
179 while (ngpio--) {
180 leds->gpio = gpio++;
181 leds++;
182 };
183
184 evm_led_dev = platform_device_alloc("leds-gpio", 0);
185 platform_device_add_data(evm_led_dev, &evm_led_data,
186 sizeof(evm_led_data));
187
188 evm_led_dev->dev.parent = &client->dev;
189 status = platform_device_add(evm_led_dev);
190 if (status < 0) {
191 platform_device_put(evm_led_dev);
192 evm_led_dev = NULL;
193 }
194 return status;
195 }
196
197 static int evm_led_teardown(struct i2c_client *client, int gpio,
198 unsigned ngpio, void *c)
199 {
200 if (evm_led_dev) {
201 platform_device_unregister(evm_led_dev);
202 evm_led_dev = NULL;
203 }
204 return 0;
205 }
206
207 static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
208
209 static int evm_sw_setup(struct i2c_client *client, int gpio,
210 unsigned ngpio, void *c)
211 {
212 int status;
213 int i;
214 char label[10];
215
216 for (i = 0; i < 4; ++i) {
217 snprintf(label, 10, "user_sw%d", i);
218 status = gpio_request(gpio, label);
219 if (status)
220 goto out_free;
221 evm_sw_gpio[i] = gpio++;
222
223 status = gpio_direction_input(evm_sw_gpio[i]);
224 if (status) {
225 gpio_free(evm_sw_gpio[i]);
226 evm_sw_gpio[i] = -EINVAL;
227 goto out_free;
228 }
229
230 status = gpio_export(evm_sw_gpio[i], 0);
231 if (status) {
232 gpio_free(evm_sw_gpio[i]);
233 evm_sw_gpio[i] = -EINVAL;
234 goto out_free;
235 }
236 }
237 return status;
238 out_free:
239 for (i = 0; i < 4; ++i) {
240 if (evm_sw_gpio[i] != -EINVAL) {
241 gpio_free(evm_sw_gpio[i]);
242 evm_sw_gpio[i] = -EINVAL;
243 }
244 }
245 return status;
246 }
247
248 static int evm_sw_teardown(struct i2c_client *client, int gpio,
249 unsigned ngpio, void *c)
250 {
251 int i;
252
253 for (i = 0; i < 4; ++i) {
254 if (evm_sw_gpio[i] != -EINVAL) {
255 gpio_unexport(evm_sw_gpio[i]);
256 gpio_free(evm_sw_gpio[i]);
257 evm_sw_gpio[i] = -EINVAL;
258 }
259 }
260 return 0;
261 }
262
263 static int evm_pcf_setup(struct i2c_client *client, int gpio,
264 unsigned int ngpio, void *c)
265 {
266 int status;
267
268 if (ngpio < 8)
269 return -EINVAL;
270
271 status = evm_sw_setup(client, gpio, 4, c);
272 if (status)
273 return status;
274
275 return evm_led_setup(client, gpio+4, 4, c);
276 }
277
278 static int evm_pcf_teardown(struct i2c_client *client, int gpio,
279 unsigned int ngpio, void *c)
280 {
281 BUG_ON(ngpio < 8);
282
283 evm_sw_teardown(client, gpio, 4, c);
284 evm_led_teardown(client, gpio+4, 4, c);
285
286 return 0;
287 }
288
289 static struct pcf857x_platform_data pcf_data = {
290 .gpio_base = DAVINCI_N_GPIO+1,
291 .setup = evm_pcf_setup,
292 .teardown = evm_pcf_teardown,
293 };
294
295 /* Most of this EEPROM is unused, but U-Boot uses some data:
296 * - 0x7f00, 6 bytes Ethernet Address
297 * - ... newer boards may have more
298 */
299
300 static struct at24_platform_data eeprom_info = {
301 .byte_len = (256*1024) / 8,
302 .page_size = 64,
303 .flags = AT24_FLAG_ADDR16,
304 .setup = davinci_get_mac_addr,
305 .context = (void *)0x7f00,
306 };
307
308 static u8 dm646x_iis_serializer_direction[] = {
309 TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
310 };
311
312 static u8 dm646x_dit_serializer_direction[] = {
313 TX_MODE,
314 };
315
316 static struct snd_platform_data dm646x_evm_snd_data[] = {
317 {
318 .tx_dma_offset = 0x400,
319 .rx_dma_offset = 0x400,
320 .op_mode = DAVINCI_MCASP_IIS_MODE,
321 .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
322 .tdm_slots = 2,
323 .serial_dir = dm646x_iis_serializer_direction,
324 .eventq_no = EVENTQ_0,
325 },
326 {
327 .tx_dma_offset = 0x400,
328 .rx_dma_offset = 0,
329 .op_mode = DAVINCI_MCASP_DIT_MODE,
330 .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
331 .tdm_slots = 32,
332 .serial_dir = dm646x_dit_serializer_direction,
333 .eventq_no = EVENTQ_0,
334 },
335 };
336
337 static struct i2c_client *cpld_client;
338
339 static int cpld_video_probe(struct i2c_client *client,
340 const struct i2c_device_id *id)
341 {
342 cpld_client = client;
343 return 0;
344 }
345
346 static int __devexit cpld_video_remove(struct i2c_client *client)
347 {
348 cpld_client = NULL;
349 return 0;
350 }
351
352 static const struct i2c_device_id cpld_video_id[] = {
353 { "cpld_video", 0 },
354 { }
355 };
356
357 static struct i2c_driver cpld_video_driver = {
358 .driver = {
359 .name = "cpld_video",
360 },
361 .probe = cpld_video_probe,
362 .remove = cpld_video_remove,
363 .id_table = cpld_video_id,
364 };
365
366 static void evm_init_cpld(void)
367 {
368 i2c_add_driver(&cpld_video_driver);
369 }
370
371 static struct i2c_board_info __initdata i2c_info[] = {
372 {
373 I2C_BOARD_INFO("24c256", 0x50),
374 .platform_data = &eeprom_info,
375 },
376 {
377 I2C_BOARD_INFO("pcf8574a", 0x38),
378 .platform_data = &pcf_data,
379 },
380 {
381 I2C_BOARD_INFO("cpld_reg0", 0x3a),
382 },
383 {
384 I2C_BOARD_INFO("tlv320aic33", 0x18),
385 },
386 {
387 I2C_BOARD_INFO("cpld_video", 0x3b),
388 },
389 };
390
391 static struct davinci_i2c_platform_data i2c_pdata = {
392 .bus_freq = 100 /* kHz */,
393 .bus_delay = 0 /* usec */,
394 };
395
396 #define VIDCLKCTL_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x38)
397 #define VSCLKDIS_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x6c)
398 #define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
399 #define VCH2CLK_SYSCLK8 (BIT(9))
400 #define VCH2CLK_AUXCLK (BIT(9) | BIT(8))
401 #define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
402 #define VCH3CLK_SYSCLK8 (BIT(13))
403 #define VCH3CLK_AUXCLK (BIT(14) | BIT(13))
404
405 #define VIDCH2CLK (BIT(10))
406 #define VIDCH3CLK (BIT(11))
407 #define VIDCH1CLK (BIT(4))
408 #define TVP7002_INPUT (BIT(4))
409 #define TVP5147_INPUT (~BIT(4))
410 #define VPIF_INPUT_ONE_CHANNEL (BIT(5))
411 #define VPIF_INPUT_TWO_CHANNEL (~BIT(5))
412 #define TVP5147_CH0 "tvp514x-0"
413 #define TVP5147_CH1 "tvp514x-1"
414
415 static void __iomem *vpif_vidclkctl_reg;
416 static void __iomem *vpif_vsclkdis_reg;
417 /* spin lock for updating above registers */
418 static spinlock_t vpif_reg_lock;
419
420 static int set_vpif_clock(int mux_mode, int hd)
421 {
422 unsigned long flags;
423 unsigned int value;
424 int val = 0;
425 int err = 0;
426
427 if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg || !cpld_client)
428 return -ENXIO;
429
430 /* disable the clock */
431 spin_lock_irqsave(&vpif_reg_lock, flags);
432 value = __raw_readl(vpif_vsclkdis_reg);
433 value |= (VIDCH3CLK | VIDCH2CLK);
434 __raw_writel(value, vpif_vsclkdis_reg);
435 spin_unlock_irqrestore(&vpif_reg_lock, flags);
436
437 val = i2c_smbus_read_byte(cpld_client);
438 if (val < 0)
439 return val;
440
441 if (mux_mode == 1)
442 val &= ~0x40;
443 else
444 val |= 0x40;
445
446 err = i2c_smbus_write_byte(cpld_client, val);
447 if (err)
448 return err;
449
450 value = __raw_readl(vpif_vidclkctl_reg);
451 value &= ~(VCH2CLK_MASK);
452 value &= ~(VCH3CLK_MASK);
453
454 if (hd >= 1)
455 value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
456 else
457 value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
458
459 __raw_writel(value, vpif_vidclkctl_reg);
460
461 spin_lock_irqsave(&vpif_reg_lock, flags);
462 value = __raw_readl(vpif_vsclkdis_reg);
463 /* enable the clock */
464 value &= ~(VIDCH3CLK | VIDCH2CLK);
465 __raw_writel(value, vpif_vsclkdis_reg);
466 spin_unlock_irqrestore(&vpif_reg_lock, flags);
467
468 return 0;
469 }
470
471 static struct vpif_subdev_info dm646x_vpif_subdev[] = {
472 {
473 .name = "adv7343",
474 .board_info = {
475 I2C_BOARD_INFO("adv7343", 0x2a),
476 },
477 },
478 {
479 .name = "ths7303",
480 .board_info = {
481 I2C_BOARD_INFO("ths7303", 0x2c),
482 },
483 },
484 };
485
486 static const char *output[] = {
487 "Composite",
488 "Component",
489 "S-Video",
490 };
491
492 static struct vpif_display_config dm646x_vpif_display_config = {
493 .set_clock = set_vpif_clock,
494 .subdevinfo = dm646x_vpif_subdev,
495 .subdev_count = ARRAY_SIZE(dm646x_vpif_subdev),
496 .output = output,
497 .output_count = ARRAY_SIZE(output),
498 .card_name = "DM646x EVM",
499 };
500
501 /**
502 * setup_vpif_input_path()
503 * @channel: channel id (0 - CH0, 1 - CH1)
504 * @sub_dev_name: ptr sub device name
505 *
506 * This will set vpif input to capture data from tvp514x or
507 * tvp7002.
508 */
509 static int setup_vpif_input_path(int channel, const char *sub_dev_name)
510 {
511 int err = 0;
512 int val;
513
514 /* for channel 1, we don't do anything */
515 if (channel != 0)
516 return 0;
517
518 if (!cpld_client)
519 return -ENXIO;
520
521 val = i2c_smbus_read_byte(cpld_client);
522 if (val < 0)
523 return val;
524
525 if (!strcmp(sub_dev_name, TVP5147_CH0) ||
526 !strcmp(sub_dev_name, TVP5147_CH1))
527 val &= TVP5147_INPUT;
528 else
529 val |= TVP7002_INPUT;
530
531 err = i2c_smbus_write_byte(cpld_client, val);
532 if (err)
533 return err;
534 return 0;
535 }
536
537 /**
538 * setup_vpif_input_channel_mode()
539 * @mux_mode: mux mode. 0 - 1 channel or (1) - 2 channel
540 *
541 * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
542 */
543 static int setup_vpif_input_channel_mode(int mux_mode)
544 {
545 unsigned long flags;
546 int err = 0;
547 int val;
548 u32 value;
549
550 if (!vpif_vsclkdis_reg || !cpld_client)
551 return -ENXIO;
552
553 val = i2c_smbus_read_byte(cpld_client);
554 if (val < 0)
555 return val;
556
557 spin_lock_irqsave(&vpif_reg_lock, flags);
558 value = __raw_readl(vpif_vsclkdis_reg);
559 if (mux_mode) {
560 val &= VPIF_INPUT_TWO_CHANNEL;
561 value |= VIDCH1CLK;
562 } else {
563 val |= VPIF_INPUT_ONE_CHANNEL;
564 value &= ~VIDCH1CLK;
565 }
566 __raw_writel(value, vpif_vsclkdis_reg);
567 spin_unlock_irqrestore(&vpif_reg_lock, flags);
568
569 err = i2c_smbus_write_byte(cpld_client, val);
570 if (err)
571 return err;
572
573 return 0;
574 }
575
576 static struct tvp514x_platform_data tvp5146_pdata = {
577 .clk_polarity = 0,
578 .hs_polarity = 1,
579 .vs_polarity = 1
580 };
581
582 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
583
584 static struct vpif_subdev_info vpif_capture_sdev_info[] = {
585 {
586 .name = TVP5147_CH0,
587 .board_info = {
588 I2C_BOARD_INFO("tvp5146", 0x5d),
589 .platform_data = &tvp5146_pdata,
590 },
591 .input = INPUT_CVBS_VI2B,
592 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
593 .can_route = 1,
594 .vpif_if = {
595 .if_type = VPIF_IF_BT656,
596 .hd_pol = 1,
597 .vd_pol = 1,
598 .fid_pol = 0,
599 },
600 },
601 {
602 .name = TVP5147_CH1,
603 .board_info = {
604 I2C_BOARD_INFO("tvp5146", 0x5c),
605 .platform_data = &tvp5146_pdata,
606 },
607 .input = INPUT_SVIDEO_VI2C_VI1C,
608 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
609 .can_route = 1,
610 .vpif_if = {
611 .if_type = VPIF_IF_BT656,
612 .hd_pol = 1,
613 .vd_pol = 1,
614 .fid_pol = 0,
615 },
616 },
617 };
618
619 static const struct vpif_input dm6467_ch0_inputs[] = {
620 {
621 .input = {
622 .index = 0,
623 .name = "Composite",
624 .type = V4L2_INPUT_TYPE_CAMERA,
625 .std = TVP514X_STD_ALL,
626 },
627 .subdev_name = TVP5147_CH0,
628 },
629 };
630
631 static const struct vpif_input dm6467_ch1_inputs[] = {
632 {
633 .input = {
634 .index = 0,
635 .name = "S-Video",
636 .type = V4L2_INPUT_TYPE_CAMERA,
637 .std = TVP514X_STD_ALL,
638 },
639 .subdev_name = TVP5147_CH1,
640 },
641 };
642
643 static struct vpif_capture_config dm646x_vpif_capture_cfg = {
644 .setup_input_path = setup_vpif_input_path,
645 .setup_input_channel_mode = setup_vpif_input_channel_mode,
646 .subdev_info = vpif_capture_sdev_info,
647 .subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
648 .chan_config[0] = {
649 .inputs = dm6467_ch0_inputs,
650 .input_count = ARRAY_SIZE(dm6467_ch0_inputs),
651 },
652 .chan_config[1] = {
653 .inputs = dm6467_ch1_inputs,
654 .input_count = ARRAY_SIZE(dm6467_ch1_inputs),
655 },
656 };
657
658 static void __init evm_init_video(void)
659 {
660 vpif_vidclkctl_reg = ioremap(VIDCLKCTL_OFFSET, 4);
661 vpif_vsclkdis_reg = ioremap(VSCLKDIS_OFFSET, 4);
662 if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg) {
663 pr_err("Can't map VPIF VIDCLKCTL or VSCLKDIS registers\n");
664 return;
665 }
666 spin_lock_init(&vpif_reg_lock);
667
668 dm646x_setup_vpif(&dm646x_vpif_display_config,
669 &dm646x_vpif_capture_cfg);
670 }
671
672 static void __init evm_init_i2c(void)
673 {
674 davinci_init_i2c(&i2c_pdata);
675 i2c_add_driver(&dm6467evm_cpld_driver);
676 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
677 evm_init_cpld();
678 evm_init_video();
679 }
680
681 static void __init davinci_map_io(void)
682 {
683 dm646x_init();
684 }
685
686 static struct davinci_uart_config uart_config __initdata = {
687 .enabled_uarts = (1 << 0),
688 };
689
690 #define DM646X_EVM_PHY_MASK (0x2)
691 #define DM646X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
692
693 static __init void evm_init(void)
694 {
695 struct davinci_soc_info *soc_info = &davinci_soc_info;
696
697 evm_init_i2c();
698 davinci_serial_init(&uart_config);
699 dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
700 dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
701
702 platform_device_register(&davinci_nand_device);
703
704 if (HAS_ATA)
705 dm646x_init_ide();
706
707 soc_info->emac_pdata->phy_mask = DM646X_EVM_PHY_MASK;
708 soc_info->emac_pdata->mdio_max_freq = DM646X_EVM_MDIO_FREQUENCY;
709 }
710
711 static __init void davinci_dm646x_evm_irq_init(void)
712 {
713 davinci_irq_init();
714 }
715
716 MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
717 .phys_io = IO_PHYS,
718 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
719 .boot_params = (0x80000100),
720 .map_io = davinci_map_io,
721 .init_irq = davinci_dm646x_evm_irq_init,
722 .timer = &davinci_timer,
723 .init_machine = evm_init,
724 MACHINE_END
725
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree