m68k: Fix assembler constraint to prevent overeager gcc optimisation
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / pci / ats.c
blobb0dd08e6a9da1cc4f8ee78ebf53f1e4e5f1de2b2
1 /*
2 * drivers/pci/ats.c
4 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
5 * Copyright (C) 2011 Advanced Micro Devices,
7 * PCI Express I/O Virtualization (IOV) support.
8 * Address Translation Service 1.0
9 * Page Request Interface added by Joerg Roedel <joerg.roedel@amd.com>
10 * PASID support added by Joerg Roedel <joerg.roedel@amd.com>
13 #include <linux/export.h>
14 #include <linux/pci-ats.h>
15 #include <linux/pci.h>
16 #include <linux/slab.h>
18 #include "pci.h"
20 static int ats_alloc_one(struct pci_dev *dev, int ps)
22 int pos;
23 u16 cap;
24 struct pci_ats *ats;
26 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);
27 if (!pos)
28 return -ENODEV;
30 ats = kzalloc(sizeof(*ats), GFP_KERNEL);
31 if (!ats)
32 return -ENOMEM;
34 ats->pos = pos;
35 ats->stu = ps;
36 pci_read_config_word(dev, pos + PCI_ATS_CAP, &cap);
37 ats->qdep = PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) :
38 PCI_ATS_MAX_QDEP;
39 dev->ats = ats;
41 return 0;
44 static void ats_free_one(struct pci_dev *dev)
46 kfree(dev->ats);
47 dev->ats = NULL;
50 /**
51 * pci_enable_ats - enable the ATS capability
52 * @dev: the PCI device
53 * @ps: the IOMMU page shift
55 * Returns 0 on success, or negative on failure.
57 int pci_enable_ats(struct pci_dev *dev, int ps)
59 int rc;
60 u16 ctrl;
62 BUG_ON(dev->ats && dev->ats->is_enabled);
64 if (ps < PCI_ATS_MIN_STU)
65 return -EINVAL;
67 if (dev->is_physfn || dev->is_virtfn) {
68 struct pci_dev *pdev = dev->is_physfn ? dev : dev->physfn;
70 mutex_lock(&pdev->sriov->lock);
71 if (pdev->ats)
72 rc = pdev->ats->stu == ps ? 0 : -EINVAL;
73 else
74 rc = ats_alloc_one(pdev, ps);
76 if (!rc)
77 pdev->ats->ref_cnt++;
78 mutex_unlock(&pdev->sriov->lock);
79 if (rc)
80 return rc;
83 if (!dev->is_physfn) {
84 rc = ats_alloc_one(dev, ps);
85 if (rc)
86 return rc;
89 ctrl = PCI_ATS_CTRL_ENABLE;
90 if (!dev->is_virtfn)
91 ctrl |= PCI_ATS_CTRL_STU(ps - PCI_ATS_MIN_STU);
92 pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl);
94 dev->ats->is_enabled = 1;
96 return 0;
98 EXPORT_SYMBOL_GPL(pci_enable_ats);
101 * pci_disable_ats - disable the ATS capability
102 * @dev: the PCI device
104 void pci_disable_ats(struct pci_dev *dev)
106 u16 ctrl;
108 BUG_ON(!dev->ats || !dev->ats->is_enabled);
110 pci_read_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, &ctrl);
111 ctrl &= ~PCI_ATS_CTRL_ENABLE;
112 pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl);
114 dev->ats->is_enabled = 0;
116 if (dev->is_physfn || dev->is_virtfn) {
117 struct pci_dev *pdev = dev->is_physfn ? dev : dev->physfn;
119 mutex_lock(&pdev->sriov->lock);
120 pdev->ats->ref_cnt--;
121 if (!pdev->ats->ref_cnt)
122 ats_free_one(pdev);
123 mutex_unlock(&pdev->sriov->lock);
126 if (!dev->is_physfn)
127 ats_free_one(dev);
129 EXPORT_SYMBOL_GPL(pci_disable_ats);
132 * pci_ats_queue_depth - query the ATS Invalidate Queue Depth
133 * @dev: the PCI device
135 * Returns the queue depth on success, or negative on failure.
137 * The ATS spec uses 0 in the Invalidate Queue Depth field to
138 * indicate that the function can accept 32 Invalidate Request.
139 * But here we use the `real' values (i.e. 1~32) for the Queue
140 * Depth; and 0 indicates the function shares the Queue with
141 * other functions (doesn't exclusively own a Queue).
143 int pci_ats_queue_depth(struct pci_dev *dev)
145 int pos;
146 u16 cap;
148 if (dev->is_virtfn)
149 return 0;
151 if (dev->ats)
152 return dev->ats->qdep;
154 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);
155 if (!pos)
156 return -ENODEV;
158 pci_read_config_word(dev, pos + PCI_ATS_CAP, &cap);
160 return PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) :
161 PCI_ATS_MAX_QDEP;
163 EXPORT_SYMBOL_GPL(pci_ats_queue_depth);
165 #ifdef CONFIG_PCI_PRI
167 * pci_enable_pri - Enable PRI capability
168 * @ pdev: PCI device structure
170 * Returns 0 on success, negative value on error
172 int pci_enable_pri(struct pci_dev *pdev, u32 reqs)
174 u16 control, status;
175 u32 max_requests;
176 int pos;
178 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
179 if (!pos)
180 return -EINVAL;
182 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
183 pci_read_config_word(pdev, pos + PCI_PRI_STATUS_OFF, &status);
184 if ((control & PCI_PRI_ENABLE) || !(status & PCI_PRI_STATUS_STOPPED))
185 return -EBUSY;
187 pci_read_config_dword(pdev, pos + PCI_PRI_MAX_REQ_OFF, &max_requests);
188 reqs = min(max_requests, reqs);
189 pci_write_config_dword(pdev, pos + PCI_PRI_ALLOC_REQ_OFF, reqs);
191 control |= PCI_PRI_ENABLE;
192 pci_write_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, control);
194 return 0;
196 EXPORT_SYMBOL_GPL(pci_enable_pri);
199 * pci_disable_pri - Disable PRI capability
200 * @pdev: PCI device structure
202 * Only clears the enabled-bit, regardless of its former value
204 void pci_disable_pri(struct pci_dev *pdev)
206 u16 control;
207 int pos;
209 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
210 if (!pos)
211 return;
213 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
214 control &= ~PCI_PRI_ENABLE;
215 pci_write_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, control);
217 EXPORT_SYMBOL_GPL(pci_disable_pri);
220 * pci_pri_enabled - Checks if PRI capability is enabled
221 * @pdev: PCI device structure
223 * Returns true if PRI is enabled on the device, false otherwise
225 bool pci_pri_enabled(struct pci_dev *pdev)
227 u16 control;
228 int pos;
230 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
231 if (!pos)
232 return false;
234 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
236 return (control & PCI_PRI_ENABLE) ? true : false;
238 EXPORT_SYMBOL_GPL(pci_pri_enabled);
241 * pci_reset_pri - Resets device's PRI state
242 * @pdev: PCI device structure
244 * The PRI capability must be disabled before this function is called.
245 * Returns 0 on success, negative value on error.
247 int pci_reset_pri(struct pci_dev *pdev)
249 u16 control;
250 int pos;
252 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
253 if (!pos)
254 return -EINVAL;
256 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
257 if (control & PCI_PRI_ENABLE)
258 return -EBUSY;
260 control |= PCI_PRI_RESET;
262 pci_write_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, control);
264 return 0;
266 EXPORT_SYMBOL_GPL(pci_reset_pri);
269 * pci_pri_stopped - Checks whether the PRI capability is stopped
270 * @pdev: PCI device structure
272 * Returns true if the PRI capability on the device is disabled and the
273 * device has no outstanding PRI requests, false otherwise. The device
274 * indicates this via the STOPPED bit in the status register of the
275 * capability.
276 * The device internal state can be cleared by resetting the PRI state
277 * with pci_reset_pri(). This can force the capability into the STOPPED
278 * state.
280 bool pci_pri_stopped(struct pci_dev *pdev)
282 u16 control, status;
283 int pos;
285 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
286 if (!pos)
287 return true;
289 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
290 pci_read_config_word(pdev, pos + PCI_PRI_STATUS_OFF, &status);
292 if (control & PCI_PRI_ENABLE)
293 return false;
295 return (status & PCI_PRI_STATUS_STOPPED) ? true : false;
297 EXPORT_SYMBOL_GPL(pci_pri_stopped);
300 * pci_pri_status - Request PRI status of a device
301 * @pdev: PCI device structure
303 * Returns negative value on failure, status on success. The status can
304 * be checked against status-bits. Supported bits are currently:
305 * PCI_PRI_STATUS_RF: Response failure
306 * PCI_PRI_STATUS_UPRGI: Unexpected Page Request Group Index
307 * PCI_PRI_STATUS_STOPPED: PRI has stopped
309 int pci_pri_status(struct pci_dev *pdev)
311 u16 status, control;
312 int pos;
314 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
315 if (!pos)
316 return -EINVAL;
318 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
319 pci_read_config_word(pdev, pos + PCI_PRI_STATUS_OFF, &status);
321 /* Stopped bit is undefined when enable == 1, so clear it */
322 if (control & PCI_PRI_ENABLE)
323 status &= ~PCI_PRI_STATUS_STOPPED;
325 return status;
327 EXPORT_SYMBOL_GPL(pci_pri_status);
328 #endif /* CONFIG_PCI_PRI */
330 #ifdef CONFIG_PCI_PASID
332 * pci_enable_pasid - Enable the PASID capability
333 * @pdev: PCI device structure
334 * @features: Features to enable
336 * Returns 0 on success, negative value on error. This function checks
337 * whether the features are actually supported by the device and returns
338 * an error if not.
340 int pci_enable_pasid(struct pci_dev *pdev, int features)
342 u16 control, supported;
343 int pos;
345 pos = pci_find_ext_capability(pdev, PCI_PASID_CAP);
346 if (!pos)
347 return -EINVAL;
349 pci_read_config_word(pdev, pos + PCI_PASID_CONTROL_OFF, &control);
350 pci_read_config_word(pdev, pos + PCI_PASID_CAP_OFF, &supported);
352 if (!(supported & PCI_PASID_ENABLE))
353 return -EINVAL;
355 supported &= PCI_PASID_EXEC | PCI_PASID_PRIV;
357 /* User wants to enable anything unsupported? */
358 if ((supported & features) != features)
359 return -EINVAL;
361 control = PCI_PASID_ENABLE | features;
363 pci_write_config_word(pdev, pos + PCI_PASID_CONTROL_OFF, control);
365 return 0;
367 EXPORT_SYMBOL_GPL(pci_enable_pasid);
370 * pci_disable_pasid - Disable the PASID capability
371 * @pdev: PCI device structure
374 void pci_disable_pasid(struct pci_dev *pdev)
376 u16 control = 0;
377 int pos;
379 pos = pci_find_ext_capability(pdev, PCI_PASID_CAP);
380 if (!pos)
381 return;
383 pci_write_config_word(pdev, pos + PCI_PASID_CONTROL_OFF, control);
385 EXPORT_SYMBOL_GPL(pci_disable_pasid);
388 * pci_pasid_features - Check which PASID features are supported
389 * @pdev: PCI device structure
391 * Returns a negative value when no PASI capability is present.
392 * Otherwise is returns a bitmask with supported features. Current
393 * features reported are:
394 * PCI_PASID_ENABLE - PASID capability can be enabled
395 * PCI_PASID_EXEC - Execute permission supported
396 * PCI_PASID_PRIV - Priviledged mode supported
398 int pci_pasid_features(struct pci_dev *pdev)
400 u16 supported;
401 int pos;
403 pos = pci_find_ext_capability(pdev, PCI_PASID_CAP);
404 if (!pos)
405 return -EINVAL;
407 pci_read_config_word(pdev, pos + PCI_PASID_CAP_OFF, &supported);
409 supported &= PCI_PASID_ENABLE | PCI_PASID_EXEC | PCI_PASID_PRIV;
411 return supported;
413 EXPORT_SYMBOL_GPL(pci_pasid_features);
415 #define PASID_NUMBER_SHIFT 8
416 #define PASID_NUMBER_MASK (0x1f << PASID_NUMBER_SHIFT)
418 * pci_max_pasid - Get maximum number of PASIDs supported by device
419 * @pdev: PCI device structure
421 * Returns negative value when PASID capability is not present.
422 * Otherwise it returns the numer of supported PASIDs.
424 int pci_max_pasids(struct pci_dev *pdev)
426 u16 supported;
427 int pos;
429 pos = pci_find_ext_capability(pdev, PCI_PASID_CAP);
430 if (!pos)
431 return -EINVAL;
433 pci_read_config_word(pdev, pos + PCI_PASID_CAP_OFF, &supported);
435 supported = (supported & PASID_NUMBER_MASK) >> PASID_NUMBER_SHIFT;
437 return (1 << supported);
439 EXPORT_SYMBOL_GPL(pci_max_pasids);
440 #endif /* CONFIG_PCI_PASID */