ptrace: change signature of arch_ptrace()
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / arm / kernel / ptrace.c
blob9bca6165459e310ef873d8fd0fc86fc6eaa41643
1 /*
2 * linux/arch/arm/kernel/ptrace.c
4 * By Ross Biro 1/23/92
5 * edited by Linus Torvalds
6 * ARM modifications Copyright (C) 2000 Russell King
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/sched.h>
14 #include <linux/mm.h>
15 #include <linux/smp.h>
16 #include <linux/ptrace.h>
17 #include <linux/user.h>
18 #include <linux/security.h>
19 #include <linux/init.h>
20 #include <linux/signal.h>
21 #include <linux/uaccess.h>
22 #include <linux/perf_event.h>
23 #include <linux/hw_breakpoint.h>
25 #include <asm/pgtable.h>
26 #include <asm/system.h>
27 #include <asm/traps.h>
29 #include "ptrace.h"
31 #define REG_PC 15
32 #define REG_PSR 16
34 * does not yet catch signals sent when the child dies.
35 * in exit.c or in signal.c.
38 #if 0
40 * Breakpoint SWI instruction: SWI &9F0001
42 #define BREAKINST_ARM 0xef9f0001
43 #define BREAKINST_THUMB 0xdf00 /* fill this in later */
44 #else
46 * New breakpoints - use an undefined instruction. The ARM architecture
47 * reference manual guarantees that the following instruction space
48 * will produce an undefined instruction exception on all CPUs:
50 * ARM: xxxx 0111 1111 xxxx xxxx xxxx 1111 xxxx
51 * Thumb: 1101 1110 xxxx xxxx
53 #define BREAKINST_ARM 0xe7f001f0
54 #define BREAKINST_THUMB 0xde01
55 #endif
57 struct pt_regs_offset {
58 const char *name;
59 int offset;
62 #define REG_OFFSET_NAME(r) \
63 {.name = #r, .offset = offsetof(struct pt_regs, ARM_##r)}
64 #define REG_OFFSET_END {.name = NULL, .offset = 0}
66 static const struct pt_regs_offset regoffset_table[] = {
67 REG_OFFSET_NAME(r0),
68 REG_OFFSET_NAME(r1),
69 REG_OFFSET_NAME(r2),
70 REG_OFFSET_NAME(r3),
71 REG_OFFSET_NAME(r4),
72 REG_OFFSET_NAME(r5),
73 REG_OFFSET_NAME(r6),
74 REG_OFFSET_NAME(r7),
75 REG_OFFSET_NAME(r8),
76 REG_OFFSET_NAME(r9),
77 REG_OFFSET_NAME(r10),
78 REG_OFFSET_NAME(fp),
79 REG_OFFSET_NAME(ip),
80 REG_OFFSET_NAME(sp),
81 REG_OFFSET_NAME(lr),
82 REG_OFFSET_NAME(pc),
83 REG_OFFSET_NAME(cpsr),
84 REG_OFFSET_NAME(ORIG_r0),
85 REG_OFFSET_END,
88 /**
89 * regs_query_register_offset() - query register offset from its name
90 * @name: the name of a register
92 * regs_query_register_offset() returns the offset of a register in struct
93 * pt_regs from its name. If the name is invalid, this returns -EINVAL;
95 int regs_query_register_offset(const char *name)
97 const struct pt_regs_offset *roff;
98 for (roff = regoffset_table; roff->name != NULL; roff++)
99 if (!strcmp(roff->name, name))
100 return roff->offset;
101 return -EINVAL;
105 * regs_query_register_name() - query register name from its offset
106 * @offset: the offset of a register in struct pt_regs.
108 * regs_query_register_name() returns the name of a register from its
109 * offset in struct pt_regs. If the @offset is invalid, this returns NULL;
111 const char *regs_query_register_name(unsigned int offset)
113 const struct pt_regs_offset *roff;
114 for (roff = regoffset_table; roff->name != NULL; roff++)
115 if (roff->offset == offset)
116 return roff->name;
117 return NULL;
121 * regs_within_kernel_stack() - check the address in the stack
122 * @regs: pt_regs which contains kernel stack pointer.
123 * @addr: address which is checked.
125 * regs_within_kernel_stack() checks @addr is within the kernel stack page(s).
126 * If @addr is within the kernel stack, it returns true. If not, returns false.
128 bool regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr)
130 return ((addr & ~(THREAD_SIZE - 1)) ==
131 (kernel_stack_pointer(regs) & ~(THREAD_SIZE - 1)));
135 * regs_get_kernel_stack_nth() - get Nth entry of the stack
136 * @regs: pt_regs which contains kernel stack pointer.
137 * @n: stack entry number.
139 * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which
140 * is specified by @regs. If the @n th entry is NOT in the kernel stack,
141 * this returns 0.
143 unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n)
145 unsigned long *addr = (unsigned long *)kernel_stack_pointer(regs);
146 addr += n;
147 if (regs_within_kernel_stack(regs, (unsigned long)addr))
148 return *addr;
149 else
150 return 0;
154 * this routine will get a word off of the processes privileged stack.
155 * the offset is how far from the base addr as stored in the THREAD.
156 * this routine assumes that all the privileged stacks are in our
157 * data space.
159 static inline long get_user_reg(struct task_struct *task, int offset)
161 return task_pt_regs(task)->uregs[offset];
165 * this routine will put a word on the processes privileged stack.
166 * the offset is how far from the base addr as stored in the THREAD.
167 * this routine assumes that all the privileged stacks are in our
168 * data space.
170 static inline int
171 put_user_reg(struct task_struct *task, int offset, long data)
173 struct pt_regs newregs, *regs = task_pt_regs(task);
174 int ret = -EINVAL;
176 newregs = *regs;
177 newregs.uregs[offset] = data;
179 if (valid_user_regs(&newregs)) {
180 regs->uregs[offset] = data;
181 ret = 0;
184 return ret;
187 static inline int
188 read_u32(struct task_struct *task, unsigned long addr, u32 *res)
190 int ret;
192 ret = access_process_vm(task, addr, res, sizeof(*res), 0);
194 return ret == sizeof(*res) ? 0 : -EIO;
197 static inline int
198 read_instr(struct task_struct *task, unsigned long addr, u32 *res)
200 int ret;
202 if (addr & 1) {
203 u16 val;
204 ret = access_process_vm(task, addr & ~1, &val, sizeof(val), 0);
205 ret = ret == sizeof(val) ? 0 : -EIO;
206 *res = val;
207 } else {
208 u32 val;
209 ret = access_process_vm(task, addr & ~3, &val, sizeof(val), 0);
210 ret = ret == sizeof(val) ? 0 : -EIO;
211 *res = val;
213 return ret;
217 * Get value of register `rn' (in the instruction)
219 static unsigned long
220 ptrace_getrn(struct task_struct *child, unsigned long insn)
222 unsigned int reg = (insn >> 16) & 15;
223 unsigned long val;
225 val = get_user_reg(child, reg);
226 if (reg == 15)
227 val += 8;
229 return val;
233 * Get value of operand 2 (in an ALU instruction)
235 static unsigned long
236 ptrace_getaluop2(struct task_struct *child, unsigned long insn)
238 unsigned long val;
239 int shift;
240 int type;
242 if (insn & 1 << 25) {
243 val = insn & 255;
244 shift = (insn >> 8) & 15;
245 type = 3;
246 } else {
247 val = get_user_reg (child, insn & 15);
249 if (insn & (1 << 4))
250 shift = (int)get_user_reg (child, (insn >> 8) & 15);
251 else
252 shift = (insn >> 7) & 31;
254 type = (insn >> 5) & 3;
257 switch (type) {
258 case 0: val <<= shift; break;
259 case 1: val >>= shift; break;
260 case 2:
261 val = (((signed long)val) >> shift);
262 break;
263 case 3:
264 val = (val >> shift) | (val << (32 - shift));
265 break;
267 return val;
271 * Get value of operand 2 (in a LDR instruction)
273 static unsigned long
274 ptrace_getldrop2(struct task_struct *child, unsigned long insn)
276 unsigned long val;
277 int shift;
278 int type;
280 val = get_user_reg(child, insn & 15);
281 shift = (insn >> 7) & 31;
282 type = (insn >> 5) & 3;
284 switch (type) {
285 case 0: val <<= shift; break;
286 case 1: val >>= shift; break;
287 case 2:
288 val = (((signed long)val) >> shift);
289 break;
290 case 3:
291 val = (val >> shift) | (val << (32 - shift));
292 break;
294 return val;
297 #define OP_MASK 0x01e00000
298 #define OP_AND 0x00000000
299 #define OP_EOR 0x00200000
300 #define OP_SUB 0x00400000
301 #define OP_RSB 0x00600000
302 #define OP_ADD 0x00800000
303 #define OP_ADC 0x00a00000
304 #define OP_SBC 0x00c00000
305 #define OP_RSC 0x00e00000
306 #define OP_ORR 0x01800000
307 #define OP_MOV 0x01a00000
308 #define OP_BIC 0x01c00000
309 #define OP_MVN 0x01e00000
311 static unsigned long
312 get_branch_address(struct task_struct *child, unsigned long pc, unsigned long insn)
314 u32 alt = 0;
316 switch (insn & 0x0e000000) {
317 case 0x00000000:
318 case 0x02000000: {
320 * data processing
322 long aluop1, aluop2, ccbit;
324 if ((insn & 0x0fffffd0) == 0x012fff10) {
326 * bx or blx
328 alt = get_user_reg(child, insn & 15);
329 break;
333 if ((insn & 0xf000) != 0xf000)
334 break;
336 aluop1 = ptrace_getrn(child, insn);
337 aluop2 = ptrace_getaluop2(child, insn);
338 ccbit = get_user_reg(child, REG_PSR) & PSR_C_BIT ? 1 : 0;
340 switch (insn & OP_MASK) {
341 case OP_AND: alt = aluop1 & aluop2; break;
342 case OP_EOR: alt = aluop1 ^ aluop2; break;
343 case OP_SUB: alt = aluop1 - aluop2; break;
344 case OP_RSB: alt = aluop2 - aluop1; break;
345 case OP_ADD: alt = aluop1 + aluop2; break;
346 case OP_ADC: alt = aluop1 + aluop2 + ccbit; break;
347 case OP_SBC: alt = aluop1 - aluop2 + ccbit; break;
348 case OP_RSC: alt = aluop2 - aluop1 + ccbit; break;
349 case OP_ORR: alt = aluop1 | aluop2; break;
350 case OP_MOV: alt = aluop2; break;
351 case OP_BIC: alt = aluop1 & ~aluop2; break;
352 case OP_MVN: alt = ~aluop2; break;
354 break;
357 case 0x04000000:
358 case 0x06000000:
360 * ldr
362 if ((insn & 0x0010f000) == 0x0010f000) {
363 unsigned long base;
365 base = ptrace_getrn(child, insn);
366 if (insn & 1 << 24) {
367 long aluop2;
369 if (insn & 0x02000000)
370 aluop2 = ptrace_getldrop2(child, insn);
371 else
372 aluop2 = insn & 0xfff;
374 if (insn & 1 << 23)
375 base += aluop2;
376 else
377 base -= aluop2;
379 read_u32(child, base, &alt);
381 break;
383 case 0x08000000:
385 * ldm
387 if ((insn & 0x00108000) == 0x00108000) {
388 unsigned long base;
389 unsigned int nr_regs;
391 if (insn & (1 << 23)) {
392 nr_regs = hweight16(insn & 65535) << 2;
394 if (!(insn & (1 << 24)))
395 nr_regs -= 4;
396 } else {
397 if (insn & (1 << 24))
398 nr_regs = -4;
399 else
400 nr_regs = 0;
403 base = ptrace_getrn(child, insn);
405 read_u32(child, base + nr_regs, &alt);
406 break;
408 break;
410 case 0x0a000000: {
412 * bl or b
414 signed long displ;
415 /* It's a branch/branch link: instead of trying to
416 * figure out whether the branch will be taken or not,
417 * we'll put a breakpoint at both locations. This is
418 * simpler, more reliable, and probably not a whole lot
419 * slower than the alternative approach of emulating the
420 * branch.
422 displ = (insn & 0x00ffffff) << 8;
423 displ = (displ >> 6) + 8;
424 if (displ != 0 && displ != 4)
425 alt = pc + displ;
427 break;
430 return alt;
433 static int
434 swap_insn(struct task_struct *task, unsigned long addr,
435 void *old_insn, void *new_insn, int size)
437 int ret;
439 ret = access_process_vm(task, addr, old_insn, size, 0);
440 if (ret == size)
441 ret = access_process_vm(task, addr, new_insn, size, 1);
442 return ret;
445 static void
446 add_breakpoint(struct task_struct *task, struct debug_info *dbg, unsigned long addr)
448 int nr = dbg->nsaved;
450 if (nr < 2) {
451 u32 new_insn = BREAKINST_ARM;
452 int res;
454 res = swap_insn(task, addr, &dbg->bp[nr].insn, &new_insn, 4);
456 if (res == 4) {
457 dbg->bp[nr].address = addr;
458 dbg->nsaved += 1;
460 } else
461 printk(KERN_ERR "ptrace: too many breakpoints\n");
465 * Clear one breakpoint in the user program. We copy what the hardware
466 * does and use bit 0 of the address to indicate whether this is a Thumb
467 * breakpoint or an ARM breakpoint.
469 static void clear_breakpoint(struct task_struct *task, struct debug_entry *bp)
471 unsigned long addr = bp->address;
472 union debug_insn old_insn;
473 int ret;
475 if (addr & 1) {
476 ret = swap_insn(task, addr & ~1, &old_insn.thumb,
477 &bp->insn.thumb, 2);
479 if (ret != 2 || old_insn.thumb != BREAKINST_THUMB)
480 printk(KERN_ERR "%s:%d: corrupted Thumb breakpoint at "
481 "0x%08lx (0x%04x)\n", task->comm,
482 task_pid_nr(task), addr, old_insn.thumb);
483 } else {
484 ret = swap_insn(task, addr & ~3, &old_insn.arm,
485 &bp->insn.arm, 4);
487 if (ret != 4 || old_insn.arm != BREAKINST_ARM)
488 printk(KERN_ERR "%s:%d: corrupted ARM breakpoint at "
489 "0x%08lx (0x%08x)\n", task->comm,
490 task_pid_nr(task), addr, old_insn.arm);
494 void ptrace_set_bpt(struct task_struct *child)
496 struct pt_regs *regs;
497 unsigned long pc;
498 u32 insn;
499 int res;
501 regs = task_pt_regs(child);
502 pc = instruction_pointer(regs);
504 if (thumb_mode(regs)) {
505 printk(KERN_WARNING "ptrace: can't handle thumb mode\n");
506 return;
509 res = read_instr(child, pc, &insn);
510 if (!res) {
511 struct debug_info *dbg = &child->thread.debug;
512 unsigned long alt;
514 dbg->nsaved = 0;
516 alt = get_branch_address(child, pc, insn);
517 if (alt)
518 add_breakpoint(child, dbg, alt);
521 * Note that we ignore the result of setting the above
522 * breakpoint since it may fail. When it does, this is
523 * not so much an error, but a forewarning that we may
524 * be receiving a prefetch abort shortly.
526 * If we don't set this breakpoint here, then we can
527 * lose control of the thread during single stepping.
529 if (!alt || predicate(insn) != PREDICATE_ALWAYS)
530 add_breakpoint(child, dbg, pc + 4);
535 * Ensure no single-step breakpoint is pending. Returns non-zero
536 * value if child was being single-stepped.
538 void ptrace_cancel_bpt(struct task_struct *child)
540 int i, nsaved = child->thread.debug.nsaved;
542 child->thread.debug.nsaved = 0;
544 if (nsaved > 2) {
545 printk("ptrace_cancel_bpt: bogus nsaved: %d!\n", nsaved);
546 nsaved = 2;
549 for (i = 0; i < nsaved; i++)
550 clear_breakpoint(child, &child->thread.debug.bp[i]);
553 void user_disable_single_step(struct task_struct *task)
555 task->ptrace &= ~PT_SINGLESTEP;
556 ptrace_cancel_bpt(task);
559 void user_enable_single_step(struct task_struct *task)
561 task->ptrace |= PT_SINGLESTEP;
565 * Called by kernel/ptrace.c when detaching..
567 void ptrace_disable(struct task_struct *child)
569 user_disable_single_step(child);
573 * Handle hitting a breakpoint.
575 void ptrace_break(struct task_struct *tsk, struct pt_regs *regs)
577 siginfo_t info;
579 ptrace_cancel_bpt(tsk);
581 info.si_signo = SIGTRAP;
582 info.si_errno = 0;
583 info.si_code = TRAP_BRKPT;
584 info.si_addr = (void __user *)instruction_pointer(regs);
586 force_sig_info(SIGTRAP, &info, tsk);
589 static int break_trap(struct pt_regs *regs, unsigned int instr)
591 ptrace_break(current, regs);
592 return 0;
595 static struct undef_hook arm_break_hook = {
596 .instr_mask = 0x0fffffff,
597 .instr_val = 0x07f001f0,
598 .cpsr_mask = PSR_T_BIT,
599 .cpsr_val = 0,
600 .fn = break_trap,
603 static struct undef_hook thumb_break_hook = {
604 .instr_mask = 0xffff,
605 .instr_val = 0xde01,
606 .cpsr_mask = PSR_T_BIT,
607 .cpsr_val = PSR_T_BIT,
608 .fn = break_trap,
611 static int thumb2_break_trap(struct pt_regs *regs, unsigned int instr)
613 unsigned int instr2;
614 void __user *pc;
616 /* Check the second half of the instruction. */
617 pc = (void __user *)(instruction_pointer(regs) + 2);
619 if (processor_mode(regs) == SVC_MODE) {
620 instr2 = *(u16 *) pc;
621 } else {
622 get_user(instr2, (u16 __user *)pc);
625 if (instr2 == 0xa000) {
626 ptrace_break(current, regs);
627 return 0;
628 } else {
629 return 1;
633 static struct undef_hook thumb2_break_hook = {
634 .instr_mask = 0xffff,
635 .instr_val = 0xf7f0,
636 .cpsr_mask = PSR_T_BIT,
637 .cpsr_val = PSR_T_BIT,
638 .fn = thumb2_break_trap,
641 static int __init ptrace_break_init(void)
643 register_undef_hook(&arm_break_hook);
644 register_undef_hook(&thumb_break_hook);
645 register_undef_hook(&thumb2_break_hook);
646 return 0;
649 core_initcall(ptrace_break_init);
652 * Read the word at offset "off" into the "struct user". We
653 * actually access the pt_regs stored on the kernel stack.
655 static int ptrace_read_user(struct task_struct *tsk, unsigned long off,
656 unsigned long __user *ret)
658 unsigned long tmp;
660 if (off & 3 || off >= sizeof(struct user))
661 return -EIO;
663 tmp = 0;
664 if (off == PT_TEXT_ADDR)
665 tmp = tsk->mm->start_code;
666 else if (off == PT_DATA_ADDR)
667 tmp = tsk->mm->start_data;
668 else if (off == PT_TEXT_END_ADDR)
669 tmp = tsk->mm->end_code;
670 else if (off < sizeof(struct pt_regs))
671 tmp = get_user_reg(tsk, off >> 2);
673 return put_user(tmp, ret);
677 * Write the word at offset "off" into "struct user". We
678 * actually access the pt_regs stored on the kernel stack.
680 static int ptrace_write_user(struct task_struct *tsk, unsigned long off,
681 unsigned long val)
683 if (off & 3 || off >= sizeof(struct user))
684 return -EIO;
686 if (off >= sizeof(struct pt_regs))
687 return 0;
689 return put_user_reg(tsk, off >> 2, val);
693 * Get all user integer registers.
695 static int ptrace_getregs(struct task_struct *tsk, void __user *uregs)
697 struct pt_regs *regs = task_pt_regs(tsk);
699 return copy_to_user(uregs, regs, sizeof(struct pt_regs)) ? -EFAULT : 0;
703 * Set all user integer registers.
705 static int ptrace_setregs(struct task_struct *tsk, void __user *uregs)
707 struct pt_regs newregs;
708 int ret;
710 ret = -EFAULT;
711 if (copy_from_user(&newregs, uregs, sizeof(struct pt_regs)) == 0) {
712 struct pt_regs *regs = task_pt_regs(tsk);
714 ret = -EINVAL;
715 if (valid_user_regs(&newregs)) {
716 *regs = newregs;
717 ret = 0;
721 return ret;
725 * Get the child FPU state.
727 static int ptrace_getfpregs(struct task_struct *tsk, void __user *ufp)
729 return copy_to_user(ufp, &task_thread_info(tsk)->fpstate,
730 sizeof(struct user_fp)) ? -EFAULT : 0;
734 * Set the child FPU state.
736 static int ptrace_setfpregs(struct task_struct *tsk, void __user *ufp)
738 struct thread_info *thread = task_thread_info(tsk);
739 thread->used_cp[1] = thread->used_cp[2] = 1;
740 return copy_from_user(&thread->fpstate, ufp,
741 sizeof(struct user_fp)) ? -EFAULT : 0;
744 #ifdef CONFIG_IWMMXT
747 * Get the child iWMMXt state.
749 static int ptrace_getwmmxregs(struct task_struct *tsk, void __user *ufp)
751 struct thread_info *thread = task_thread_info(tsk);
753 if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
754 return -ENODATA;
755 iwmmxt_task_disable(thread); /* force it to ram */
756 return copy_to_user(ufp, &thread->fpstate.iwmmxt, IWMMXT_SIZE)
757 ? -EFAULT : 0;
761 * Set the child iWMMXt state.
763 static int ptrace_setwmmxregs(struct task_struct *tsk, void __user *ufp)
765 struct thread_info *thread = task_thread_info(tsk);
767 if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
768 return -EACCES;
769 iwmmxt_task_release(thread); /* force a reload */
770 return copy_from_user(&thread->fpstate.iwmmxt, ufp, IWMMXT_SIZE)
771 ? -EFAULT : 0;
774 #endif
776 #ifdef CONFIG_CRUNCH
778 * Get the child Crunch state.
780 static int ptrace_getcrunchregs(struct task_struct *tsk, void __user *ufp)
782 struct thread_info *thread = task_thread_info(tsk);
784 crunch_task_disable(thread); /* force it to ram */
785 return copy_to_user(ufp, &thread->crunchstate, CRUNCH_SIZE)
786 ? -EFAULT : 0;
790 * Set the child Crunch state.
792 static int ptrace_setcrunchregs(struct task_struct *tsk, void __user *ufp)
794 struct thread_info *thread = task_thread_info(tsk);
796 crunch_task_release(thread); /* force a reload */
797 return copy_from_user(&thread->crunchstate, ufp, CRUNCH_SIZE)
798 ? -EFAULT : 0;
800 #endif
802 #ifdef CONFIG_VFP
804 * Get the child VFP state.
806 static int ptrace_getvfpregs(struct task_struct *tsk, void __user *data)
808 struct thread_info *thread = task_thread_info(tsk);
809 union vfp_state *vfp = &thread->vfpstate;
810 struct user_vfp __user *ufp = data;
812 vfp_sync_hwstate(thread);
814 /* copy the floating point registers */
815 if (copy_to_user(&ufp->fpregs, &vfp->hard.fpregs,
816 sizeof(vfp->hard.fpregs)))
817 return -EFAULT;
819 /* copy the status and control register */
820 if (put_user(vfp->hard.fpscr, &ufp->fpscr))
821 return -EFAULT;
823 return 0;
827 * Set the child VFP state.
829 static int ptrace_setvfpregs(struct task_struct *tsk, void __user *data)
831 struct thread_info *thread = task_thread_info(tsk);
832 union vfp_state *vfp = &thread->vfpstate;
833 struct user_vfp __user *ufp = data;
835 vfp_sync_hwstate(thread);
837 /* copy the floating point registers */
838 if (copy_from_user(&vfp->hard.fpregs, &ufp->fpregs,
839 sizeof(vfp->hard.fpregs)))
840 return -EFAULT;
842 /* copy the status and control register */
843 if (get_user(vfp->hard.fpscr, &ufp->fpscr))
844 return -EFAULT;
846 vfp_flush_hwstate(thread);
848 return 0;
850 #endif
852 #ifdef CONFIG_HAVE_HW_BREAKPOINT
854 * Convert a virtual register number into an index for a thread_info
855 * breakpoint array. Breakpoints are identified using positive numbers
856 * whilst watchpoints are negative. The registers are laid out as pairs
857 * of (address, control), each pair mapping to a unique hw_breakpoint struct.
858 * Register 0 is reserved for describing resource information.
860 static int ptrace_hbp_num_to_idx(long num)
862 if (num < 0)
863 num = (ARM_MAX_BRP << 1) - num;
864 return (num - 1) >> 1;
868 * Returns the virtual register number for the address of the
869 * breakpoint at index idx.
871 static long ptrace_hbp_idx_to_num(int idx)
873 long mid = ARM_MAX_BRP << 1;
874 long num = (idx << 1) + 1;
875 return num > mid ? mid - num : num;
879 * Handle hitting a HW-breakpoint.
881 static void ptrace_hbptriggered(struct perf_event *bp, int unused,
882 struct perf_sample_data *data,
883 struct pt_regs *regs)
885 struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp);
886 long num;
887 int i;
888 siginfo_t info;
890 for (i = 0; i < ARM_MAX_HBP_SLOTS; ++i)
891 if (current->thread.debug.hbp[i] == bp)
892 break;
894 num = (i == ARM_MAX_HBP_SLOTS) ? 0 : ptrace_hbp_idx_to_num(i);
896 info.si_signo = SIGTRAP;
897 info.si_errno = (int)num;
898 info.si_code = TRAP_HWBKPT;
899 info.si_addr = (void __user *)(bkpt->trigger);
901 force_sig_info(SIGTRAP, &info, current);
905 * Set ptrace breakpoint pointers to zero for this task.
906 * This is required in order to prevent child processes from unregistering
907 * breakpoints held by their parent.
909 void clear_ptrace_hw_breakpoint(struct task_struct *tsk)
911 memset(tsk->thread.debug.hbp, 0, sizeof(tsk->thread.debug.hbp));
915 * Unregister breakpoints from this task and reset the pointers in
916 * the thread_struct.
918 void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
920 int i;
921 struct thread_struct *t = &tsk->thread;
923 for (i = 0; i < ARM_MAX_HBP_SLOTS; i++) {
924 if (t->debug.hbp[i]) {
925 unregister_hw_breakpoint(t->debug.hbp[i]);
926 t->debug.hbp[i] = NULL;
931 static u32 ptrace_get_hbp_resource_info(void)
933 u8 num_brps, num_wrps, debug_arch, wp_len;
934 u32 reg = 0;
936 num_brps = hw_breakpoint_slots(TYPE_INST);
937 num_wrps = hw_breakpoint_slots(TYPE_DATA);
938 debug_arch = arch_get_debug_arch();
939 wp_len = arch_get_max_wp_len();
941 reg |= debug_arch;
942 reg <<= 8;
943 reg |= wp_len;
944 reg <<= 8;
945 reg |= num_wrps;
946 reg <<= 8;
947 reg |= num_brps;
949 return reg;
952 static struct perf_event *ptrace_hbp_create(struct task_struct *tsk, int type)
954 struct perf_event_attr attr;
956 ptrace_breakpoint_init(&attr);
958 /* Initialise fields to sane defaults. */
959 attr.bp_addr = 0;
960 attr.bp_len = HW_BREAKPOINT_LEN_4;
961 attr.bp_type = type;
962 attr.disabled = 1;
964 return register_user_hw_breakpoint(&attr, ptrace_hbptriggered, tsk);
967 static int ptrace_gethbpregs(struct task_struct *tsk, long num,
968 unsigned long __user *data)
970 u32 reg;
971 int idx, ret = 0;
972 struct perf_event *bp;
973 struct arch_hw_breakpoint_ctrl arch_ctrl;
975 if (num == 0) {
976 reg = ptrace_get_hbp_resource_info();
977 } else {
978 idx = ptrace_hbp_num_to_idx(num);
979 if (idx < 0 || idx >= ARM_MAX_HBP_SLOTS) {
980 ret = -EINVAL;
981 goto out;
984 bp = tsk->thread.debug.hbp[idx];
985 if (!bp) {
986 reg = 0;
987 goto put;
990 arch_ctrl = counter_arch_bp(bp)->ctrl;
993 * Fix up the len because we may have adjusted it
994 * to compensate for an unaligned address.
996 while (!(arch_ctrl.len & 0x1))
997 arch_ctrl.len >>= 1;
999 if (idx & 0x1)
1000 reg = encode_ctrl_reg(arch_ctrl);
1001 else
1002 reg = bp->attr.bp_addr;
1005 put:
1006 if (put_user(reg, data))
1007 ret = -EFAULT;
1009 out:
1010 return ret;
1013 static int ptrace_sethbpregs(struct task_struct *tsk, long num,
1014 unsigned long __user *data)
1016 int idx, gen_len, gen_type, implied_type, ret = 0;
1017 u32 user_val;
1018 struct perf_event *bp;
1019 struct arch_hw_breakpoint_ctrl ctrl;
1020 struct perf_event_attr attr;
1022 if (num == 0)
1023 goto out;
1024 else if (num < 0)
1025 implied_type = HW_BREAKPOINT_RW;
1026 else
1027 implied_type = HW_BREAKPOINT_X;
1029 idx = ptrace_hbp_num_to_idx(num);
1030 if (idx < 0 || idx >= ARM_MAX_HBP_SLOTS) {
1031 ret = -EINVAL;
1032 goto out;
1035 if (get_user(user_val, data)) {
1036 ret = -EFAULT;
1037 goto out;
1040 bp = tsk->thread.debug.hbp[idx];
1041 if (!bp) {
1042 bp = ptrace_hbp_create(tsk, implied_type);
1043 if (IS_ERR(bp)) {
1044 ret = PTR_ERR(bp);
1045 goto out;
1047 tsk->thread.debug.hbp[idx] = bp;
1050 attr = bp->attr;
1052 if (num & 0x1) {
1053 /* Address */
1054 attr.bp_addr = user_val;
1055 } else {
1056 /* Control */
1057 decode_ctrl_reg(user_val, &ctrl);
1058 ret = arch_bp_generic_fields(ctrl, &gen_len, &gen_type);
1059 if (ret)
1060 goto out;
1062 if ((gen_type & implied_type) != gen_type) {
1063 ret = -EINVAL;
1064 goto out;
1067 attr.bp_len = gen_len;
1068 attr.bp_type = gen_type;
1069 attr.disabled = !ctrl.enabled;
1072 ret = modify_user_hw_breakpoint(bp, &attr);
1073 out:
1074 return ret;
1076 #endif
1078 long arch_ptrace(struct task_struct *child, long request,
1079 unsigned long addr, unsigned long data)
1081 int ret;
1083 switch (request) {
1084 case PTRACE_PEEKUSR:
1085 ret = ptrace_read_user(child, addr, (unsigned long __user *)data);
1086 break;
1088 case PTRACE_POKEUSR:
1089 ret = ptrace_write_user(child, addr, data);
1090 break;
1092 case PTRACE_GETREGS:
1093 ret = ptrace_getregs(child, (void __user *)data);
1094 break;
1096 case PTRACE_SETREGS:
1097 ret = ptrace_setregs(child, (void __user *)data);
1098 break;
1100 case PTRACE_GETFPREGS:
1101 ret = ptrace_getfpregs(child, (void __user *)data);
1102 break;
1104 case PTRACE_SETFPREGS:
1105 ret = ptrace_setfpregs(child, (void __user *)data);
1106 break;
1108 #ifdef CONFIG_IWMMXT
1109 case PTRACE_GETWMMXREGS:
1110 ret = ptrace_getwmmxregs(child, (void __user *)data);
1111 break;
1113 case PTRACE_SETWMMXREGS:
1114 ret = ptrace_setwmmxregs(child, (void __user *)data);
1115 break;
1116 #endif
1118 case PTRACE_GET_THREAD_AREA:
1119 ret = put_user(task_thread_info(child)->tp_value,
1120 (unsigned long __user *) data);
1121 break;
1123 case PTRACE_SET_SYSCALL:
1124 task_thread_info(child)->syscall = data;
1125 ret = 0;
1126 break;
1128 #ifdef CONFIG_CRUNCH
1129 case PTRACE_GETCRUNCHREGS:
1130 ret = ptrace_getcrunchregs(child, (void __user *)data);
1131 break;
1133 case PTRACE_SETCRUNCHREGS:
1134 ret = ptrace_setcrunchregs(child, (void __user *)data);
1135 break;
1136 #endif
1138 #ifdef CONFIG_VFP
1139 case PTRACE_GETVFPREGS:
1140 ret = ptrace_getvfpregs(child, (void __user *)data);
1141 break;
1143 case PTRACE_SETVFPREGS:
1144 ret = ptrace_setvfpregs(child, (void __user *)data);
1145 break;
1146 #endif
1148 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1149 case PTRACE_GETHBPREGS:
1150 ret = ptrace_gethbpregs(child, addr,
1151 (unsigned long __user *)data);
1152 break;
1153 case PTRACE_SETHBPREGS:
1154 ret = ptrace_sethbpregs(child, addr,
1155 (unsigned long __user *)data);
1156 break;
1157 #endif
1159 default:
1160 ret = ptrace_request(child, request, addr, data);
1161 break;
1164 return ret;
1167 asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
1169 unsigned long ip;
1171 if (!test_thread_flag(TIF_SYSCALL_TRACE))
1172 return scno;
1173 if (!(current->ptrace & PT_PTRACED))
1174 return scno;
1177 * Save IP. IP is used to denote syscall entry/exit:
1178 * IP = 0 -> entry, = 1 -> exit
1180 ip = regs->ARM_ip;
1181 regs->ARM_ip = why;
1183 current_thread_info()->syscall = scno;
1185 /* the 0x80 provides a way for the tracing parent to distinguish
1186 between a syscall stop and SIGTRAP delivery */
1187 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
1188 ? 0x80 : 0));
1190 * this isn't the same as continuing with a signal, but it will do
1191 * for normal use. strace only continues with a signal if the
1192 * stopping signal is not SIGTRAP. -brl
1194 if (current->exit_code) {
1195 send_sig(current->exit_code, current, 1);
1196 current->exit_code = 0;
1198 regs->ARM_ip = ip;
1200 return current_thread_info()->syscall;