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KVM: Introduce kvm_host_page_size
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / x86 / kvm / mmu.c
blob913ef4b7939ad7e5cbc0d578c494d4469cad0c99
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
19
20 #include "mmu.h"
21 #include "x86.h"
22 #include "kvm_cache_regs.h"
23
24 #include <linux/kvm_host.h>
25 #include <linux/types.h>
26 #include <linux/string.h>
27 #include <linux/mm.h>
28 #include <linux/highmem.h>
29 #include <linux/module.h>
30 #include <linux/swap.h>
31 #include <linux/hugetlb.h>
32 #include <linux/compiler.h>
33 #include <linux/srcu.h>
34
35 #include <asm/page.h>
36 #include <asm/cmpxchg.h>
37 #include <asm/io.h>
38 #include <asm/vmx.h>
39
40 /*
41 * When setting this variable to true it enables Two-Dimensional-Paging
42 * where the hardware walks 2 page tables:
43 * 1. the guest-virtual to guest-physical
44 * 2. while doing 1. it walks guest-physical to host-physical
45 * If the hardware supports that we don't need to do shadow paging.
46 */
47 bool tdp_enabled = false;
48
49 #undef MMU_DEBUG
50
51 #undef AUDIT
52
53 #ifdef AUDIT
54 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
55 #else
56 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
57 #endif
58
59 #ifdef MMU_DEBUG
60
61 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
62 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
63
64 #else
65
66 #define pgprintk(x...) do { } while (0)
67 #define rmap_printk(x...) do { } while (0)
68
69 #endif
70
71 #if defined(MMU_DEBUG) || defined(AUDIT)
72 static int dbg = 0;
73 module_param(dbg, bool, 0644);
74 #endif
75
76 static int oos_shadow = 1;
77 module_param(oos_shadow, bool, 0644);
78
79 #ifndef MMU_DEBUG
80 #define ASSERT(x) do { } while (0)
81 #else
82 #define ASSERT(x) \
83 if (!(x)) { \
84 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
85 __FILE__, __LINE__, #x); \
86 }
87 #endif
88
89 #define PT_FIRST_AVAIL_BITS_SHIFT 9
90 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
91
92 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
93
94 #define PT64_LEVEL_BITS 9
95
96 #define PT64_LEVEL_SHIFT(level) \
97 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
98
99 #define PT64_LEVEL_MASK(level) \
100 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
101
102 #define PT64_INDEX(address, level)\
103 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
104
105
106 #define PT32_LEVEL_BITS 10
107
108 #define PT32_LEVEL_SHIFT(level) \
109 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
110
111 #define PT32_LEVEL_MASK(level) \
112 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
113 #define PT32_LVL_OFFSET_MASK(level) \
114 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
115 * PT32_LEVEL_BITS))) - 1))
116
117 #define PT32_INDEX(address, level)\
118 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
119
120
121 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
122 #define PT64_DIR_BASE_ADDR_MASK \
123 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
124 #define PT64_LVL_ADDR_MASK(level) \
125 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
126 * PT64_LEVEL_BITS))) - 1))
127 #define PT64_LVL_OFFSET_MASK(level) \
128 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
129 * PT64_LEVEL_BITS))) - 1))
130
131 #define PT32_BASE_ADDR_MASK PAGE_MASK
132 #define PT32_DIR_BASE_ADDR_MASK \
133 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
134 #define PT32_LVL_ADDR_MASK(level) \
135 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
136 * PT32_LEVEL_BITS))) - 1))
137
138 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
139 | PT64_NX_MASK)
140
141 #define PFERR_PRESENT_MASK (1U << 0)
142 #define PFERR_WRITE_MASK (1U << 1)
143 #define PFERR_USER_MASK (1U << 2)
144 #define PFERR_RSVD_MASK (1U << 3)
145 #define PFERR_FETCH_MASK (1U << 4)
146
147 #define RMAP_EXT 4
148
149 #define ACC_EXEC_MASK 1
150 #define ACC_WRITE_MASK PT_WRITABLE_MASK
151 #define ACC_USER_MASK PT_USER_MASK
152 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
153
154 #define CREATE_TRACE_POINTS
155 #include "mmutrace.h"
156
157 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
158
159 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
160
161 struct kvm_rmap_desc {
162 u64 *sptes[RMAP_EXT];
163 struct kvm_rmap_desc *more;
164 };
165
166 struct kvm_shadow_walk_iterator {
167 u64 addr;
168 hpa_t shadow_addr;
169 int level;
170 u64 *sptep;
171 unsigned index;
172 };
173
174 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
175 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
176 shadow_walk_okay(&(_walker)); \
177 shadow_walk_next(&(_walker)))
178
179
180 struct kvm_unsync_walk {
181 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
182 };
183
184 typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
185
186 static struct kmem_cache *pte_chain_cache;
187 static struct kmem_cache *rmap_desc_cache;
188 static struct kmem_cache *mmu_page_header_cache;
189
190 static u64 __read_mostly shadow_trap_nonpresent_pte;
191 static u64 __read_mostly shadow_notrap_nonpresent_pte;
192 static u64 __read_mostly shadow_base_present_pte;
193 static u64 __read_mostly shadow_nx_mask;
194 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
195 static u64 __read_mostly shadow_user_mask;
196 static u64 __read_mostly shadow_accessed_mask;
197 static u64 __read_mostly shadow_dirty_mask;
198
199 static inline u64 rsvd_bits(int s, int e)
200 {
201 return ((1ULL << (e - s + 1)) - 1) << s;
202 }
203
204 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
205 {
206 shadow_trap_nonpresent_pte = trap_pte;
207 shadow_notrap_nonpresent_pte = notrap_pte;
208 }
209 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
210
211 void kvm_mmu_set_base_ptes(u64 base_pte)
212 {
213 shadow_base_present_pte = base_pte;
214 }
215 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
216
217 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
218 u64 dirty_mask, u64 nx_mask, u64 x_mask)
219 {
220 shadow_user_mask = user_mask;
221 shadow_accessed_mask = accessed_mask;
222 shadow_dirty_mask = dirty_mask;
223 shadow_nx_mask = nx_mask;
224 shadow_x_mask = x_mask;
225 }
226 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
227
228 static int is_write_protection(struct kvm_vcpu *vcpu)
229 {
230 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
231 }
232
233 static int is_cpuid_PSE36(void)
234 {
235 return 1;
236 }
237
238 static int is_nx(struct kvm_vcpu *vcpu)
239 {
240 return vcpu->arch.efer & EFER_NX;
241 }
242
243 static int is_shadow_present_pte(u64 pte)
244 {
245 return pte != shadow_trap_nonpresent_pte
246 && pte != shadow_notrap_nonpresent_pte;
247 }
248
249 static int is_large_pte(u64 pte)
250 {
251 return pte & PT_PAGE_SIZE_MASK;
252 }
253
254 static int is_writable_pte(unsigned long pte)
255 {
256 return pte & PT_WRITABLE_MASK;
257 }
258
259 static int is_dirty_gpte(unsigned long pte)
260 {
261 return pte & PT_DIRTY_MASK;
262 }
263
264 static int is_rmap_spte(u64 pte)
265 {
266 return is_shadow_present_pte(pte);
267 }
268
269 static int is_last_spte(u64 pte, int level)
270 {
271 if (level == PT_PAGE_TABLE_LEVEL)
272 return 1;
273 if (is_large_pte(pte))
274 return 1;
275 return 0;
276 }
277
278 static pfn_t spte_to_pfn(u64 pte)
279 {
280 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
281 }
282
283 static gfn_t pse36_gfn_delta(u32 gpte)
284 {
285 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
286
287 return (gpte & PT32_DIR_PSE36_MASK) << shift;
288 }
289
290 static void __set_spte(u64 *sptep, u64 spte)
291 {
292 #ifdef CONFIG_X86_64
293 set_64bit((unsigned long *)sptep, spte);
294 #else
295 set_64bit((unsigned long long *)sptep, spte);
296 #endif
297 }
298
299 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
300 struct kmem_cache *base_cache, int min)
301 {
302 void *obj;
303
304 if (cache->nobjs >= min)
305 return 0;
306 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
307 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
308 if (!obj)
309 return -ENOMEM;
310 cache->objects[cache->nobjs++] = obj;
311 }
312 return 0;
313 }
314
315 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
316 {
317 while (mc->nobjs)
318 kfree(mc->objects[--mc->nobjs]);
319 }
320
321 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
322 int min)
323 {
324 struct page *page;
325
326 if (cache->nobjs >= min)
327 return 0;
328 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
329 page = alloc_page(GFP_KERNEL);
330 if (!page)
331 return -ENOMEM;
332 set_page_private(page, 0);
333 cache->objects[cache->nobjs++] = page_address(page);
334 }
335 return 0;
336 }
337
338 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
339 {
340 while (mc->nobjs)
341 free_page((unsigned long)mc->objects[--mc->nobjs]);
342 }
343
344 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
345 {
346 int r;
347
348 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
349 pte_chain_cache, 4);
350 if (r)
351 goto out;
352 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
353 rmap_desc_cache, 4);
354 if (r)
355 goto out;
356 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
357 if (r)
358 goto out;
359 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
360 mmu_page_header_cache, 4);
361 out:
362 return r;
363 }
364
365 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
366 {
367 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
368 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
369 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
370 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
371 }
372
373 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
374 size_t size)
375 {
376 void *p;
377
378 BUG_ON(!mc->nobjs);
379 p = mc->objects[--mc->nobjs];
380 return p;
381 }
382
383 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
384 {
385 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
386 sizeof(struct kvm_pte_chain));
387 }
388
389 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
390 {
391 kfree(pc);
392 }
393
394 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
395 {
396 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
397 sizeof(struct kvm_rmap_desc));
398 }
399
400 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
401 {
402 kfree(rd);
403 }
404
405 /*
406 * Return the pointer to the largepage write count for a given
407 * gfn, handling slots that are not large page aligned.
408 */
409 static int *slot_largepage_idx(gfn_t gfn,
410 struct kvm_memory_slot *slot,
411 int level)
412 {
413 unsigned long idx;
414
415 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
416 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
417 return &slot->lpage_info[level - 2][idx].write_count;
418 }
419
420 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
421 {
422 struct kvm_memory_slot *slot;
423 int *write_count;
424 int i;
425
426 gfn = unalias_gfn(kvm, gfn);
427
428 slot = gfn_to_memslot_unaliased(kvm, gfn);
429 for (i = PT_DIRECTORY_LEVEL;
430 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
431 write_count = slot_largepage_idx(gfn, slot, i);
432 *write_count += 1;
433 }
434 }
435
436 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
437 {
438 struct kvm_memory_slot *slot;
439 int *write_count;
440 int i;
441
442 gfn = unalias_gfn(kvm, gfn);
443 for (i = PT_DIRECTORY_LEVEL;
444 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
445 slot = gfn_to_memslot_unaliased(kvm, gfn);
446 write_count = slot_largepage_idx(gfn, slot, i);
447 *write_count -= 1;
448 WARN_ON(*write_count < 0);
449 }
450 }
451
452 static int has_wrprotected_page(struct kvm *kvm,
453 gfn_t gfn,
454 int level)
455 {
456 struct kvm_memory_slot *slot;
457 int *largepage_idx;
458
459 gfn = unalias_gfn(kvm, gfn);
460 slot = gfn_to_memslot_unaliased(kvm, gfn);
461 if (slot) {
462 largepage_idx = slot_largepage_idx(gfn, slot, level);
463 return *largepage_idx;
464 }
465
466 return 1;
467 }
468
469 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
470 {
471 unsigned long page_size;
472 int i, ret = 0;
473
474 page_size = kvm_host_page_size(kvm, gfn);
475
476 for (i = PT_PAGE_TABLE_LEVEL;
477 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
478 if (page_size >= KVM_HPAGE_SIZE(i))
479 ret = i;
480 else
481 break;
482 }
483
484 return ret;
485 }
486
487 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
488 {
489 struct kvm_memory_slot *slot;
490 int host_level, level, max_level;
491
492 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
493 if (slot && slot->dirty_bitmap)
494 return PT_PAGE_TABLE_LEVEL;
495
496 host_level = host_mapping_level(vcpu->kvm, large_gfn);
497
498 if (host_level == PT_PAGE_TABLE_LEVEL)
499 return host_level;
500
501 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
502 kvm_x86_ops->get_lpage_level() : host_level;
503
504 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
505 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
506 break;
507
508 return level - 1;
509 }
510
511 /*
512 * Take gfn and return the reverse mapping to it.
513 * Note: gfn must be unaliased before this function get called
514 */
515
516 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
517 {
518 struct kvm_memory_slot *slot;
519 unsigned long idx;
520
521 slot = gfn_to_memslot(kvm, gfn);
522 if (likely(level == PT_PAGE_TABLE_LEVEL))
523 return &slot->rmap[gfn - slot->base_gfn];
524
525 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
526 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
527
528 return &slot->lpage_info[level - 2][idx].rmap_pde;
529 }
530
531 /*
532 * Reverse mapping data structures:
533 *
534 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
535 * that points to page_address(page).
536 *
537 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
538 * containing more mappings.
539 *
540 * Returns the number of rmap entries before the spte was added or zero if
541 * the spte was not added.
542 *
543 */
544 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
545 {
546 struct kvm_mmu_page *sp;
547 struct kvm_rmap_desc *desc;
548 unsigned long *rmapp;
549 int i, count = 0;
550
551 if (!is_rmap_spte(*spte))
552 return count;
553 gfn = unalias_gfn(vcpu->kvm, gfn);
554 sp = page_header(__pa(spte));
555 sp->gfns[spte - sp->spt] = gfn;
556 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
557 if (!*rmapp) {
558 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
559 *rmapp = (unsigned long)spte;
560 } else if (!(*rmapp & 1)) {
561 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
562 desc = mmu_alloc_rmap_desc(vcpu);
563 desc->sptes[0] = (u64 *)*rmapp;
564 desc->sptes[1] = spte;
565 *rmapp = (unsigned long)desc | 1;
566 } else {
567 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
568 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
569 while (desc->sptes[RMAP_EXT-1] && desc->more) {
570 desc = desc->more;
571 count += RMAP_EXT;
572 }
573 if (desc->sptes[RMAP_EXT-1]) {
574 desc->more = mmu_alloc_rmap_desc(vcpu);
575 desc = desc->more;
576 }
577 for (i = 0; desc->sptes[i]; ++i)
578 ;
579 desc->sptes[i] = spte;
580 }
581 return count;
582 }
583
584 static void rmap_desc_remove_entry(unsigned long *rmapp,
585 struct kvm_rmap_desc *desc,
586 int i,
587 struct kvm_rmap_desc *prev_desc)
588 {
589 int j;
590
591 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
592 ;
593 desc->sptes[i] = desc->sptes[j];
594 desc->sptes[j] = NULL;
595 if (j != 0)
596 return;
597 if (!prev_desc && !desc->more)
598 *rmapp = (unsigned long)desc->sptes[0];
599 else
600 if (prev_desc)
601 prev_desc->more = desc->more;
602 else
603 *rmapp = (unsigned long)desc->more | 1;
604 mmu_free_rmap_desc(desc);
605 }
606
607 static void rmap_remove(struct kvm *kvm, u64 *spte)
608 {
609 struct kvm_rmap_desc *desc;
610 struct kvm_rmap_desc *prev_desc;
611 struct kvm_mmu_page *sp;
612 pfn_t pfn;
613 unsigned long *rmapp;
614 int i;
615
616 if (!is_rmap_spte(*spte))
617 return;
618 sp = page_header(__pa(spte));
619 pfn = spte_to_pfn(*spte);
620 if (*spte & shadow_accessed_mask)
621 kvm_set_pfn_accessed(pfn);
622 if (is_writable_pte(*spte))
623 kvm_set_pfn_dirty(pfn);
624 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
625 if (!*rmapp) {
626 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
627 BUG();
628 } else if (!(*rmapp & 1)) {
629 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
630 if ((u64 *)*rmapp != spte) {
631 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
632 spte, *spte);
633 BUG();
634 }
635 *rmapp = 0;
636 } else {
637 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
638 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
639 prev_desc = NULL;
640 while (desc) {
641 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
642 if (desc->sptes[i] == spte) {
643 rmap_desc_remove_entry(rmapp,
644 desc, i,
645 prev_desc);
646 return;
647 }
648 prev_desc = desc;
649 desc = desc->more;
650 }
651 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
652 BUG();
653 }
654 }
655
656 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
657 {
658 struct kvm_rmap_desc *desc;
659 struct kvm_rmap_desc *prev_desc;
660 u64 *prev_spte;
661 int i;
662
663 if (!*rmapp)
664 return NULL;
665 else if (!(*rmapp & 1)) {
666 if (!spte)
667 return (u64 *)*rmapp;
668 return NULL;
669 }
670 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
671 prev_desc = NULL;
672 prev_spte = NULL;
673 while (desc) {
674 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
675 if (prev_spte == spte)
676 return desc->sptes[i];
677 prev_spte = desc->sptes[i];
678 }
679 desc = desc->more;
680 }
681 return NULL;
682 }
683
684 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
685 {
686 unsigned long *rmapp;
687 u64 *spte;
688 int i, write_protected = 0;
689
690 gfn = unalias_gfn(kvm, gfn);
691 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
692
693 spte = rmap_next(kvm, rmapp, NULL);
694 while (spte) {
695 BUG_ON(!spte);
696 BUG_ON(!(*spte & PT_PRESENT_MASK));
697 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
698 if (is_writable_pte(*spte)) {
699 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
700 write_protected = 1;
701 }
702 spte = rmap_next(kvm, rmapp, spte);
703 }
704 if (write_protected) {
705 pfn_t pfn;
706
707 spte = rmap_next(kvm, rmapp, NULL);
708 pfn = spte_to_pfn(*spte);
709 kvm_set_pfn_dirty(pfn);
710 }
711
712 /* check for huge page mappings */
713 for (i = PT_DIRECTORY_LEVEL;
714 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
715 rmapp = gfn_to_rmap(kvm, gfn, i);
716 spte = rmap_next(kvm, rmapp, NULL);
717 while (spte) {
718 BUG_ON(!spte);
719 BUG_ON(!(*spte & PT_PRESENT_MASK));
720 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
721 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
722 if (is_writable_pte(*spte)) {
723 rmap_remove(kvm, spte);
724 --kvm->stat.lpages;
725 __set_spte(spte, shadow_trap_nonpresent_pte);
726 spte = NULL;
727 write_protected = 1;
728 }
729 spte = rmap_next(kvm, rmapp, spte);
730 }
731 }
732
733 return write_protected;
734 }
735
736 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
737 unsigned long data)
738 {
739 u64 *spte;
740 int need_tlb_flush = 0;
741
742 while ((spte = rmap_next(kvm, rmapp, NULL))) {
743 BUG_ON(!(*spte & PT_PRESENT_MASK));
744 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
745 rmap_remove(kvm, spte);
746 __set_spte(spte, shadow_trap_nonpresent_pte);
747 need_tlb_flush = 1;
748 }
749 return need_tlb_flush;
750 }
751
752 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
753 unsigned long data)
754 {
755 int need_flush = 0;
756 u64 *spte, new_spte;
757 pte_t *ptep = (pte_t *)data;
758 pfn_t new_pfn;
759
760 WARN_ON(pte_huge(*ptep));
761 new_pfn = pte_pfn(*ptep);
762 spte = rmap_next(kvm, rmapp, NULL);
763 while (spte) {
764 BUG_ON(!is_shadow_present_pte(*spte));
765 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
766 need_flush = 1;
767 if (pte_write(*ptep)) {
768 rmap_remove(kvm, spte);
769 __set_spte(spte, shadow_trap_nonpresent_pte);
770 spte = rmap_next(kvm, rmapp, NULL);
771 } else {
772 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
773 new_spte |= (u64)new_pfn << PAGE_SHIFT;
774
775 new_spte &= ~PT_WRITABLE_MASK;
776 new_spte &= ~SPTE_HOST_WRITEABLE;
777 if (is_writable_pte(*spte))
778 kvm_set_pfn_dirty(spte_to_pfn(*spte));
779 __set_spte(spte, new_spte);
780 spte = rmap_next(kvm, rmapp, spte);
781 }
782 }
783 if (need_flush)
784 kvm_flush_remote_tlbs(kvm);
785
786 return 0;
787 }
788
789 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
790 unsigned long data,
791 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
792 unsigned long data))
793 {
794 int i, j;
795 int retval = 0;
796 struct kvm_memslots *slots;
797
798 slots = rcu_dereference(kvm->memslots);
799
800 for (i = 0; i < slots->nmemslots; i++) {
801 struct kvm_memory_slot *memslot = &slots->memslots[i];
802 unsigned long start = memslot->userspace_addr;
803 unsigned long end;
804
805 end = start + (memslot->npages << PAGE_SHIFT);
806 if (hva >= start && hva < end) {
807 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
808
809 retval |= handler(kvm, &memslot->rmap[gfn_offset],
810 data);
811
812 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
813 int idx = gfn_offset;
814 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
815 retval |= handler(kvm,
816 &memslot->lpage_info[j][idx].rmap_pde,
817 data);
818 }
819 }
820 }
821
822 return retval;
823 }
824
825 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
826 {
827 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
828 }
829
830 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
831 {
832 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
833 }
834
835 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
836 unsigned long data)
837 {
838 u64 *spte;
839 int young = 0;
840
841 /* always return old for EPT */
842 if (!shadow_accessed_mask)
843 return 0;
844
845 spte = rmap_next(kvm, rmapp, NULL);
846 while (spte) {
847 int _young;
848 u64 _spte = *spte;
849 BUG_ON(!(_spte & PT_PRESENT_MASK));
850 _young = _spte & PT_ACCESSED_MASK;
851 if (_young) {
852 young = 1;
853 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
854 }
855 spte = rmap_next(kvm, rmapp, spte);
856 }
857 return young;
858 }
859
860 #define RMAP_RECYCLE_THRESHOLD 1000
861
862 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
863 {
864 unsigned long *rmapp;
865 struct kvm_mmu_page *sp;
866
867 sp = page_header(__pa(spte));
868
869 gfn = unalias_gfn(vcpu->kvm, gfn);
870 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
871
872 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
873 kvm_flush_remote_tlbs(vcpu->kvm);
874 }
875
876 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
877 {
878 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
879 }
880
881 #ifdef MMU_DEBUG
882 static int is_empty_shadow_page(u64 *spt)
883 {
884 u64 *pos;
885 u64 *end;
886
887 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
888 if (is_shadow_present_pte(*pos)) {
889 printk(KERN_ERR "%s: %p %llx\n", __func__,
890 pos, *pos);
891 return 0;
892 }
893 return 1;
894 }
895 #endif
896
897 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
898 {
899 ASSERT(is_empty_shadow_page(sp->spt));
900 list_del(&sp->link);
901 __free_page(virt_to_page(sp->spt));
902 __free_page(virt_to_page(sp->gfns));
903 kfree(sp);
904 ++kvm->arch.n_free_mmu_pages;
905 }
906
907 static unsigned kvm_page_table_hashfn(gfn_t gfn)
908 {
909 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
910 }
911
912 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
913 u64 *parent_pte)
914 {
915 struct kvm_mmu_page *sp;
916
917 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
918 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
919 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
920 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
921 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
922 INIT_LIST_HEAD(&sp->oos_link);
923 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
924 sp->multimapped = 0;
925 sp->parent_pte = parent_pte;
926 --vcpu->kvm->arch.n_free_mmu_pages;
927 return sp;
928 }
929
930 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
931 struct kvm_mmu_page *sp, u64 *parent_pte)
932 {
933 struct kvm_pte_chain *pte_chain;
934 struct hlist_node *node;
935 int i;
936
937 if (!parent_pte)
938 return;
939 if (!sp->multimapped) {
940 u64 *old = sp->parent_pte;
941
942 if (!old) {
943 sp->parent_pte = parent_pte;
944 return;
945 }
946 sp->multimapped = 1;
947 pte_chain = mmu_alloc_pte_chain(vcpu);
948 INIT_HLIST_HEAD(&sp->parent_ptes);
949 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
950 pte_chain->parent_ptes[0] = old;
951 }
952 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
953 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
954 continue;
955 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
956 if (!pte_chain->parent_ptes[i]) {
957 pte_chain->parent_ptes[i] = parent_pte;
958 return;
959 }
960 }
961 pte_chain = mmu_alloc_pte_chain(vcpu);
962 BUG_ON(!pte_chain);
963 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
964 pte_chain->parent_ptes[0] = parent_pte;
965 }
966
967 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
968 u64 *parent_pte)
969 {
970 struct kvm_pte_chain *pte_chain;
971 struct hlist_node *node;
972 int i;
973
974 if (!sp->multimapped) {
975 BUG_ON(sp->parent_pte != parent_pte);
976 sp->parent_pte = NULL;
977 return;
978 }
979 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
980 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
981 if (!pte_chain->parent_ptes[i])
982 break;
983 if (pte_chain->parent_ptes[i] != parent_pte)
984 continue;
985 while (i + 1 < NR_PTE_CHAIN_ENTRIES
986 && pte_chain->parent_ptes[i + 1]) {
987 pte_chain->parent_ptes[i]
988 = pte_chain->parent_ptes[i + 1];
989 ++i;
990 }
991 pte_chain->parent_ptes[i] = NULL;
992 if (i == 0) {
993 hlist_del(&pte_chain->link);
994 mmu_free_pte_chain(pte_chain);
995 if (hlist_empty(&sp->parent_ptes)) {
996 sp->multimapped = 0;
997 sp->parent_pte = NULL;
998 }
999 }
1000 return;
1001 }
1002 BUG();
1003 }
1004
1005
1006 static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1007 mmu_parent_walk_fn fn)
1008 {
1009 struct kvm_pte_chain *pte_chain;
1010 struct hlist_node *node;
1011 struct kvm_mmu_page *parent_sp;
1012 int i;
1013
1014 if (!sp->multimapped && sp->parent_pte) {
1015 parent_sp = page_header(__pa(sp->parent_pte));
1016 fn(vcpu, parent_sp);
1017 mmu_parent_walk(vcpu, parent_sp, fn);
1018 return;
1019 }
1020 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1021 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1022 if (!pte_chain->parent_ptes[i])
1023 break;
1024 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1025 fn(vcpu, parent_sp);
1026 mmu_parent_walk(vcpu, parent_sp, fn);
1027 }
1028 }
1029
1030 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1031 {
1032 unsigned int index;
1033 struct kvm_mmu_page *sp = page_header(__pa(spte));
1034
1035 index = spte - sp->spt;
1036 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1037 sp->unsync_children++;
1038 WARN_ON(!sp->unsync_children);
1039 }
1040
1041 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1042 {
1043 struct kvm_pte_chain *pte_chain;
1044 struct hlist_node *node;
1045 int i;
1046
1047 if (!sp->parent_pte)
1048 return;
1049
1050 if (!sp->multimapped) {
1051 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1052 return;
1053 }
1054
1055 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1056 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1057 if (!pte_chain->parent_ptes[i])
1058 break;
1059 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1060 }
1061 }
1062
1063 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1064 {
1065 kvm_mmu_update_parents_unsync(sp);
1066 return 1;
1067 }
1068
1069 static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
1070 struct kvm_mmu_page *sp)
1071 {
1072 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
1073 kvm_mmu_update_parents_unsync(sp);
1074 }
1075
1076 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1077 struct kvm_mmu_page *sp)
1078 {
1079 int i;
1080
1081 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1082 sp->spt[i] = shadow_trap_nonpresent_pte;
1083 }
1084
1085 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1086 struct kvm_mmu_page *sp)
1087 {
1088 return 1;
1089 }
1090
1091 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1092 {
1093 }
1094
1095 #define KVM_PAGE_ARRAY_NR 16
1096
1097 struct kvm_mmu_pages {
1098 struct mmu_page_and_offset {
1099 struct kvm_mmu_page *sp;
1100 unsigned int idx;
1101 } page[KVM_PAGE_ARRAY_NR];
1102 unsigned int nr;
1103 };
1104
1105 #define for_each_unsync_children(bitmap, idx) \
1106 for (idx = find_first_bit(bitmap, 512); \
1107 idx < 512; \
1108 idx = find_next_bit(bitmap, 512, idx+1))
1109
1110 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1111 int idx)
1112 {
1113 int i;
1114
1115 if (sp->unsync)
1116 for (i=0; i < pvec->nr; i++)
1117 if (pvec->page[i].sp == sp)
1118 return 0;
1119
1120 pvec->page[pvec->nr].sp = sp;
1121 pvec->page[pvec->nr].idx = idx;
1122 pvec->nr++;
1123 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1124 }
1125
1126 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1127 struct kvm_mmu_pages *pvec)
1128 {
1129 int i, ret, nr_unsync_leaf = 0;
1130
1131 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1132 u64 ent = sp->spt[i];
1133
1134 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1135 struct kvm_mmu_page *child;
1136 child = page_header(ent & PT64_BASE_ADDR_MASK);
1137
1138 if (child->unsync_children) {
1139 if (mmu_pages_add(pvec, child, i))
1140 return -ENOSPC;
1141
1142 ret = __mmu_unsync_walk(child, pvec);
1143 if (!ret)
1144 __clear_bit(i, sp->unsync_child_bitmap);
1145 else if (ret > 0)
1146 nr_unsync_leaf += ret;
1147 else
1148 return ret;
1149 }
1150
1151 if (child->unsync) {
1152 nr_unsync_leaf++;
1153 if (mmu_pages_add(pvec, child, i))
1154 return -ENOSPC;
1155 }
1156 }
1157 }
1158
1159 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1160 sp->unsync_children = 0;
1161
1162 return nr_unsync_leaf;
1163 }
1164
1165 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1166 struct kvm_mmu_pages *pvec)
1167 {
1168 if (!sp->unsync_children)
1169 return 0;
1170
1171 mmu_pages_add(pvec, sp, 0);
1172 return __mmu_unsync_walk(sp, pvec);
1173 }
1174
1175 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1176 {
1177 unsigned index;
1178 struct hlist_head *bucket;
1179 struct kvm_mmu_page *sp;
1180 struct hlist_node *node;
1181
1182 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1183 index = kvm_page_table_hashfn(gfn);
1184 bucket = &kvm->arch.mmu_page_hash[index];
1185 hlist_for_each_entry(sp, node, bucket, hash_link)
1186 if (sp->gfn == gfn && !sp->role.direct
1187 && !sp->role.invalid) {
1188 pgprintk("%s: found role %x\n",
1189 __func__, sp->role.word);
1190 return sp;
1191 }
1192 return NULL;
1193 }
1194
1195 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1196 {
1197 WARN_ON(!sp->unsync);
1198 sp->unsync = 0;
1199 --kvm->stat.mmu_unsync;
1200 }
1201
1202 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1203
1204 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1205 {
1206 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1207 kvm_mmu_zap_page(vcpu->kvm, sp);
1208 return 1;
1209 }
1210
1211 trace_kvm_mmu_sync_page(sp);
1212 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1213 kvm_flush_remote_tlbs(vcpu->kvm);
1214 kvm_unlink_unsync_page(vcpu->kvm, sp);
1215 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1216 kvm_mmu_zap_page(vcpu->kvm, sp);
1217 return 1;
1218 }
1219
1220 kvm_mmu_flush_tlb(vcpu);
1221 return 0;
1222 }
1223
1224 struct mmu_page_path {
1225 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1226 unsigned int idx[PT64_ROOT_LEVEL-1];
1227 };
1228
1229 #define for_each_sp(pvec, sp, parents, i) \
1230 for (i = mmu_pages_next(&pvec, &parents, -1), \
1231 sp = pvec.page[i].sp; \
1232 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1233 i = mmu_pages_next(&pvec, &parents, i))
1234
1235 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1236 struct mmu_page_path *parents,
1237 int i)
1238 {
1239 int n;
1240
1241 for (n = i+1; n < pvec->nr; n++) {
1242 struct kvm_mmu_page *sp = pvec->page[n].sp;
1243
1244 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1245 parents->idx[0] = pvec->page[n].idx;
1246 return n;
1247 }
1248
1249 parents->parent[sp->role.level-2] = sp;
1250 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1251 }
1252
1253 return n;
1254 }
1255
1256 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1257 {
1258 struct kvm_mmu_page *sp;
1259 unsigned int level = 0;
1260
1261 do {
1262 unsigned int idx = parents->idx[level];
1263
1264 sp = parents->parent[level];
1265 if (!sp)
1266 return;
1267
1268 --sp->unsync_children;
1269 WARN_ON((int)sp->unsync_children < 0);
1270 __clear_bit(idx, sp->unsync_child_bitmap);
1271 level++;
1272 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1273 }
1274
1275 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1276 struct mmu_page_path *parents,
1277 struct kvm_mmu_pages *pvec)
1278 {
1279 parents->parent[parent->role.level-1] = NULL;
1280 pvec->nr = 0;
1281 }
1282
1283 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1284 struct kvm_mmu_page *parent)
1285 {
1286 int i;
1287 struct kvm_mmu_page *sp;
1288 struct mmu_page_path parents;
1289 struct kvm_mmu_pages pages;
1290
1291 kvm_mmu_pages_init(parent, &parents, &pages);
1292 while (mmu_unsync_walk(parent, &pages)) {
1293 int protected = 0;
1294
1295 for_each_sp(pages, sp, parents, i)
1296 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1297
1298 if (protected)
1299 kvm_flush_remote_tlbs(vcpu->kvm);
1300
1301 for_each_sp(pages, sp, parents, i) {
1302 kvm_sync_page(vcpu, sp);
1303 mmu_pages_clear_parents(&parents);
1304 }
1305 cond_resched_lock(&vcpu->kvm->mmu_lock);
1306 kvm_mmu_pages_init(parent, &parents, &pages);
1307 }
1308 }
1309
1310 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1311 gfn_t gfn,
1312 gva_t gaddr,
1313 unsigned level,
1314 int direct,
1315 unsigned access,
1316 u64 *parent_pte)
1317 {
1318 union kvm_mmu_page_role role;
1319 unsigned index;
1320 unsigned quadrant;
1321 struct hlist_head *bucket;
1322 struct kvm_mmu_page *sp;
1323 struct hlist_node *node, *tmp;
1324
1325 role = vcpu->arch.mmu.base_role;
1326 role.level = level;
1327 role.direct = direct;
1328 role.access = access;
1329 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1330 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1331 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1332 role.quadrant = quadrant;
1333 }
1334 index = kvm_page_table_hashfn(gfn);
1335 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1336 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1337 if (sp->gfn == gfn) {
1338 if (sp->unsync)
1339 if (kvm_sync_page(vcpu, sp))
1340 continue;
1341
1342 if (sp->role.word != role.word)
1343 continue;
1344
1345 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1346 if (sp->unsync_children) {
1347 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1348 kvm_mmu_mark_parents_unsync(vcpu, sp);
1349 }
1350 trace_kvm_mmu_get_page(sp, false);
1351 return sp;
1352 }
1353 ++vcpu->kvm->stat.mmu_cache_miss;
1354 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1355 if (!sp)
1356 return sp;
1357 sp->gfn = gfn;
1358 sp->role = role;
1359 hlist_add_head(&sp->hash_link, bucket);
1360 if (!direct) {
1361 if (rmap_write_protect(vcpu->kvm, gfn))
1362 kvm_flush_remote_tlbs(vcpu->kvm);
1363 account_shadowed(vcpu->kvm, gfn);
1364 }
1365 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1366 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1367 else
1368 nonpaging_prefetch_page(vcpu, sp);
1369 trace_kvm_mmu_get_page(sp, true);
1370 return sp;
1371 }
1372
1373 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1374 struct kvm_vcpu *vcpu, u64 addr)
1375 {
1376 iterator->addr = addr;
1377 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1378 iterator->level = vcpu->arch.mmu.shadow_root_level;
1379 if (iterator->level == PT32E_ROOT_LEVEL) {
1380 iterator->shadow_addr
1381 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1382 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1383 --iterator->level;
1384 if (!iterator->shadow_addr)
1385 iterator->level = 0;
1386 }
1387 }
1388
1389 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1390 {
1391 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1392 return false;
1393
1394 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1395 if (is_large_pte(*iterator->sptep))
1396 return false;
1397
1398 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1399 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1400 return true;
1401 }
1402
1403 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1404 {
1405 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1406 --iterator->level;
1407 }
1408
1409 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1410 struct kvm_mmu_page *sp)
1411 {
1412 unsigned i;
1413 u64 *pt;
1414 u64 ent;
1415
1416 pt = sp->spt;
1417
1418 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1419 ent = pt[i];
1420
1421 if (is_shadow_present_pte(ent)) {
1422 if (!is_last_spte(ent, sp->role.level)) {
1423 ent &= PT64_BASE_ADDR_MASK;
1424 mmu_page_remove_parent_pte(page_header(ent),
1425 &pt[i]);
1426 } else {
1427 if (is_large_pte(ent))
1428 --kvm->stat.lpages;
1429 rmap_remove(kvm, &pt[i]);
1430 }
1431 }
1432 pt[i] = shadow_trap_nonpresent_pte;
1433 }
1434 }
1435
1436 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1437 {
1438 mmu_page_remove_parent_pte(sp, parent_pte);
1439 }
1440
1441 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1442 {
1443 int i;
1444 struct kvm_vcpu *vcpu;
1445
1446 kvm_for_each_vcpu(i, vcpu, kvm)
1447 vcpu->arch.last_pte_updated = NULL;
1448 }
1449
1450 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1451 {
1452 u64 *parent_pte;
1453
1454 while (sp->multimapped || sp->parent_pte) {
1455 if (!sp->multimapped)
1456 parent_pte = sp->parent_pte;
1457 else {
1458 struct kvm_pte_chain *chain;
1459
1460 chain = container_of(sp->parent_ptes.first,
1461 struct kvm_pte_chain, link);
1462 parent_pte = chain->parent_ptes[0];
1463 }
1464 BUG_ON(!parent_pte);
1465 kvm_mmu_put_page(sp, parent_pte);
1466 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1467 }
1468 }
1469
1470 static int mmu_zap_unsync_children(struct kvm *kvm,
1471 struct kvm_mmu_page *parent)
1472 {
1473 int i, zapped = 0;
1474 struct mmu_page_path parents;
1475 struct kvm_mmu_pages pages;
1476
1477 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1478 return 0;
1479
1480 kvm_mmu_pages_init(parent, &parents, &pages);
1481 while (mmu_unsync_walk(parent, &pages)) {
1482 struct kvm_mmu_page *sp;
1483
1484 for_each_sp(pages, sp, parents, i) {
1485 kvm_mmu_zap_page(kvm, sp);
1486 mmu_pages_clear_parents(&parents);
1487 }
1488 zapped += pages.nr;
1489 kvm_mmu_pages_init(parent, &parents, &pages);
1490 }
1491
1492 return zapped;
1493 }
1494
1495 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1496 {
1497 int ret;
1498
1499 trace_kvm_mmu_zap_page(sp);
1500 ++kvm->stat.mmu_shadow_zapped;
1501 ret = mmu_zap_unsync_children(kvm, sp);
1502 kvm_mmu_page_unlink_children(kvm, sp);
1503 kvm_mmu_unlink_parents(kvm, sp);
1504 kvm_flush_remote_tlbs(kvm);
1505 if (!sp->role.invalid && !sp->role.direct)
1506 unaccount_shadowed(kvm, sp->gfn);
1507 if (sp->unsync)
1508 kvm_unlink_unsync_page(kvm, sp);
1509 if (!sp->root_count) {
1510 hlist_del(&sp->hash_link);
1511 kvm_mmu_free_page(kvm, sp);
1512 } else {
1513 sp->role.invalid = 1;
1514 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1515 kvm_reload_remote_mmus(kvm);
1516 }
1517 kvm_mmu_reset_last_pte_updated(kvm);
1518 return ret;
1519 }
1520
1521 /*
1522 * Changing the number of mmu pages allocated to the vm
1523 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1524 */
1525 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1526 {
1527 int used_pages;
1528
1529 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1530 used_pages = max(0, used_pages);
1531
1532 /*
1533 * If we set the number of mmu pages to be smaller be than the
1534 * number of actived pages , we must to free some mmu pages before we
1535 * change the value
1536 */
1537
1538 if (used_pages > kvm_nr_mmu_pages) {
1539 while (used_pages > kvm_nr_mmu_pages) {
1540 struct kvm_mmu_page *page;
1541
1542 page = container_of(kvm->arch.active_mmu_pages.prev,
1543 struct kvm_mmu_page, link);
1544 kvm_mmu_zap_page(kvm, page);
1545 used_pages--;
1546 }
1547 kvm->arch.n_free_mmu_pages = 0;
1548 }
1549 else
1550 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1551 - kvm->arch.n_alloc_mmu_pages;
1552
1553 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1554 }
1555
1556 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1557 {
1558 unsigned index;
1559 struct hlist_head *bucket;
1560 struct kvm_mmu_page *sp;
1561 struct hlist_node *node, *n;
1562 int r;
1563
1564 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1565 r = 0;
1566 index = kvm_page_table_hashfn(gfn);
1567 bucket = &kvm->arch.mmu_page_hash[index];
1568 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1569 if (sp->gfn == gfn && !sp->role.direct) {
1570 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1571 sp->role.word);
1572 r = 1;
1573 if (kvm_mmu_zap_page(kvm, sp))
1574 n = bucket->first;
1575 }
1576 return r;
1577 }
1578
1579 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1580 {
1581 unsigned index;
1582 struct hlist_head *bucket;
1583 struct kvm_mmu_page *sp;
1584 struct hlist_node *node, *nn;
1585
1586 index = kvm_page_table_hashfn(gfn);
1587 bucket = &kvm->arch.mmu_page_hash[index];
1588 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1589 if (sp->gfn == gfn && !sp->role.direct
1590 && !sp->role.invalid) {
1591 pgprintk("%s: zap %lx %x\n",
1592 __func__, gfn, sp->role.word);
1593 kvm_mmu_zap_page(kvm, sp);
1594 }
1595 }
1596 }
1597
1598 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1599 {
1600 int slot = memslot_id(kvm, gfn);
1601 struct kvm_mmu_page *sp = page_header(__pa(pte));
1602
1603 __set_bit(slot, sp->slot_bitmap);
1604 }
1605
1606 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1607 {
1608 int i;
1609 u64 *pt = sp->spt;
1610
1611 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1612 return;
1613
1614 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1615 if (pt[i] == shadow_notrap_nonpresent_pte)
1616 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1617 }
1618 }
1619
1620 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1621 {
1622 struct page *page;
1623
1624 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
1625
1626 if (gpa == UNMAPPED_GVA)
1627 return NULL;
1628
1629 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1630
1631 return page;
1632 }
1633
1634 /*
1635 * The function is based on mtrr_type_lookup() in
1636 * arch/x86/kernel/cpu/mtrr/generic.c
1637 */
1638 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1639 u64 start, u64 end)
1640 {
1641 int i;
1642 u64 base, mask;
1643 u8 prev_match, curr_match;
1644 int num_var_ranges = KVM_NR_VAR_MTRR;
1645
1646 if (!mtrr_state->enabled)
1647 return 0xFF;
1648
1649 /* Make end inclusive end, instead of exclusive */
1650 end--;
1651
1652 /* Look in fixed ranges. Just return the type as per start */
1653 if (mtrr_state->have_fixed && (start < 0x100000)) {
1654 int idx;
1655
1656 if (start < 0x80000) {
1657 idx = 0;
1658 idx += (start >> 16);
1659 return mtrr_state->fixed_ranges[idx];
1660 } else if (start < 0xC0000) {
1661 idx = 1 * 8;
1662 idx += ((start - 0x80000) >> 14);
1663 return mtrr_state->fixed_ranges[idx];
1664 } else if (start < 0x1000000) {
1665 idx = 3 * 8;
1666 idx += ((start - 0xC0000) >> 12);
1667 return mtrr_state->fixed_ranges[idx];
1668 }
1669 }
1670
1671 /*
1672 * Look in variable ranges
1673 * Look of multiple ranges matching this address and pick type
1674 * as per MTRR precedence
1675 */
1676 if (!(mtrr_state->enabled & 2))
1677 return mtrr_state->def_type;
1678
1679 prev_match = 0xFF;
1680 for (i = 0; i < num_var_ranges; ++i) {
1681 unsigned short start_state, end_state;
1682
1683 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1684 continue;
1685
1686 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1687 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1688 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1689 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1690
1691 start_state = ((start & mask) == (base & mask));
1692 end_state = ((end & mask) == (base & mask));
1693 if (start_state != end_state)
1694 return 0xFE;
1695
1696 if ((start & mask) != (base & mask))
1697 continue;
1698
1699 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1700 if (prev_match == 0xFF) {
1701 prev_match = curr_match;
1702 continue;
1703 }
1704
1705 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1706 curr_match == MTRR_TYPE_UNCACHABLE)
1707 return MTRR_TYPE_UNCACHABLE;
1708
1709 if ((prev_match == MTRR_TYPE_WRBACK &&
1710 curr_match == MTRR_TYPE_WRTHROUGH) ||
1711 (prev_match == MTRR_TYPE_WRTHROUGH &&
1712 curr_match == MTRR_TYPE_WRBACK)) {
1713 prev_match = MTRR_TYPE_WRTHROUGH;
1714 curr_match = MTRR_TYPE_WRTHROUGH;
1715 }
1716
1717 if (prev_match != curr_match)
1718 return MTRR_TYPE_UNCACHABLE;
1719 }
1720
1721 if (prev_match != 0xFF)
1722 return prev_match;
1723
1724 return mtrr_state->def_type;
1725 }
1726
1727 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1728 {
1729 u8 mtrr;
1730
1731 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1732 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1733 if (mtrr == 0xfe || mtrr == 0xff)
1734 mtrr = MTRR_TYPE_WRBACK;
1735 return mtrr;
1736 }
1737 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1738
1739 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1740 {
1741 unsigned index;
1742 struct hlist_head *bucket;
1743 struct kvm_mmu_page *s;
1744 struct hlist_node *node, *n;
1745
1746 trace_kvm_mmu_unsync_page(sp);
1747 index = kvm_page_table_hashfn(sp->gfn);
1748 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1749 /* don't unsync if pagetable is shadowed with multiple roles */
1750 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1751 if (s->gfn != sp->gfn || s->role.direct)
1752 continue;
1753 if (s->role.word != sp->role.word)
1754 return 1;
1755 }
1756 ++vcpu->kvm->stat.mmu_unsync;
1757 sp->unsync = 1;
1758
1759 kvm_mmu_mark_parents_unsync(vcpu, sp);
1760
1761 mmu_convert_notrap(sp);
1762 return 0;
1763 }
1764
1765 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1766 bool can_unsync)
1767 {
1768 struct kvm_mmu_page *shadow;
1769
1770 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1771 if (shadow) {
1772 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1773 return 1;
1774 if (shadow->unsync)
1775 return 0;
1776 if (can_unsync && oos_shadow)
1777 return kvm_unsync_page(vcpu, shadow);
1778 return 1;
1779 }
1780 return 0;
1781 }
1782
1783 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1784 unsigned pte_access, int user_fault,
1785 int write_fault, int dirty, int level,
1786 gfn_t gfn, pfn_t pfn, bool speculative,
1787 bool can_unsync, bool reset_host_protection)
1788 {
1789 u64 spte;
1790 int ret = 0;
1791
1792 /*
1793 * We don't set the accessed bit, since we sometimes want to see
1794 * whether the guest actually used the pte (in order to detect
1795 * demand paging).
1796 */
1797 spte = shadow_base_present_pte | shadow_dirty_mask;
1798 if (!speculative)
1799 spte |= shadow_accessed_mask;
1800 if (!dirty)
1801 pte_access &= ~ACC_WRITE_MASK;
1802 if (pte_access & ACC_EXEC_MASK)
1803 spte |= shadow_x_mask;
1804 else
1805 spte |= shadow_nx_mask;
1806 if (pte_access & ACC_USER_MASK)
1807 spte |= shadow_user_mask;
1808 if (level > PT_PAGE_TABLE_LEVEL)
1809 spte |= PT_PAGE_SIZE_MASK;
1810 if (tdp_enabled)
1811 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1812 kvm_is_mmio_pfn(pfn));
1813
1814 if (reset_host_protection)
1815 spte |= SPTE_HOST_WRITEABLE;
1816
1817 spte |= (u64)pfn << PAGE_SHIFT;
1818
1819 if ((pte_access & ACC_WRITE_MASK)
1820 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1821
1822 if (level > PT_PAGE_TABLE_LEVEL &&
1823 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1824 ret = 1;
1825 spte = shadow_trap_nonpresent_pte;
1826 goto set_pte;
1827 }
1828
1829 spte |= PT_WRITABLE_MASK;
1830
1831 /*
1832 * Optimization: for pte sync, if spte was writable the hash
1833 * lookup is unnecessary (and expensive). Write protection
1834 * is responsibility of mmu_get_page / kvm_sync_page.
1835 * Same reasoning can be applied to dirty page accounting.
1836 */
1837 if (!can_unsync && is_writable_pte(*sptep))
1838 goto set_pte;
1839
1840 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1841 pgprintk("%s: found shadow page for %lx, marking ro\n",
1842 __func__, gfn);
1843 ret = 1;
1844 pte_access &= ~ACC_WRITE_MASK;
1845 if (is_writable_pte(spte))
1846 spte &= ~PT_WRITABLE_MASK;
1847 }
1848 }
1849
1850 if (pte_access & ACC_WRITE_MASK)
1851 mark_page_dirty(vcpu->kvm, gfn);
1852
1853 set_pte:
1854 __set_spte(sptep, spte);
1855 return ret;
1856 }
1857
1858 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1859 unsigned pt_access, unsigned pte_access,
1860 int user_fault, int write_fault, int dirty,
1861 int *ptwrite, int level, gfn_t gfn,
1862 pfn_t pfn, bool speculative,
1863 bool reset_host_protection)
1864 {
1865 int was_rmapped = 0;
1866 int was_writable = is_writable_pte(*sptep);
1867 int rmap_count;
1868
1869 pgprintk("%s: spte %llx access %x write_fault %d"
1870 " user_fault %d gfn %lx\n",
1871 __func__, *sptep, pt_access,
1872 write_fault, user_fault, gfn);
1873
1874 if (is_rmap_spte(*sptep)) {
1875 /*
1876 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1877 * the parent of the now unreachable PTE.
1878 */
1879 if (level > PT_PAGE_TABLE_LEVEL &&
1880 !is_large_pte(*sptep)) {
1881 struct kvm_mmu_page *child;
1882 u64 pte = *sptep;
1883
1884 child = page_header(pte & PT64_BASE_ADDR_MASK);
1885 mmu_page_remove_parent_pte(child, sptep);
1886 } else if (pfn != spte_to_pfn(*sptep)) {
1887 pgprintk("hfn old %lx new %lx\n",
1888 spte_to_pfn(*sptep), pfn);
1889 rmap_remove(vcpu->kvm, sptep);
1890 } else
1891 was_rmapped = 1;
1892 }
1893
1894 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1895 dirty, level, gfn, pfn, speculative, true,
1896 reset_host_protection)) {
1897 if (write_fault)
1898 *ptwrite = 1;
1899 kvm_x86_ops->tlb_flush(vcpu);
1900 }
1901
1902 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1903 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1904 is_large_pte(*sptep)? "2MB" : "4kB",
1905 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1906 *sptep, sptep);
1907 if (!was_rmapped && is_large_pte(*sptep))
1908 ++vcpu->kvm->stat.lpages;
1909
1910 page_header_update_slot(vcpu->kvm, sptep, gfn);
1911 if (!was_rmapped) {
1912 rmap_count = rmap_add(vcpu, sptep, gfn);
1913 kvm_release_pfn_clean(pfn);
1914 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1915 rmap_recycle(vcpu, sptep, gfn);
1916 } else {
1917 if (was_writable)
1918 kvm_release_pfn_dirty(pfn);
1919 else
1920 kvm_release_pfn_clean(pfn);
1921 }
1922 if (speculative) {
1923 vcpu->arch.last_pte_updated = sptep;
1924 vcpu->arch.last_pte_gfn = gfn;
1925 }
1926 }
1927
1928 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1929 {
1930 }
1931
1932 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1933 int level, gfn_t gfn, pfn_t pfn)
1934 {
1935 struct kvm_shadow_walk_iterator iterator;
1936 struct kvm_mmu_page *sp;
1937 int pt_write = 0;
1938 gfn_t pseudo_gfn;
1939
1940 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1941 if (iterator.level == level) {
1942 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1943 0, write, 1, &pt_write,
1944 level, gfn, pfn, false, true);
1945 ++vcpu->stat.pf_fixed;
1946 break;
1947 }
1948
1949 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1950 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1951 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1952 iterator.level - 1,
1953 1, ACC_ALL, iterator.sptep);
1954 if (!sp) {
1955 pgprintk("nonpaging_map: ENOMEM\n");
1956 kvm_release_pfn_clean(pfn);
1957 return -ENOMEM;
1958 }
1959
1960 __set_spte(iterator.sptep,
1961 __pa(sp->spt)
1962 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1963 | shadow_user_mask | shadow_x_mask);
1964 }
1965 }
1966 return pt_write;
1967 }
1968
1969 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1970 {
1971 int r;
1972 int level;
1973 pfn_t pfn;
1974 unsigned long mmu_seq;
1975
1976 level = mapping_level(vcpu, gfn);
1977
1978 /*
1979 * This path builds a PAE pagetable - so we can map 2mb pages at
1980 * maximum. Therefore check if the level is larger than that.
1981 */
1982 if (level > PT_DIRECTORY_LEVEL)
1983 level = PT_DIRECTORY_LEVEL;
1984
1985 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
1986
1987 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1988 smp_rmb();
1989 pfn = gfn_to_pfn(vcpu->kvm, gfn);
1990
1991 /* mmio */
1992 if (is_error_pfn(pfn)) {
1993 kvm_release_pfn_clean(pfn);
1994 return 1;
1995 }
1996
1997 spin_lock(&vcpu->kvm->mmu_lock);
1998 if (mmu_notifier_retry(vcpu, mmu_seq))
1999 goto out_unlock;
2000 kvm_mmu_free_some_pages(vcpu);
2001 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2002 spin_unlock(&vcpu->kvm->mmu_lock);
2003
2004
2005 return r;
2006
2007 out_unlock:
2008 spin_unlock(&vcpu->kvm->mmu_lock);
2009 kvm_release_pfn_clean(pfn);
2010 return 0;
2011 }
2012
2013
2014 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2015 {
2016 int i;
2017 struct kvm_mmu_page *sp;
2018
2019 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2020 return;
2021 spin_lock(&vcpu->kvm->mmu_lock);
2022 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2023 hpa_t root = vcpu->arch.mmu.root_hpa;
2024
2025 sp = page_header(root);
2026 --sp->root_count;
2027 if (!sp->root_count && sp->role.invalid)
2028 kvm_mmu_zap_page(vcpu->kvm, sp);
2029 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2030 spin_unlock(&vcpu->kvm->mmu_lock);
2031 return;
2032 }
2033 for (i = 0; i < 4; ++i) {
2034 hpa_t root = vcpu->arch.mmu.pae_root[i];
2035
2036 if (root) {
2037 root &= PT64_BASE_ADDR_MASK;
2038 sp = page_header(root);
2039 --sp->root_count;
2040 if (!sp->root_count && sp->role.invalid)
2041 kvm_mmu_zap_page(vcpu->kvm, sp);
2042 }
2043 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2044 }
2045 spin_unlock(&vcpu->kvm->mmu_lock);
2046 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2047 }
2048
2049 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2050 {
2051 int ret = 0;
2052
2053 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2054 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2055 ret = 1;
2056 }
2057
2058 return ret;
2059 }
2060
2061 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2062 {
2063 int i;
2064 gfn_t root_gfn;
2065 struct kvm_mmu_page *sp;
2066 int direct = 0;
2067 u64 pdptr;
2068
2069 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2070
2071 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2072 hpa_t root = vcpu->arch.mmu.root_hpa;
2073
2074 ASSERT(!VALID_PAGE(root));
2075 if (tdp_enabled)
2076 direct = 1;
2077 if (mmu_check_root(vcpu, root_gfn))
2078 return 1;
2079 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2080 PT64_ROOT_LEVEL, direct,
2081 ACC_ALL, NULL);
2082 root = __pa(sp->spt);
2083 ++sp->root_count;
2084 vcpu->arch.mmu.root_hpa = root;
2085 return 0;
2086 }
2087 direct = !is_paging(vcpu);
2088 if (tdp_enabled)
2089 direct = 1;
2090 for (i = 0; i < 4; ++i) {
2091 hpa_t root = vcpu->arch.mmu.pae_root[i];
2092
2093 ASSERT(!VALID_PAGE(root));
2094 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2095 pdptr = kvm_pdptr_read(vcpu, i);
2096 if (!is_present_gpte(pdptr)) {
2097 vcpu->arch.mmu.pae_root[i] = 0;
2098 continue;
2099 }
2100 root_gfn = pdptr >> PAGE_SHIFT;
2101 } else if (vcpu->arch.mmu.root_level == 0)
2102 root_gfn = 0;
2103 if (mmu_check_root(vcpu, root_gfn))
2104 return 1;
2105 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2106 PT32_ROOT_LEVEL, direct,
2107 ACC_ALL, NULL);
2108 root = __pa(sp->spt);
2109 ++sp->root_count;
2110 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2111 }
2112 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2113 return 0;
2114 }
2115
2116 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2117 {
2118 int i;
2119 struct kvm_mmu_page *sp;
2120
2121 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2122 return;
2123 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2124 hpa_t root = vcpu->arch.mmu.root_hpa;
2125 sp = page_header(root);
2126 mmu_sync_children(vcpu, sp);
2127 return;
2128 }
2129 for (i = 0; i < 4; ++i) {
2130 hpa_t root = vcpu->arch.mmu.pae_root[i];
2131
2132 if (root && VALID_PAGE(root)) {
2133 root &= PT64_BASE_ADDR_MASK;
2134 sp = page_header(root);
2135 mmu_sync_children(vcpu, sp);
2136 }
2137 }
2138 }
2139
2140 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2141 {
2142 spin_lock(&vcpu->kvm->mmu_lock);
2143 mmu_sync_roots(vcpu);
2144 spin_unlock(&vcpu->kvm->mmu_lock);
2145 }
2146
2147 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2148 {
2149 return vaddr;
2150 }
2151
2152 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2153 u32 error_code)
2154 {
2155 gfn_t gfn;
2156 int r;
2157
2158 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2159 r = mmu_topup_memory_caches(vcpu);
2160 if (r)
2161 return r;
2162
2163 ASSERT(vcpu);
2164 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2165
2166 gfn = gva >> PAGE_SHIFT;
2167
2168 return nonpaging_map(vcpu, gva & PAGE_MASK,
2169 error_code & PFERR_WRITE_MASK, gfn);
2170 }
2171
2172 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2173 u32 error_code)
2174 {
2175 pfn_t pfn;
2176 int r;
2177 int level;
2178 gfn_t gfn = gpa >> PAGE_SHIFT;
2179 unsigned long mmu_seq;
2180
2181 ASSERT(vcpu);
2182 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2183
2184 r = mmu_topup_memory_caches(vcpu);
2185 if (r)
2186 return r;
2187
2188 level = mapping_level(vcpu, gfn);
2189
2190 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2191
2192 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2193 smp_rmb();
2194 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2195 if (is_error_pfn(pfn)) {
2196 kvm_release_pfn_clean(pfn);
2197 return 1;
2198 }
2199 spin_lock(&vcpu->kvm->mmu_lock);
2200 if (mmu_notifier_retry(vcpu, mmu_seq))
2201 goto out_unlock;
2202 kvm_mmu_free_some_pages(vcpu);
2203 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2204 level, gfn, pfn);
2205 spin_unlock(&vcpu->kvm->mmu_lock);
2206
2207 return r;
2208
2209 out_unlock:
2210 spin_unlock(&vcpu->kvm->mmu_lock);
2211 kvm_release_pfn_clean(pfn);
2212 return 0;
2213 }
2214
2215 static void nonpaging_free(struct kvm_vcpu *vcpu)
2216 {
2217 mmu_free_roots(vcpu);
2218 }
2219
2220 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2221 {
2222 struct kvm_mmu *context = &vcpu->arch.mmu;
2223
2224 context->new_cr3 = nonpaging_new_cr3;
2225 context->page_fault = nonpaging_page_fault;
2226 context->gva_to_gpa = nonpaging_gva_to_gpa;
2227 context->free = nonpaging_free;
2228 context->prefetch_page = nonpaging_prefetch_page;
2229 context->sync_page = nonpaging_sync_page;
2230 context->invlpg = nonpaging_invlpg;
2231 context->root_level = 0;
2232 context->shadow_root_level = PT32E_ROOT_LEVEL;
2233 context->root_hpa = INVALID_PAGE;
2234 return 0;
2235 }
2236
2237 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2238 {
2239 ++vcpu->stat.tlb_flush;
2240 kvm_x86_ops->tlb_flush(vcpu);
2241 }
2242
2243 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2244 {
2245 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2246 mmu_free_roots(vcpu);
2247 }
2248
2249 static void inject_page_fault(struct kvm_vcpu *vcpu,
2250 u64 addr,
2251 u32 err_code)
2252 {
2253 kvm_inject_page_fault(vcpu, addr, err_code);
2254 }
2255
2256 static void paging_free(struct kvm_vcpu *vcpu)
2257 {
2258 nonpaging_free(vcpu);
2259 }
2260
2261 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2262 {
2263 int bit7;
2264
2265 bit7 = (gpte >> 7) & 1;
2266 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2267 }
2268
2269 #define PTTYPE 64
2270 #include "paging_tmpl.h"
2271 #undef PTTYPE
2272
2273 #define PTTYPE 32
2274 #include "paging_tmpl.h"
2275 #undef PTTYPE
2276
2277 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2278 {
2279 struct kvm_mmu *context = &vcpu->arch.mmu;
2280 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2281 u64 exb_bit_rsvd = 0;
2282
2283 if (!is_nx(vcpu))
2284 exb_bit_rsvd = rsvd_bits(63, 63);
2285 switch (level) {
2286 case PT32_ROOT_LEVEL:
2287 /* no rsvd bits for 2 level 4K page table entries */
2288 context->rsvd_bits_mask[0][1] = 0;
2289 context->rsvd_bits_mask[0][0] = 0;
2290 if (is_cpuid_PSE36())
2291 /* 36bits PSE 4MB page */
2292 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2293 else
2294 /* 32 bits PSE 4MB page */
2295 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2296 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2297 break;
2298 case PT32E_ROOT_LEVEL:
2299 context->rsvd_bits_mask[0][2] =
2300 rsvd_bits(maxphyaddr, 63) |
2301 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2302 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2303 rsvd_bits(maxphyaddr, 62); /* PDE */
2304 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2305 rsvd_bits(maxphyaddr, 62); /* PTE */
2306 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2307 rsvd_bits(maxphyaddr, 62) |
2308 rsvd_bits(13, 20); /* large page */
2309 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2310 break;
2311 case PT64_ROOT_LEVEL:
2312 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2313 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2314 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2315 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2316 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2317 rsvd_bits(maxphyaddr, 51);
2318 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2319 rsvd_bits(maxphyaddr, 51);
2320 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2321 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2322 rsvd_bits(maxphyaddr, 51) |
2323 rsvd_bits(13, 29);
2324 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2325 rsvd_bits(maxphyaddr, 51) |
2326 rsvd_bits(13, 20); /* large page */
2327 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2328 break;
2329 }
2330 }
2331
2332 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2333 {
2334 struct kvm_mmu *context = &vcpu->arch.mmu;
2335
2336 ASSERT(is_pae(vcpu));
2337 context->new_cr3 = paging_new_cr3;
2338 context->page_fault = paging64_page_fault;
2339 context->gva_to_gpa = paging64_gva_to_gpa;
2340 context->prefetch_page = paging64_prefetch_page;
2341 context->sync_page = paging64_sync_page;
2342 context->invlpg = paging64_invlpg;
2343 context->free = paging_free;
2344 context->root_level = level;
2345 context->shadow_root_level = level;
2346 context->root_hpa = INVALID_PAGE;
2347 return 0;
2348 }
2349
2350 static int paging64_init_context(struct kvm_vcpu *vcpu)
2351 {
2352 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2353 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2354 }
2355
2356 static int paging32_init_context(struct kvm_vcpu *vcpu)
2357 {
2358 struct kvm_mmu *context = &vcpu->arch.mmu;
2359
2360 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2361 context->new_cr3 = paging_new_cr3;
2362 context->page_fault = paging32_page_fault;
2363 context->gva_to_gpa = paging32_gva_to_gpa;
2364 context->free = paging_free;
2365 context->prefetch_page = paging32_prefetch_page;
2366 context->sync_page = paging32_sync_page;
2367 context->invlpg = paging32_invlpg;
2368 context->root_level = PT32_ROOT_LEVEL;
2369 context->shadow_root_level = PT32E_ROOT_LEVEL;
2370 context->root_hpa = INVALID_PAGE;
2371 return 0;
2372 }
2373
2374 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2375 {
2376 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2377 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2378 }
2379
2380 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2381 {
2382 struct kvm_mmu *context = &vcpu->arch.mmu;
2383
2384 context->new_cr3 = nonpaging_new_cr3;
2385 context->page_fault = tdp_page_fault;
2386 context->free = nonpaging_free;
2387 context->prefetch_page = nonpaging_prefetch_page;
2388 context->sync_page = nonpaging_sync_page;
2389 context->invlpg = nonpaging_invlpg;
2390 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2391 context->root_hpa = INVALID_PAGE;
2392
2393 if (!is_paging(vcpu)) {
2394 context->gva_to_gpa = nonpaging_gva_to_gpa;
2395 context->root_level = 0;
2396 } else if (is_long_mode(vcpu)) {
2397 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2398 context->gva_to_gpa = paging64_gva_to_gpa;
2399 context->root_level = PT64_ROOT_LEVEL;
2400 } else if (is_pae(vcpu)) {
2401 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2402 context->gva_to_gpa = paging64_gva_to_gpa;
2403 context->root_level = PT32E_ROOT_LEVEL;
2404 } else {
2405 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2406 context->gva_to_gpa = paging32_gva_to_gpa;
2407 context->root_level = PT32_ROOT_LEVEL;
2408 }
2409
2410 return 0;
2411 }
2412
2413 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2414 {
2415 int r;
2416
2417 ASSERT(vcpu);
2418 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2419
2420 if (!is_paging(vcpu))
2421 r = nonpaging_init_context(vcpu);
2422 else if (is_long_mode(vcpu))
2423 r = paging64_init_context(vcpu);
2424 else if (is_pae(vcpu))
2425 r = paging32E_init_context(vcpu);
2426 else
2427 r = paging32_init_context(vcpu);
2428
2429 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2430
2431 return r;
2432 }
2433
2434 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2435 {
2436 vcpu->arch.update_pte.pfn = bad_pfn;
2437
2438 if (tdp_enabled)
2439 return init_kvm_tdp_mmu(vcpu);
2440 else
2441 return init_kvm_softmmu(vcpu);
2442 }
2443
2444 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2445 {
2446 ASSERT(vcpu);
2447 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2448 vcpu->arch.mmu.free(vcpu);
2449 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2450 }
2451 }
2452
2453 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2454 {
2455 destroy_kvm_mmu(vcpu);
2456 return init_kvm_mmu(vcpu);
2457 }
2458 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2459
2460 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2461 {
2462 int r;
2463
2464 r = mmu_topup_memory_caches(vcpu);
2465 if (r)
2466 goto out;
2467 spin_lock(&vcpu->kvm->mmu_lock);
2468 kvm_mmu_free_some_pages(vcpu);
2469 r = mmu_alloc_roots(vcpu);
2470 mmu_sync_roots(vcpu);
2471 spin_unlock(&vcpu->kvm->mmu_lock);
2472 if (r)
2473 goto out;
2474 /* set_cr3() should ensure TLB has been flushed */
2475 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2476 out:
2477 return r;
2478 }
2479 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2480
2481 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2482 {
2483 mmu_free_roots(vcpu);
2484 }
2485
2486 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2487 struct kvm_mmu_page *sp,
2488 u64 *spte)
2489 {
2490 u64 pte;
2491 struct kvm_mmu_page *child;
2492
2493 pte = *spte;
2494 if (is_shadow_present_pte(pte)) {
2495 if (is_last_spte(pte, sp->role.level))
2496 rmap_remove(vcpu->kvm, spte);
2497 else {
2498 child = page_header(pte & PT64_BASE_ADDR_MASK);
2499 mmu_page_remove_parent_pte(child, spte);
2500 }
2501 }
2502 __set_spte(spte, shadow_trap_nonpresent_pte);
2503 if (is_large_pte(pte))
2504 --vcpu->kvm->stat.lpages;
2505 }
2506
2507 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2508 struct kvm_mmu_page *sp,
2509 u64 *spte,
2510 const void *new)
2511 {
2512 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2513 ++vcpu->kvm->stat.mmu_pde_zapped;
2514 return;
2515 }
2516
2517 ++vcpu->kvm->stat.mmu_pte_updated;
2518 if (sp->role.glevels == PT32_ROOT_LEVEL)
2519 paging32_update_pte(vcpu, sp, spte, new);
2520 else
2521 paging64_update_pte(vcpu, sp, spte, new);
2522 }
2523
2524 static bool need_remote_flush(u64 old, u64 new)
2525 {
2526 if (!is_shadow_present_pte(old))
2527 return false;
2528 if (!is_shadow_present_pte(new))
2529 return true;
2530 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2531 return true;
2532 old ^= PT64_NX_MASK;
2533 new ^= PT64_NX_MASK;
2534 return (old & ~new & PT64_PERM_MASK) != 0;
2535 }
2536
2537 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2538 {
2539 if (need_remote_flush(old, new))
2540 kvm_flush_remote_tlbs(vcpu->kvm);
2541 else
2542 kvm_mmu_flush_tlb(vcpu);
2543 }
2544
2545 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2546 {
2547 u64 *spte = vcpu->arch.last_pte_updated;
2548
2549 return !!(spte && (*spte & shadow_accessed_mask));
2550 }
2551
2552 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2553 const u8 *new, int bytes)
2554 {
2555 gfn_t gfn;
2556 int r;
2557 u64 gpte = 0;
2558 pfn_t pfn;
2559
2560 if (bytes != 4 && bytes != 8)
2561 return;
2562
2563 /*
2564 * Assume that the pte write on a page table of the same type
2565 * as the current vcpu paging mode. This is nearly always true
2566 * (might be false while changing modes). Note it is verified later
2567 * by update_pte().
2568 */
2569 if (is_pae(vcpu)) {
2570 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2571 if ((bytes == 4) && (gpa % 4 == 0)) {
2572 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2573 if (r)
2574 return;
2575 memcpy((void *)&gpte + (gpa % 8), new, 4);
2576 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2577 memcpy((void *)&gpte, new, 8);
2578 }
2579 } else {
2580 if ((bytes == 4) && (gpa % 4 == 0))
2581 memcpy((void *)&gpte, new, 4);
2582 }
2583 if (!is_present_gpte(gpte))
2584 return;
2585 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2586
2587 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2588 smp_rmb();
2589 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2590
2591 if (is_error_pfn(pfn)) {
2592 kvm_release_pfn_clean(pfn);
2593 return;
2594 }
2595 vcpu->arch.update_pte.gfn = gfn;
2596 vcpu->arch.update_pte.pfn = pfn;
2597 }
2598
2599 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2600 {
2601 u64 *spte = vcpu->arch.last_pte_updated;
2602
2603 if (spte
2604 && vcpu->arch.last_pte_gfn == gfn
2605 && shadow_accessed_mask
2606 && !(*spte & shadow_accessed_mask)
2607 && is_shadow_present_pte(*spte))
2608 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2609 }
2610
2611 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2612 const u8 *new, int bytes,
2613 bool guest_initiated)
2614 {
2615 gfn_t gfn = gpa >> PAGE_SHIFT;
2616 struct kvm_mmu_page *sp;
2617 struct hlist_node *node, *n;
2618 struct hlist_head *bucket;
2619 unsigned index;
2620 u64 entry, gentry;
2621 u64 *spte;
2622 unsigned offset = offset_in_page(gpa);
2623 unsigned pte_size;
2624 unsigned page_offset;
2625 unsigned misaligned;
2626 unsigned quadrant;
2627 int level;
2628 int flooded = 0;
2629 int npte;
2630 int r;
2631
2632 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2633 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
2634 spin_lock(&vcpu->kvm->mmu_lock);
2635 kvm_mmu_access_page(vcpu, gfn);
2636 kvm_mmu_free_some_pages(vcpu);
2637 ++vcpu->kvm->stat.mmu_pte_write;
2638 kvm_mmu_audit(vcpu, "pre pte write");
2639 if (guest_initiated) {
2640 if (gfn == vcpu->arch.last_pt_write_gfn
2641 && !last_updated_pte_accessed(vcpu)) {
2642 ++vcpu->arch.last_pt_write_count;
2643 if (vcpu->arch.last_pt_write_count >= 3)
2644 flooded = 1;
2645 } else {
2646 vcpu->arch.last_pt_write_gfn = gfn;
2647 vcpu->arch.last_pt_write_count = 1;
2648 vcpu->arch.last_pte_updated = NULL;
2649 }
2650 }
2651 index = kvm_page_table_hashfn(gfn);
2652 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2653 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2654 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2655 continue;
2656 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
2657 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2658 misaligned |= bytes < 4;
2659 if (misaligned || flooded) {
2660 /*
2661 * Misaligned accesses are too much trouble to fix
2662 * up; also, they usually indicate a page is not used
2663 * as a page table.
2664 *
2665 * If we're seeing too many writes to a page,
2666 * it may no longer be a page table, or we may be
2667 * forking, in which case it is better to unmap the
2668 * page.
2669 */
2670 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2671 gpa, bytes, sp->role.word);
2672 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2673 n = bucket->first;
2674 ++vcpu->kvm->stat.mmu_flooded;
2675 continue;
2676 }
2677 page_offset = offset;
2678 level = sp->role.level;
2679 npte = 1;
2680 if (sp->role.glevels == PT32_ROOT_LEVEL) {
2681 page_offset <<= 1; /* 32->64 */
2682 /*
2683 * A 32-bit pde maps 4MB while the shadow pdes map
2684 * only 2MB. So we need to double the offset again
2685 * and zap two pdes instead of one.
2686 */
2687 if (level == PT32_ROOT_LEVEL) {
2688 page_offset &= ~7; /* kill rounding error */
2689 page_offset <<= 1;
2690 npte = 2;
2691 }
2692 quadrant = page_offset >> PAGE_SHIFT;
2693 page_offset &= ~PAGE_MASK;
2694 if (quadrant != sp->role.quadrant)
2695 continue;
2696 }
2697 spte = &sp->spt[page_offset / sizeof(*spte)];
2698 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2699 gentry = 0;
2700 r = kvm_read_guest_atomic(vcpu->kvm,
2701 gpa & ~(u64)(pte_size - 1),
2702 &gentry, pte_size);
2703 new = (const void *)&gentry;
2704 if (r < 0)
2705 new = NULL;
2706 }
2707 while (npte--) {
2708 entry = *spte;
2709 mmu_pte_write_zap_pte(vcpu, sp, spte);
2710 if (new)
2711 mmu_pte_write_new_pte(vcpu, sp, spte, new);
2712 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2713 ++spte;
2714 }
2715 }
2716 kvm_mmu_audit(vcpu, "post pte write");
2717 spin_unlock(&vcpu->kvm->mmu_lock);
2718 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2719 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2720 vcpu->arch.update_pte.pfn = bad_pfn;
2721 }
2722 }
2723
2724 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2725 {
2726 gpa_t gpa;
2727 int r;
2728
2729 if (tdp_enabled)
2730 return 0;
2731
2732 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
2733
2734 spin_lock(&vcpu->kvm->mmu_lock);
2735 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2736 spin_unlock(&vcpu->kvm->mmu_lock);
2737 return r;
2738 }
2739 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2740
2741 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2742 {
2743 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2744 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2745 struct kvm_mmu_page *sp;
2746
2747 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2748 struct kvm_mmu_page, link);
2749 kvm_mmu_zap_page(vcpu->kvm, sp);
2750 ++vcpu->kvm->stat.mmu_recycled;
2751 }
2752 }
2753
2754 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2755 {
2756 int r;
2757 enum emulation_result er;
2758
2759 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2760 if (r < 0)
2761 goto out;
2762
2763 if (!r) {
2764 r = 1;
2765 goto out;
2766 }
2767
2768 r = mmu_topup_memory_caches(vcpu);
2769 if (r)
2770 goto out;
2771
2772 er = emulate_instruction(vcpu, cr2, error_code, 0);
2773
2774 switch (er) {
2775 case EMULATE_DONE:
2776 return 1;
2777 case EMULATE_DO_MMIO:
2778 ++vcpu->stat.mmio_exits;
2779 return 0;
2780 case EMULATE_FAIL:
2781 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2782 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2783 vcpu->run->internal.ndata = 0;
2784 return 0;
2785 default:
2786 BUG();
2787 }
2788 out:
2789 return r;
2790 }
2791 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2792
2793 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2794 {
2795 vcpu->arch.mmu.invlpg(vcpu, gva);
2796 kvm_mmu_flush_tlb(vcpu);
2797 ++vcpu->stat.invlpg;
2798 }
2799 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2800
2801 void kvm_enable_tdp(void)
2802 {
2803 tdp_enabled = true;
2804 }
2805 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2806
2807 void kvm_disable_tdp(void)
2808 {
2809 tdp_enabled = false;
2810 }
2811 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2812
2813 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2814 {
2815 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2816 }
2817
2818 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2819 {
2820 struct page *page;
2821 int i;
2822
2823 ASSERT(vcpu);
2824
2825 /*
2826 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2827 * Therefore we need to allocate shadow page tables in the first
2828 * 4GB of memory, which happens to fit the DMA32 zone.
2829 */
2830 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2831 if (!page)
2832 return -ENOMEM;
2833
2834 vcpu->arch.mmu.pae_root = page_address(page);
2835 for (i = 0; i < 4; ++i)
2836 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2837
2838 return 0;
2839 }
2840
2841 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2842 {
2843 ASSERT(vcpu);
2844 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2845
2846 return alloc_mmu_pages(vcpu);
2847 }
2848
2849 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2850 {
2851 ASSERT(vcpu);
2852 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2853
2854 return init_kvm_mmu(vcpu);
2855 }
2856
2857 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2858 {
2859 ASSERT(vcpu);
2860
2861 destroy_kvm_mmu(vcpu);
2862 free_mmu_pages(vcpu);
2863 mmu_free_memory_caches(vcpu);
2864 }
2865
2866 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2867 {
2868 struct kvm_mmu_page *sp;
2869
2870 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2871 int i;
2872 u64 *pt;
2873
2874 if (!test_bit(slot, sp->slot_bitmap))
2875 continue;
2876
2877 pt = sp->spt;
2878 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2879 /* avoid RMW */
2880 if (pt[i] & PT_WRITABLE_MASK)
2881 pt[i] &= ~PT_WRITABLE_MASK;
2882 }
2883 kvm_flush_remote_tlbs(kvm);
2884 }
2885
2886 void kvm_mmu_zap_all(struct kvm *kvm)
2887 {
2888 struct kvm_mmu_page *sp, *node;
2889
2890 spin_lock(&kvm->mmu_lock);
2891 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2892 if (kvm_mmu_zap_page(kvm, sp))
2893 node = container_of(kvm->arch.active_mmu_pages.next,
2894 struct kvm_mmu_page, link);
2895 spin_unlock(&kvm->mmu_lock);
2896
2897 kvm_flush_remote_tlbs(kvm);
2898 }
2899
2900 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2901 {
2902 struct kvm_mmu_page *page;
2903
2904 page = container_of(kvm->arch.active_mmu_pages.prev,
2905 struct kvm_mmu_page, link);
2906 kvm_mmu_zap_page(kvm, page);
2907 }
2908
2909 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2910 {
2911 struct kvm *kvm;
2912 struct kvm *kvm_freed = NULL;
2913 int cache_count = 0;
2914
2915 spin_lock(&kvm_lock);
2916
2917 list_for_each_entry(kvm, &vm_list, vm_list) {
2918 int npages, idx;
2919
2920 idx = srcu_read_lock(&kvm->srcu);
2921 spin_lock(&kvm->mmu_lock);
2922 npages = kvm->arch.n_alloc_mmu_pages -
2923 kvm->arch.n_free_mmu_pages;
2924 cache_count += npages;
2925 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2926 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2927 cache_count--;
2928 kvm_freed = kvm;
2929 }
2930 nr_to_scan--;
2931
2932 spin_unlock(&kvm->mmu_lock);
2933 srcu_read_unlock(&kvm->srcu, idx);
2934 }
2935 if (kvm_freed)
2936 list_move_tail(&kvm_freed->vm_list, &vm_list);
2937
2938 spin_unlock(&kvm_lock);
2939
2940 return cache_count;
2941 }
2942
2943 static struct shrinker mmu_shrinker = {
2944 .shrink = mmu_shrink,
2945 .seeks = DEFAULT_SEEKS * 10,
2946 };
2947
2948 static void mmu_destroy_caches(void)
2949 {
2950 if (pte_chain_cache)
2951 kmem_cache_destroy(pte_chain_cache);
2952 if (rmap_desc_cache)
2953 kmem_cache_destroy(rmap_desc_cache);
2954 if (mmu_page_header_cache)
2955 kmem_cache_destroy(mmu_page_header_cache);
2956 }
2957
2958 void kvm_mmu_module_exit(void)
2959 {
2960 mmu_destroy_caches();
2961 unregister_shrinker(&mmu_shrinker);
2962 }
2963
2964 int kvm_mmu_module_init(void)
2965 {
2966 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2967 sizeof(struct kvm_pte_chain),
2968 0, 0, NULL);
2969 if (!pte_chain_cache)
2970 goto nomem;
2971 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2972 sizeof(struct kvm_rmap_desc),
2973 0, 0, NULL);
2974 if (!rmap_desc_cache)
2975 goto nomem;
2976
2977 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2978 sizeof(struct kvm_mmu_page),
2979 0, 0, NULL);
2980 if (!mmu_page_header_cache)
2981 goto nomem;
2982
2983 register_shrinker(&mmu_shrinker);
2984
2985 return 0;
2986
2987 nomem:
2988 mmu_destroy_caches();
2989 return -ENOMEM;
2990 }
2991
2992 /*
2993 * Caculate mmu pages needed for kvm.
2994 */
2995 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2996 {
2997 int i;
2998 unsigned int nr_mmu_pages;
2999 unsigned int nr_pages = 0;
3000 struct kvm_memslots *slots;
3001
3002 slots = rcu_dereference(kvm->memslots);
3003 for (i = 0; i < slots->nmemslots; i++)
3004 nr_pages += slots->memslots[i].npages;
3005
3006 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3007 nr_mmu_pages = max(nr_mmu_pages,
3008 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3009
3010 return nr_mmu_pages;
3011 }
3012
3013 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3014 unsigned len)
3015 {
3016 if (len > buffer->len)
3017 return NULL;
3018 return buffer->ptr;
3019 }
3020
3021 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3022 unsigned len)
3023 {
3024 void *ret;
3025
3026 ret = pv_mmu_peek_buffer(buffer, len);
3027 if (!ret)
3028 return ret;
3029 buffer->ptr += len;
3030 buffer->len -= len;
3031 buffer->processed += len;
3032 return ret;
3033 }
3034
3035 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3036 gpa_t addr, gpa_t value)
3037 {
3038 int bytes = 8;
3039 int r;
3040
3041 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3042 bytes = 4;
3043
3044 r = mmu_topup_memory_caches(vcpu);
3045 if (r)
3046 return r;
3047
3048 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3049 return -EFAULT;
3050
3051 return 1;
3052 }
3053
3054 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3055 {
3056 kvm_set_cr3(vcpu, vcpu->arch.cr3);
3057 return 1;
3058 }
3059
3060 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3061 {
3062 spin_lock(&vcpu->kvm->mmu_lock);
3063 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3064 spin_unlock(&vcpu->kvm->mmu_lock);
3065 return 1;
3066 }
3067
3068 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3069 struct kvm_pv_mmu_op_buffer *buffer)
3070 {
3071 struct kvm_mmu_op_header *header;
3072
3073 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3074 if (!header)
3075 return 0;
3076 switch (header->op) {
3077 case KVM_MMU_OP_WRITE_PTE: {
3078 struct kvm_mmu_op_write_pte *wpte;
3079
3080 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3081 if (!wpte)
3082 return 0;
3083 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3084 wpte->pte_val);
3085 }
3086 case KVM_MMU_OP_FLUSH_TLB: {
3087 struct kvm_mmu_op_flush_tlb *ftlb;
3088
3089 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3090 if (!ftlb)
3091 return 0;
3092 return kvm_pv_mmu_flush_tlb(vcpu);
3093 }
3094 case KVM_MMU_OP_RELEASE_PT: {
3095 struct kvm_mmu_op_release_pt *rpt;
3096
3097 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3098 if (!rpt)
3099 return 0;
3100 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3101 }
3102 default: return 0;
3103 }
3104 }
3105
3106 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3107 gpa_t addr, unsigned long *ret)
3108 {
3109 int r;
3110 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3111
3112 buffer->ptr = buffer->buf;
3113 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3114 buffer->processed = 0;
3115
3116 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3117 if (r)
3118 goto out;
3119
3120 while (buffer->len) {
3121 r = kvm_pv_mmu_op_one(vcpu, buffer);
3122 if (r < 0)
3123 goto out;
3124 if (r == 0)
3125 break;
3126 }
3127
3128 r = 1;
3129 out:
3130 *ret = buffer->processed;
3131 return r;
3132 }
3133
3134 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3135 {
3136 struct kvm_shadow_walk_iterator iterator;
3137 int nr_sptes = 0;
3138
3139 spin_lock(&vcpu->kvm->mmu_lock);
3140 for_each_shadow_entry(vcpu, addr, iterator) {
3141 sptes[iterator.level-1] = *iterator.sptep;
3142 nr_sptes++;
3143 if (!is_shadow_present_pte(*iterator.sptep))
3144 break;
3145 }
3146 spin_unlock(&vcpu->kvm->mmu_lock);
3147
3148 return nr_sptes;
3149 }
3150 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3151
3152 #ifdef AUDIT
3153
3154 static const char *audit_msg;
3155
3156 static gva_t canonicalize(gva_t gva)
3157 {
3158 #ifdef CONFIG_X86_64
3159 gva = (long long)(gva << 16) >> 16;
3160 #endif
3161 return gva;
3162 }
3163
3164
3165 typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
3166 u64 *sptep);
3167
3168 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3169 inspect_spte_fn fn)
3170 {
3171 int i;
3172
3173 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3174 u64 ent = sp->spt[i];
3175
3176 if (is_shadow_present_pte(ent)) {
3177 if (!is_last_spte(ent, sp->role.level)) {
3178 struct kvm_mmu_page *child;
3179 child = page_header(ent & PT64_BASE_ADDR_MASK);
3180 __mmu_spte_walk(kvm, child, fn);
3181 } else
3182 fn(kvm, sp, &sp->spt[i]);
3183 }
3184 }
3185 }
3186
3187 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3188 {
3189 int i;
3190 struct kvm_mmu_page *sp;
3191
3192 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3193 return;
3194 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3195 hpa_t root = vcpu->arch.mmu.root_hpa;
3196 sp = page_header(root);
3197 __mmu_spte_walk(vcpu->kvm, sp, fn);
3198 return;
3199 }
3200 for (i = 0; i < 4; ++i) {
3201 hpa_t root = vcpu->arch.mmu.pae_root[i];
3202
3203 if (root && VALID_PAGE(root)) {
3204 root &= PT64_BASE_ADDR_MASK;
3205 sp = page_header(root);
3206 __mmu_spte_walk(vcpu->kvm, sp, fn);
3207 }
3208 }
3209 return;
3210 }
3211
3212 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3213 gva_t va, int level)
3214 {
3215 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3216 int i;
3217 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3218
3219 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3220 u64 ent = pt[i];
3221
3222 if (ent == shadow_trap_nonpresent_pte)
3223 continue;
3224
3225 va = canonicalize(va);
3226 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3227 audit_mappings_page(vcpu, ent, va, level - 1);
3228 else {
3229 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
3230 gfn_t gfn = gpa >> PAGE_SHIFT;
3231 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3232 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3233
3234 if (is_error_pfn(pfn)) {
3235 kvm_release_pfn_clean(pfn);
3236 continue;
3237 }
3238
3239 if (is_shadow_present_pte(ent)
3240 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3241 printk(KERN_ERR "xx audit error: (%s) levels %d"
3242 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3243 audit_msg, vcpu->arch.mmu.root_level,
3244 va, gpa, hpa, ent,
3245 is_shadow_present_pte(ent));
3246 else if (ent == shadow_notrap_nonpresent_pte
3247 && !is_error_hpa(hpa))
3248 printk(KERN_ERR "audit: (%s) notrap shadow,"
3249 " valid guest gva %lx\n", audit_msg, va);
3250 kvm_release_pfn_clean(pfn);
3251
3252 }
3253 }
3254 }
3255
3256 static void audit_mappings(struct kvm_vcpu *vcpu)
3257 {
3258 unsigned i;
3259
3260 if (vcpu->arch.mmu.root_level == 4)
3261 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3262 else
3263 for (i = 0; i < 4; ++i)
3264 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3265 audit_mappings_page(vcpu,
3266 vcpu->arch.mmu.pae_root[i],
3267 i << 30,
3268 2);
3269 }
3270
3271 static int count_rmaps(struct kvm_vcpu *vcpu)
3272 {
3273 int nmaps = 0;
3274 int i, j, k, idx;
3275
3276 idx = srcu_read_lock(&kvm->srcu);
3277 slots = rcu_dereference(kvm->memslots);
3278 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3279 struct kvm_memory_slot *m = &slots->memslots[i];
3280 struct kvm_rmap_desc *d;
3281
3282 for (j = 0; j < m->npages; ++j) {
3283 unsigned long *rmapp = &m->rmap[j];
3284
3285 if (!*rmapp)
3286 continue;
3287 if (!(*rmapp & 1)) {
3288 ++nmaps;
3289 continue;
3290 }
3291 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3292 while (d) {
3293 for (k = 0; k < RMAP_EXT; ++k)
3294 if (d->sptes[k])
3295 ++nmaps;
3296 else
3297 break;
3298 d = d->more;
3299 }
3300 }
3301 }
3302 srcu_read_unlock(&kvm->srcu, idx);
3303 return nmaps;
3304 }
3305
3306 void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
3307 {
3308 unsigned long *rmapp;
3309 struct kvm_mmu_page *rev_sp;
3310 gfn_t gfn;
3311
3312 if (*sptep & PT_WRITABLE_MASK) {
3313 rev_sp = page_header(__pa(sptep));
3314 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3315
3316 if (!gfn_to_memslot(kvm, gfn)) {
3317 if (!printk_ratelimit())
3318 return;
3319 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3320 audit_msg, gfn);
3321 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3322 audit_msg, sptep - rev_sp->spt,
3323 rev_sp->gfn);
3324 dump_stack();
3325 return;
3326 }
3327
3328 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3329 is_large_pte(*sptep));
3330 if (!*rmapp) {
3331 if (!printk_ratelimit())
3332 return;
3333 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3334 audit_msg, *sptep);
3335 dump_stack();
3336 }
3337 }
3338
3339 }
3340
3341 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3342 {
3343 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3344 }
3345
3346 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3347 {
3348 struct kvm_mmu_page *sp;
3349 int i;
3350
3351 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3352 u64 *pt = sp->spt;
3353
3354 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3355 continue;
3356
3357 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3358 u64 ent = pt[i];
3359
3360 if (!(ent & PT_PRESENT_MASK))
3361 continue;
3362 if (!(ent & PT_WRITABLE_MASK))
3363 continue;
3364 inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
3365 }
3366 }
3367 return;
3368 }
3369
3370 static void audit_rmap(struct kvm_vcpu *vcpu)
3371 {
3372 check_writable_mappings_rmap(vcpu);
3373 count_rmaps(vcpu);
3374 }
3375
3376 static void audit_write_protection(struct kvm_vcpu *vcpu)
3377 {
3378 struct kvm_mmu_page *sp;
3379 struct kvm_memory_slot *slot;
3380 unsigned long *rmapp;
3381 u64 *spte;
3382 gfn_t gfn;
3383
3384 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3385 if (sp->role.direct)
3386 continue;
3387 if (sp->unsync)
3388 continue;
3389
3390 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3391 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3392 rmapp = &slot->rmap[gfn - slot->base_gfn];
3393
3394 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3395 while (spte) {
3396 if (*spte & PT_WRITABLE_MASK)
3397 printk(KERN_ERR "%s: (%s) shadow page has "
3398 "writable mappings: gfn %lx role %x\n",
3399 __func__, audit_msg, sp->gfn,
3400 sp->role.word);
3401 spte = rmap_next(vcpu->kvm, rmapp, spte);
3402 }
3403 }
3404 }
3405
3406 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3407 {
3408 int olddbg = dbg;
3409
3410 dbg = 0;
3411 audit_msg = msg;
3412 audit_rmap(vcpu);
3413 audit_write_protection(vcpu);
3414 if (strcmp("pre pte write", audit_msg) != 0)
3415 audit_mappings(vcpu);
3416 audit_writable_sptes_have_rmaps(vcpu);
3417 dbg = olddbg;
3418 }
3419
3420 #endif
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree