include/asm-x86/io_32.h

   1 #ifndef _ASM_IO_H
   2 #define _ASM_IO_H
   3
   4 #include <linux/string.h>
   5 #include <linux/compiler.h>
   6
   7 /*
   8  * This file contains the definitions for the x86 IO instructions
   9  * inb/inw/inl/outb/outw/outl and the "string versions" of the same
  10  * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
  11  * versions of the single-IO instructions (inb_p/inw_p/..).
  12  *
  13  * This file is not meant to be obfuscating: it's just complicated
  14  * to (a) handle it all in a way that makes gcc able to optimize it
  15  * as well as possible and (b) trying to avoid writing the same thing
  16  * over and over again with slight variations and possibly making a
  17  * mistake somewhere.
  18  */
  19
  20 /*
  21  * Thanks to James van Artsdalen for a better timing-fix than
  22  * the two short jumps: using outb's to a nonexistent port seems
  23  * to guarantee better timings even on fast machines.
  24  *
  25  * On the other hand, I'd like to be sure of a non-existent port:
  26  * I feel a bit unsafe about using 0x80 (should be safe, though)
  27  *
  28  *              Linus
  29  */
  30
  31  /*
  32   *  Bit simplified and optimized by Jan Hubicka
  33   *  Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
  34   *
  35   *  isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
  36   *  isa_read[wl] and isa_write[wl] fixed
  37   *  - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
  38   */
  39
  40 #define IO_SPACE_LIMIT 0xffff
  41
  42 #define XQUAD_PORTIO_BASE 0xfe400000
  43 #define XQUAD_PORTIO_QUAD 0x40000  /* 256k per quad. */
  44
  45 #ifdef __KERNEL__
  46
  47 #include <asm-generic/iomap.h>
  48
  49 #include <linux/vmalloc.h>
  50
  51 /*
  52  * Convert a virtual cached pointer to an uncached pointer
  53  */
  54 #define xlate_dev_kmem_ptr(p)   p
  55
  56 /**
  57  *      virt_to_phys    -       map virtual addresses to physical
  58  *      @address: address to remap
  59  *
  60  *      The returned physical address is the physical (CPU) mapping for
  61  *      the memory address given. It is only valid to use this function on
  62  *      addresses directly mapped or allocated via kmalloc.
  63  *
  64  *      This function does not give bus mappings for DMA transfers. In
  65  *      almost all conceivable cases a device driver should not be using
  66  *      this function
  67  */
  68
  69 static inline unsigned long virt_to_phys(volatile void *address)
  70 {
  71         return __pa(address);
  72 }
  73
  74 /**
  75  *      phys_to_virt    -       map physical address to virtual
  76  *      @address: address to remap
  77  *
  78  *      The returned virtual address is a current CPU mapping for
  79  *      the memory address given. It is only valid to use this function on
  80  *      addresses that have a kernel mapping
  81  *
  82  *      This function does not handle bus mappings for DMA transfers. In
  83  *      almost all conceivable cases a device driver should not be using
  84  *      this function
  85  */
  86
  87 static inline void *phys_to_virt(unsigned long address)
  88 {
  89         return __va(address);
  90 }
  91
  92 /*
  93  * Change "struct page" to physical address.
  94  */
  95 #define page_to_phys(page)    ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
  96
  97 /**
  98  * ioremap     -   map bus memory into CPU space
  99  * @offset:    bus address of the memory
 100  * @size:      size of the resource to map
 101  *
 102  * ioremap performs a platform specific sequence of operations to
 103  * make bus memory CPU accessible via the readb/readw/readl/writeb/
 104  * writew/writel functions and the other mmio helpers. The returned
 105  * address is not guaranteed to be usable directly as a virtual
 106  * address.
 107  *
 108  * If the area you are trying to map is a PCI BAR you should have a
 109  * look at pci_iomap().
 110  */
 111 extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
 112 extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
 113 extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,
 114                                 unsigned long prot_val);
 115
 116 /*
 117  * The default ioremap() behavior is non-cached:
 118  */
 119 static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
 120 {
 121         return ioremap_nocache(offset, size);
 122 }
 123
 124 extern void iounmap(volatile void __iomem *addr);
 125
 126 /*
 127  * ISA I/O bus memory addresses are 1:1 with the physical address.
 128  */
 129 #define isa_virt_to_bus virt_to_phys
 130 #define isa_page_to_bus page_to_phys
 131 #define isa_bus_to_virt phys_to_virt
 132
 133 /*
 134  * However PCI ones are not necessarily 1:1 and therefore these interfaces
 135  * are forbidden in portable PCI drivers.
 136  *
 137  * Allow them on x86 for legacy drivers, though.
 138  */
 139 #define virt_to_bus virt_to_phys
 140 #define bus_to_virt phys_to_virt
 141
 142 static inline void
 143 memset_io(volatile void __iomem *addr, unsigned char val, int count)
 144 {
 145         memset((void __force *)addr, val, count);
 146 }
 147
 148 static inline void
 149 memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
 150 {
 151         __memcpy(dst, (const void __force *)src, count);
 152 }
 153
 154 static inline void
 155 memcpy_toio(volatile void __iomem *dst, const void *src, int count)
 156 {
 157         __memcpy((void __force *)dst, src, count);
 158 }
 159
 160 /*
 161  * ISA space is 'always mapped' on a typical x86 system, no need to
 162  * explicitly ioremap() it. The fact that the ISA IO space is mapped
 163  * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
 164  * are physical addresses. The following constant pointer can be
 165  * used as the IO-area pointer (it can be iounmapped as well, so the
 166  * analogy with PCI is quite large):
 167  */
 168 #define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
 169
 170 /*
 171  *      Cache management
 172  *
 173  *      This needed for two cases
 174  *      1. Out of order aware processors
 175  *      2. Accidentally out of order processors (PPro errata #51)
 176  */
 177
 178 #if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
 179
 180 static inline void flush_write_buffers(void)
 181 {
 182         asm volatile("lock; addl $0,0(%%esp)": : :"memory");
 183 }
 184
 185 #else
 186
 187 #define flush_write_buffers() do { } while (0)
 188
 189 #endif
 190
 191 #endif /* __KERNEL__ */
 192
 193 extern void native_io_delay(void);
 194
 195 extern int io_delay_type;
 196 extern void io_delay_init(void);
 197
 198 #if defined(CONFIG_PARAVIRT)
 199 #include <asm/paravirt.h>
 200 #else
 201
 202 static inline void slow_down_io(void)
 203 {
 204         native_io_delay();
 205 #ifdef REALLY_SLOW_IO
 206         native_io_delay();
 207         native_io_delay();
 208         native_io_delay();
 209 #endif
 210 }
 211
 212 #endif
 213
 214 #define __BUILDIO(bwl, bw, type)                                \
 215 static inline void out##bwl(unsigned type value, int port)      \
 216 {                                                               \
 217         out##bwl##_local(value, port);                          \
 218 }                                                               \
 219                                                                 \
 220 static inline unsigned type in##bwl(int port)                   \
 221 {                                                               \
 222         return in##bwl##_local(port);                           \
 223 }
 224
 225 #define BUILDIO(bwl, bw, type)                                          \
 226 static inline void out##bwl##_local(unsigned type value, int port)      \
 227 {                                                                       \
 228         asm volatile("out" #bwl " %" #bw "0, %w1"               \
 229                      : : "a"(value), "Nd"(port));                       \
 230 }                                                                       \
 231                                                                         \
 232 static inline unsigned type in##bwl##_local(int port)                   \
 233 {                                                                       \
 234         unsigned type value;                                            \
 235         asm volatile("in" #bwl " %w1, %" #bw "0"                \
 236                      : "=a"(value) : "Nd"(port));                       \
 237         return value;                                                   \
 238 }                                                                       \
 239                                                                         \
 240 static inline void out##bwl##_local_p(unsigned type value, int port)    \
 241 {                                                                       \
 242         out##bwl##_local(value, port);                                  \
 243         slow_down_io();                                                 \
 244 }                                                                       \
 245                                                                         \
 246 static inline unsigned type in##bwl##_local_p(int port)                 \
 247 {                                                                       \
 248         unsigned type value = in##bwl##_local(port);                    \
 249         slow_down_io();                                                 \
 250         return value;                                                   \
 251 }                                                                       \
 252                                                                         \
 253 __BUILDIO(bwl, bw, type)                                                \
 254                                                                         \
 255 static inline void out##bwl##_p(unsigned type value, int port)          \
 256 {                                                                       \
 257         out##bwl(value, port);                                          \
 258         slow_down_io();                                                 \
 259 }                                                                       \
 260                                                                         \
 261 static inline unsigned type in##bwl##_p(int port)                       \
 262 {                                                                       \
 263         unsigned type value = in##bwl(port);                            \
 264         slow_down_io();                                                 \
 265         return value;                                                   \
 266 }                                                                       \
 267                                                                         \
 268 static inline void outs##bwl(int port, const void *addr, unsigned long count) \
 269 {                                                                       \
 270         asm volatile("rep; outs" #bwl                                   \
 271                      : "+S"(addr), "+c"(count) : "d"(port));            \
 272 }                                                                       \
 273                                                                         \
 274 static inline void ins##bwl(int port, void *addr, unsigned long count)  \
 275 {                                                                       \
 276         asm volatile("rep; ins" #bwl                                    \
 277                      : "+D"(addr), "+c"(count) : "d"(port));            \
 278 }
 279
 280 BUILDIO(b, b, char)
 281 BUILDIO(w, w, short)
 282 BUILDIO(l, , int)
 283
 284 #endif