drivers/net/wireless/iwlwifi/iwl-agn-ucode.c

   1 /******************************************************************************
   2  *
   3  * GPL LICENSE SUMMARY
   4  *
   5  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of version 2 of the GNU General Public License as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but
  12  * WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19  * USA
  20  *
  21  * The full GNU General Public License is included in this distribution
  22  * in the file called LICENSE.GPL.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/sched.h>
  34
  35 #include "iwl-dev.h"
  36 #include "iwl-core.h"
  37 #include "iwl-io.h"
  38 #include "iwl-helpers.h"
  39 #include "iwl-agn-hw.h"
  40 #include "iwl-agn.h"
  41 #include "iwl-agn-calib.h"
  42 #include "iwl-trans.h"
  43 #include "iwl-fh.h"
  44
  45 static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
  46         {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
  47          0, COEX_UNASSOC_IDLE_FLAGS},
  48         {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
  49          0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
  50         {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
  51          0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
  52         {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
  53          0, COEX_CALIBRATION_FLAGS},
  54         {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
  55          0, COEX_PERIODIC_CALIBRATION_FLAGS},
  56         {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
  57          0, COEX_CONNECTION_ESTAB_FLAGS},
  58         {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
  59          0, COEX_ASSOCIATED_IDLE_FLAGS},
  60         {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
  61          0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
  62         {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
  63          0, COEX_ASSOC_AUTO_SCAN_FLAGS},
  64         {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
  65          0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
  66         {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
  67         {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
  68         {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
  69          0, COEX_STAND_ALONE_DEBUG_FLAGS},
  70         {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
  71          0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
  72         {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
  73         {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
  74 };
  75
  76 /*
  77  * ucode
  78  */
  79 static int iwlagn_load_section(struct iwl_priv *priv, const char *name,
  80                                 struct fw_desc *image, u32 dst_addr)
  81 {
  82         dma_addr_t phy_addr = image->p_addr;
  83         u32 byte_cnt = image->len;
  84         int ret;
  85
  86         priv->ucode_write_complete = 0;
  87
  88         iwl_write_direct32(bus(priv),
  89                 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
  90                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE);
  91
  92         iwl_write_direct32(bus(priv),
  93                 FH_SRVC_CHNL_SRAM_ADDR_REG(FH_SRVC_CHNL), dst_addr);
  94
  95         iwl_write_direct32(bus(priv),
  96                 FH_TFDIB_CTRL0_REG(FH_SRVC_CHNL),
  97                 phy_addr & FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK);
  98
  99         iwl_write_direct32(bus(priv),
 100                 FH_TFDIB_CTRL1_REG(FH_SRVC_CHNL),
 101                 (iwl_get_dma_hi_addr(phy_addr)
 102                         << FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_cnt);
 103
 104         iwl_write_direct32(bus(priv),
 105                 FH_TCSR_CHNL_TX_BUF_STS_REG(FH_SRVC_CHNL),
 106                 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM |
 107                 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX |
 108                 FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID);
 109
 110         iwl_write_direct32(bus(priv),
 111                 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
 112                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE       |
 113                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE    |
 114                 FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD);
 115
 116         IWL_DEBUG_FW(priv, "%s uCode section being loaded...\n", name);
 117         ret = wait_event_interruptible_timeout(priv->shrd->wait_command_queue,
 118                                         priv->ucode_write_complete, 5 * HZ);
 119         if (ret == -ERESTARTSYS) {
 120                 IWL_ERR(priv, "Could not load the %s uCode section due "
 121                         "to interrupt\n", name);
 122                 return ret;
 123         }
 124         if (!ret) {
 125                 IWL_ERR(priv, "Could not load the %s uCode section\n",
 126                         name);
 127                 return -ETIMEDOUT;
 128         }
 129
 130         return 0;
 131 }
 132
 133 static int iwlagn_load_given_ucode(struct iwl_priv *priv,
 134                                    struct fw_img *image)
 135 {
 136         int ret = 0;
 137
 138         ret = iwlagn_load_section(priv, "INST", &image->code,
 139                                    IWLAGN_RTC_INST_LOWER_BOUND);
 140         if (ret)
 141                 return ret;
 142
 143         return iwlagn_load_section(priv, "DATA", &image->data,
 144                                     IWLAGN_RTC_DATA_LOWER_BOUND);
 145 }
 146
 147 /*
 148  *  Calibration
 149  */
 150 static int iwlagn_set_Xtal_calib(struct iwl_priv *priv)
 151 {
 152         struct iwl_calib_xtal_freq_cmd cmd;
 153         __le16 *xtal_calib =
 154                 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_XTAL);
 155
 156         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD);
 157         cmd.cap_pin1 = le16_to_cpu(xtal_calib[0]);
 158         cmd.cap_pin2 = le16_to_cpu(xtal_calib[1]);
 159         return iwl_calib_set(&priv->calib_results[IWL_CALIB_XTAL],
 160                              (u8 *)&cmd, sizeof(cmd));
 161 }
 162
 163 static int iwlagn_set_temperature_offset_calib(struct iwl_priv *priv)
 164 {
 165         struct iwl_calib_temperature_offset_cmd cmd;
 166         __le16 *offset_calib =
 167                 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_RAW_TEMPERATURE);
 168
 169         memset(&cmd, 0, sizeof(cmd));
 170         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
 171         memcpy(&cmd.radio_sensor_offset, offset_calib, sizeof(offset_calib));
 172         if (!(cmd.radio_sensor_offset))
 173                 cmd.radio_sensor_offset = DEFAULT_RADIO_SENSOR_OFFSET;
 174
 175         IWL_DEBUG_CALIB(priv, "Radio sensor offset: %d\n",
 176                         le16_to_cpu(cmd.radio_sensor_offset));
 177         return iwl_calib_set(&priv->calib_results[IWL_CALIB_TEMP_OFFSET],
 178                              (u8 *)&cmd, sizeof(cmd));
 179 }
 180
 181 static int iwlagn_set_temperature_offset_calib_v2(struct iwl_priv *priv)
 182 {
 183         struct iwl_calib_temperature_offset_v2_cmd cmd;
 184         __le16 *offset_calib_high = (__le16 *)iwl_eeprom_query_addr(priv,
 185                                      EEPROM_KELVIN_TEMPERATURE);
 186         __le16 *offset_calib_low =
 187                 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_RAW_TEMPERATURE);
 188         struct iwl_eeprom_calib_hdr *hdr;
 189
 190         memset(&cmd, 0, sizeof(cmd));
 191         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
 192         hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv,
 193                                                         EEPROM_CALIB_ALL);
 194         memcpy(&cmd.radio_sensor_offset_high, offset_calib_high,
 195                 sizeof(offset_calib_high));
 196         memcpy(&cmd.radio_sensor_offset_low, offset_calib_low,
 197                 sizeof(offset_calib_low));
 198         if (!(cmd.radio_sensor_offset_low)) {
 199                 IWL_DEBUG_CALIB(priv, "no info in EEPROM, use default\n");
 200                 cmd.radio_sensor_offset_low = DEFAULT_RADIO_SENSOR_OFFSET;
 201                 cmd.radio_sensor_offset_high = DEFAULT_RADIO_SENSOR_OFFSET;
 202         }
 203         memcpy(&cmd.burntVoltageRef, &hdr->voltage,
 204                 sizeof(hdr->voltage));
 205
 206         IWL_DEBUG_CALIB(priv, "Radio sensor offset high: %d\n",
 207                         le16_to_cpu(cmd.radio_sensor_offset_high));
 208         IWL_DEBUG_CALIB(priv, "Radio sensor offset low: %d\n",
 209                         le16_to_cpu(cmd.radio_sensor_offset_low));
 210         IWL_DEBUG_CALIB(priv, "Voltage Ref: %d\n",
 211                         le16_to_cpu(cmd.burntVoltageRef));
 212
 213         return iwl_calib_set(&priv->calib_results[IWL_CALIB_TEMP_OFFSET],
 214                              (u8 *)&cmd, sizeof(cmd));
 215 }
 216
 217 static int iwlagn_send_calib_cfg(struct iwl_priv *priv)
 218 {
 219         struct iwl_calib_cfg_cmd calib_cfg_cmd;
 220         struct iwl_host_cmd cmd = {
 221                 .id = CALIBRATION_CFG_CMD,
 222                 .len = { sizeof(struct iwl_calib_cfg_cmd), },
 223                 .data = { &calib_cfg_cmd, },
 224         };
 225
 226         memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
 227         calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
 228         calib_cfg_cmd.ucd_calib_cfg.once.start = IWL_CALIB_INIT_CFG_ALL;
 229         calib_cfg_cmd.ucd_calib_cfg.once.send_res = IWL_CALIB_INIT_CFG_ALL;
 230         calib_cfg_cmd.ucd_calib_cfg.flags =
 231                 IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK;
 232
 233         return iwl_trans_send_cmd(trans(priv), &cmd);
 234 }
 235
 236 void iwlagn_rx_calib_result(struct iwl_priv *priv,
 237                              struct iwl_rx_mem_buffer *rxb)
 238 {
 239         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 240         struct iwl_calib_hdr *hdr = (struct iwl_calib_hdr *)pkt->u.raw;
 241         int len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
 242         int index;
 243
 244         /* reduce the size of the length field itself */
 245         len -= 4;
 246
 247         /* Define the order in which the results will be sent to the runtime
 248          * uCode. iwl_send_calib_results sends them in a row according to
 249          * their index. We sort them here
 250          */
 251         switch (hdr->op_code) {
 252         case IWL_PHY_CALIBRATE_DC_CMD:
 253                 index = IWL_CALIB_DC;
 254                 break;
 255         case IWL_PHY_CALIBRATE_LO_CMD:
 256                 index = IWL_CALIB_LO;
 257                 break;
 258         case IWL_PHY_CALIBRATE_TX_IQ_CMD:
 259                 index = IWL_CALIB_TX_IQ;
 260                 break;
 261         case IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD:
 262                 index = IWL_CALIB_TX_IQ_PERD;
 263                 break;
 264         case IWL_PHY_CALIBRATE_BASE_BAND_CMD:
 265                 index = IWL_CALIB_BASE_BAND;
 266                 break;
 267         default:
 268                 IWL_ERR(priv, "Unknown calibration notification %d\n",
 269                           hdr->op_code);
 270                 return;
 271         }
 272         iwl_calib_set(&priv->calib_results[index], pkt->u.raw, len);
 273 }
 274
 275 int iwlagn_init_alive_start(struct iwl_priv *priv)
 276 {
 277         int ret;
 278
 279         if (priv->cfg->bt_params &&
 280             priv->cfg->bt_params->advanced_bt_coexist) {
 281                 /*
 282                  * Tell uCode we are ready to perform calibration
 283                  * need to perform this before any calibration
 284                  * no need to close the envlope since we are going
 285                  * to load the runtime uCode later.
 286                  */
 287                 ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN,
 288                         BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
 289                 if (ret)
 290                         return ret;
 291
 292         }
 293
 294         ret = iwlagn_send_calib_cfg(priv);
 295         if (ret)
 296                 return ret;
 297
 298         /**
 299          * temperature offset calibration is only needed for runtime ucode,
 300          * so prepare the value now.
 301          */
 302         if (priv->cfg->need_temp_offset_calib) {
 303                 if (priv->cfg->temp_offset_v2)
 304                         return iwlagn_set_temperature_offset_calib_v2(priv);
 305                 else
 306                         return iwlagn_set_temperature_offset_calib(priv);
 307         }
 308
 309         return 0;
 310 }
 311
 312 static int iwlagn_send_wimax_coex(struct iwl_priv *priv)
 313 {
 314         struct iwl_wimax_coex_cmd coex_cmd;
 315
 316         if (priv->cfg->base_params->support_wimax_coexist) {
 317                 /* UnMask wake up src at associated sleep */
 318                 coex_cmd.flags = COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
 319
 320                 /* UnMask wake up src at unassociated sleep */
 321                 coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
 322                 memcpy(coex_cmd.sta_prio, cu_priorities,
 323                         sizeof(struct iwl_wimax_coex_event_entry) *
 324                          COEX_NUM_OF_EVENTS);
 325
 326                 /* enabling the coexistence feature */
 327                 coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
 328
 329                 /* enabling the priorities tables */
 330                 coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
 331         } else {
 332                 /* coexistence is disabled */
 333                 memset(&coex_cmd, 0, sizeof(coex_cmd));
 334         }
 335         return iwl_trans_send_cmd_pdu(trans(priv),
 336                                 COEX_PRIORITY_TABLE_CMD, CMD_SYNC,
 337                                 sizeof(coex_cmd), &coex_cmd);
 338 }
 339
 340 static const u8 iwlagn_bt_prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX] = {
 341         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 342                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 343         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 344                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 345         ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 346                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 347         ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 348                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 349         ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 350                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 351         ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 352                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 353         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 354                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 355         ((BT_COEX_PRIO_TBL_PRIO_COEX_OFF << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 356                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 357         ((BT_COEX_PRIO_TBL_PRIO_COEX_ON << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 358                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 359         0, 0, 0, 0, 0, 0, 0
 360 };
 361
 362 void iwlagn_send_prio_tbl(struct iwl_priv *priv)
 363 {
 364         struct iwl_bt_coex_prio_table_cmd prio_tbl_cmd;
 365
 366         memcpy(prio_tbl_cmd.prio_tbl, iwlagn_bt_prio_tbl,
 367                 sizeof(iwlagn_bt_prio_tbl));
 368         if (iwl_trans_send_cmd_pdu(trans(priv),
 369                                 REPLY_BT_COEX_PRIO_TABLE, CMD_SYNC,
 370                                 sizeof(prio_tbl_cmd), &prio_tbl_cmd))
 371                 IWL_ERR(priv, "failed to send BT prio tbl command\n");
 372 }
 373
 374 int iwlagn_send_bt_env(struct iwl_priv *priv, u8 action, u8 type)
 375 {
 376         struct iwl_bt_coex_prot_env_cmd env_cmd;
 377         int ret;
 378
 379         env_cmd.action = action;
 380         env_cmd.type = type;
 381         ret = iwl_trans_send_cmd_pdu(trans(priv),
 382                                REPLY_BT_COEX_PROT_ENV, CMD_SYNC,
 383                                sizeof(env_cmd), &env_cmd);
 384         if (ret)
 385                 IWL_ERR(priv, "failed to send BT env command\n");
 386         return ret;
 387 }
 388
 389
 390 static int iwlagn_alive_notify(struct iwl_priv *priv)
 391 {
 392         struct iwl_rxon_context *ctx;
 393         int ret;
 394
 395         if (!priv->tx_cmd_pool)
 396                 priv->tx_cmd_pool =
 397                         kmem_cache_create("iwlagn_dev_cmd",
 398                                           sizeof(struct iwl_device_cmd),
 399                                           sizeof(void *), 0, NULL);
 400
 401         if (!priv->tx_cmd_pool)
 402                 return -ENOMEM;
 403
 404         iwl_trans_tx_start(trans(priv));
 405         for_each_context(priv, ctx)
 406                 ctx->last_tx_rejected = false;
 407
 408         ret = iwlagn_send_wimax_coex(priv);
 409         if (ret)
 410                 return ret;
 411
 412         ret = iwlagn_set_Xtal_calib(priv);
 413         if (ret)
 414                 return ret;
 415
 416         return iwl_send_calib_results(priv);
 417 }
 418
 419
 420 /**
 421  * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
 422  *   using sample data 100 bytes apart.  If these sample points are good,
 423  *   it's a pretty good bet that everything between them is good, too.
 424  */
 425 static int iwl_verify_inst_sparse(struct iwl_priv *priv,
 426                                       struct fw_desc *fw_desc)
 427 {
 428         __le32 *image = (__le32 *)fw_desc->v_addr;
 429         u32 len = fw_desc->len;
 430         u32 val;
 431         u32 i;
 432
 433         IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len);
 434
 435         for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
 436                 /* read data comes through single port, auto-incr addr */
 437                 /* NOTE: Use the debugless read so we don't flood kernel log
 438                  * if IWL_DL_IO is set */
 439                 iwl_write_direct32(bus(priv), HBUS_TARG_MEM_RADDR,
 440                         i + IWLAGN_RTC_INST_LOWER_BOUND);
 441                 val = iwl_read32(bus(priv), HBUS_TARG_MEM_RDAT);
 442                 if (val != le32_to_cpu(*image))
 443                         return -EIO;
 444         }
 445
 446         return 0;
 447 }
 448
 449 static void iwl_print_mismatch_inst(struct iwl_priv *priv,
 450                                     struct fw_desc *fw_desc)
 451 {
 452         __le32 *image = (__le32 *)fw_desc->v_addr;
 453         u32 len = fw_desc->len;
 454         u32 val;
 455         u32 offs;
 456         int errors = 0;
 457
 458         IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len);
 459
 460         iwl_write_direct32(bus(priv), HBUS_TARG_MEM_RADDR,
 461                            IWLAGN_RTC_INST_LOWER_BOUND);
 462
 463         for (offs = 0;
 464              offs < len && errors < 20;
 465              offs += sizeof(u32), image++) {
 466                 /* read data comes through single port, auto-incr addr */
 467                 val = iwl_read32(bus(priv), HBUS_TARG_MEM_RDAT);
 468                 if (val != le32_to_cpu(*image)) {
 469                         IWL_ERR(priv, "uCode INST section at "
 470                                 "offset 0x%x, is 0x%x, s/b 0x%x\n",
 471                                 offs, val, le32_to_cpu(*image));
 472                         errors++;
 473                 }
 474         }
 475 }
 476
 477 /**
 478  * iwl_verify_ucode - determine which instruction image is in SRAM,
 479  *    and verify its contents
 480  */
 481 static int iwl_verify_ucode(struct iwl_priv *priv, struct fw_img *img)
 482 {
 483         if (!iwl_verify_inst_sparse(priv, &img->code)) {
 484                 IWL_DEBUG_FW(priv, "uCode is good in inst SRAM\n");
 485                 return 0;
 486         }
 487
 488         IWL_ERR(priv, "UCODE IMAGE IN INSTRUCTION SRAM NOT VALID!!\n");
 489
 490         iwl_print_mismatch_inst(priv, &img->code);
 491         return -EIO;
 492 }
 493
 494 struct iwlagn_alive_data {
 495         bool valid;
 496         u8 subtype;
 497 };
 498
 499 static void iwlagn_alive_fn(struct iwl_priv *priv,
 500                             struct iwl_rx_packet *pkt,
 501                             void *data)
 502 {
 503         struct iwlagn_alive_data *alive_data = data;
 504         struct iwl_alive_resp *palive;
 505
 506         palive = &pkt->u.alive_frame;
 507
 508         IWL_DEBUG_FW(priv, "Alive ucode status 0x%08X revision "
 509                        "0x%01X 0x%01X\n",
 510                        palive->is_valid, palive->ver_type,
 511                        palive->ver_subtype);
 512
 513         priv->device_pointers.error_event_table =
 514                 le32_to_cpu(palive->error_event_table_ptr);
 515         priv->device_pointers.log_event_table =
 516                 le32_to_cpu(palive->log_event_table_ptr);
 517
 518         alive_data->subtype = palive->ver_subtype;
 519         alive_data->valid = palive->is_valid == UCODE_VALID_OK;
 520 }
 521
 522 #define UCODE_ALIVE_TIMEOUT     HZ
 523 #define UCODE_CALIB_TIMEOUT     (2*HZ)
 524
 525 int iwlagn_load_ucode_wait_alive(struct iwl_priv *priv,
 526                                  struct fw_img *image,
 527                                  enum iwlagn_ucode_type ucode_type)
 528 {
 529         struct iwl_notification_wait alive_wait;
 530         struct iwlagn_alive_data alive_data;
 531         int ret;
 532         enum iwlagn_ucode_type old_type;
 533
 534         ret = iwl_trans_start_device(trans(priv));
 535         if (ret)
 536                 return ret;
 537
 538         iwlagn_init_notification_wait(priv, &alive_wait, REPLY_ALIVE,
 539                                       iwlagn_alive_fn, &alive_data);
 540
 541         old_type = priv->ucode_type;
 542         priv->ucode_type = ucode_type;
 543
 544         ret = iwlagn_load_given_ucode(priv, image);
 545         if (ret) {
 546                 priv->ucode_type = old_type;
 547                 iwlagn_remove_notification(priv, &alive_wait);
 548                 return ret;
 549         }
 550
 551         iwl_trans_kick_nic(trans(priv));
 552
 553         /*
 554          * Some things may run in the background now, but we
 555          * just wait for the ALIVE notification here.
 556          */
 557         ret = iwlagn_wait_notification(priv, &alive_wait, UCODE_ALIVE_TIMEOUT);
 558         if (ret) {
 559                 priv->ucode_type = old_type;
 560                 return ret;
 561         }
 562
 563         if (!alive_data.valid) {
 564                 IWL_ERR(priv, "Loaded ucode is not valid!\n");
 565                 priv->ucode_type = old_type;
 566                 return -EIO;
 567         }
 568
 569         /*
 570          * This step takes a long time (60-80ms!!) and
 571          * WoWLAN image should be loaded quickly, so
 572          * skip it for WoWLAN.
 573          */
 574         if (ucode_type != IWL_UCODE_WOWLAN) {
 575                 ret = iwl_verify_ucode(priv, image);
 576                 if (ret) {
 577                         priv->ucode_type = old_type;
 578                         return ret;
 579                 }
 580
 581                 /* delay a bit to give rfkill time to run */
 582                 msleep(5);
 583         }
 584
 585         ret = iwlagn_alive_notify(priv);
 586         if (ret) {
 587                 IWL_WARN(priv,
 588                         "Could not complete ALIVE transition: %d\n", ret);
 589                 priv->ucode_type = old_type;
 590                 return ret;
 591         }
 592
 593         return 0;
 594 }
 595
 596 int iwlagn_run_init_ucode(struct iwl_priv *priv)
 597 {
 598         struct iwl_notification_wait calib_wait;
 599         int ret;
 600
 601         lockdep_assert_held(&priv->shrd->mutex);
 602
 603         /* No init ucode required? Curious, but maybe ok */
 604         if (!priv->ucode_init.code.len)
 605                 return 0;
 606
 607         if (priv->ucode_type != IWL_UCODE_NONE)
 608                 return 0;
 609
 610         iwlagn_init_notification_wait(priv, &calib_wait,
 611                                       CALIBRATION_COMPLETE_NOTIFICATION,
 612                                       NULL, NULL);
 613
 614         /* Will also start the device */
 615         ret = iwlagn_load_ucode_wait_alive(priv, &priv->ucode_init,
 616                                            IWL_UCODE_INIT);
 617         if (ret)
 618                 goto error;
 619
 620         ret = iwlagn_init_alive_start(priv);
 621         if (ret)
 622                 goto error;
 623
 624         /*
 625          * Some things may run in the background now, but we
 626          * just wait for the calibration complete notification.
 627          */
 628         ret = iwlagn_wait_notification(priv, &calib_wait, UCODE_CALIB_TIMEOUT);
 629
 630         goto out;
 631
 632  error:
 633         iwlagn_remove_notification(priv, &calib_wait);
 634  out:
 635         /* Whatever happened, stop the device */
 636         iwl_trans_stop_device(trans(priv));
 637         return ret;
 638 }