arch/arm/mach-at91/setup.c

   1 /*
   2  * Copyright (C) 2007 Atmel Corporation.
   3  * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
   4  *
   5  * Under GPLv2
   6  */
   7
   8 #include <linux/module.h>
   9 #include <linux/io.h>
  10 #include <linux/mm.h>
  11
  12 #include <asm/mach/map.h>
  13
  14 #include <mach/hardware.h>
  15 #include <mach/cpu.h>
  16 #include <mach/at91_dbgu.h>
  17 #include <mach/at91_pmc.h>
  18
  19 #include "soc.h"
  20 #include "generic.h"
  21
  22 struct at91_init_soc __initdata at91_boot_soc;
  23
  24 struct at91_socinfo at91_soc_initdata;
  25 EXPORT_SYMBOL(at91_soc_initdata);
  26
  27 void __init at91rm9200_set_type(int type)
  28 {
  29         if (type == ARCH_REVISON_9200_PQFP)
  30                 at91_soc_initdata.subtype = AT91_SOC_RM9200_PQFP;
  31         else
  32                 at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
  33
  34         pr_info("AT91: filled in soc subtype: %s\n",
  35                 at91_get_soc_subtype(&at91_soc_initdata));
  36 }
  37
  38 void __init at91_init_irq_default(void)
  39 {
  40         at91_init_interrupts(at91_boot_soc.default_irq_priority);
  41 }
  42
  43 void __init at91_init_interrupts(unsigned int *priority)
  44 {
  45         /* Initialize the AIC interrupt controller */
  46         at91_aic_init(priority);
  47
  48         /* Enable GPIO interrupts */
  49         at91_gpio_irq_setup();
  50 }
  51
  52 static struct map_desc sram_desc[2] __initdata;
  53
  54 void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
  55 {
  56         struct map_desc *desc = &sram_desc[bank];
  57
  58         desc->virtual = AT91_IO_VIRT_BASE - length;
  59         if (bank > 0)
  60                 desc->virtual -= sram_desc[bank - 1].length;
  61
  62         desc->pfn = __phys_to_pfn(base);
  63         desc->length = length;
  64         desc->type = MT_DEVICE;
  65
  66         pr_info("AT91: sram at 0x%lx of 0x%x mapped at 0x%lx\n",
  67                 base, length, desc->virtual);
  68
  69         iotable_init(desc, 1);
  70 }
  71
  72 static struct map_desc at91_io_desc __initdata = {
  73         .virtual        = AT91_VA_BASE_SYS,
  74         .pfn            = __phys_to_pfn(AT91_BASE_SYS),
  75         .length         = SZ_16K,
  76         .type           = MT_DEVICE,
  77 };
  78
  79 void __iomem *at91_ioremap(unsigned long p, size_t size, unsigned int type)
  80 {
  81         if (p >= AT91_BASE_SYS && p <= (AT91_BASE_SYS + SZ_16K - 1))
  82                 return (void __iomem *)AT91_IO_P2V(p);
  83
  84         return __arm_ioremap_caller(p, size, type, __builtin_return_address(0));
  85 }
  86 EXPORT_SYMBOL(at91_ioremap);
  87
  88 void at91_iounmap(volatile void __iomem *addr)
  89 {
  90         unsigned long virt = (unsigned long)addr;
  91
  92         if (virt >= VMALLOC_START && virt < VMALLOC_END)
  93                 __iounmap(addr);
  94 }
  95 EXPORT_SYMBOL(at91_iounmap);
  96
  97 #define AT91_DBGU0      0xfffff200
  98 #define AT91_DBGU1      0xffffee00
  99
 100 static void __init soc_detect(u32 dbgu_base)
 101 {
 102         u32 cidr, socid;
 103
 104         cidr = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_CIDR);
 105         socid = cidr & ~AT91_CIDR_VERSION;
 106
 107         switch (socid) {
 108         case ARCH_ID_AT91CAP9: {
 109 #ifdef CONFIG_AT91_PMC_UNIT
 110                 u32 pmc_ver = at91_sys_read(AT91_PMC_VER);
 111
 112                 if (pmc_ver == ARCH_REVISION_CAP9_B)
 113                         at91_soc_initdata.subtype = AT91_SOC_CAP9_REV_B;
 114                 else if (pmc_ver == ARCH_REVISION_CAP9_C)
 115                         at91_soc_initdata.subtype = AT91_SOC_CAP9_REV_C;
 116 #endif
 117                 at91_soc_initdata.type = AT91_SOC_CAP9;
 118                 at91_boot_soc = at91cap9_soc;
 119                 break;
 120         }
 121
 122         case ARCH_ID_AT91RM9200:
 123                 at91_soc_initdata.type = AT91_SOC_RM9200;
 124                 at91_boot_soc = at91rm9200_soc;
 125                 break;
 126
 127         case ARCH_ID_AT91SAM9260:
 128                 at91_soc_initdata.type = AT91_SOC_SAM9260;
 129                 at91_boot_soc = at91sam9260_soc;
 130                 break;
 131
 132         case ARCH_ID_AT91SAM9261:
 133                 at91_soc_initdata.type = AT91_SOC_SAM9261;
 134                 at91_boot_soc = at91sam9261_soc;
 135                 break;
 136
 137         case ARCH_ID_AT91SAM9263:
 138                 at91_soc_initdata.type = AT91_SOC_SAM9263;
 139                 at91_boot_soc = at91sam9263_soc;
 140                 break;
 141
 142         case ARCH_ID_AT91SAM9G20:
 143                 at91_soc_initdata.type = AT91_SOC_SAM9G20;
 144                 at91_boot_soc = at91sam9260_soc;
 145                 break;
 146
 147         case ARCH_ID_AT91SAM9G45:
 148                 at91_soc_initdata.type = AT91_SOC_SAM9G45;
 149                 if (cidr == ARCH_ID_AT91SAM9G45ES)
 150                         at91_soc_initdata.subtype = AT91_SOC_SAM9G45ES;
 151                 at91_boot_soc = at91sam9g45_soc;
 152                 break;
 153
 154         case ARCH_ID_AT91SAM9RL64:
 155                 at91_soc_initdata.type = AT91_SOC_SAM9RL;
 156                 at91_boot_soc = at91sam9rl_soc;
 157                 break;
 158
 159         case ARCH_ID_AT91SAM9X5:
 160                 at91_soc_initdata.type = AT91_SOC_SAM9X5;
 161                 at91_boot_soc = at91sam9x5_soc;
 162                 break;
 163         }
 164
 165         /* at91sam9g10 */
 166         if ((cidr & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
 167                 at91_soc_initdata.type = AT91_SOC_SAM9G10;
 168                 at91_boot_soc = at91sam9261_soc;
 169         }
 170         /* at91sam9xe */
 171         else if ((cidr & AT91_CIDR_ARCH) == ARCH_FAMILY_AT91SAM9XE) {
 172                 at91_soc_initdata.type = AT91_SOC_SAM9260;
 173                 at91_soc_initdata.subtype = AT91_SOC_SAM9XE;
 174                 at91_boot_soc = at91sam9260_soc;
 175         }
 176
 177         if (!at91_soc_is_detected())
 178                 return;
 179
 180         at91_soc_initdata.cidr = cidr;
 181
 182         /* sub version of soc */
 183         at91_soc_initdata.exid = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
 184
 185         if (at91_soc_initdata.type == AT91_SOC_SAM9G45) {
 186                 switch (at91_soc_initdata.exid) {
 187                 case ARCH_EXID_AT91SAM9M10:
 188                         at91_soc_initdata.subtype = AT91_SOC_SAM9M10;
 189                         break;
 190                 case ARCH_EXID_AT91SAM9G46:
 191                         at91_soc_initdata.subtype = AT91_SOC_SAM9G46;
 192                         break;
 193                 case ARCH_EXID_AT91SAM9M11:
 194                         at91_soc_initdata.subtype = AT91_SOC_SAM9M11;
 195                         break;
 196                 }
 197         }
 198
 199         if (at91_soc_initdata.type == AT91_SOC_SAM9X5) {
 200                 switch (at91_soc_initdata.exid) {
 201                 case ARCH_EXID_AT91SAM9G15:
 202                         at91_soc_initdata.subtype = AT91_SOC_SAM9G15;
 203                         break;
 204                 case ARCH_EXID_AT91SAM9G35:
 205                         at91_soc_initdata.subtype = AT91_SOC_SAM9G35;
 206                         break;
 207                 case ARCH_EXID_AT91SAM9X35:
 208                         at91_soc_initdata.subtype = AT91_SOC_SAM9X35;
 209                         break;
 210                 case ARCH_EXID_AT91SAM9G25:
 211                         at91_soc_initdata.subtype = AT91_SOC_SAM9G25;
 212                         break;
 213                 case ARCH_EXID_AT91SAM9X25:
 214                         at91_soc_initdata.subtype = AT91_SOC_SAM9X25;
 215                         break;
 216                 }
 217         }
 218 }
 219
 220 static const char *soc_name[] = {
 221         [AT91_SOC_RM9200]       = "at91rm9200",
 222         [AT91_SOC_CAP9]         = "at91cap9",
 223         [AT91_SOC_SAM9260]      = "at91sam9260",
 224         [AT91_SOC_SAM9261]      = "at91sam9261",
 225         [AT91_SOC_SAM9263]      = "at91sam9263",
 226         [AT91_SOC_SAM9G10]      = "at91sam9g10",
 227         [AT91_SOC_SAM9G20]      = "at91sam9g20",
 228         [AT91_SOC_SAM9G45]      = "at91sam9g45",
 229         [AT91_SOC_SAM9RL]       = "at91sam9rl",
 230         [AT91_SOC_SAM9X5]       = "at91sam9x5",
 231         [AT91_SOC_NONE]         = "Unknown"
 232 };
 233
 234 const char *at91_get_soc_type(struct at91_socinfo *c)
 235 {
 236         return soc_name[c->type];
 237 }
 238 EXPORT_SYMBOL(at91_get_soc_type);
 239
 240 static const char *soc_subtype_name[] = {
 241         [AT91_SOC_RM9200_BGA]   = "at91rm9200 BGA",
 242         [AT91_SOC_RM9200_PQFP]  = "at91rm9200 PQFP",
 243         [AT91_SOC_CAP9_REV_B]   = "at91cap9 revB",
 244         [AT91_SOC_CAP9_REV_C]   = "at91cap9 revC",
 245         [AT91_SOC_SAM9XE]       = "at91sam9xe",
 246         [AT91_SOC_SAM9G45ES]    = "at91sam9g45es",
 247         [AT91_SOC_SAM9M10]      = "at91sam9m10",
 248         [AT91_SOC_SAM9G46]      = "at91sam9g46",
 249         [AT91_SOC_SAM9M11]      = "at91sam9m11",
 250         [AT91_SOC_SAM9G15]      = "at91sam9g15",
 251         [AT91_SOC_SAM9G35]      = "at91sam9g35",
 252         [AT91_SOC_SAM9X35]      = "at91sam9x35",
 253         [AT91_SOC_SAM9G25]      = "at91sam9g25",
 254         [AT91_SOC_SAM9X25]      = "at91sam9x25",
 255         [AT91_SOC_SUBTYPE_NONE] = "Unknown"
 256 };
 257
 258 const char *at91_get_soc_subtype(struct at91_socinfo *c)
 259 {
 260         return soc_subtype_name[c->subtype];
 261 }
 262 EXPORT_SYMBOL(at91_get_soc_subtype);
 263
 264 void __init at91_map_io(void)
 265 {
 266         /* Map peripherals */
 267         iotable_init(&at91_io_desc, 1);
 268
 269         at91_soc_initdata.type = AT91_SOC_NONE;
 270         at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
 271
 272         soc_detect(AT91_DBGU0);
 273         if (!at91_soc_is_detected())
 274                 soc_detect(AT91_DBGU1);
 275
 276         if (!at91_soc_is_detected())
 277                 panic("AT91: Impossible to detect the SOC type");
 278
 279         pr_info("AT91: Detected soc type: %s\n",
 280                 at91_get_soc_type(&at91_soc_initdata));
 281         pr_info("AT91: Detected soc subtype: %s\n",
 282                 at91_get_soc_subtype(&at91_soc_initdata));
 283
 284         if (!at91_soc_is_enabled())
 285                 panic("AT91: Soc not enabled");
 286
 287         if (at91_boot_soc.map_io)
 288                 at91_boot_soc.map_io();
 289 }
 290
 291 void __init at91_initialize(unsigned long main_clock)
 292 {
 293         /* Init clock subsystem */
 294         at91_clock_init(main_clock);
 295
 296         /* Register the processor-specific clocks */
 297         at91_boot_soc.register_clocks();
 298
 299         at91_boot_soc.init();
 300 }