arch/x86/kernel/process.c

   1 #include <linux/errno.h>
   2 #include <linux/kernel.h>
   3 #include <linux/mm.h>
   4 #include <linux/smp.h>
   5 #include <linux/prctl.h>
   6 #include <linux/slab.h>
   7 #include <linux/sched.h>
   8 #include <linux/module.h>
   9 #include <linux/pm.h>
  10 #include <linux/clockchips.h>
  11 #include <linux/random.h>
  12 #include <linux/user-return-notifier.h>
  13 #include <linux/dmi.h>
  14 #include <linux/utsname.h>
  15 #include <trace/events/power.h>
  16 #include <linux/hw_breakpoint.h>
  17 #include <asm/cpu.h>
  18 #include <asm/system.h>
  19 #include <asm/apic.h>
  20 #include <asm/syscalls.h>
  21 #include <asm/idle.h>
  22 #include <asm/uaccess.h>
  23 #include <asm/i387.h>
  24 #include <asm/debugreg.h>
  25
  26 struct kmem_cache *task_xstate_cachep;
  27 EXPORT_SYMBOL_GPL(task_xstate_cachep);
  28
  29 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
  30 {
  31         int ret;
  32
  33         *dst = *src;
  34         if (fpu_allocated(&src->thread.fpu)) {
  35                 memset(&dst->thread.fpu, 0, sizeof(dst->thread.fpu));
  36                 ret = fpu_alloc(&dst->thread.fpu);
  37                 if (ret)
  38                         return ret;
  39                 fpu_copy(&dst->thread.fpu, &src->thread.fpu);
  40         }
  41         return 0;
  42 }
  43
  44 void free_thread_xstate(struct task_struct *tsk)
  45 {
  46         fpu_free(&tsk->thread.fpu);
  47 }
  48
  49 void free_thread_info(struct thread_info *ti)
  50 {
  51         free_thread_xstate(ti->task);
  52         free_pages((unsigned long)ti, get_order(THREAD_SIZE));
  53 }
  54
  55 void arch_task_cache_init(void)
  56 {
  57         task_xstate_cachep =
  58                 kmem_cache_create("task_xstate", xstate_size,
  59                                   __alignof__(union thread_xstate),
  60                                   SLAB_PANIC | SLAB_NOTRACK, NULL);
  61 }
  62
  63 /*
  64  * Free current thread data structures etc..
  65  */
  66 void exit_thread(void)
  67 {
  68         struct task_struct *me = current;
  69         struct thread_struct *t = &me->thread;
  70         unsigned long *bp = t->io_bitmap_ptr;
  71
  72         if (bp) {
  73                 struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
  74
  75                 t->io_bitmap_ptr = NULL;
  76                 clear_thread_flag(TIF_IO_BITMAP);
  77                 /*
  78                  * Careful, clear this in the TSS too:
  79                  */
  80                 memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
  81                 t->io_bitmap_max = 0;
  82                 put_cpu();
  83                 kfree(bp);
  84         }
  85 }
  86
  87 void show_regs(struct pt_regs *regs)
  88 {
  89         show_registers(regs);
  90         show_trace(NULL, regs, (unsigned long *)kernel_stack_pointer(regs));
  91 }
  92
  93 void show_regs_common(void)
  94 {
  95         const char *vendor, *product, *board;
  96
  97         vendor = dmi_get_system_info(DMI_SYS_VENDOR);
  98         if (!vendor)
  99                 vendor = "";
 100         product = dmi_get_system_info(DMI_PRODUCT_NAME);
 101         if (!product)
 102                 product = "";
 103
 104         /* Board Name is optional */
 105         board = dmi_get_system_info(DMI_BOARD_NAME);
 106
 107         printk(KERN_CONT "\n");
 108         printk(KERN_DEFAULT "Pid: %d, comm: %.20s %s %s %.*s",
 109                 current->pid, current->comm, print_tainted(),
 110                 init_utsname()->release,
 111                 (int)strcspn(init_utsname()->version, " "),
 112                 init_utsname()->version);
 113         printk(KERN_CONT " ");
 114         printk(KERN_CONT "%s %s", vendor, product);
 115         if (board) {
 116                 printk(KERN_CONT "/");
 117                 printk(KERN_CONT "%s", board);
 118         }
 119         printk(KERN_CONT "\n");
 120 }
 121
 122 void flush_thread(void)
 123 {
 124         struct task_struct *tsk = current;
 125
 126         flush_ptrace_hw_breakpoint(tsk);
 127         memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
 128         /*
 129          * Forget coprocessor state..
 130          */
 131         tsk->fpu_counter = 0;
 132         clear_fpu(tsk);
 133         clear_used_math();
 134 }
 135
 136 static void hard_disable_TSC(void)
 137 {
 138         write_cr4(read_cr4() | X86_CR4_TSD);
 139 }
 140
 141 void disable_TSC(void)
 142 {
 143         preempt_disable();
 144         if (!test_and_set_thread_flag(TIF_NOTSC))
 145                 /*
 146                  * Must flip the CPU state synchronously with
 147                  * TIF_NOTSC in the current running context.
 148                  */
 149                 hard_disable_TSC();
 150         preempt_enable();
 151 }
 152
 153 static void hard_enable_TSC(void)
 154 {
 155         write_cr4(read_cr4() & ~X86_CR4_TSD);
 156 }
 157
 158 static void enable_TSC(void)
 159 {
 160         preempt_disable();
 161         if (test_and_clear_thread_flag(TIF_NOTSC))
 162                 /*
 163                  * Must flip the CPU state synchronously with
 164                  * TIF_NOTSC in the current running context.
 165                  */
 166                 hard_enable_TSC();
 167         preempt_enable();
 168 }
 169
 170 int get_tsc_mode(unsigned long adr)
 171 {
 172         unsigned int val;
 173
 174         if (test_thread_flag(TIF_NOTSC))
 175                 val = PR_TSC_SIGSEGV;
 176         else
 177                 val = PR_TSC_ENABLE;
 178
 179         return put_user(val, (unsigned int __user *)adr);
 180 }
 181
 182 int set_tsc_mode(unsigned int val)
 183 {
 184         if (val == PR_TSC_SIGSEGV)
 185                 disable_TSC();
 186         else if (val == PR_TSC_ENABLE)
 187                 enable_TSC();
 188         else
 189                 return -EINVAL;
 190
 191         return 0;
 192 }
 193
 194 void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
 195                       struct tss_struct *tss)
 196 {
 197         struct thread_struct *prev, *next;
 198
 199         prev = &prev_p->thread;
 200         next = &next_p->thread;
 201
 202         if (test_tsk_thread_flag(prev_p, TIF_BLOCKSTEP) ^
 203             test_tsk_thread_flag(next_p, TIF_BLOCKSTEP)) {
 204                 unsigned long debugctl = get_debugctlmsr();
 205
 206                 debugctl &= ~DEBUGCTLMSR_BTF;
 207                 if (test_tsk_thread_flag(next_p, TIF_BLOCKSTEP))
 208                         debugctl |= DEBUGCTLMSR_BTF;
 209
 210                 update_debugctlmsr(debugctl);
 211         }
 212
 213         if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
 214             test_tsk_thread_flag(next_p, TIF_NOTSC)) {
 215                 /* prev and next are different */
 216                 if (test_tsk_thread_flag(next_p, TIF_NOTSC))
 217                         hard_disable_TSC();
 218                 else
 219                         hard_enable_TSC();
 220         }
 221
 222         if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
 223                 /*
 224                  * Copy the relevant range of the IO bitmap.
 225                  * Normally this is 128 bytes or less:
 226                  */
 227                 memcpy(tss->io_bitmap, next->io_bitmap_ptr,
 228                        max(prev->io_bitmap_max, next->io_bitmap_max));
 229         } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) {
 230                 /*
 231                  * Clear any possible leftover bits:
 232                  */
 233                 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
 234         }
 235         propagate_user_return_notify(prev_p, next_p);
 236 }
 237
 238 int sys_fork(struct pt_regs *regs)
 239 {
 240         return do_fork(SIGCHLD, regs->sp, regs, 0, NULL, NULL);
 241 }
 242
 243 /*
 244  * This is trivial, and on the face of it looks like it
 245  * could equally well be done in user mode.
 246  *
 247  * Not so, for quite unobvious reasons - register pressure.
 248  * In user mode vfork() cannot have a stack frame, and if
 249  * done by calling the "clone()" system call directly, you
 250  * do not have enough call-clobbered registers to hold all
 251  * the information you need.
 252  */
 253 int sys_vfork(struct pt_regs *regs)
 254 {
 255         return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->sp, regs, 0,
 256                        NULL, NULL);
 257 }
 258
 259 long
 260 sys_clone(unsigned long clone_flags, unsigned long newsp,
 261           void __user *parent_tid, void __user *child_tid, struct pt_regs *regs)
 262 {
 263         if (!newsp)
 264                 newsp = regs->sp;
 265         return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
 266 }
 267
 268 /*
 269  * This gets run with %si containing the
 270  * function to call, and %di containing
 271  * the "args".
 272  */
 273 extern void kernel_thread_helper(void);
 274
 275 /*
 276  * Create a kernel thread
 277  */
 278 int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
 279 {
 280         struct pt_regs regs;
 281
 282         memset(&regs, 0, sizeof(regs));
 283
 284         regs.si = (unsigned long) fn;
 285         regs.di = (unsigned long) arg;
 286
 287 #ifdef CONFIG_X86_32
 288         regs.ds = __USER_DS;
 289         regs.es = __USER_DS;
 290         regs.fs = __KERNEL_PERCPU;
 291         regs.gs = __KERNEL_STACK_CANARY;
 292 #else
 293         regs.ss = __KERNEL_DS;
 294 #endif
 295
 296         regs.orig_ax = -1;
 297         regs.ip = (unsigned long) kernel_thread_helper;
 298         regs.cs = __KERNEL_CS | get_kernel_rpl();
 299         regs.flags = X86_EFLAGS_IF | 0x2;
 300
 301         /* Ok, create the new process.. */
 302         return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs, 0, NULL, NULL);
 303 }
 304 EXPORT_SYMBOL(kernel_thread);
 305
 306 /*
 307  * sys_execve() executes a new program.
 308  */
 309 long sys_execve(const char __user *name,
 310                 const char __user *const __user *argv,
 311                 const char __user *const __user *envp, struct pt_regs *regs)
 312 {
 313         long error;
 314         char *filename;
 315
 316         filename = getname(name);
 317         error = PTR_ERR(filename);
 318         if (IS_ERR(filename))
 319                 return error;
 320         error = do_execve(filename, argv, envp, regs);
 321
 322 #ifdef CONFIG_X86_32
 323         if (error == 0) {
 324                 /* Make sure we don't return using sysenter.. */
 325                 set_thread_flag(TIF_IRET);
 326         }
 327 #endif
 328
 329         putname(filename);
 330         return error;
 331 }
 332
 333 /*
 334  * Idle related variables and functions
 335  */
 336 unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE;
 337 EXPORT_SYMBOL(boot_option_idle_override);
 338
 339 /*
 340  * Powermanagement idle function, if any..
 341  */
 342 void (*pm_idle)(void);
 343 #if defined(CONFIG_APM_MODULE) && defined(CONFIG_APM_CPU_IDLE)
 344 EXPORT_SYMBOL(pm_idle);
 345 #endif
 346
 347 #ifdef CONFIG_X86_32
 348 /*
 349  * This halt magic was a workaround for ancient floppy DMA
 350  * wreckage. It should be safe to remove.
 351  */
 352 static int hlt_counter;
 353 void disable_hlt(void)
 354 {
 355         hlt_counter++;
 356 }
 357 EXPORT_SYMBOL(disable_hlt);
 358
 359 void enable_hlt(void)
 360 {
 361         hlt_counter--;
 362 }
 363 EXPORT_SYMBOL(enable_hlt);
 364
 365 static inline int hlt_use_halt(void)
 366 {
 367         return (!hlt_counter && boot_cpu_data.hlt_works_ok);
 368 }
 369 #else
 370 static inline int hlt_use_halt(void)
 371 {
 372         return 1;
 373 }
 374 #endif
 375
 376 /*
 377  * We use this if we don't have any better
 378  * idle routine..
 379  */
 380 void default_idle(void)
 381 {
 382         if (hlt_use_halt()) {
 383                 trace_power_start(POWER_CSTATE, 1, smp_processor_id());
 384                 trace_cpu_idle(1, smp_processor_id());
 385                 current_thread_info()->status &= ~TS_POLLING;
 386                 /*
 387                  * TS_POLLING-cleared state must be visible before we
 388                  * test NEED_RESCHED:
 389                  */
 390                 smp_mb();
 391
 392                 if (!need_resched())
 393                         safe_halt();    /* enables interrupts racelessly */
 394                 else
 395                         local_irq_enable();
 396                 current_thread_info()->status |= TS_POLLING;
 397                 trace_power_end(smp_processor_id());
 398                 trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id());
 399         } else {
 400                 local_irq_enable();
 401                 /* loop is done by the caller */
 402                 cpu_relax();
 403         }
 404 }
 405 #if defined(CONFIG_APM_MODULE) && defined(CONFIG_APM_CPU_IDLE)
 406 EXPORT_SYMBOL(default_idle);
 407 #endif
 408
 409 void stop_this_cpu(void *dummy)
 410 {
 411         local_irq_disable();
 412         /*
 413          * Remove this CPU:
 414          */
 415         set_cpu_online(smp_processor_id(), false);
 416         disable_local_APIC();
 417
 418         for (;;) {
 419                 if (hlt_works(smp_processor_id()))
 420                         halt();
 421         }
 422 }
 423
 424 static void do_nothing(void *unused)
 425 {
 426 }
 427
 428 /*
 429  * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
 430  * pm_idle and update to new pm_idle value. Required while changing pm_idle
 431  * handler on SMP systems.
 432  *
 433  * Caller must have changed pm_idle to the new value before the call. Old
 434  * pm_idle value will not be used by any CPU after the return of this function.
 435  */
 436 void cpu_idle_wait(void)
 437 {
 438         smp_mb();
 439         /* kick all the CPUs so that they exit out of pm_idle */
 440         smp_call_function(do_nothing, NULL, 1);
 441 }
 442 EXPORT_SYMBOL_GPL(cpu_idle_wait);
 443
 444 /*
 445  * This uses new MONITOR/MWAIT instructions on P4 processors with PNI,
 446  * which can obviate IPI to trigger checking of need_resched.
 447  * We execute MONITOR against need_resched and enter optimized wait state
 448  * through MWAIT. Whenever someone changes need_resched, we would be woken
 449  * up from MWAIT (without an IPI).
 450  *
 451  * New with Core Duo processors, MWAIT can take some hints based on CPU
 452  * capability.
 453  */
 454 void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
 455 {
 456         if (!need_resched()) {
 457                 if (cpu_has(__this_cpu_ptr(&cpu_info), X86_FEATURE_CLFLUSH_MONITOR))
 458                         clflush((void *)&current_thread_info()->flags);
 459
 460                 __monitor((void *)&current_thread_info()->flags, 0, 0);
 461                 smp_mb();
 462                 if (!need_resched())
 463                         __mwait(ax, cx);
 464         }
 465 }
 466
 467 /* Default MONITOR/MWAIT with no hints, used for default C1 state */
 468 static void mwait_idle(void)
 469 {
 470         if (!need_resched()) {
 471                 trace_power_start(POWER_CSTATE, 1, smp_processor_id());
 472                 trace_cpu_idle(1, smp_processor_id());
 473                 if (cpu_has(__this_cpu_ptr(&cpu_info), X86_FEATURE_CLFLUSH_MONITOR))
 474                         clflush((void *)&current_thread_info()->flags);
 475
 476                 __monitor((void *)&current_thread_info()->flags, 0, 0);
 477                 smp_mb();
 478                 if (!need_resched())
 479                         __sti_mwait(0, 0);
 480                 else
 481                         local_irq_enable();
 482                 trace_power_end(smp_processor_id());
 483                 trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id());
 484         } else
 485                 local_irq_enable();
 486 }
 487
 488 /*
 489  * On SMP it's slightly faster (but much more power-consuming!)
 490  * to poll the ->work.need_resched flag instead of waiting for the
 491  * cross-CPU IPI to arrive. Use this option with caution.
 492  */
 493 static void poll_idle(void)
 494 {
 495         trace_power_start(POWER_CSTATE, 0, smp_processor_id());
 496         trace_cpu_idle(0, smp_processor_id());
 497         local_irq_enable();
 498         while (!need_resched())
 499                 cpu_relax();
 500         trace_power_end(smp_processor_id());
 501         trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id());
 502 }
 503
 504 /*
 505  * mwait selection logic:
 506  *
 507  * It depends on the CPU. For AMD CPUs that support MWAIT this is
 508  * wrong. Family 0x10 and 0x11 CPUs will enter C1 on HLT. Powersavings
 509  * then depend on a clock divisor and current Pstate of the core. If
 510  * all cores of a processor are in halt state (C1) the processor can
 511  * enter the C1E (C1 enhanced) state. If mwait is used this will never
 512  * happen.
 513  *
 514  * idle=mwait overrides this decision and forces the usage of mwait.
 515  */
 516
 517 #define MWAIT_INFO                      0x05
 518 #define MWAIT_ECX_EXTENDED_INFO         0x01
 519 #define MWAIT_EDX_C1                    0xf0
 520
 521 int mwait_usable(const struct cpuinfo_x86 *c)
 522 {
 523         u32 eax, ebx, ecx, edx;
 524
 525         if (boot_option_idle_override == IDLE_FORCE_MWAIT)
 526                 return 1;
 527
 528         if (c->cpuid_level < MWAIT_INFO)
 529                 return 0;
 530
 531         cpuid(MWAIT_INFO, &eax, &ebx, &ecx, &edx);
 532         /* Check, whether EDX has extended info about MWAIT */
 533         if (!(ecx & MWAIT_ECX_EXTENDED_INFO))
 534                 return 1;
 535
 536         /*
 537          * edx enumeratios MONITOR/MWAIT extensions. Check, whether
 538          * C1  supports MWAIT
 539          */
 540         return (edx & MWAIT_EDX_C1);
 541 }
 542
 543 bool amd_e400_c1e_detected;
 544 EXPORT_SYMBOL(amd_e400_c1e_detected);
 545
 546 static cpumask_var_t amd_e400_c1e_mask;
 547
 548 void amd_e400_remove_cpu(int cpu)
 549 {
 550         if (amd_e400_c1e_mask != NULL)
 551                 cpumask_clear_cpu(cpu, amd_e400_c1e_mask);
 552 }
 553
 554 /*
 555  * AMD Erratum 400 aware idle routine. We check for C1E active in the interrupt
 556  * pending message MSR. If we detect C1E, then we handle it the same
 557  * way as C3 power states (local apic timer and TSC stop)
 558  */
 559 static void amd_e400_idle(void)
 560 {
 561         if (need_resched())
 562                 return;
 563
 564         if (!amd_e400_c1e_detected) {
 565                 u32 lo, hi;
 566
 567                 rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
 568
 569                 if (lo & K8_INTP_C1E_ACTIVE_MASK) {
 570                         amd_e400_c1e_detected = true;
 571                         if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
 572                                 mark_tsc_unstable("TSC halt in AMD C1E");
 573                         printk(KERN_INFO "System has AMD C1E enabled\n");
 574                 }
 575         }
 576
 577         if (amd_e400_c1e_detected) {
 578                 int cpu = smp_processor_id();
 579
 580                 if (!cpumask_test_cpu(cpu, amd_e400_c1e_mask)) {
 581                         cpumask_set_cpu(cpu, amd_e400_c1e_mask);
 582                         /*
 583                          * Force broadcast so ACPI can not interfere.
 584                          */
 585                         clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE,
 586                                            &cpu);
 587                         printk(KERN_INFO "Switch to broadcast mode on CPU%d\n",
 588                                cpu);
 589                 }
 590                 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
 591
 592                 default_idle();
 593
 594                 /*
 595                  * The switch back from broadcast mode needs to be
 596                  * called with interrupts disabled.
 597                  */
 598                  local_irq_disable();
 599                  clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
 600                  local_irq_enable();
 601         } else
 602                 default_idle();
 603 }
 604
 605 void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
 606 {
 607 #ifdef CONFIG_SMP
 608         if (pm_idle == poll_idle && smp_num_siblings > 1) {
 609                 printk_once(KERN_WARNING "WARNING: polling idle and HT enabled,"
 610                         " performance may degrade.\n");
 611         }
 612 #endif
 613         if (pm_idle)
 614                 return;
 615
 616         if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
 617                 /*
 618                  * One CPU supports mwait => All CPUs supports mwait
 619                  */
 620                 printk(KERN_INFO "using mwait in idle threads.\n");
 621                 pm_idle = mwait_idle;
 622         } else if (cpu_has_amd_erratum(amd_erratum_400)) {
 623                 /* E400: APIC timer interrupt does not wake up CPU from C1e */
 624                 printk(KERN_INFO "using AMD E400 aware idle routine\n");
 625                 pm_idle = amd_e400_idle;
 626         } else
 627                 pm_idle = default_idle;
 628 }
 629
 630 void __init init_amd_e400_c1e_mask(void)
 631 {
 632         /* If we're using amd_e400_idle, we need to allocate amd_e400_c1e_mask. */
 633         if (pm_idle == amd_e400_idle)
 634                 zalloc_cpumask_var(&amd_e400_c1e_mask, GFP_KERNEL);
 635 }
 636
 637 static int __init idle_setup(char *str)
 638 {
 639         if (!str)
 640                 return -EINVAL;
 641
 642         if (!strcmp(str, "poll")) {
 643                 printk("using polling idle threads.\n");
 644                 pm_idle = poll_idle;
 645                 boot_option_idle_override = IDLE_POLL;
 646         } else if (!strcmp(str, "mwait")) {
 647                 boot_option_idle_override = IDLE_FORCE_MWAIT;
 648                 WARN_ONCE(1, "\idle=mwait\" will be removed in 2012\"\n");
 649         } else if (!strcmp(str, "halt")) {
 650                 /*
 651                  * When the boot option of idle=halt is added, halt is
 652                  * forced to be used for CPU idle. In such case CPU C2/C3
 653                  * won't be used again.
 654                  * To continue to load the CPU idle driver, don't touch
 655                  * the boot_option_idle_override.
 656                  */
 657                 pm_idle = default_idle;
 658                 boot_option_idle_override = IDLE_HALT;
 659         } else if (!strcmp(str, "nomwait")) {
 660                 /*
 661                  * If the boot option of "idle=nomwait" is added,
 662                  * it means that mwait will be disabled for CPU C2/C3
 663                  * states. In such case it won't touch the variable
 664                  * of boot_option_idle_override.
 665                  */
 666                 boot_option_idle_override = IDLE_NOMWAIT;
 667         } else
 668                 return -1;
 669
 670         return 0;
 671 }
 672 early_param("idle", idle_setup);
 673
 674 unsigned long arch_align_stack(unsigned long sp)
 675 {
 676         if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
 677                 sp -= get_random_int() % 8192;
 678         return sp & ~0xf;
 679 }
 680
 681 unsigned long arch_randomize_brk(struct mm_struct *mm)
 682 {
 683         unsigned long range_end = mm->brk + 0x02000000;
 684         return randomize_range(mm->brk, range_end, 0) ? : mm->brk;
 685 }
 686