arch/powerpc/platforms/powernv/smp.c

   1 /*
   2  * SMP support for PowerNV machines.
   3  *
   4  * Copyright 2011 IBM Corp.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/sched.h>
  15 #include <linux/smp.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/delay.h>
  18 #include <linux/init.h>
  19 #include <linux/spinlock.h>
  20 #include <linux/cpu.h>
  21
  22 #include <asm/irq.h>
  23 #include <asm/smp.h>
  24 #include <asm/paca.h>
  25 #include <asm/machdep.h>
  26 #include <asm/cputable.h>
  27 #include <asm/firmware.h>
  28 #include <asm/system.h>
  29 #include <asm/rtas.h>
  30 #include <asm/vdso_datapage.h>
  31 #include <asm/cputhreads.h>
  32 #include <asm/xics.h>
  33
  34 #include "powernv.h"
  35
  36 static void __devinit pnv_smp_setup_cpu(int cpu)
  37 {
  38         if (cpu != boot_cpuid)
  39                 xics_setup_cpu();
  40 }
  41
  42 static int pnv_smp_cpu_bootable(unsigned int nr)
  43 {
  44         /* Special case - we inhibit secondary thread startup
  45          * during boot if the user requests it.
  46          */
  47         if (system_state < SYSTEM_RUNNING && cpu_has_feature(CPU_FTR_SMT)) {
  48                 if (!smt_enabled_at_boot && cpu_thread_in_core(nr) != 0)
  49                         return 0;
  50                 if (smt_enabled_at_boot
  51                     && cpu_thread_in_core(nr) >= smt_enabled_at_boot)
  52                         return 0;
  53         }
  54
  55         return 1;
  56 }
  57
  58 static struct smp_ops_t pnv_smp_ops = {
  59         .message_pass   = smp_muxed_ipi_message_pass,
  60         .cause_ipi      = NULL, /* Filled at runtime by xics_smp_probe() */
  61         .probe          = xics_smp_probe,
  62         .kick_cpu       = smp_generic_kick_cpu,
  63         .setup_cpu      = pnv_smp_setup_cpu,
  64         .cpu_bootable   = pnv_smp_cpu_bootable,
  65 };
  66
  67 /* This is called very early during platform setup_arch */
  68 void __init pnv_smp_init(void)
  69 {
  70         smp_ops = &pnv_smp_ops;
  71
  72         /* XXX We don't yet have a proper entry point from HAL, for
  73          * now we rely on kexec-style entry from BML
  74          */
  75
  76 #ifdef CONFIG_PPC_RTAS
  77         /* Non-lpar has additional take/give timebase */
  78         if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) {
  79                 smp_ops->give_timebase = rtas_give_timebase;
  80                 smp_ops->take_timebase = rtas_take_timebase;
  81         }
  82 #endif /* CONFIG_PPC_RTAS */
  83 }