xhci: Change xhci_find_slot_id_by_port() API.
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / usb / host / xhci-hub.c
blob4c3788c128df5667f33c7eda5613a5af2f462b07
1 /*
2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <asm/unaligned.h>
25 #include "xhci.h"
27 #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
28 #define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_WRC | PORT_OCC | \
29 PORT_RC | PORT_PLC | PORT_PE)
31 static void xhci_hub_descriptor(struct xhci_hcd *xhci,
32 struct usb_hub_descriptor *desc)
34 int ports;
35 u16 temp;
37 ports = HCS_MAX_PORTS(xhci->hcs_params1);
39 /* USB 3.0 hubs have a different descriptor, but we fake this for now */
40 desc->bDescriptorType = 0x29;
41 desc->bPwrOn2PwrGood = 10; /* xhci section 5.4.9 says 20ms max */
42 desc->bHubContrCurrent = 0;
44 desc->bNbrPorts = ports;
45 temp = 1 + (ports / 8);
46 desc->bDescLength = 7 + 2 * temp;
48 memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
49 memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
51 /* Ugh, these should be #defines, FIXME */
52 /* Using table 11-13 in USB 2.0 spec. */
53 temp = 0;
54 /* Bits 1:0 - support port power switching, or power always on */
55 if (HCC_PPC(xhci->hcc_params))
56 temp |= 0x0001;
57 else
58 temp |= 0x0002;
59 /* Bit 2 - root hubs are not part of a compound device */
60 /* Bits 4:3 - individual port over current protection */
61 temp |= 0x0008;
62 /* Bits 6:5 - no TTs in root ports */
63 /* Bit 7 - no port indicators */
64 desc->wHubCharacteristics = (__force __u16) cpu_to_le16(temp);
67 static unsigned int xhci_port_speed(unsigned int port_status)
69 if (DEV_LOWSPEED(port_status))
70 return USB_PORT_STAT_LOW_SPEED;
71 if (DEV_HIGHSPEED(port_status))
72 return USB_PORT_STAT_HIGH_SPEED;
73 if (DEV_SUPERSPEED(port_status))
74 return USB_PORT_STAT_SUPER_SPEED;
76 * FIXME: Yes, we should check for full speed, but the core uses that as
77 * a default in portspeed() in usb/core/hub.c (which is the only place
78 * USB_PORT_STAT_*_SPEED is used).
80 return 0;
84 * These bits are Read Only (RO) and should be saved and written to the
85 * registers: 0, 3, 10:13, 30
86 * connect status, over-current status, port speed, and device removable.
87 * connect status and port speed are also sticky - meaning they're in
88 * the AUX well and they aren't changed by a hot, warm, or cold reset.
90 #define XHCI_PORT_RO ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
92 * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
93 * bits 5:8, 9, 14:15, 25:27
94 * link state, port power, port indicator state, "wake on" enable state
96 #define XHCI_PORT_RWS ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
98 * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
99 * bit 4 (port reset)
101 #define XHCI_PORT_RW1S ((1<<4))
103 * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
104 * bits 1, 17, 18, 19, 20, 21, 22, 23
105 * port enable/disable, and
106 * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
107 * over-current, reset, link state, and L1 change
109 #define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
111 * Bit 16 is RW, and writing a '1' to it causes the link state control to be
112 * latched in
114 #define XHCI_PORT_RW ((1<<16))
116 * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
117 * bits 2, 24, 28:31
119 #define XHCI_PORT_RZ ((1<<2) | (1<<24) | (0xf<<28))
122 * Given a port state, this function returns a value that would result in the
123 * port being in the same state, if the value was written to the port status
124 * control register.
125 * Save Read Only (RO) bits and save read/write bits where
126 * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
127 * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
129 u32 xhci_port_state_to_neutral(u32 state)
131 /* Save read-only status and port state */
132 return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
136 * find slot id based on port number.
138 int xhci_find_slot_id_by_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
139 u16 port)
141 int slot_id;
142 int i;
144 slot_id = 0;
145 for (i = 0; i < MAX_HC_SLOTS; i++) {
146 if (!xhci->devs[i])
147 continue;
148 if (xhci->devs[i]->port == port) {
149 slot_id = i;
150 break;
154 return slot_id;
158 * Stop device
159 * It issues stop endpoint command for EP 0 to 30. And wait the last command
160 * to complete.
161 * suspend will set to 1, if suspend bit need to set in command.
163 static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
165 struct xhci_virt_device *virt_dev;
166 struct xhci_command *cmd;
167 unsigned long flags;
168 int timeleft;
169 int ret;
170 int i;
172 ret = 0;
173 virt_dev = xhci->devs[slot_id];
174 cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
175 if (!cmd) {
176 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
177 return -ENOMEM;
180 spin_lock_irqsave(&xhci->lock, flags);
181 for (i = LAST_EP_INDEX; i > 0; i--) {
182 if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue)
183 xhci_queue_stop_endpoint(xhci, slot_id, i, suspend);
185 cmd->command_trb = xhci->cmd_ring->enqueue;
186 list_add_tail(&cmd->cmd_list, &virt_dev->cmd_list);
187 xhci_queue_stop_endpoint(xhci, slot_id, 0, suspend);
188 xhci_ring_cmd_db(xhci);
189 spin_unlock_irqrestore(&xhci->lock, flags);
191 /* Wait for last stop endpoint command to finish */
192 timeleft = wait_for_completion_interruptible_timeout(
193 cmd->completion,
194 USB_CTRL_SET_TIMEOUT);
195 if (timeleft <= 0) {
196 xhci_warn(xhci, "%s while waiting for stop endpoint command\n",
197 timeleft == 0 ? "Timeout" : "Signal");
198 spin_lock_irqsave(&xhci->lock, flags);
199 /* The timeout might have raced with the event ring handler, so
200 * only delete from the list if the item isn't poisoned.
202 if (cmd->cmd_list.next != LIST_POISON1)
203 list_del(&cmd->cmd_list);
204 spin_unlock_irqrestore(&xhci->lock, flags);
205 ret = -ETIME;
206 goto command_cleanup;
209 command_cleanup:
210 xhci_free_command(xhci, cmd);
211 return ret;
215 * Ring device, it rings the all doorbells unconditionally.
217 void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
219 int i;
221 for (i = 0; i < LAST_EP_INDEX + 1; i++)
222 if (xhci->devs[slot_id]->eps[i].ring &&
223 xhci->devs[slot_id]->eps[i].ring->dequeue)
224 xhci_ring_ep_doorbell(xhci, slot_id, i, 0);
226 return;
229 static void xhci_disable_port(struct xhci_hcd *xhci, u16 wIndex,
230 u32 __iomem *addr, u32 port_status)
232 /* Don't allow the USB core to disable SuperSpeed ports. */
233 if (xhci->port_array[wIndex] == 0x03) {
234 xhci_dbg(xhci, "Ignoring request to disable "
235 "SuperSpeed port.\n");
236 return;
239 /* Write 1 to disable the port */
240 xhci_writel(xhci, port_status | PORT_PE, addr);
241 port_status = xhci_readl(xhci, addr);
242 xhci_dbg(xhci, "disable port, actual port %d status = 0x%x\n",
243 wIndex, port_status);
246 static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
247 u16 wIndex, u32 __iomem *addr, u32 port_status)
249 char *port_change_bit;
250 u32 status;
252 switch (wValue) {
253 case USB_PORT_FEAT_C_RESET:
254 status = PORT_RC;
255 port_change_bit = "reset";
256 break;
257 case USB_PORT_FEAT_C_CONNECTION:
258 status = PORT_CSC;
259 port_change_bit = "connect";
260 break;
261 case USB_PORT_FEAT_C_OVER_CURRENT:
262 status = PORT_OCC;
263 port_change_bit = "over-current";
264 break;
265 case USB_PORT_FEAT_C_ENABLE:
266 status = PORT_PEC;
267 port_change_bit = "enable/disable";
268 break;
269 case USB_PORT_FEAT_C_SUSPEND:
270 status = PORT_PLC;
271 port_change_bit = "suspend/resume";
272 break;
273 default:
274 /* Should never happen */
275 return;
277 /* Change bits are all write 1 to clear */
278 xhci_writel(xhci, port_status | status, addr);
279 port_status = xhci_readl(xhci, addr);
280 xhci_dbg(xhci, "clear port %s change, actual port %d status = 0x%x\n",
281 port_change_bit, wIndex, port_status);
284 int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
285 u16 wIndex, char *buf, u16 wLength)
287 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
288 int ports;
289 unsigned long flags;
290 u32 temp, temp1, status;
291 int retval = 0;
292 u32 __iomem *port_array[15 + USB_MAXCHILDREN];
293 int i;
294 int slot_id;
295 struct xhci_bus_state *bus_state;
297 ports = HCS_MAX_PORTS(xhci->hcs_params1);
298 for (i = 0; i < ports; i++) {
299 if (i < xhci->num_usb3_ports)
300 port_array[i] = xhci->usb3_ports[i];
301 else
302 port_array[i] =
303 xhci->usb2_ports[i - xhci->num_usb3_ports];
305 bus_state = &xhci->bus_state[hcd_index(hcd)];
307 spin_lock_irqsave(&xhci->lock, flags);
308 switch (typeReq) {
309 case GetHubStatus:
310 /* No power source, over-current reported per port */
311 memset(buf, 0, 4);
312 break;
313 case GetHubDescriptor:
314 xhci_hub_descriptor(xhci, (struct usb_hub_descriptor *) buf);
315 break;
316 case GetPortStatus:
317 if (!wIndex || wIndex > ports)
318 goto error;
319 wIndex--;
320 status = 0;
321 temp = xhci_readl(xhci, port_array[wIndex]);
322 xhci_dbg(xhci, "get port status, actual port %d status = 0x%x\n", wIndex, temp);
324 /* wPortChange bits */
325 if (temp & PORT_CSC)
326 status |= USB_PORT_STAT_C_CONNECTION << 16;
327 if (temp & PORT_PEC)
328 status |= USB_PORT_STAT_C_ENABLE << 16;
329 if ((temp & PORT_OCC))
330 status |= USB_PORT_STAT_C_OVERCURRENT << 16;
332 * FIXME ignoring reset and USB 2.1/3.0 specific
333 * changes
335 if ((temp & PORT_PLS_MASK) == XDEV_U3
336 && (temp & PORT_POWER))
337 status |= 1 << USB_PORT_FEAT_SUSPEND;
338 if ((temp & PORT_PLS_MASK) == XDEV_RESUME) {
339 if ((temp & PORT_RESET) || !(temp & PORT_PE))
340 goto error;
341 if (!DEV_SUPERSPEED(temp) && time_after_eq(jiffies,
342 bus_state->resume_done[wIndex])) {
343 xhci_dbg(xhci, "Resume USB2 port %d\n",
344 wIndex + 1);
345 bus_state->resume_done[wIndex] = 0;
346 temp1 = xhci_port_state_to_neutral(temp);
347 temp1 &= ~PORT_PLS_MASK;
348 temp1 |= PORT_LINK_STROBE | XDEV_U0;
349 xhci_writel(xhci, temp1, port_array[wIndex]);
351 xhci_dbg(xhci, "set port %d resume\n",
352 wIndex + 1);
353 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
354 wIndex + 1);
355 if (!slot_id) {
356 xhci_dbg(xhci, "slot_id is zero\n");
357 goto error;
359 xhci_ring_device(xhci, slot_id);
360 bus_state->port_c_suspend |= 1 << wIndex;
361 bus_state->suspended_ports &= ~(1 << wIndex);
364 if ((temp & PORT_PLS_MASK) == XDEV_U0
365 && (temp & PORT_POWER)
366 && (bus_state->suspended_ports & (1 << wIndex))) {
367 bus_state->suspended_ports &= ~(1 << wIndex);
368 bus_state->port_c_suspend |= 1 << wIndex;
370 if (temp & PORT_CONNECT) {
371 status |= USB_PORT_STAT_CONNECTION;
372 status |= xhci_port_speed(temp);
374 if (temp & PORT_PE)
375 status |= USB_PORT_STAT_ENABLE;
376 if (temp & PORT_OC)
377 status |= USB_PORT_STAT_OVERCURRENT;
378 if (temp & PORT_RESET)
379 status |= USB_PORT_STAT_RESET;
380 if (temp & PORT_POWER)
381 status |= USB_PORT_STAT_POWER;
382 if (bus_state->port_c_suspend & (1 << wIndex))
383 status |= 1 << USB_PORT_FEAT_C_SUSPEND;
384 xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
385 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
386 break;
387 case SetPortFeature:
388 wIndex &= 0xff;
389 if (!wIndex || wIndex > ports)
390 goto error;
391 wIndex--;
392 temp = xhci_readl(xhci, port_array[wIndex]);
393 temp = xhci_port_state_to_neutral(temp);
394 switch (wValue) {
395 case USB_PORT_FEAT_SUSPEND:
396 temp = xhci_readl(xhci, port_array[wIndex]);
397 /* In spec software should not attempt to suspend
398 * a port unless the port reports that it is in the
399 * enabled (PED = ‘1’,PLS < ‘3’) state.
401 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
402 || (temp & PORT_PLS_MASK) >= XDEV_U3) {
403 xhci_warn(xhci, "USB core suspending device "
404 "not in U0/U1/U2.\n");
405 goto error;
408 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
409 wIndex + 1);
410 if (!slot_id) {
411 xhci_warn(xhci, "slot_id is zero\n");
412 goto error;
414 /* unlock to execute stop endpoint commands */
415 spin_unlock_irqrestore(&xhci->lock, flags);
416 xhci_stop_device(xhci, slot_id, 1);
417 spin_lock_irqsave(&xhci->lock, flags);
419 temp = xhci_port_state_to_neutral(temp);
420 temp &= ~PORT_PLS_MASK;
421 temp |= PORT_LINK_STROBE | XDEV_U3;
422 xhci_writel(xhci, temp, port_array[wIndex]);
424 spin_unlock_irqrestore(&xhci->lock, flags);
425 msleep(10); /* wait device to enter */
426 spin_lock_irqsave(&xhci->lock, flags);
428 temp = xhci_readl(xhci, port_array[wIndex]);
429 bus_state->suspended_ports |= 1 << wIndex;
430 break;
431 case USB_PORT_FEAT_POWER:
433 * Turn on ports, even if there isn't per-port switching.
434 * HC will report connect events even before this is set.
435 * However, khubd will ignore the roothub events until
436 * the roothub is registered.
438 xhci_writel(xhci, temp | PORT_POWER,
439 port_array[wIndex]);
441 temp = xhci_readl(xhci, port_array[wIndex]);
442 xhci_dbg(xhci, "set port power, actual port %d status = 0x%x\n", wIndex, temp);
443 break;
444 case USB_PORT_FEAT_RESET:
445 temp = (temp | PORT_RESET);
446 xhci_writel(xhci, temp, port_array[wIndex]);
448 temp = xhci_readl(xhci, port_array[wIndex]);
449 xhci_dbg(xhci, "set port reset, actual port %d status = 0x%x\n", wIndex, temp);
450 break;
451 default:
452 goto error;
454 /* unblock any posted writes */
455 temp = xhci_readl(xhci, port_array[wIndex]);
456 break;
457 case ClearPortFeature:
458 if (!wIndex || wIndex > ports)
459 goto error;
460 wIndex--;
461 temp = xhci_readl(xhci, port_array[wIndex]);
462 temp = xhci_port_state_to_neutral(temp);
463 switch (wValue) {
464 case USB_PORT_FEAT_SUSPEND:
465 temp = xhci_readl(xhci, port_array[wIndex]);
466 xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
467 xhci_dbg(xhci, "PORTSC %04x\n", temp);
468 if (temp & PORT_RESET)
469 goto error;
470 if (temp & XDEV_U3) {
471 if ((temp & PORT_PE) == 0)
472 goto error;
473 if (DEV_SUPERSPEED(temp)) {
474 temp = xhci_port_state_to_neutral(temp);
475 temp &= ~PORT_PLS_MASK;
476 temp |= PORT_LINK_STROBE | XDEV_U0;
477 xhci_writel(xhci, temp,
478 port_array[wIndex]);
479 xhci_readl(xhci, port_array[wIndex]);
480 } else {
481 temp = xhci_port_state_to_neutral(temp);
482 temp &= ~PORT_PLS_MASK;
483 temp |= PORT_LINK_STROBE | XDEV_RESUME;
484 xhci_writel(xhci, temp,
485 port_array[wIndex]);
487 spin_unlock_irqrestore(&xhci->lock,
488 flags);
489 msleep(20);
490 spin_lock_irqsave(&xhci->lock, flags);
492 temp = xhci_readl(xhci,
493 port_array[wIndex]);
494 temp = xhci_port_state_to_neutral(temp);
495 temp &= ~PORT_PLS_MASK;
496 temp |= PORT_LINK_STROBE | XDEV_U0;
497 xhci_writel(xhci, temp,
498 port_array[wIndex]);
500 bus_state->port_c_suspend |= 1 << wIndex;
503 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
504 wIndex + 1);
505 if (!slot_id) {
506 xhci_dbg(xhci, "slot_id is zero\n");
507 goto error;
509 xhci_ring_device(xhci, slot_id);
510 break;
511 case USB_PORT_FEAT_C_SUSPEND:
512 bus_state->port_c_suspend &= ~(1 << wIndex);
513 case USB_PORT_FEAT_C_RESET:
514 case USB_PORT_FEAT_C_CONNECTION:
515 case USB_PORT_FEAT_C_OVER_CURRENT:
516 case USB_PORT_FEAT_C_ENABLE:
517 xhci_clear_port_change_bit(xhci, wValue, wIndex,
518 port_array[wIndex], temp);
519 break;
520 case USB_PORT_FEAT_ENABLE:
521 xhci_disable_port(xhci, wIndex,
522 port_array[wIndex], temp);
523 break;
524 default:
525 goto error;
527 break;
528 default:
529 error:
530 /* "stall" on error */
531 retval = -EPIPE;
533 spin_unlock_irqrestore(&xhci->lock, flags);
534 return retval;
538 * Returns 0 if the status hasn't changed, or the number of bytes in buf.
539 * Ports are 0-indexed from the HCD point of view,
540 * and 1-indexed from the USB core pointer of view.
542 * Note that the status change bits will be cleared as soon as a port status
543 * change event is generated, so we use the saved status from that event.
545 int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
547 unsigned long flags;
548 u32 temp, status;
549 u32 mask;
550 int i, retval;
551 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
552 int ports;
553 u32 __iomem *port_array[15 + USB_MAXCHILDREN];
554 struct xhci_bus_state *bus_state;
556 ports = HCS_MAX_PORTS(xhci->hcs_params1);
557 for (i = 0; i < ports; i++) {
558 if (i < xhci->num_usb3_ports)
559 port_array[i] = xhci->usb3_ports[i];
560 else
561 port_array[i] =
562 xhci->usb2_ports[i - xhci->num_usb3_ports];
564 bus_state = &xhci->bus_state[hcd_index(hcd)];
566 /* Initial status is no changes */
567 retval = (ports + 8) / 8;
568 memset(buf, 0, retval);
569 status = 0;
571 mask = PORT_CSC | PORT_PEC | PORT_OCC;
573 spin_lock_irqsave(&xhci->lock, flags);
574 /* For each port, did anything change? If so, set that bit in buf. */
575 for (i = 0; i < ports; i++) {
576 temp = xhci_readl(xhci, port_array[i]);
577 if ((temp & mask) != 0 ||
578 (bus_state->port_c_suspend & 1 << i) ||
579 (bus_state->resume_done[i] && time_after_eq(
580 jiffies, bus_state->resume_done[i]))) {
581 buf[(i + 1) / 8] |= 1 << (i + 1) % 8;
582 status = 1;
585 spin_unlock_irqrestore(&xhci->lock, flags);
586 return status ? retval : 0;
589 #ifdef CONFIG_PM
591 int xhci_bus_suspend(struct usb_hcd *hcd)
593 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
594 int max_ports, port_index;
595 u32 __iomem *port_array[15 + USB_MAXCHILDREN];
596 int i;
597 struct xhci_bus_state *bus_state;
598 unsigned long flags;
600 xhci_dbg(xhci, "suspend root hub\n");
601 max_ports = HCS_MAX_PORTS(xhci->hcs_params1);
602 for (i = 0; i < max_ports; i++) {
603 if (i < xhci->num_usb3_ports)
604 port_array[i] = xhci->usb3_ports[i];
605 else
606 port_array[i] =
607 xhci->usb2_ports[i - xhci->num_usb3_ports];
609 bus_state = &xhci->bus_state[hcd_index(hcd)];
611 spin_lock_irqsave(&xhci->lock, flags);
613 if (hcd->self.root_hub->do_remote_wakeup) {
614 port_index = max_ports;
615 while (port_index--) {
616 if (bus_state->resume_done[port_index] != 0) {
617 spin_unlock_irqrestore(&xhci->lock, flags);
618 xhci_dbg(xhci, "suspend failed because "
619 "port %d is resuming\n",
620 port_index + 1);
621 return -EBUSY;
626 port_index = max_ports;
627 bus_state->bus_suspended = 0;
628 while (port_index--) {
629 /* suspend the port if the port is not suspended */
630 u32 t1, t2;
631 int slot_id;
633 t1 = xhci_readl(xhci, port_array[port_index]);
634 t2 = xhci_port_state_to_neutral(t1);
636 if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) {
637 xhci_dbg(xhci, "port %d not suspended\n", port_index);
638 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
639 port_index + 1);
640 if (slot_id) {
641 spin_unlock_irqrestore(&xhci->lock, flags);
642 xhci_stop_device(xhci, slot_id, 1);
643 spin_lock_irqsave(&xhci->lock, flags);
645 t2 &= ~PORT_PLS_MASK;
646 t2 |= PORT_LINK_STROBE | XDEV_U3;
647 set_bit(port_index, &bus_state->bus_suspended);
649 if (hcd->self.root_hub->do_remote_wakeup) {
650 if (t1 & PORT_CONNECT) {
651 t2 |= PORT_WKOC_E | PORT_WKDISC_E;
652 t2 &= ~PORT_WKCONN_E;
653 } else {
654 t2 |= PORT_WKOC_E | PORT_WKCONN_E;
655 t2 &= ~PORT_WKDISC_E;
657 } else
658 t2 &= ~PORT_WAKE_BITS;
660 t1 = xhci_port_state_to_neutral(t1);
661 if (t1 != t2)
662 xhci_writel(xhci, t2, port_array[port_index]);
664 if (DEV_HIGHSPEED(t1)) {
665 /* enable remote wake up for USB 2.0 */
666 u32 __iomem *addr;
667 u32 tmp;
669 /* Add one to the port status register address to get
670 * the port power control register address.
672 addr = port_array[port_index] + 1;
673 tmp = xhci_readl(xhci, addr);
674 tmp |= PORT_RWE;
675 xhci_writel(xhci, tmp, addr);
678 hcd->state = HC_STATE_SUSPENDED;
679 bus_state->next_statechange = jiffies + msecs_to_jiffies(10);
680 spin_unlock_irqrestore(&xhci->lock, flags);
681 return 0;
684 int xhci_bus_resume(struct usb_hcd *hcd)
686 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
687 int max_ports, port_index;
688 u32 __iomem *port_array[15 + USB_MAXCHILDREN];
689 int i;
690 struct xhci_bus_state *bus_state;
691 u32 temp;
692 unsigned long flags;
694 xhci_dbg(xhci, "resume root hub\n");
695 max_ports = HCS_MAX_PORTS(xhci->hcs_params1);
696 for (i = 0; i < max_ports; i++) {
697 if (i < xhci->num_usb3_ports)
698 port_array[i] = xhci->usb3_ports[i];
699 else
700 port_array[i] =
701 xhci->usb2_ports[i - xhci->num_usb3_ports];
703 bus_state = &xhci->bus_state[hcd_index(hcd)];
705 if (time_before(jiffies, bus_state->next_statechange))
706 msleep(5);
708 spin_lock_irqsave(&xhci->lock, flags);
709 if (!HCD_HW_ACCESSIBLE(hcd)) {
710 spin_unlock_irqrestore(&xhci->lock, flags);
711 return -ESHUTDOWN;
714 /* delay the irqs */
715 temp = xhci_readl(xhci, &xhci->op_regs->command);
716 temp &= ~CMD_EIE;
717 xhci_writel(xhci, temp, &xhci->op_regs->command);
719 port_index = max_ports;
720 while (port_index--) {
721 /* Check whether need resume ports. If needed
722 resume port and disable remote wakeup */
723 u32 temp;
724 int slot_id;
726 temp = xhci_readl(xhci, port_array[port_index]);
727 if (DEV_SUPERSPEED(temp))
728 temp &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS);
729 else
730 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
731 if (test_bit(port_index, &bus_state->bus_suspended) &&
732 (temp & PORT_PLS_MASK)) {
733 if (DEV_SUPERSPEED(temp)) {
734 temp = xhci_port_state_to_neutral(temp);
735 temp &= ~PORT_PLS_MASK;
736 temp |= PORT_LINK_STROBE | XDEV_U0;
737 xhci_writel(xhci, temp, port_array[port_index]);
738 } else {
739 temp = xhci_port_state_to_neutral(temp);
740 temp &= ~PORT_PLS_MASK;
741 temp |= PORT_LINK_STROBE | XDEV_RESUME;
742 xhci_writel(xhci, temp, port_array[port_index]);
744 spin_unlock_irqrestore(&xhci->lock, flags);
745 msleep(20);
746 spin_lock_irqsave(&xhci->lock, flags);
748 temp = xhci_readl(xhci, port_array[port_index]);
749 temp = xhci_port_state_to_neutral(temp);
750 temp &= ~PORT_PLS_MASK;
751 temp |= PORT_LINK_STROBE | XDEV_U0;
752 xhci_writel(xhci, temp, port_array[port_index]);
754 slot_id = xhci_find_slot_id_by_port(hcd,
755 xhci, port_index + 1);
756 if (slot_id)
757 xhci_ring_device(xhci, slot_id);
758 } else
759 xhci_writel(xhci, temp, port_array[port_index]);
761 if (DEV_HIGHSPEED(temp)) {
762 /* disable remote wake up for USB 2.0 */
763 u32 __iomem *addr;
764 u32 tmp;
766 /* Add one to the port status register address to get
767 * the port power control register address.
769 addr = port_array[port_index] + 1;
770 tmp = xhci_readl(xhci, addr);
771 tmp &= ~PORT_RWE;
772 xhci_writel(xhci, tmp, addr);
776 (void) xhci_readl(xhci, &xhci->op_regs->command);
778 bus_state->next_statechange = jiffies + msecs_to_jiffies(5);
779 /* re-enable irqs */
780 temp = xhci_readl(xhci, &xhci->op_regs->command);
781 temp |= CMD_EIE;
782 xhci_writel(xhci, temp, &xhci->op_regs->command);
783 temp = xhci_readl(xhci, &xhci->op_regs->command);
785 spin_unlock_irqrestore(&xhci->lock, flags);
786 return 0;
789 #endif /* CONFIG_PM */