2 * linux/arch/arm/mach-tegra/include/mach/pinmux.h
4 * Copyright (C) 2010 Google, Inc.
5 * Copyright (C) 2010,2011 Nvidia, Inc.
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #ifndef __MACH_TEGRA_PINMUX_H
19 #define __MACH_TEGRA_PINMUX_H
22 TEGRA_MUX_RSVD
= 0x8000,
23 TEGRA_MUX_RSVD1
= 0x8000,
24 TEGRA_MUX_RSVD2
= 0x8001,
25 TEGRA_MUX_RSVD3
= 0x8002,
26 TEGRA_MUX_RSVD4
= 0x8003,
39 TEGRA_MUX_EMC_TEST0_DLL
,
40 TEGRA_MUX_EMC_TEST1_DLL
,
86 TEGRA_MUX_VI_SENSOR_CLK
,
92 enum tegra_pullupdown
{
93 TEGRA_PUPD_NORMAL
= 0,
100 TEGRA_TRI_TRISTATE
= 1,
104 TEGRA_PIN_OUTPUT
= 0,
120 struct tegra_pingroup_config
{
122 enum tegra_mux_func func
;
123 enum tegra_pullupdown pupd
;
124 enum tegra_tristate tristate
;
128 TEGRA_SLEW_FASTEST
= 0,
135 enum tegra_pull_strength
{
172 TEGRA_DRIVE_DIV_8
= 0,
180 TEGRA_HSM_DISABLE
= 0,
185 TEGRA_SCHMITT_DISABLE
= 0,
186 TEGRA_SCHMITT_ENABLE
,
189 struct tegra_drive_pingroup_config
{
192 enum tegra_schmitt schmitt
;
193 enum tegra_drive drive
;
194 enum tegra_pull_strength pull_down
;
195 enum tegra_pull_strength pull_up
;
196 enum tegra_slew slew_rising
;
197 enum tegra_slew slew_falling
;
200 struct tegra_drive_pingroup_desc
{
206 struct tegra_pingroup_desc
{
211 enum tegra_pin_io io_default
;
212 s16 tri_bank
; /* Register bank the tri_reg exists within */
213 s16 mux_bank
; /* Register bank the mux_reg exists within */
214 s16 pupd_bank
; /* Register bank the pupd_reg exists within */
215 s16 tri_reg
; /* offset into the TRISTATE_REG_* register bank */
216 s16 mux_reg
; /* offset into the PIN_MUX_CTL_* register bank */
217 s16 pupd_reg
; /* offset into the PULL_UPDOWN_REG_* register bank */
218 s8 tri_bit
; /* offset into the TRISTATE_REG_* register bit */
219 s8 mux_bit
; /* offset into the PIN_MUX_CTL_* register bit */
220 s8 pupd_bit
; /* offset into the PULL_UPDOWN_REG_* register bit */
221 s8 lock_bit
; /* offset of the LOCK bit into mux register bit */
222 s8 od_bit
; /* offset of the OD bit into mux register bit */
223 s8 ioreset_bit
; /* offset of the IO_RESET bit into mux register bit */
226 typedef void (*pinmux_init
) (const struct tegra_pingroup_desc
**pg
,
227 int *pg_max
, const struct tegra_drive_pingroup_desc
**pgdrive
,
230 void tegra20_pinmux_init(const struct tegra_pingroup_desc
**pg
, int *pg_max
,
231 const struct tegra_drive_pingroup_desc
**pgdrive
, int *pgdrive_max
);
233 int tegra_pinmux_set_tristate(int pg
, enum tegra_tristate tristate
);
234 int tegra_pinmux_set_pullupdown(int pg
, enum tegra_pullupdown pupd
);
236 void tegra_pinmux_config_table(const struct tegra_pingroup_config
*config
,
239 void tegra_drive_pinmux_config_table(struct tegra_drive_pingroup_config
*config
,
241 void tegra_pinmux_set_safe_pinmux_table(const struct tegra_pingroup_config
*config
,
243 void tegra_pinmux_config_pinmux_table(const struct tegra_pingroup_config
*config
,
245 void tegra_pinmux_config_tristate_table(const struct tegra_pingroup_config
*config
,
246 int len
, enum tegra_tristate tristate
);
247 void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config
*config
,
248 int len
, enum tegra_pullupdown pupd
);