arch/x86/kernel/irq.c

   1 /*
   2  * Common interrupt code for 32 and 64 bit
   3  */
   4 #include <linux/cpu.h>
   5 #include <linux/interrupt.h>
   6 #include <linux/kernel_stat.h>
   7 #include <linux/of.h>
   8 #include <linux/seq_file.h>
   9 #include <linux/smp.h>
  10 #include <linux/ftrace.h>
  11
  12 #include <asm/apic.h>
  13 #include <asm/io_apic.h>
  14 #include <asm/irq.h>
  15 #include <asm/idle.h>
  16 #include <asm/mce.h>
  17 #include <asm/hw_irq.h>
  18
  19 atomic_t irq_err_count;
  20
  21 /* Function pointer for generic interrupt vector handling */
  22 void (*x86_platform_ipi_callback)(void) = NULL;
  23
  24 /*
  25  * 'what should we do if we get a hw irq event on an illegal vector'.
  26  * each architecture has to answer this themselves.
  27  */
  28 void ack_bad_irq(unsigned int irq)
  29 {
  30         if (printk_ratelimit())
  31                 pr_err("unexpected IRQ trap at vector %02x\n", irq);
  32
  33         /*
  34          * Currently unexpected vectors happen only on SMP and APIC.
  35          * We _must_ ack these because every local APIC has only N
  36          * irq slots per priority level, and a 'hanging, unacked' IRQ
  37          * holds up an irq slot - in excessive cases (when multiple
  38          * unexpected vectors occur) that might lock up the APIC
  39          * completely.
  40          * But only ack when the APIC is enabled -AK
  41          */
  42         ack_APIC_irq();
  43 }
  44
  45 #define irq_stats(x)            (&per_cpu(irq_stat, x))
  46 /*
  47  * /proc/interrupts printing:
  48  */
  49 static int show_other_interrupts(struct seq_file *p, int prec)
  50 {
  51         int j;
  52
  53         seq_printf(p, "%*s: ", prec, "NMI");
  54         for_each_online_cpu(j)
  55                 seq_printf(p, "%10u ", irq_stats(j)->__nmi_count);
  56         seq_printf(p, "  Non-maskable interrupts\n");
  57 #ifdef CONFIG_X86_LOCAL_APIC
  58         seq_printf(p, "%*s: ", prec, "LOC");
  59         for_each_online_cpu(j)
  60                 seq_printf(p, "%10u ", irq_stats(j)->apic_timer_irqs);
  61         seq_printf(p, "  Local timer interrupts\n");
  62
  63         seq_printf(p, "%*s: ", prec, "SPU");
  64         for_each_online_cpu(j)
  65                 seq_printf(p, "%10u ", irq_stats(j)->irq_spurious_count);
  66         seq_printf(p, "  Spurious interrupts\n");
  67         seq_printf(p, "%*s: ", prec, "PMI");
  68         for_each_online_cpu(j)
  69                 seq_printf(p, "%10u ", irq_stats(j)->apic_perf_irqs);
  70         seq_printf(p, "  Performance monitoring interrupts\n");
  71         seq_printf(p, "%*s: ", prec, "IWI");
  72         for_each_online_cpu(j)
  73                 seq_printf(p, "%10u ", irq_stats(j)->apic_irq_work_irqs);
  74         seq_printf(p, "  IRQ work interrupts\n");
  75 #endif
  76         if (x86_platform_ipi_callback) {
  77                 seq_printf(p, "%*s: ", prec, "PLT");
  78                 for_each_online_cpu(j)
  79                         seq_printf(p, "%10u ", irq_stats(j)->x86_platform_ipis);
  80                 seq_printf(p, "  Platform interrupts\n");
  81         }
  82 #ifdef CONFIG_SMP
  83         seq_printf(p, "%*s: ", prec, "RES");
  84         for_each_online_cpu(j)
  85                 seq_printf(p, "%10u ", irq_stats(j)->irq_resched_count);
  86         seq_printf(p, "  Rescheduling interrupts\n");
  87         seq_printf(p, "%*s: ", prec, "CAL");
  88         for_each_online_cpu(j)
  89                 seq_printf(p, "%10u ", irq_stats(j)->irq_call_count);
  90         seq_printf(p, "  Function call interrupts\n");
  91         seq_printf(p, "%*s: ", prec, "TLB");
  92         for_each_online_cpu(j)
  93                 seq_printf(p, "%10u ", irq_stats(j)->irq_tlb_count);
  94         seq_printf(p, "  TLB shootdowns\n");
  95 #endif
  96 #ifdef CONFIG_X86_THERMAL_VECTOR
  97         seq_printf(p, "%*s: ", prec, "TRM");
  98         for_each_online_cpu(j)
  99                 seq_printf(p, "%10u ", irq_stats(j)->irq_thermal_count);
 100         seq_printf(p, "  Thermal event interrupts\n");
 101 #endif
 102 #ifdef CONFIG_X86_MCE_THRESHOLD
 103         seq_printf(p, "%*s: ", prec, "THR");
 104         for_each_online_cpu(j)
 105                 seq_printf(p, "%10u ", irq_stats(j)->irq_threshold_count);
 106         seq_printf(p, "  Threshold APIC interrupts\n");
 107 #endif
 108 #ifdef CONFIG_X86_MCE
 109         seq_printf(p, "%*s: ", prec, "MCE");
 110         for_each_online_cpu(j)
 111                 seq_printf(p, "%10u ", per_cpu(mce_exception_count, j));
 112         seq_printf(p, "  Machine check exceptions\n");
 113         seq_printf(p, "%*s: ", prec, "MCP");
 114         for_each_online_cpu(j)
 115                 seq_printf(p, "%10u ", per_cpu(mce_poll_count, j));
 116         seq_printf(p, "  Machine check polls\n");
 117 #endif
 118         seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
 119 #if defined(CONFIG_X86_IO_APIC)
 120         seq_printf(p, "%*s: %10u\n", prec, "MIS", atomic_read(&irq_mis_count));
 121 #endif
 122         return 0;
 123 }
 124
 125 int show_interrupts(struct seq_file *p, void *v)
 126 {
 127         unsigned long flags, any_count = 0;
 128         int i = *(loff_t *) v, j, prec;
 129         struct irqaction *action;
 130         struct irq_desc *desc;
 131
 132         if (i > nr_irqs)
 133                 return 0;
 134
 135         for (prec = 3, j = 1000; prec < 10 && j <= nr_irqs; ++prec)
 136                 j *= 10;
 137
 138         if (i == nr_irqs)
 139                 return show_other_interrupts(p, prec);
 140
 141         /* print header */
 142         if (i == 0) {
 143                 seq_printf(p, "%*s", prec + 8, "");
 144                 for_each_online_cpu(j)
 145                         seq_printf(p, "CPU%-8d", j);
 146                 seq_putc(p, '\n');
 147         }
 148
 149         desc = irq_to_desc(i);
 150         if (!desc)
 151                 return 0;
 152
 153         raw_spin_lock_irqsave(&desc->lock, flags);
 154         for_each_online_cpu(j)
 155                 any_count |= kstat_irqs_cpu(i, j);
 156         action = desc->action;
 157         if (!action && !any_count)
 158                 goto out;
 159
 160         seq_printf(p, "%*d: ", prec, i);
 161         for_each_online_cpu(j)
 162                 seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
 163         seq_printf(p, " %8s", desc->irq_data.chip->name);
 164         seq_printf(p, "-%-8s", desc->name);
 165
 166         if (action) {
 167                 seq_printf(p, "  %s", action->name);
 168                 while ((action = action->next) != NULL)
 169                         seq_printf(p, ", %s", action->name);
 170         }
 171
 172         seq_putc(p, '\n');
 173 out:
 174         raw_spin_unlock_irqrestore(&desc->lock, flags);
 175         return 0;
 176 }
 177
 178 /*
 179  * /proc/stat helpers
 180  */
 181 u64 arch_irq_stat_cpu(unsigned int cpu)
 182 {
 183         u64 sum = irq_stats(cpu)->__nmi_count;
 184
 185 #ifdef CONFIG_X86_LOCAL_APIC
 186         sum += irq_stats(cpu)->apic_timer_irqs;
 187         sum += irq_stats(cpu)->irq_spurious_count;
 188         sum += irq_stats(cpu)->apic_perf_irqs;
 189         sum += irq_stats(cpu)->apic_irq_work_irqs;
 190 #endif
 191         if (x86_platform_ipi_callback)
 192                 sum += irq_stats(cpu)->x86_platform_ipis;
 193 #ifdef CONFIG_SMP
 194         sum += irq_stats(cpu)->irq_resched_count;
 195         sum += irq_stats(cpu)->irq_call_count;
 196         sum += irq_stats(cpu)->irq_tlb_count;
 197 #endif
 198 #ifdef CONFIG_X86_THERMAL_VECTOR
 199         sum += irq_stats(cpu)->irq_thermal_count;
 200 #endif
 201 #ifdef CONFIG_X86_MCE_THRESHOLD
 202         sum += irq_stats(cpu)->irq_threshold_count;
 203 #endif
 204 #ifdef CONFIG_X86_MCE
 205         sum += per_cpu(mce_exception_count, cpu);
 206         sum += per_cpu(mce_poll_count, cpu);
 207 #endif
 208         return sum;
 209 }
 210
 211 u64 arch_irq_stat(void)
 212 {
 213         u64 sum = atomic_read(&irq_err_count);
 214
 215 #ifdef CONFIG_X86_IO_APIC
 216         sum += atomic_read(&irq_mis_count);
 217 #endif
 218         return sum;
 219 }
 220
 221
 222 /*
 223  * do_IRQ handles all normal device IRQ's (the special
 224  * SMP cross-CPU interrupts have their own specific
 225  * handlers).
 226  */
 227 unsigned int __irq_entry do_IRQ(struct pt_regs *regs)
 228 {
 229         struct pt_regs *old_regs = set_irq_regs(regs);
 230
 231         /* high bit used in ret_from_ code  */
 232         unsigned vector = ~regs->orig_ax;
 233         unsigned irq;
 234
 235         exit_idle();
 236         irq_enter();
 237
 238         irq = __this_cpu_read(vector_irq[vector]);
 239
 240         if (!handle_irq(irq, regs)) {
 241                 ack_APIC_irq();
 242
 243                 if (printk_ratelimit())
 244                         pr_emerg("%s: %d.%d No irq handler for vector (irq %d)\n",
 245                                 __func__, smp_processor_id(), vector, irq);
 246         }
 247
 248         irq_exit();
 249
 250         set_irq_regs(old_regs);
 251         return 1;
 252 }
 253
 254 /*
 255  * Handler for X86_PLATFORM_IPI_VECTOR.
 256  */
 257 void smp_x86_platform_ipi(struct pt_regs *regs)
 258 {
 259         struct pt_regs *old_regs = set_irq_regs(regs);
 260
 261         ack_APIC_irq();
 262
 263         exit_idle();
 264
 265         irq_enter();
 266
 267         inc_irq_stat(x86_platform_ipis);
 268
 269         if (x86_platform_ipi_callback)
 270                 x86_platform_ipi_callback();
 271
 272         irq_exit();
 273
 274         set_irq_regs(old_regs);
 275 }
 276
 277 EXPORT_SYMBOL_GPL(vector_used_by_percpu_irq);
 278
 279 #ifdef CONFIG_OF
 280 unsigned int irq_create_of_mapping(struct device_node *controller,
 281                 const u32 *intspec, unsigned int intsize)
 282 {
 283         return intspec[0];
 284 }
 285 EXPORT_SYMBOL_GPL(irq_create_of_mapping);
 286 #endif
 287
 288 #ifdef CONFIG_HOTPLUG_CPU
 289 /* A cpu has been removed from cpu_online_mask.  Reset irq affinities. */
 290 void fixup_irqs(void)
 291 {
 292         unsigned int irq, vector;
 293         static int warned;
 294         struct irq_desc *desc;
 295         struct irq_data *data;
 296
 297         for_each_irq_desc(irq, desc) {
 298                 int break_affinity = 0;
 299                 int set_affinity = 1;
 300                 const struct cpumask *affinity;
 301
 302                 if (!desc)
 303                         continue;
 304                 if (irq == 2)
 305                         continue;
 306
 307                 /* interrupt's are disabled at this point */
 308                 raw_spin_lock(&desc->lock);
 309
 310                 data = &desc->irq_data;
 311                 affinity = data->affinity;
 312                 if (!irq_has_action(irq) ||
 313                     cpumask_equal(affinity, cpu_online_mask)) {
 314                         raw_spin_unlock(&desc->lock);
 315                         continue;
 316                 }
 317
 318                 /*
 319                  * Complete the irq move. This cpu is going down and for
 320                  * non intr-remapping case, we can't wait till this interrupt
 321                  * arrives at this cpu before completing the irq move.
 322                  */
 323                 irq_force_complete_move(irq);
 324
 325                 if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {
 326                         break_affinity = 1;
 327                         affinity = cpu_all_mask;
 328                 }
 329
 330                 if (!(desc->status & IRQ_MOVE_PCNTXT) && data->chip->irq_mask)
 331                         data->chip->irq_mask(data);
 332
 333                 if (data->chip->irq_set_affinity)
 334                         data->chip->irq_set_affinity(data, affinity, true);
 335                 else if (!(warned++))
 336                         set_affinity = 0;
 337
 338                 if (!(desc->status & IRQ_MOVE_PCNTXT) && data->chip->irq_unmask)
 339                         data->chip->irq_unmask(data);
 340
 341                 raw_spin_unlock(&desc->lock);
 342
 343                 if (break_affinity && set_affinity)
 344                         printk("Broke affinity for irq %i\n", irq);
 345                 else if (!set_affinity)
 346                         printk("Cannot set affinity for irq %i\n", irq);
 347         }
 348
 349         /*
 350          * We can remove mdelay() and then send spuriuous interrupts to
 351          * new cpu targets for all the irqs that were handled previously by
 352          * this cpu. While it works, I have seen spurious interrupt messages
 353          * (nothing wrong but still...).
 354          *
 355          * So for now, retain mdelay(1) and check the IRR and then send those
 356          * interrupts to new targets as this cpu is already offlined...
 357          */
 358         mdelay(1);
 359
 360         for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS; vector++) {
 361                 unsigned int irr;
 362
 363                 if (__this_cpu_read(vector_irq[vector]) < 0)
 364                         continue;
 365
 366                 irr = apic_read(APIC_IRR + (vector / 32 * 0x10));
 367                 if (irr  & (1 << (vector % 32))) {
 368                         irq = __this_cpu_read(vector_irq[vector]);
 369
 370                         desc = irq_to_desc(irq);
 371                         data = &desc->irq_data;
 372                         raw_spin_lock(&desc->lock);
 373                         if (data->chip->irq_retrigger)
 374                                 data->chip->irq_retrigger(data);
 375                         raw_spin_unlock(&desc->lock);
 376                 }
 377         }
 378 }
 379 #endif