drm/radeon/kms: add new pll algo for avivo asics
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / gpu / drm / radeon / radeon_mode.h
blobaa225707e54167cb922d4873a7b74c1feec262e2
1 /*
2 * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
3 * VA Linux Systems Inc., Fremont, California.
4 * Copyright 2008 Red Hat Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
24 * Original Authors:
25 * Kevin E. Martin, Rickard E. Faith, Alan Hourihane
27 * Kernel port Author: Dave Airlie
30 #ifndef RADEON_MODE_H
31 #define RADEON_MODE_H
33 #include <drm_crtc.h>
34 #include <drm_mode.h>
35 #include <drm_edid.h>
36 #include <drm_dp_helper.h>
37 #include <drm_fixed.h>
38 #include <drm_crtc_helper.h>
39 #include <linux/i2c.h>
40 #include <linux/i2c-algo-bit.h>
42 struct radeon_bo;
43 struct radeon_device;
45 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
46 #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
47 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
48 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
50 enum radeon_rmx_type {
51 RMX_OFF,
52 RMX_FULL,
53 RMX_CENTER,
54 RMX_ASPECT
57 enum radeon_tv_std {
58 TV_STD_NTSC,
59 TV_STD_PAL,
60 TV_STD_PAL_M,
61 TV_STD_PAL_60,
62 TV_STD_NTSC_J,
63 TV_STD_SCART_PAL,
64 TV_STD_SECAM,
65 TV_STD_PAL_CN,
66 TV_STD_PAL_N,
69 enum radeon_underscan_type {
70 UNDERSCAN_OFF,
71 UNDERSCAN_ON,
72 UNDERSCAN_AUTO,
75 enum radeon_hpd_id {
76 RADEON_HPD_1 = 0,
77 RADEON_HPD_2,
78 RADEON_HPD_3,
79 RADEON_HPD_4,
80 RADEON_HPD_5,
81 RADEON_HPD_6,
82 RADEON_HPD_NONE = 0xff,
85 #define RADEON_MAX_I2C_BUS 16
87 /* radeon gpio-based i2c
88 * 1. "mask" reg and bits
89 * grabs the gpio pins for software use
90 * 0=not held 1=held
91 * 2. "a" reg and bits
92 * output pin value
93 * 0=low 1=high
94 * 3. "en" reg and bits
95 * sets the pin direction
96 * 0=input 1=output
97 * 4. "y" reg and bits
98 * input pin value
99 * 0=low 1=high
101 struct radeon_i2c_bus_rec {
102 bool valid;
103 /* id used by atom */
104 uint8_t i2c_id;
105 /* id used by atom */
106 enum radeon_hpd_id hpd;
107 /* can be used with hw i2c engine */
108 bool hw_capable;
109 /* uses multi-media i2c engine */
110 bool mm_i2c;
111 /* regs and bits */
112 uint32_t mask_clk_reg;
113 uint32_t mask_data_reg;
114 uint32_t a_clk_reg;
115 uint32_t a_data_reg;
116 uint32_t en_clk_reg;
117 uint32_t en_data_reg;
118 uint32_t y_clk_reg;
119 uint32_t y_data_reg;
120 uint32_t mask_clk_mask;
121 uint32_t mask_data_mask;
122 uint32_t a_clk_mask;
123 uint32_t a_data_mask;
124 uint32_t en_clk_mask;
125 uint32_t en_data_mask;
126 uint32_t y_clk_mask;
127 uint32_t y_data_mask;
130 struct radeon_tmds_pll {
131 uint32_t freq;
132 uint32_t value;
135 #define RADEON_MAX_BIOS_CONNECTOR 16
137 /* pll flags */
138 #define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
139 #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
140 #define RADEON_PLL_USE_REF_DIV (1 << 2)
141 #define RADEON_PLL_LEGACY (1 << 3)
142 #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
143 #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
144 #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
145 #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
146 #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
147 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
148 #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
149 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
150 #define RADEON_PLL_USE_POST_DIV (1 << 12)
151 #define RADEON_PLL_IS_LCD (1 << 13)
152 #define RADEON_PLL_PREFER_MINM_OVER_MAXP (1 << 14)
154 struct radeon_pll {
155 /* reference frequency */
156 uint32_t reference_freq;
158 /* fixed dividers */
159 uint32_t reference_div;
160 uint32_t post_div;
162 /* pll in/out limits */
163 uint32_t pll_in_min;
164 uint32_t pll_in_max;
165 uint32_t pll_out_min;
166 uint32_t pll_out_max;
167 uint32_t lcd_pll_out_min;
168 uint32_t lcd_pll_out_max;
169 uint32_t best_vco;
171 /* divider limits */
172 uint32_t min_ref_div;
173 uint32_t max_ref_div;
174 uint32_t min_post_div;
175 uint32_t max_post_div;
176 uint32_t min_feedback_div;
177 uint32_t max_feedback_div;
178 uint32_t min_frac_feedback_div;
179 uint32_t max_frac_feedback_div;
181 /* flags for the current clock */
182 uint32_t flags;
184 /* pll id */
185 uint32_t id;
188 struct radeon_i2c_chan {
189 struct i2c_adapter adapter;
190 struct drm_device *dev;
191 union {
192 struct i2c_algo_bit_data bit;
193 struct i2c_algo_dp_aux_data dp;
194 } algo;
195 struct radeon_i2c_bus_rec rec;
198 /* mostly for macs, but really any system without connector tables */
199 enum radeon_connector_table {
200 CT_NONE = 0,
201 CT_GENERIC,
202 CT_IBOOK,
203 CT_POWERBOOK_EXTERNAL,
204 CT_POWERBOOK_INTERNAL,
205 CT_POWERBOOK_VGA,
206 CT_MINI_EXTERNAL,
207 CT_MINI_INTERNAL,
208 CT_IMAC_G5_ISIGHT,
209 CT_EMAC,
210 CT_RN50_POWER,
211 CT_MAC_X800,
214 enum radeon_dvo_chip {
215 DVO_SIL164,
216 DVO_SIL1178,
219 struct radeon_fbdev;
221 struct radeon_mode_info {
222 struct atom_context *atom_context;
223 struct card_info *atom_card_info;
224 enum radeon_connector_table connector_table;
225 bool mode_config_initialized;
226 struct radeon_crtc *crtcs[6];
227 /* DVI-I properties */
228 struct drm_property *coherent_mode_property;
229 /* DAC enable load detect */
230 struct drm_property *load_detect_property;
231 /* TV standard */
232 struct drm_property *tv_std_property;
233 /* legacy TMDS PLL detect */
234 struct drm_property *tmds_pll_property;
235 /* underscan */
236 struct drm_property *underscan_property;
237 struct drm_property *underscan_hborder_property;
238 struct drm_property *underscan_vborder_property;
239 /* hardcoded DFP edid from BIOS */
240 struct edid *bios_hardcoded_edid;
242 /* pointer to fbdev info structure */
243 struct radeon_fbdev *rfbdev;
246 #define MAX_H_CODE_TIMING_LEN 32
247 #define MAX_V_CODE_TIMING_LEN 32
249 /* need to store these as reading
250 back code tables is excessive */
251 struct radeon_tv_regs {
252 uint32_t tv_uv_adr;
253 uint32_t timing_cntl;
254 uint32_t hrestart;
255 uint32_t vrestart;
256 uint32_t frestart;
257 uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
258 uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
261 struct radeon_crtc {
262 struct drm_crtc base;
263 int crtc_id;
264 u16 lut_r[256], lut_g[256], lut_b[256];
265 bool enabled;
266 bool can_tile;
267 uint32_t crtc_offset;
268 struct drm_gem_object *cursor_bo;
269 uint64_t cursor_addr;
270 int cursor_width;
271 int cursor_height;
272 uint32_t legacy_display_base_addr;
273 uint32_t legacy_cursor_offset;
274 enum radeon_rmx_type rmx_type;
275 u8 h_border;
276 u8 v_border;
277 fixed20_12 vsc;
278 fixed20_12 hsc;
279 struct drm_display_mode native_mode;
280 int pll_id;
283 struct radeon_encoder_primary_dac {
284 /* legacy primary dac */
285 uint32_t ps2_pdac_adj;
288 struct radeon_encoder_lvds {
289 /* legacy lvds */
290 uint16_t panel_vcc_delay;
291 uint8_t panel_pwr_delay;
292 uint8_t panel_digon_delay;
293 uint8_t panel_blon_delay;
294 uint16_t panel_ref_divider;
295 uint8_t panel_post_divider;
296 uint16_t panel_fb_divider;
297 bool use_bios_dividers;
298 uint32_t lvds_gen_cntl;
299 /* panel mode */
300 struct drm_display_mode native_mode;
303 struct radeon_encoder_tv_dac {
304 /* legacy tv dac */
305 uint32_t ps2_tvdac_adj;
306 uint32_t ntsc_tvdac_adj;
307 uint32_t pal_tvdac_adj;
309 int h_pos;
310 int v_pos;
311 int h_size;
312 int supported_tv_stds;
313 bool tv_on;
314 enum radeon_tv_std tv_std;
315 struct radeon_tv_regs tv;
318 struct radeon_encoder_int_tmds {
319 /* legacy int tmds */
320 struct radeon_tmds_pll tmds_pll[4];
323 struct radeon_encoder_ext_tmds {
324 /* tmds over dvo */
325 struct radeon_i2c_chan *i2c_bus;
326 uint8_t slave_addr;
327 enum radeon_dvo_chip dvo_chip;
330 /* spread spectrum */
331 struct radeon_atom_ss {
332 uint16_t percentage;
333 uint8_t type;
334 uint16_t step;
335 uint8_t delay;
336 uint8_t range;
337 uint8_t refdiv;
338 /* asic_ss */
339 uint16_t rate;
340 uint16_t amount;
343 struct radeon_encoder_atom_dig {
344 bool linkb;
345 /* atom dig */
346 bool coherent_mode;
347 int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB, etc. */
348 /* atom lvds/edp */
349 uint32_t lcd_misc;
350 uint16_t panel_pwr_delay;
351 uint32_t lcd_ss_id;
352 /* panel mode */
353 struct drm_display_mode native_mode;
356 struct radeon_encoder_atom_dac {
357 enum radeon_tv_std tv_std;
360 struct radeon_encoder {
361 struct drm_encoder base;
362 uint32_t encoder_enum;
363 uint32_t encoder_id;
364 uint32_t devices;
365 uint32_t active_device;
366 uint32_t flags;
367 uint32_t pixel_clock;
368 enum radeon_rmx_type rmx_type;
369 enum radeon_underscan_type underscan_type;
370 uint32_t underscan_hborder;
371 uint32_t underscan_vborder;
372 struct drm_display_mode native_mode;
373 void *enc_priv;
374 int audio_polling_active;
375 int hdmi_offset;
376 int hdmi_config_offset;
377 int hdmi_audio_workaround;
378 int hdmi_buffer_status;
379 bool is_ext_encoder;
382 struct radeon_connector_atom_dig {
383 uint32_t igp_lane_info;
384 /* displayport */
385 struct radeon_i2c_chan *dp_i2c_bus;
386 u8 dpcd[8];
387 u8 dp_sink_type;
388 int dp_clock;
389 int dp_lane_count;
390 bool edp_on;
393 struct radeon_gpio_rec {
394 bool valid;
395 u8 id;
396 u32 reg;
397 u32 mask;
400 struct radeon_hpd {
401 enum radeon_hpd_id hpd;
402 u8 plugged_state;
403 struct radeon_gpio_rec gpio;
406 struct radeon_router {
407 u32 router_id;
408 struct radeon_i2c_bus_rec i2c_info;
409 u8 i2c_addr;
410 /* i2c mux */
411 bool ddc_valid;
412 u8 ddc_mux_type;
413 u8 ddc_mux_control_pin;
414 u8 ddc_mux_state;
415 /* clock/data mux */
416 bool cd_valid;
417 u8 cd_mux_type;
418 u8 cd_mux_control_pin;
419 u8 cd_mux_state;
422 struct radeon_connector {
423 struct drm_connector base;
424 uint32_t connector_id;
425 uint32_t devices;
426 struct radeon_i2c_chan *ddc_bus;
427 /* some systems have an hdmi and vga port with a shared ddc line */
428 bool shared_ddc;
429 bool use_digital;
430 /* we need to mind the EDID between detect
431 and get modes due to analog/digital/tvencoder */
432 struct edid *edid;
433 void *con_priv;
434 bool dac_load_detect;
435 uint16_t connector_object_id;
436 struct radeon_hpd hpd;
437 struct radeon_router router;
438 struct radeon_i2c_chan *router_bus;
441 struct radeon_framebuffer {
442 struct drm_framebuffer base;
443 struct drm_gem_object *obj;
446 /* radeon_get_crtc_scanoutpos() return flags */
447 #define RADEON_SCANOUTPOS_VALID (1 << 0)
448 #define RADEON_SCANOUTPOS_INVBL (1 << 1)
449 #define RADEON_SCANOUTPOS_ACCURATE (1 << 2)
451 extern enum radeon_tv_std
452 radeon_combios_get_tv_info(struct radeon_device *rdev);
453 extern enum radeon_tv_std
454 radeon_atombios_get_tv_info(struct radeon_device *rdev);
456 extern struct drm_connector *
457 radeon_get_connector_for_encoder(struct drm_encoder *encoder);
459 extern void radeon_connector_hotplug(struct drm_connector *connector);
460 extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
461 extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector,
462 struct drm_display_mode *mode);
463 extern void radeon_dp_set_link_config(struct drm_connector *connector,
464 struct drm_display_mode *mode);
465 extern void dp_link_train(struct drm_encoder *encoder,
466 struct drm_connector *connector);
467 extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
468 extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
469 extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action);
470 extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
471 int action, uint8_t lane_num,
472 uint8_t lane_set);
473 extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
474 uint8_t write_byte, uint8_t *read_byte);
476 extern void radeon_i2c_init(struct radeon_device *rdev);
477 extern void radeon_i2c_fini(struct radeon_device *rdev);
478 extern void radeon_combios_i2c_init(struct radeon_device *rdev);
479 extern void radeon_atombios_i2c_init(struct radeon_device *rdev);
480 extern void radeon_i2c_add(struct radeon_device *rdev,
481 struct radeon_i2c_bus_rec *rec,
482 const char *name);
483 extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev,
484 struct radeon_i2c_bus_rec *i2c_bus);
485 extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
486 struct radeon_i2c_bus_rec *rec,
487 const char *name);
488 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
489 struct radeon_i2c_bus_rec *rec,
490 const char *name);
491 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
492 extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus,
493 u8 slave_addr,
494 u8 addr,
495 u8 *val);
496 extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c,
497 u8 slave_addr,
498 u8 addr,
499 u8 val);
500 extern void radeon_router_select_ddc_port(struct radeon_connector *radeon_connector);
501 extern void radeon_router_select_cd_port(struct radeon_connector *radeon_connector);
502 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
503 extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
505 extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
507 extern bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev,
508 struct radeon_atom_ss *ss,
509 int id);
510 extern bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev,
511 struct radeon_atom_ss *ss,
512 int id, u32 clock);
514 extern void radeon_compute_pll_legacy(struct radeon_pll *pll,
515 uint64_t freq,
516 uint32_t *dot_clock_p,
517 uint32_t *fb_div_p,
518 uint32_t *frac_fb_div_p,
519 uint32_t *ref_div_p,
520 uint32_t *post_div_p);
522 extern void radeon_compute_pll_avivo(struct radeon_pll *pll,
523 u32 freq,
524 u32 *dot_clock_p,
525 u32 *fb_div_p,
526 u32 *frac_fb_div_p,
527 u32 *ref_div_p,
528 u32 *post_div_p);
530 extern void radeon_setup_encoder_clones(struct drm_device *dev);
532 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
533 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
534 struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
535 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
536 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
537 extern void atombios_dvo_setup(struct drm_encoder *encoder, int action);
538 extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
539 extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
540 extern void atombios_set_edp_panel_power(struct drm_connector *connector, int action);
541 extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
543 extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
544 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
545 struct drm_framebuffer *old_fb);
546 extern int atombios_crtc_set_base_atomic(struct drm_crtc *crtc,
547 struct drm_framebuffer *fb,
548 int x, int y,
549 enum mode_set_atomic state);
550 extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
551 struct drm_display_mode *mode,
552 struct drm_display_mode *adjusted_mode,
553 int x, int y,
554 struct drm_framebuffer *old_fb);
555 extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
557 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
558 struct drm_framebuffer *old_fb);
559 extern int radeon_crtc_set_base_atomic(struct drm_crtc *crtc,
560 struct drm_framebuffer *fb,
561 int x, int y,
562 enum mode_set_atomic state);
563 extern int radeon_crtc_do_set_base(struct drm_crtc *crtc,
564 struct drm_framebuffer *fb,
565 int x, int y, int atomic);
566 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
567 struct drm_file *file_priv,
568 uint32_t handle,
569 uint32_t width,
570 uint32_t height);
571 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
572 int x, int y);
574 extern int radeon_get_crtc_scanoutpos(struct radeon_device *rdev, int crtc, int *vpos, int *hpos);
576 extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev);
577 extern struct edid *
578 radeon_combios_get_hardcoded_edid(struct radeon_device *rdev);
579 extern bool radeon_atom_get_clock_info(struct drm_device *dev);
580 extern bool radeon_combios_get_clock_info(struct drm_device *dev);
581 extern struct radeon_encoder_atom_dig *
582 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
583 extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
584 struct radeon_encoder_int_tmds *tmds);
585 extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
586 struct radeon_encoder_int_tmds *tmds);
587 extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
588 struct radeon_encoder_int_tmds *tmds);
589 extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
590 struct radeon_encoder_ext_tmds *tmds);
591 extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
592 struct radeon_encoder_ext_tmds *tmds);
593 extern struct radeon_encoder_primary_dac *
594 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
595 extern struct radeon_encoder_tv_dac *
596 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
597 extern struct radeon_encoder_lvds *
598 radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
599 extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
600 extern struct radeon_encoder_tv_dac *
601 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
602 extern struct radeon_encoder_primary_dac *
603 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
604 extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
605 extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
606 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
607 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
608 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
609 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
610 extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
611 extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
612 extern void
613 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
614 extern void
615 radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
616 extern void
617 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
618 extern void
619 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
620 extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
621 u16 blue, int regno);
622 extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
623 u16 *blue, int regno);
624 void radeon_framebuffer_init(struct drm_device *dev,
625 struct radeon_framebuffer *rfb,
626 struct drm_mode_fb_cmd *mode_cmd,
627 struct drm_gem_object *obj);
629 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
630 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
631 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
632 void radeon_atombios_init_crtc(struct drm_device *dev,
633 struct radeon_crtc *radeon_crtc);
634 void radeon_legacy_init_crtc(struct drm_device *dev,
635 struct radeon_crtc *radeon_crtc);
637 void radeon_get_clock_info(struct drm_device *dev);
639 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
640 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
642 void radeon_enc_destroy(struct drm_encoder *encoder);
643 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
644 void radeon_combios_asic_init(struct drm_device *dev);
645 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
646 struct drm_display_mode *mode,
647 struct drm_display_mode *adjusted_mode);
648 void radeon_panel_mode_fixup(struct drm_encoder *encoder,
649 struct drm_display_mode *adjusted_mode);
650 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
652 /* legacy tv */
653 void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
654 uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
655 uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
656 void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
657 uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
658 uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
659 void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
660 uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
661 uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
662 void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
663 struct drm_display_mode *mode,
664 struct drm_display_mode *adjusted_mode);
666 /* fbdev layer */
667 int radeon_fbdev_init(struct radeon_device *rdev);
668 void radeon_fbdev_fini(struct radeon_device *rdev);
669 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state);
670 int radeon_fbdev_total_size(struct radeon_device *rdev);
671 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj);
673 void radeon_fb_output_poll_changed(struct radeon_device *rdev);
674 #endif