2 comedi/drivers/ni_6514.c
3 driver for National Instruments PCI-6514
5 Copyright (C) 2006 Jon Grierson <jd@renko.co.uk>
6 Copyright (C) 2006 Frank Mori Hess <fmhess@users.sourceforge.net>
8 COMEDI - Linux Control and Measurement Device Interface
9 Copyright (C) 1999,2002,2003 David A. Schleef <ds@schleef.org>
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 Description: National Instruments 65xx static dio boards
29 Author: Jon Grierson <jd@renko.co.uk>, Frank Mori Hess <fmhess@users.sourceforge.net>
31 Devices: [National Instruments] PCI-6509 (ni_65xx), PXI-6509, PCI-6510, PCI-6511,
32 PXI-6511, PCI-6512, PXI-6512, PCI-6513, PXI-6513, PCI-6514, PXI-6514, PCI-6515,
33 PXI-6515, PCI-6516, PCI-6517, PCI-6518, PCI-6519, PCI-6520, PCI-6521, PXI-6521,
35 Updated: Wed Oct 18 08:59:11 EDT 2006
37 Based on the PCI-6527 driver by ds.
38 The interrupt subdevice (subdevice 3) is probably broken for all boards
39 except maybe the 6514.
44 Manuals (available from ftp://ftp.natinst.com/support/manuals)
46 370106b.pdf 6514 Register Level Programmer Manual
53 #include <linux/interrupt.h>
54 #include "../comedidev.h"
58 #define NI6514_DIO_SIZE 4096
59 #define NI6514_MITE_SIZE 4096
61 #define NI_65XX_MAX_NUM_PORTS 12
62 static const unsigned ni_65xx_channels_per_port
= 8;
63 static const unsigned ni_65xx_port_offset
= 0x10;
65 static inline unsigned Port_Data(unsigned port
)
67 return 0x40 + port
* ni_65xx_port_offset
;
69 static inline unsigned Port_Select(unsigned port
)
71 return 0x41 + port
* ni_65xx_port_offset
;
73 static inline unsigned Rising_Edge_Detection_Enable(unsigned port
)
75 return 0x42 + port
* ni_65xx_port_offset
;
77 static inline unsigned Falling_Edge_Detection_Enable(unsigned port
)
79 return 0x43 + port
* ni_65xx_port_offset
;
81 static inline unsigned Filter_Enable(unsigned port
)
83 return 0x44 + port
* ni_65xx_port_offset
;
86 #define ID_Register 0x00
88 #define Clear_Register 0x01
90 #define ClrOverflow 0x04
92 #define Filter_Interval 0x08
94 #define Change_Status 0x02
95 #define MasterInterruptStatus 0x04
97 #define EdgeStatus 0x01
99 #define Master_Interrupt_Control 0x03
100 #define FallingEdgeIntEnable 0x10
101 #define RisingEdgeIntEnable 0x08
102 #define MasterInterruptEnable 0x04
103 #define OverflowIntEnable 0x02
104 #define EdgeIntEnable 0x01
106 static int ni_65xx_attach(struct comedi_device
*dev
, struct comedi_devconfig
*it
);
107 static int ni_65xx_detach(struct comedi_device
*dev
);
108 static struct comedi_driver driver_ni_65xx
= {
109 .driver_name
= "ni_65xx",
110 .module
= THIS_MODULE
,
111 .attach
= ni_65xx_attach
,
112 .detach
= ni_65xx_detach
,
115 struct ni_65xx_board
{
119 unsigned num_dio_ports
;
120 unsigned num_di_ports
;
121 unsigned num_do_ports
;
122 unsigned invert_outputs
:1;
125 static const struct ni_65xx_board ni_65xx_boards
[] = {
130 .invert_outputs
= 0},
135 .invert_outputs
= 0},
160 .invert_outputs
= 1},
165 .invert_outputs
= 1},
171 .invert_outputs
= 1},
177 .invert_outputs
= 1},
183 .invert_outputs
= 1},
189 .invert_outputs
= 1},
194 .invert_outputs
= 1},
199 .invert_outputs
= 1},
205 .invert_outputs
= 1},
211 .invert_outputs
= 1},
244 #define n_ni_65xx_boards (sizeof(ni_65xx_boards)/sizeof(ni_65xx_boards[0]))
245 static inline const struct ni_65xx_board
*board(struct comedi_device
* dev
)
247 return dev
->board_ptr
;
249 static inline unsigned ni_65xx_port_by_channel(unsigned channel
)
251 return channel
/ ni_65xx_channels_per_port
;
253 static inline unsigned ni_65xx_total_num_ports(const struct ni_65xx_board
*board
)
255 return board
->num_dio_ports
+ board
->num_di_ports
+ board
->num_do_ports
;
258 static DEFINE_PCI_DEVICE_TABLE(ni_65xx_pci_table
) = {
259 {PCI_VENDOR_ID_NATINST
, 0x1710, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
260 {PCI_VENDOR_ID_NATINST
, 0x7085, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
261 {PCI_VENDOR_ID_NATINST
, 0x7086, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
262 {PCI_VENDOR_ID_NATINST
, 0x7087, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
263 {PCI_VENDOR_ID_NATINST
, 0x7088, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
264 {PCI_VENDOR_ID_NATINST
, 0x70a9, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
265 {PCI_VENDOR_ID_NATINST
, 0x70c3, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
266 {PCI_VENDOR_ID_NATINST
, 0x70c8, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
267 {PCI_VENDOR_ID_NATINST
, 0x70c9, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
268 {PCI_VENDOR_ID_NATINST
, 0x70cc, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
269 {PCI_VENDOR_ID_NATINST
, 0x70CD, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
270 {PCI_VENDOR_ID_NATINST
, 0x70d1, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
271 {PCI_VENDOR_ID_NATINST
, 0x70d2, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
272 {PCI_VENDOR_ID_NATINST
, 0x70d3, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
273 {PCI_VENDOR_ID_NATINST
, 0x7124, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
274 {PCI_VENDOR_ID_NATINST
, 0x7125, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
275 {PCI_VENDOR_ID_NATINST
, 0x7126, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
276 {PCI_VENDOR_ID_NATINST
, 0x7127, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
277 {PCI_VENDOR_ID_NATINST
, 0x7128, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
278 {PCI_VENDOR_ID_NATINST
, 0x718b, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
279 {PCI_VENDOR_ID_NATINST
, 0x718c, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
280 {PCI_VENDOR_ID_NATINST
, 0x71c5, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
284 MODULE_DEVICE_TABLE(pci
, ni_65xx_pci_table
);
286 struct ni_65xx_private
{
287 struct mite_struct
*mite
;
288 unsigned int filter_interval
;
289 unsigned short filter_enable
[NI_65XX_MAX_NUM_PORTS
];
290 unsigned short output_bits
[NI_65XX_MAX_NUM_PORTS
];
291 unsigned short dio_direction
[NI_65XX_MAX_NUM_PORTS
];
294 static inline struct ni_65xx_private
*private(struct comedi_device
* dev
)
299 struct ni_65xx_subdevice_private
{
303 static inline struct ni_65xx_subdevice_private
*sprivate(struct comedi_subdevice
* subdev
)
305 return subdev
->private;
307 static struct ni_65xx_subdevice_private
*ni_65xx_alloc_subdevice_private(void)
309 struct ni_65xx_subdevice_private
*subdev_private
=
310 kzalloc(sizeof(struct ni_65xx_subdevice_private
), GFP_KERNEL
);
311 if (subdev_private
== NULL
)
313 return subdev_private
;
316 static int ni_65xx_find_device(struct comedi_device
*dev
, int bus
, int slot
);
318 static int ni_65xx_config_filter(struct comedi_device
*dev
, struct comedi_subdevice
*s
,
319 struct comedi_insn
*insn
, unsigned int *data
)
321 const unsigned chan
= CR_CHAN(insn
->chanspec
);
322 const unsigned port
=
323 sprivate(s
)->base_port
+ ni_65xx_port_by_channel(chan
);
325 if (data
[0] != INSN_CONFIG_FILTER
)
328 static const unsigned filter_resolution_ns
= 200;
329 static const unsigned max_filter_interval
= 0xfffff;
332 (filter_resolution_ns
/ 2)) / filter_resolution_ns
;
333 if (interval
> max_filter_interval
)
334 interval
= max_filter_interval
;
335 data
[1] = interval
* filter_resolution_ns
;
337 if (interval
!= private(dev
)->filter_interval
) {
339 private(dev
)->mite
->daq_io_addr
+
341 private(dev
)->filter_interval
= interval
;
344 private(dev
)->filter_enable
[port
] |=
345 1 << (chan
% ni_65xx_channels_per_port
);
347 private(dev
)->filter_enable
[port
] &=
348 ~(1 << (chan
% ni_65xx_channels_per_port
));
351 writeb(private(dev
)->filter_enable
[port
],
352 private(dev
)->mite
->daq_io_addr
+ Filter_Enable(port
));
357 static int ni_65xx_dio_insn_config(struct comedi_device
*dev
, struct comedi_subdevice
*s
,
358 struct comedi_insn
*insn
, unsigned int *data
)
364 port
= sprivate(s
)->base_port
+
365 ni_65xx_port_by_channel(CR_CHAN(insn
->chanspec
));
367 case INSN_CONFIG_FILTER
:
368 return ni_65xx_config_filter(dev
, s
, insn
, data
);
370 case INSN_CONFIG_DIO_OUTPUT
:
371 if (s
->type
!= COMEDI_SUBD_DIO
)
373 private(dev
)->dio_direction
[port
] = COMEDI_OUTPUT
;
374 writeb(0, private(dev
)->mite
->daq_io_addr
+ Port_Select(port
));
377 case INSN_CONFIG_DIO_INPUT
:
378 if (s
->type
!= COMEDI_SUBD_DIO
)
380 private(dev
)->dio_direction
[port
] = COMEDI_INPUT
;
381 writeb(1, private(dev
)->mite
->daq_io_addr
+ Port_Select(port
));
384 case INSN_CONFIG_DIO_QUERY
:
385 if (s
->type
!= COMEDI_SUBD_DIO
)
387 data
[1] = private(dev
)->dio_direction
[port
];
396 static int ni_65xx_dio_insn_bits(struct comedi_device
*dev
, struct comedi_subdevice
*s
,
397 struct comedi_insn
*insn
, unsigned int *data
)
399 unsigned base_bitfield_channel
;
400 const unsigned max_ports_per_bitfield
= 5;
401 unsigned read_bits
= 0;
405 base_bitfield_channel
= CR_CHAN(insn
->chanspec
);
406 for (j
= 0; j
< max_ports_per_bitfield
; ++j
) {
407 const unsigned port
=
408 sprivate(s
)->base_port
+
409 ni_65xx_port_by_channel(base_bitfield_channel
) + j
;
410 unsigned base_port_channel
;
411 unsigned port_mask
, port_data
, port_read_bits
;
413 if (port
>= ni_65xx_total_num_ports(board(dev
)))
415 base_port_channel
= port
* ni_65xx_channels_per_port
;
418 bitshift
= base_port_channel
- base_bitfield_channel
;
419 if (bitshift
>= 32 || bitshift
<= -32)
422 port_mask
>>= bitshift
;
423 port_data
>>= bitshift
;
425 port_mask
<<= -bitshift
;
426 port_data
<<= -bitshift
;
432 private(dev
)->output_bits
[port
] &= ~port_mask
;
433 private(dev
)->output_bits
[port
] |=
434 port_data
& port_mask
;
435 bits
= private(dev
)->output_bits
[port
];
436 if (board(dev
)->invert_outputs
)
439 private(dev
)->mite
->daq_io_addr
+
441 /* printk("wrote 0x%x to port %i\n", bits, port); */
444 readb(private(dev
)->mite
->daq_io_addr
+
446 /* printk("read 0x%x from port %i\n", port_read_bits, port); */
448 port_read_bits
<<= bitshift
;
450 port_read_bits
>>= -bitshift
;
452 read_bits
|= port_read_bits
;
458 static irqreturn_t
ni_65xx_interrupt(int irq
, void *d
)
460 struct comedi_device
*dev
= d
;
461 struct comedi_subdevice
*s
= dev
->subdevices
+ 2;
464 status
= readb(private(dev
)->mite
->daq_io_addr
+ Change_Status
);
465 if ((status
& MasterInterruptStatus
) == 0)
467 if ((status
& EdgeStatus
) == 0)
470 writeb(ClrEdge
| ClrOverflow
,
471 private(dev
)->mite
->daq_io_addr
+ Clear_Register
);
473 comedi_buf_put(s
->async
, 0);
474 s
->async
->events
|= COMEDI_CB_EOS
;
475 comedi_event(dev
, s
);
479 static int ni_65xx_intr_cmdtest(struct comedi_device
*dev
, struct comedi_subdevice
*s
,
480 struct comedi_cmd
*cmd
)
485 /* step 1: make sure trigger sources are trivially valid */
487 tmp
= cmd
->start_src
;
488 cmd
->start_src
&= TRIG_NOW
;
489 if (!cmd
->start_src
|| tmp
!= cmd
->start_src
)
492 tmp
= cmd
->scan_begin_src
;
493 cmd
->scan_begin_src
&= TRIG_OTHER
;
494 if (!cmd
->scan_begin_src
|| tmp
!= cmd
->scan_begin_src
)
497 tmp
= cmd
->convert_src
;
498 cmd
->convert_src
&= TRIG_FOLLOW
;
499 if (!cmd
->convert_src
|| tmp
!= cmd
->convert_src
)
502 tmp
= cmd
->scan_end_src
;
503 cmd
->scan_end_src
&= TRIG_COUNT
;
504 if (!cmd
->scan_end_src
|| tmp
!= cmd
->scan_end_src
)
508 cmd
->stop_src
&= TRIG_COUNT
;
509 if (!cmd
->stop_src
|| tmp
!= cmd
->stop_src
)
515 /* step 2: make sure trigger sources are unique and mutually compatible */
520 /* step 3: make sure arguments are trivially compatible */
522 if (cmd
->start_arg
!= 0) {
526 if (cmd
->scan_begin_arg
!= 0) {
527 cmd
->scan_begin_arg
= 0;
530 if (cmd
->convert_arg
!= 0) {
531 cmd
->convert_arg
= 0;
535 if (cmd
->scan_end_arg
!= 1) {
536 cmd
->scan_end_arg
= 1;
539 if (cmd
->stop_arg
!= 0) {
547 /* step 4: fix up any arguments */
555 static int ni_65xx_intr_cmd(struct comedi_device
*dev
, struct comedi_subdevice
*s
)
557 /* struct comedi_cmd *cmd = &s->async->cmd; */
559 writeb(ClrEdge
| ClrOverflow
,
560 private(dev
)->mite
->daq_io_addr
+ Clear_Register
);
561 writeb(FallingEdgeIntEnable
| RisingEdgeIntEnable
|
562 MasterInterruptEnable
| EdgeIntEnable
,
563 private(dev
)->mite
->daq_io_addr
+ Master_Interrupt_Control
);
568 static int ni_65xx_intr_cancel(struct comedi_device
*dev
, struct comedi_subdevice
*s
)
571 private(dev
)->mite
->daq_io_addr
+ Master_Interrupt_Control
);
576 static int ni_65xx_intr_insn_bits(struct comedi_device
*dev
, struct comedi_subdevice
*s
,
577 struct comedi_insn
*insn
, unsigned int *data
)
586 static int ni_65xx_intr_insn_config(struct comedi_device
*dev
, struct comedi_subdevice
*s
,
587 struct comedi_insn
*insn
, unsigned int *data
)
591 if (data
[0] != INSN_CONFIG_CHANGE_NOTIFY
)
595 private(dev
)->mite
->daq_io_addr
+
596 Rising_Edge_Detection_Enable(0));
598 private(dev
)->mite
->daq_io_addr
+
599 Rising_Edge_Detection_Enable(0x10));
600 writeb(data
[1] >> 16,
601 private(dev
)->mite
->daq_io_addr
+
602 Rising_Edge_Detection_Enable(0x20));
603 writeb(data
[1] >> 24,
604 private(dev
)->mite
->daq_io_addr
+
605 Rising_Edge_Detection_Enable(0x30));
608 private(dev
)->mite
->daq_io_addr
+
609 Falling_Edge_Detection_Enable(0));
611 private(dev
)->mite
->daq_io_addr
+
612 Falling_Edge_Detection_Enable(0x10));
613 writeb(data
[2] >> 16,
614 private(dev
)->mite
->daq_io_addr
+
615 Falling_Edge_Detection_Enable(0x20));
616 writeb(data
[2] >> 24,
617 private(dev
)->mite
->daq_io_addr
+
618 Falling_Edge_Detection_Enable(0x30));
623 static int ni_65xx_attach(struct comedi_device
*dev
, struct comedi_devconfig
*it
)
625 struct comedi_subdevice
*s
;
629 printk("comedi%d: ni_65xx:", dev
->minor
);
631 ret
= alloc_private(dev
, sizeof(struct ni_65xx_private
));
635 ret
= ni_65xx_find_device(dev
, it
->options
[0], it
->options
[1]);
639 ret
= mite_setup(private(dev
)->mite
);
641 printk("error setting up mite\n");
645 dev
->board_name
= board(dev
)->name
;
646 dev
->irq
= mite_irq(private(dev
)->mite
);
647 printk(" %s", dev
->board_name
);
650 readb(private(dev
)->mite
->daq_io_addr
+ ID_Register
));
652 ret
= alloc_subdevices(dev
, 4);
656 s
= dev
->subdevices
+ 0;
657 if (board(dev
)->num_di_ports
) {
658 s
->type
= COMEDI_SUBD_DI
;
659 s
->subdev_flags
= SDF_READABLE
;
661 board(dev
)->num_di_ports
* ni_65xx_channels_per_port
;
662 s
->range_table
= &range_digital
;
664 s
->insn_config
= ni_65xx_dio_insn_config
;
665 s
->insn_bits
= ni_65xx_dio_insn_bits
;
666 s
->private = ni_65xx_alloc_subdevice_private();
667 if (s
->private == NULL
)
669 sprivate(s
)->base_port
= 0;
671 s
->type
= COMEDI_SUBD_UNUSED
;
674 s
= dev
->subdevices
+ 1;
675 if (board(dev
)->num_do_ports
) {
676 s
->type
= COMEDI_SUBD_DO
;
677 s
->subdev_flags
= SDF_READABLE
| SDF_WRITABLE
;
679 board(dev
)->num_do_ports
* ni_65xx_channels_per_port
;
680 s
->range_table
= &range_digital
;
682 s
->insn_bits
= ni_65xx_dio_insn_bits
;
683 s
->private = ni_65xx_alloc_subdevice_private();
684 if (s
->private == NULL
)
686 sprivate(s
)->base_port
= board(dev
)->num_di_ports
;
688 s
->type
= COMEDI_SUBD_UNUSED
;
691 s
= dev
->subdevices
+ 2;
692 if (board(dev
)->num_dio_ports
) {
693 s
->type
= COMEDI_SUBD_DIO
;
694 s
->subdev_flags
= SDF_READABLE
| SDF_WRITABLE
;
696 board(dev
)->num_dio_ports
* ni_65xx_channels_per_port
;
697 s
->range_table
= &range_digital
;
699 s
->insn_config
= ni_65xx_dio_insn_config
;
700 s
->insn_bits
= ni_65xx_dio_insn_bits
;
701 s
->private = ni_65xx_alloc_subdevice_private();
702 if (s
->private == NULL
)
704 sprivate(s
)->base_port
= 0;
705 for (i
= 0; i
< board(dev
)->num_dio_ports
; ++i
) {
706 /* configure all ports for input */
708 private(dev
)->mite
->daq_io_addr
+
712 s
->type
= COMEDI_SUBD_UNUSED
;
715 s
= dev
->subdevices
+ 3;
716 dev
->read_subdev
= s
;
717 s
->type
= COMEDI_SUBD_DI
;
718 s
->subdev_flags
= SDF_READABLE
| SDF_CMD_READ
;
720 s
->range_table
= &range_unknown
;
722 s
->do_cmdtest
= ni_65xx_intr_cmdtest
;
723 s
->do_cmd
= ni_65xx_intr_cmd
;
724 s
->cancel
= ni_65xx_intr_cancel
;
725 s
->insn_bits
= ni_65xx_intr_insn_bits
;
726 s
->insn_config
= ni_65xx_intr_insn_config
;
728 for (i
= 0; i
< ni_65xx_total_num_ports(board(dev
)); ++i
) {
730 private(dev
)->mite
->daq_io_addr
+ Filter_Enable(i
));
731 if (board(dev
)->invert_outputs
)
733 private(dev
)->mite
->daq_io_addr
+ Port_Data(i
));
736 private(dev
)->mite
->daq_io_addr
+ Port_Data(i
));
738 writeb(ClrEdge
| ClrOverflow
,
739 private(dev
)->mite
->daq_io_addr
+ Clear_Register
);
741 private(dev
)->mite
->daq_io_addr
+ Master_Interrupt_Control
);
743 /* Set filter interval to 0 (32bit reg) */
744 writeb(0x00000000, private(dev
)->mite
->daq_io_addr
+ Filter_Interval
);
746 ret
= request_irq(dev
->irq
, ni_65xx_interrupt
, IRQF_SHARED
,
750 printk(" irq not available");
758 static int ni_65xx_detach(struct comedi_device
*dev
)
760 if (private(dev
) && private(dev
)->mite
761 && private(dev
)->mite
->daq_io_addr
) {
763 private(dev
)->mite
->daq_io_addr
+
764 Master_Interrupt_Control
);
768 free_irq(dev
->irq
, dev
);
773 for (i
= 0; i
< dev
->n_subdevices
; ++i
) {
774 if (dev
->subdevices
[i
].private) {
775 kfree(dev
->subdevices
[i
].private);
776 dev
->subdevices
[i
].private = NULL
;
779 if (private(dev
)->mite
) {
780 mite_unsetup(private(dev
)->mite
);
786 static int ni_65xx_find_device(struct comedi_device
*dev
, int bus
, int slot
)
788 struct mite_struct
*mite
;
791 for (mite
= mite_devices
; mite
; mite
= mite
->next
) {
795 if (bus
!= mite
->pcidev
->bus
->number
||
796 slot
!= PCI_SLOT(mite
->pcidev
->devfn
))
799 for (i
= 0; i
< n_ni_65xx_boards
; i
++) {
800 if (mite_device_id(mite
) == ni_65xx_boards
[i
].dev_id
) {
801 dev
->board_ptr
= ni_65xx_boards
+ i
;
802 private(dev
)->mite
= mite
;
807 printk("no device found\n");
812 COMEDI_PCI_INITCLEANUP(driver_ni_65xx
, ni_65xx_pci_table
);