Linux-2.6.12-rc2
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / include / asm-mips / sibyte / sb1250_ldt.h
blobd8753885df1727ca5f5ae753b72413aeadc2d064
1 /* *********************************************************************
2 * SB1250 Board Support Package
3 *
4 * LDT constants File: sb1250_ldt.h
5 *
6 * This module contains constants and macros to describe
7 * the LDT interface on the SB1250.
8 *
9 * SB1250 specification level: User's manual 1/02/02
11 * Author: Mitch Lichtenberg
13 *********************************************************************
15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved.
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA
32 ********************************************************************* */
35 #ifndef _SB1250_LDT_H
36 #define _SB1250_LDT_H
38 #include "sb1250_defs.h"
40 #define K_LDT_VENDOR_SIBYTE 0x166D
41 #define K_LDT_DEVICE_SB1250 0x0002
44 * LDT Interface Type 1 (bridge) configuration header
47 #define R_LDT_TYPE1_DEVICEID 0x0000
48 #define R_LDT_TYPE1_CMDSTATUS 0x0004
49 #define R_LDT_TYPE1_CLASSREV 0x0008
50 #define R_LDT_TYPE1_DEVHDR 0x000C
51 #define R_LDT_TYPE1_BAR0 0x0010 /* not used */
52 #define R_LDT_TYPE1_BAR1 0x0014 /* not used */
54 #define R_LDT_TYPE1_BUSID 0x0018 /* bus ID register */
55 #define R_LDT_TYPE1_SECSTATUS 0x001C /* secondary status / I/O base/limit */
56 #define R_LDT_TYPE1_MEMLIMIT 0x0020
57 #define R_LDT_TYPE1_PREFETCH 0x0024
58 #define R_LDT_TYPE1_PREF_BASE 0x0028
59 #define R_LDT_TYPE1_PREF_LIMIT 0x002C
60 #define R_LDT_TYPE1_IOLIMIT 0x0030
61 #define R_LDT_TYPE1_CAPPTR 0x0034
62 #define R_LDT_TYPE1_ROMADDR 0x0038
63 #define R_LDT_TYPE1_BRCTL 0x003C
64 #define R_LDT_TYPE1_CMD 0x0040
65 #define R_LDT_TYPE1_LINKCTRL 0x0044
66 #define R_LDT_TYPE1_LINKFREQ 0x0048
67 #define R_LDT_TYPE1_RESERVED1 0x004C
68 #define R_LDT_TYPE1_SRICMD 0x0050
69 #define R_LDT_TYPE1_SRITXNUM 0x0054
70 #define R_LDT_TYPE1_SRIRXNUM 0x0058
71 #define R_LDT_TYPE1_ERRSTATUS 0x0068
72 #define R_LDT_TYPE1_SRICTRL 0x006C
73 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
74 #define R_LDT_TYPE1_ADDSTATUS 0x0070
75 #endif /* 1250 PASS2 || 112x PASS1 */
76 #define R_LDT_TYPE1_TXBUFCNT 0x00C8
77 #define R_LDT_TYPE1_EXPCRC 0x00DC
78 #define R_LDT_TYPE1_RXCRC 0x00F0
82 * LDT Device ID register
85 #define S_LDT_DEVICEID_VENDOR 0
86 #define M_LDT_DEVICEID_VENDOR _SB_MAKEMASK_32(16,S_LDT_DEVICEID_VENDOR)
87 #define V_LDT_DEVICEID_VENDOR(x) _SB_MAKEVALUE_32(x,S_LDT_DEVICEID_VENDOR)
88 #define G_LDT_DEVICEID_VENDOR(x) _SB_GETVALUE_32(x,S_LDT_DEVICEID_VENDOR,M_LDT_DEVICEID_VENDOR)
90 #define S_LDT_DEVICEID_DEVICEID 16
91 #define M_LDT_DEVICEID_DEVICEID _SB_MAKEMASK_32(16,S_LDT_DEVICEID_DEVICEID)
92 #define V_LDT_DEVICEID_DEVICEID(x) _SB_MAKEVALUE_32(x,S_LDT_DEVICEID_DEVICEID)
93 #define G_LDT_DEVICEID_DEVICEID(x) _SB_GETVALUE_32(x,S_LDT_DEVICEID_DEVICEID,M_LDT_DEVICEID_DEVICEID)
97 * LDT Command Register (Table 8-13)
100 #define M_LDT_CMD_IOSPACE_EN _SB_MAKEMASK1_32(0)
101 #define M_LDT_CMD_MEMSPACE_EN _SB_MAKEMASK1_32(1)
102 #define M_LDT_CMD_MASTER_EN _SB_MAKEMASK1_32(2)
103 #define M_LDT_CMD_SPECCYC_EN _SB_MAKEMASK1_32(3)
104 #define M_LDT_CMD_MEMWRINV_EN _SB_MAKEMASK1_32(4)
105 #define M_LDT_CMD_VGAPALSNP_EN _SB_MAKEMASK1_32(5)
106 #define M_LDT_CMD_PARERRRESP _SB_MAKEMASK1_32(6)
107 #define M_LDT_CMD_WAITCYCCTRL _SB_MAKEMASK1_32(7)
108 #define M_LDT_CMD_SERR_EN _SB_MAKEMASK1_32(8)
109 #define M_LDT_CMD_FASTB2B_EN _SB_MAKEMASK1_32(9)
112 * LDT class and revision registers
115 #define S_LDT_CLASSREV_REV 0
116 #define M_LDT_CLASSREV_REV _SB_MAKEMASK_32(8,S_LDT_CLASSREV_REV)
117 #define V_LDT_CLASSREV_REV(x) _SB_MAKEVALUE_32(x,S_LDT_CLASSREV_REV)
118 #define G_LDT_CLASSREV_REV(x) _SB_GETVALUE_32(x,S_LDT_CLASSREV_REV,M_LDT_CLASSREV_REV)
120 #define S_LDT_CLASSREV_CLASS 8
121 #define M_LDT_CLASSREV_CLASS _SB_MAKEMASK_32(24,S_LDT_CLASSREV_CLASS)
122 #define V_LDT_CLASSREV_CLASS(x) _SB_MAKEVALUE_32(x,S_LDT_CLASSREV_CLASS)
123 #define G_LDT_CLASSREV_CLASS(x) _SB_GETVALUE_32(x,S_LDT_CLASSREV_CLASS,M_LDT_CLASSREV_CLASS)
125 #define K_LDT_REV 0x01
126 #define K_LDT_CLASS 0x060000
129 * Device Header (offset 0x0C)
132 #define S_LDT_DEVHDR_CLINESZ 0
133 #define M_LDT_DEVHDR_CLINESZ _SB_MAKEMASK_32(8,S_LDT_DEVHDR_CLINESZ)
134 #define V_LDT_DEVHDR_CLINESZ(x) _SB_MAKEVALUE_32(x,S_LDT_DEVHDR_CLINESZ)
135 #define G_LDT_DEVHDR_CLINESZ(x) _SB_GETVALUE_32(x,S_LDT_DEVHDR_CLINESZ,M_LDT_DEVHDR_CLINESZ)
137 #define S_LDT_DEVHDR_LATTMR 8
138 #define M_LDT_DEVHDR_LATTMR _SB_MAKEMASK_32(8,S_LDT_DEVHDR_LATTMR)
139 #define V_LDT_DEVHDR_LATTMR(x) _SB_MAKEVALUE_32(x,S_LDT_DEVHDR_LATTMR)
140 #define G_LDT_DEVHDR_LATTMR(x) _SB_GETVALUE_32(x,S_LDT_DEVHDR_LATTMR,M_LDT_DEVHDR_LATTMR)
142 #define S_LDT_DEVHDR_HDRTYPE 16
143 #define M_LDT_DEVHDR_HDRTYPE _SB_MAKEMASK_32(8,S_LDT_DEVHDR_HDRTYPE)
144 #define V_LDT_DEVHDR_HDRTYPE(x) _SB_MAKEVALUE_32(x,S_LDT_DEVHDR_HDRTYPE)
145 #define G_LDT_DEVHDR_HDRTYPE(x) _SB_GETVALUE_32(x,S_LDT_DEVHDR_HDRTYPE,M_LDT_DEVHDR_HDRTYPE)
147 #define K_LDT_DEVHDR_HDRTYPE_TYPE1 1
149 #define S_LDT_DEVHDR_BIST 24
150 #define M_LDT_DEVHDR_BIST _SB_MAKEMASK_32(8,S_LDT_DEVHDR_BIST)
151 #define V_LDT_DEVHDR_BIST(x) _SB_MAKEVALUE_32(x,S_LDT_DEVHDR_BIST)
152 #define G_LDT_DEVHDR_BIST(x) _SB_GETVALUE_32(x,S_LDT_DEVHDR_BIST,M_LDT_DEVHDR_BIST)
157 * LDT Status Register (Table 8-14). Note that these constants
158 * assume you've read the command and status register
159 * together (32-bit read at offset 0x04)
161 * These bits also apply to the secondary status
162 * register (Table 8-15), offset 0x1C
165 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
166 #define M_LDT_STATUS_VGAEN _SB_MAKEMASK1_32(3)
167 #endif /* 1250 PASS2 || 112x PASS1 */
168 #define M_LDT_STATUS_CAPLIST _SB_MAKEMASK1_32(20)
169 #define M_LDT_STATUS_66MHZCAP _SB_MAKEMASK1_32(21)
170 #define M_LDT_STATUS_RESERVED2 _SB_MAKEMASK1_32(22)
171 #define M_LDT_STATUS_FASTB2BCAP _SB_MAKEMASK1_32(23)
172 #define M_LDT_STATUS_MSTRDPARERR _SB_MAKEMASK1_32(24)
174 #define S_LDT_STATUS_DEVSELTIMING 25
175 #define M_LDT_STATUS_DEVSELTIMING _SB_MAKEMASK_32(2,S_LDT_STATUS_DEVSELTIMING)
176 #define V_LDT_STATUS_DEVSELTIMING(x) _SB_MAKEVALUE_32(x,S_LDT_STATUS_DEVSELTIMING)
177 #define G_LDT_STATUS_DEVSELTIMING(x) _SB_GETVALUE_32(x,S_LDT_STATUS_DEVSELTIMING,M_LDT_STATUS_DEVSELTIMING)
179 #define M_LDT_STATUS_SIGDTGTABORT _SB_MAKEMASK1_32(27)
180 #define M_LDT_STATUS_RCVDTGTABORT _SB_MAKEMASK1_32(28)
181 #define M_LDT_STATUS_RCVDMSTRABORT _SB_MAKEMASK1_32(29)
182 #define M_LDT_STATUS_SIGDSERR _SB_MAKEMASK1_32(30)
183 #define M_LDT_STATUS_DETPARERR _SB_MAKEMASK1_32(31)
186 * Bridge Control Register (Table 8-16). Note that these
187 * constants assume you've read the register as a 32-bit
188 * read (offset 0x3C)
191 #define M_LDT_BRCTL_PARERRRESP_EN _SB_MAKEMASK1_32(16)
192 #define M_LDT_BRCTL_SERR_EN _SB_MAKEMASK1_32(17)
193 #define M_LDT_BRCTL_ISA_EN _SB_MAKEMASK1_32(18)
194 #define M_LDT_BRCTL_VGA_EN _SB_MAKEMASK1_32(19)
195 #define M_LDT_BRCTL_MSTRABORTMODE _SB_MAKEMASK1_32(21)
196 #define M_LDT_BRCTL_SECBUSRESET _SB_MAKEMASK1_32(22)
197 #define M_LDT_BRCTL_FASTB2B_EN _SB_MAKEMASK1_32(23)
198 #define M_LDT_BRCTL_PRIDISCARD _SB_MAKEMASK1_32(24)
199 #define M_LDT_BRCTL_SECDISCARD _SB_MAKEMASK1_32(25)
200 #define M_LDT_BRCTL_DISCARDSTAT _SB_MAKEMASK1_32(26)
201 #define M_LDT_BRCTL_DISCARDSERR_EN _SB_MAKEMASK1_32(27)
204 * LDT Command Register (Table 8-17). Note that these constants
205 * assume you've read the command and status register together
206 * 32-bit read at offset 0x40
209 #define M_LDT_CMD_WARMRESET _SB_MAKEMASK1_32(16)
210 #define M_LDT_CMD_DOUBLEENDED _SB_MAKEMASK1_32(17)
212 #define S_LDT_CMD_CAPTYPE 29
213 #define M_LDT_CMD_CAPTYPE _SB_MAKEMASK_32(3,S_LDT_CMD_CAPTYPE)
214 #define V_LDT_CMD_CAPTYPE(x) _SB_MAKEVALUE_32(x,S_LDT_CMD_CAPTYPE)
215 #define G_LDT_CMD_CAPTYPE(x) _SB_GETVALUE_32(x,S_LDT_CMD_CAPTYPE,M_LDT_CMD_CAPTYPE)
218 * LDT link control register (Table 8-18), and (Table 8-19)
221 #define M_LDT_LINKCTRL_CAPSYNCFLOOD_EN _SB_MAKEMASK1_32(1)
222 #define M_LDT_LINKCTRL_CRCSTARTTEST _SB_MAKEMASK1_32(2)
223 #define M_LDT_LINKCTRL_CRCFORCEERR _SB_MAKEMASK1_32(3)
224 #define M_LDT_LINKCTRL_LINKFAIL _SB_MAKEMASK1_32(4)
225 #define M_LDT_LINKCTRL_INITDONE _SB_MAKEMASK1_32(5)
226 #define M_LDT_LINKCTRL_EOC _SB_MAKEMASK1_32(6)
227 #define M_LDT_LINKCTRL_XMITOFF _SB_MAKEMASK1_32(7)
229 #define S_LDT_LINKCTRL_CRCERR 8
230 #define M_LDT_LINKCTRL_CRCERR _SB_MAKEMASK_32(4,S_LDT_LINKCTRL_CRCERR)
231 #define V_LDT_LINKCTRL_CRCERR(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_CRCERR)
232 #define G_LDT_LINKCTRL_CRCERR(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_CRCERR,M_LDT_LINKCTRL_CRCERR)
234 #define S_LDT_LINKCTRL_MAXIN 16
235 #define M_LDT_LINKCTRL_MAXIN _SB_MAKEMASK_32(3,S_LDT_LINKCTRL_MAXIN)
236 #define V_LDT_LINKCTRL_MAXIN(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_MAXIN)
237 #define G_LDT_LINKCTRL_MAXIN(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_MAXIN,M_LDT_LINKCTRL_MAXIN)
239 #define M_LDT_LINKCTRL_DWFCLN _SB_MAKEMASK1_32(19)
241 #define S_LDT_LINKCTRL_MAXOUT 20
242 #define M_LDT_LINKCTRL_MAXOUT _SB_MAKEMASK_32(3,S_LDT_LINKCTRL_MAXOUT)
243 #define V_LDT_LINKCTRL_MAXOUT(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_MAXOUT)
244 #define G_LDT_LINKCTRL_MAXOUT(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_MAXOUT,M_LDT_LINKCTRL_MAXOUT)
246 #define M_LDT_LINKCTRL_DWFCOUT _SB_MAKEMASK1_32(23)
248 #define S_LDT_LINKCTRL_WIDTHIN 24
249 #define M_LDT_LINKCTRL_WIDTHIN _SB_MAKEMASK_32(3,S_LDT_LINKCTRL_WIDTHIN)
250 #define V_LDT_LINKCTRL_WIDTHIN(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_WIDTHIN)
251 #define G_LDT_LINKCTRL_WIDTHIN(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_WIDTHIN,M_LDT_LINKCTRL_WIDTHIN)
253 #define M_LDT_LINKCTRL_DWFCLIN_EN _SB_MAKEMASK1_32(27)
255 #define S_LDT_LINKCTRL_WIDTHOUT 28
256 #define M_LDT_LINKCTRL_WIDTHOUT _SB_MAKEMASK_32(3,S_LDT_LINKCTRL_WIDTHOUT)
257 #define V_LDT_LINKCTRL_WIDTHOUT(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_WIDTHOUT)
258 #define G_LDT_LINKCTRL_WIDTHOUT(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_WIDTHOUT,M_LDT_LINKCTRL_WIDTHOUT)
260 #define M_LDT_LINKCTRL_DWFCOUT_EN _SB_MAKEMASK1_32(31)
263 * LDT Link frequency register (Table 8-20) offset 0x48
266 #define S_LDT_LINKFREQ_FREQ 8
267 #define M_LDT_LINKFREQ_FREQ _SB_MAKEMASK_32(4,S_LDT_LINKFREQ_FREQ)
268 #define V_LDT_LINKFREQ_FREQ(x) _SB_MAKEVALUE_32(x,S_LDT_LINKFREQ_FREQ)
269 #define G_LDT_LINKFREQ_FREQ(x) _SB_GETVALUE_32(x,S_LDT_LINKFREQ_FREQ,M_LDT_LINKFREQ_FREQ)
271 #define K_LDT_LINKFREQ_200MHZ 0
272 #define K_LDT_LINKFREQ_300MHZ 1
273 #define K_LDT_LINKFREQ_400MHZ 2
274 #define K_LDT_LINKFREQ_500MHZ 3
275 #define K_LDT_LINKFREQ_600MHZ 4
276 #define K_LDT_LINKFREQ_800MHZ 5
277 #define K_LDT_LINKFREQ_1000MHZ 6
280 * LDT SRI Command Register (Table 8-21). Note that these constants
281 * assume you've read the command and status register together
282 * 32-bit read at offset 0x50
285 #define M_LDT_SRICMD_SIPREADY _SB_MAKEMASK1_32(16)
286 #define M_LDT_SRICMD_SYNCPTRCTL _SB_MAKEMASK1_32(17)
287 #define M_LDT_SRICMD_REDUCESYNCZERO _SB_MAKEMASK1_32(18)
288 #if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1)
289 #define M_LDT_SRICMD_DISSTARVATIONCNT _SB_MAKEMASK1_32(19) /* PASS1 */
290 #endif /* up to 1250 PASS1 */
291 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
292 #define M_LDT_SRICMD_DISMULTTXVLD _SB_MAKEMASK1_32(19)
293 #define M_LDT_SRICMD_EXPENDIAN _SB_MAKEMASK1_32(26)
294 #endif /* 1250 PASS2 || 112x PASS1 */
297 #define S_LDT_SRICMD_RXMARGIN 20
298 #define M_LDT_SRICMD_RXMARGIN _SB_MAKEMASK_32(5,S_LDT_SRICMD_RXMARGIN)
299 #define V_LDT_SRICMD_RXMARGIN(x) _SB_MAKEVALUE_32(x,S_LDT_SRICMD_RXMARGIN)
300 #define G_LDT_SRICMD_RXMARGIN(x) _SB_GETVALUE_32(x,S_LDT_SRICMD_RXMARGIN,M_LDT_SRICMD_RXMARGIN)
302 #define M_LDT_SRICMD_LDTPLLCOMPAT _SB_MAKEMASK1_32(25)
304 #define S_LDT_SRICMD_TXINITIALOFFSET 28
305 #define M_LDT_SRICMD_TXINITIALOFFSET _SB_MAKEMASK_32(3,S_LDT_SRICMD_TXINITIALOFFSET)
306 #define V_LDT_SRICMD_TXINITIALOFFSET(x) _SB_MAKEVALUE_32(x,S_LDT_SRICMD_TXINITIALOFFSET)
307 #define G_LDT_SRICMD_TXINITIALOFFSET(x) _SB_GETVALUE_32(x,S_LDT_SRICMD_TXINITIALOFFSET,M_LDT_SRICMD_TXINITIALOFFSET)
309 #define M_LDT_SRICMD_LINKFREQDIRECT _SB_MAKEMASK1_32(31)
312 * LDT Error control and status register (Table 8-22) (Table 8-23)
315 #define M_LDT_ERRCTL_PROTFATAL_EN _SB_MAKEMASK1_32(0)
316 #define M_LDT_ERRCTL_PROTNONFATAL_EN _SB_MAKEMASK1_32(1)
317 #define M_LDT_ERRCTL_PROTSYNCFLOOD_EN _SB_MAKEMASK1_32(2)
318 #define M_LDT_ERRCTL_OVFFATAL_EN _SB_MAKEMASK1_32(3)
319 #define M_LDT_ERRCTL_OVFNONFATAL_EN _SB_MAKEMASK1_32(4)
320 #define M_LDT_ERRCTL_OVFSYNCFLOOD_EN _SB_MAKEMASK1_32(5)
321 #define M_LDT_ERRCTL_EOCNXAFATAL_EN _SB_MAKEMASK1_32(6)
322 #define M_LDT_ERRCTL_EOCNXANONFATAL_EN _SB_MAKEMASK1_32(7)
323 #define M_LDT_ERRCTL_EOCNXASYNCFLOOD_EN _SB_MAKEMASK1_32(8)
324 #define M_LDT_ERRCTL_CRCFATAL_EN _SB_MAKEMASK1_32(9)
325 #define M_LDT_ERRCTL_CRCNONFATAL_EN _SB_MAKEMASK1_32(10)
326 #define M_LDT_ERRCTL_SERRFATAL_EN _SB_MAKEMASK1_32(11)
327 #define M_LDT_ERRCTL_SRCTAGFATAL_EN _SB_MAKEMASK1_32(12)
328 #define M_LDT_ERRCTL_SRCTAGNONFATAL_EN _SB_MAKEMASK1_32(13)
329 #define M_LDT_ERRCTL_SRCTAGSYNCFLOOD_EN _SB_MAKEMASK1_32(14)
330 #define M_LDT_ERRCTL_MAPNXAFATAL_EN _SB_MAKEMASK1_32(15)
331 #define M_LDT_ERRCTL_MAPNXANONFATAL_EN _SB_MAKEMASK1_32(16)
332 #define M_LDT_ERRCTL_MAPNXASYNCFLOOD_EN _SB_MAKEMASK1_32(17)
334 #define M_LDT_ERRCTL_PROTOERR _SB_MAKEMASK1_32(24)
335 #define M_LDT_ERRCTL_OVFERR _SB_MAKEMASK1_32(25)
336 #define M_LDT_ERRCTL_EOCNXAERR _SB_MAKEMASK1_32(26)
337 #define M_LDT_ERRCTL_SRCTAGERR _SB_MAKEMASK1_32(27)
338 #define M_LDT_ERRCTL_MAPNXAERR _SB_MAKEMASK1_32(28)
341 * SRI Control register (Table 8-24, 8-25) Offset 0x6C
344 #define S_LDT_SRICTRL_NEEDRESP 0
345 #define M_LDT_SRICTRL_NEEDRESP _SB_MAKEMASK_32(2,S_LDT_SRICTRL_NEEDRESP)
346 #define V_LDT_SRICTRL_NEEDRESP(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_NEEDRESP)
347 #define G_LDT_SRICTRL_NEEDRESP(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_NEEDRESP,M_LDT_SRICTRL_NEEDRESP)
349 #define S_LDT_SRICTRL_NEEDNPREQ 2
350 #define M_LDT_SRICTRL_NEEDNPREQ _SB_MAKEMASK_32(2,S_LDT_SRICTRL_NEEDNPREQ)
351 #define V_LDT_SRICTRL_NEEDNPREQ(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_NEEDNPREQ)
352 #define G_LDT_SRICTRL_NEEDNPREQ(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_NEEDNPREQ,M_LDT_SRICTRL_NEEDNPREQ)
354 #define S_LDT_SRICTRL_NEEDPREQ 4
355 #define M_LDT_SRICTRL_NEEDPREQ _SB_MAKEMASK_32(2,S_LDT_SRICTRL_NEEDPREQ)
356 #define V_LDT_SRICTRL_NEEDPREQ(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_NEEDPREQ)
357 #define G_LDT_SRICTRL_NEEDPREQ(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_NEEDPREQ,M_LDT_SRICTRL_NEEDPREQ)
359 #define S_LDT_SRICTRL_WANTRESP 8
360 #define M_LDT_SRICTRL_WANTRESP _SB_MAKEMASK_32(2,S_LDT_SRICTRL_WANTRESP)
361 #define V_LDT_SRICTRL_WANTRESP(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_WANTRESP)
362 #define G_LDT_SRICTRL_WANTRESP(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_WANTRESP,M_LDT_SRICTRL_WANTRESP)
364 #define S_LDT_SRICTRL_WANTNPREQ 10
365 #define M_LDT_SRICTRL_WANTNPREQ _SB_MAKEMASK_32(2,S_LDT_SRICTRL_WANTNPREQ)
366 #define V_LDT_SRICTRL_WANTNPREQ(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_WANTNPREQ)
367 #define G_LDT_SRICTRL_WANTNPREQ(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_WANTNPREQ,M_LDT_SRICTRL_WANTNPREQ)
369 #define S_LDT_SRICTRL_WANTPREQ 12
370 #define M_LDT_SRICTRL_WANTPREQ _SB_MAKEMASK_32(2,S_LDT_SRICTRL_WANTPREQ)
371 #define V_LDT_SRICTRL_WANTPREQ(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_WANTPREQ)
372 #define G_LDT_SRICTRL_WANTPREQ(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_WANTPREQ,M_LDT_SRICTRL_WANTPREQ)
374 #define S_LDT_SRICTRL_BUFRELSPACE 16
375 #define M_LDT_SRICTRL_BUFRELSPACE _SB_MAKEMASK_32(4,S_LDT_SRICTRL_BUFRELSPACE)
376 #define V_LDT_SRICTRL_BUFRELSPACE(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_BUFRELSPACE)
377 #define G_LDT_SRICTRL_BUFRELSPACE(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_BUFRELSPACE,M_LDT_SRICTRL_BUFRELSPACE)
380 * LDT SRI Transmit Buffer Count register (Table 8-26)
383 #define S_LDT_TXBUFCNT_PCMD 0
384 #define M_LDT_TXBUFCNT_PCMD _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_PCMD)
385 #define V_LDT_TXBUFCNT_PCMD(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_PCMD)
386 #define G_LDT_TXBUFCNT_PCMD(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_PCMD,M_LDT_TXBUFCNT_PCMD)
388 #define S_LDT_TXBUFCNT_PDATA 4
389 #define M_LDT_TXBUFCNT_PDATA _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_PDATA)
390 #define V_LDT_TXBUFCNT_PDATA(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_PDATA)
391 #define G_LDT_TXBUFCNT_PDATA(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_PDATA,M_LDT_TXBUFCNT_PDATA)
393 #define S_LDT_TXBUFCNT_NPCMD 8
394 #define M_LDT_TXBUFCNT_NPCMD _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_NPCMD)
395 #define V_LDT_TXBUFCNT_NPCMD(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_NPCMD)
396 #define G_LDT_TXBUFCNT_NPCMD(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_NPCMD,M_LDT_TXBUFCNT_NPCMD)
398 #define S_LDT_TXBUFCNT_NPDATA 12
399 #define M_LDT_TXBUFCNT_NPDATA _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_NPDATA)
400 #define V_LDT_TXBUFCNT_NPDATA(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_NPDATA)
401 #define G_LDT_TXBUFCNT_NPDATA(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_NPDATA,M_LDT_TXBUFCNT_NPDATA)
403 #define S_LDT_TXBUFCNT_RCMD 16
404 #define M_LDT_TXBUFCNT_RCMD _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_RCMD)
405 #define V_LDT_TXBUFCNT_RCMD(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_RCMD)
406 #define G_LDT_TXBUFCNT_RCMD(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_RCMD,M_LDT_TXBUFCNT_RCMD)
408 #define S_LDT_TXBUFCNT_RDATA 20
409 #define M_LDT_TXBUFCNT_RDATA _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_RDATA)
410 #define V_LDT_TXBUFCNT_RDATA(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_RDATA)
411 #define G_LDT_TXBUFCNT_RDATA(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_RDATA,M_LDT_TXBUFCNT_RDATA)
413 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
415 * Additional Status Register
418 #define S_LDT_ADDSTATUS_TGTDONE 0
419 #define M_LDT_ADDSTATUS_TGTDONE _SB_MAKEMASK_32(8,S_LDT_ADDSTATUS_TGTDONE)
420 #define V_LDT_ADDSTATUS_TGTDONE(x) _SB_MAKEVALUE_32(x,S_LDT_ADDSTATUS_TGTDONE)
421 #define G_LDT_ADDSTATUS_TGTDONE(x) _SB_GETVALUE_32(x,S_LDT_ADDSTATUS_TGTDONE,M_LDT_ADDSTATUS_TGTDONE)
422 #endif /* 1250 PASS2 || 112x PASS1 */
424 #endif