include/asm-arm/io.h

   1 /*
   2  *  linux/include/asm-arm/io.h
   3  *
   4  *  Copyright (C) 1996-2000 Russell King
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  * Modifications:
  11  *  16-Sep-1996 RMK     Inlined the inx/outx functions & optimised for both
  12  *                      constant addresses and variable addresses.
  13  *  04-Dec-1997 RMK     Moved a lot of this stuff to the new architecture
  14  *                      specific IO header files.
  15  *  27-Mar-1999 PJB     Second parameter of memcpy_toio is const..
  16  *  04-Apr-1999 PJB     Added check_signature.
  17  *  12-Dec-1999 RMK     More cleanups
  18  *  18-Jun-2000 RMK     Removed virt_to_* and friends definitions
  19  *  05-Oct-2004 BJD     Moved memory string functions to use void __iomem
  20  */
  21 #ifndef __ASM_ARM_IO_H
  22 #define __ASM_ARM_IO_H
  23
  24 #ifdef __KERNEL__
  25
  26 #include <linux/types.h>
  27 #include <asm/byteorder.h>
  28 #include <asm/memory.h>
  29 #include <asm/arch/hardware.h>
  30
  31 /*
  32  * ISA I/O bus memory addresses are 1:1 with the physical address.
  33  */
  34 #define isa_virt_to_bus virt_to_phys
  35 #define isa_page_to_bus page_to_phys
  36 #define isa_bus_to_virt phys_to_virt
  37
  38 /*
  39  * Generic IO read/write.  These perform native-endian accesses.  Note
  40  * that some architectures will want to re-define __raw_{read,write}w.
  41  */
  42 extern void __raw_writesb(void __iomem *addr, const void *data, int bytelen);
  43 extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen);
  44 extern void __raw_writesl(void __iomem *addr, const void *data, int longlen);
  45
  46 extern void __raw_readsb(void __iomem *addr, void *data, int bytelen);
  47 extern void __raw_readsw(void __iomem *addr, void *data, int wordlen);
  48 extern void __raw_readsl(void __iomem *addr, void *data, int longlen);
  49
  50 #define __raw_writeb(v,a)       (__chk_io_ptr(a), *(volatile unsigned char __force  *)(a) = (v))
  51 #define __raw_writew(v,a)       (__chk_io_ptr(a), *(volatile unsigned short __force *)(a) = (v))
  52 #define __raw_writel(v,a)       (__chk_io_ptr(a), *(volatile unsigned int __force   *)(a) = (v))
  53
  54 #define __raw_readb(a)          (__chk_io_ptr(a), *(volatile unsigned char __force  *)(a))
  55 #define __raw_readw(a)          (__chk_io_ptr(a), *(volatile unsigned short __force *)(a))
  56 #define __raw_readl(a)          (__chk_io_ptr(a), *(volatile unsigned int __force   *)(a))
  57
  58 /*
  59  * Bad read/write accesses...
  60  */
  61 extern void __readwrite_bug(const char *fn);
  62
  63 /*
  64  * Now, pick up the machine-defined IO definitions
  65  */
  66 #include <asm/arch/io.h>
  67
  68 #ifdef __io_pci
  69 #warning machine class uses buggy __io_pci
  70 #endif
  71 #if defined(__arch_putb) || defined(__arch_putw) || defined(__arch_putl) || \
  72     defined(__arch_getb) || defined(__arch_getw) || defined(__arch_getl)
  73 #warning machine class uses old __arch_putw or __arch_getw
  74 #endif
  75
  76 /*
  77  *  IO port access primitives
  78  *  -------------------------
  79  *
  80  * The ARM doesn't have special IO access instructions; all IO is memory
  81  * mapped.  Note that these are defined to perform little endian accesses
  82  * only.  Their primary purpose is to access PCI and ISA peripherals.
  83  *
  84  * Note that for a big endian machine, this implies that the following
  85  * big endian mode connectivity is in place, as described by numerious
  86  * ARM documents:
  87  *
  88  *    PCI:  D0-D7   D8-D15 D16-D23 D24-D31
  89  *    ARM: D24-D31 D16-D23  D8-D15  D0-D7
  90  *
  91  * The machine specific io.h include defines __io to translate an "IO"
  92  * address to a memory address.
  93  *
  94  * Note that we prevent GCC re-ordering or caching values in expressions
  95  * by introducing sequence points into the in*() definitions.  Note that
  96  * __raw_* do not guarantee this behaviour.
  97  *
  98  * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
  99  */
 100 #ifdef __io
 101 #define outb(v,p)               __raw_writeb(v,__io(p))
 102 #define outw(v,p)               __raw_writew(cpu_to_le16(v),__io(p))
 103 #define outl(v,p)               __raw_writel(cpu_to_le32(v),__io(p))
 104
 105 #define inb(p)  ({ unsigned int __v = __raw_readb(__io(p)); __v; })
 106 #define inw(p)  ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
 107 #define inl(p)  ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
 108
 109 #define outsb(p,d,l)            __raw_writesb(__io(p),d,l)
 110 #define outsw(p,d,l)            __raw_writesw(__io(p),d,l)
 111 #define outsl(p,d,l)            __raw_writesl(__io(p),d,l)
 112
 113 #define insb(p,d,l)             __raw_readsb(__io(p),d,l)
 114 #define insw(p,d,l)             __raw_readsw(__io(p),d,l)
 115 #define insl(p,d,l)             __raw_readsl(__io(p),d,l)
 116 #endif
 117
 118 #define outb_p(val,port)        outb((val),(port))
 119 #define outw_p(val,port)        outw((val),(port))
 120 #define outl_p(val,port)        outl((val),(port))
 121 #define inb_p(port)             inb((port))
 122 #define inw_p(port)             inw((port))
 123 #define inl_p(port)             inl((port))
 124
 125 #define outsb_p(port,from,len)  outsb(port,from,len)
 126 #define outsw_p(port,from,len)  outsw(port,from,len)
 127 #define outsl_p(port,from,len)  outsl(port,from,len)
 128 #define insb_p(port,to,len)     insb(port,to,len)
 129 #define insw_p(port,to,len)     insw(port,to,len)
 130 #define insl_p(port,to,len)     insl(port,to,len)
 131
 132 /*
 133  * String version of IO memory access ops:
 134  */
 135 extern void _memcpy_fromio(void *, void __iomem *, size_t);
 136 extern void _memcpy_toio(void __iomem *, const void *, size_t);
 137 extern void _memset_io(void __iomem *, int, size_t);
 138
 139 #define mmiowb()
 140
 141 /*
 142  *  Memory access primitives
 143  *  ------------------------
 144  *
 145  * These perform PCI memory accesses via an ioremap region.  They don't
 146  * take an address as such, but a cookie.
 147  *
 148  * Again, this are defined to perform little endian accesses.  See the
 149  * IO port primitives for more information.
 150  */
 151 #ifdef __mem_pci
 152 #define readb(c) ({ unsigned int __v = __raw_readb(__mem_pci(c)); __v; })
 153 #define readw(c) ({ unsigned int __v = le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
 154 #define readl(c) ({ unsigned int __v = le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
 155 #define readb_relaxed(addr) readb(addr)
 156 #define readw_relaxed(addr) readw(addr)
 157 #define readl_relaxed(addr) readl(addr)
 158
 159 #define readsb(p,d,l)           __raw_readsb(__mem_pci(p),d,l)
 160 #define readsw(p,d,l)           __raw_readsw(__mem_pci(p),d,l)
 161 #define readsl(p,d,l)           __raw_readsl(__mem_pci(p),d,l)
 162
 163 #define writeb(v,c)             __raw_writeb(v,__mem_pci(c))
 164 #define writew(v,c)             __raw_writew(cpu_to_le16(v),__mem_pci(c))
 165 #define writel(v,c)             __raw_writel(cpu_to_le32(v),__mem_pci(c))
 166
 167 #define writesb(p,d,l)          __raw_writesb(__mem_pci(p),d,l)
 168 #define writesw(p,d,l)          __raw_writesw(__mem_pci(p),d,l)
 169 #define writesl(p,d,l)          __raw_writesl(__mem_pci(p),d,l)
 170
 171 #define memset_io(c,v,l)        _memset_io(__mem_pci(c),(v),(l))
 172 #define memcpy_fromio(a,c,l)    _memcpy_fromio((a),__mem_pci(c),(l))
 173 #define memcpy_toio(c,a,l)      _memcpy_toio(__mem_pci(c),(a),(l))
 174
 175 #define eth_io_copy_and_sum(s,c,l,b) \
 176                                 eth_copy_and_sum((s),__mem_pci(c),(l),(b))
 177
 178 static inline int
 179 check_signature(void __iomem *io_addr, const unsigned char *signature,
 180                 int length)
 181 {
 182         int retval = 0;
 183         do {
 184                 if (readb(io_addr) != *signature)
 185                         goto out;
 186                 io_addr++;
 187                 signature++;
 188                 length--;
 189         } while (length);
 190         retval = 1;
 191 out:
 192         return retval;
 193 }
 194
 195 #elif !defined(readb)
 196
 197 #define readb(c)                        (__readwrite_bug("readb"),0)
 198 #define readw(c)                        (__readwrite_bug("readw"),0)
 199 #define readl(c)                        (__readwrite_bug("readl"),0)
 200 #define writeb(v,c)                     __readwrite_bug("writeb")
 201 #define writew(v,c)                     __readwrite_bug("writew")
 202 #define writel(v,c)                     __readwrite_bug("writel")
 203
 204 #define eth_io_copy_and_sum(s,c,l,b)    __readwrite_bug("eth_io_copy_and_sum")
 205
 206 #define check_signature(io,sig,len)     (0)
 207
 208 #endif  /* __mem_pci */
 209
 210 /*
 211  * If this architecture has ISA IO, then define the isa_read/isa_write
 212  * macros.
 213  */
 214 #ifdef __mem_isa
 215
 216 #define isa_readb(addr)                 __raw_readb(__mem_isa(addr))
 217 #define isa_readw(addr)                 __raw_readw(__mem_isa(addr))
 218 #define isa_readl(addr)                 __raw_readl(__mem_isa(addr))
 219 #define isa_writeb(val,addr)            __raw_writeb(val,__mem_isa(addr))
 220 #define isa_writew(val,addr)            __raw_writew(val,__mem_isa(addr))
 221 #define isa_writel(val,addr)            __raw_writel(val,__mem_isa(addr))
 222 #define isa_memset_io(a,b,c)            _memset_io(__mem_isa(a),(b),(c))
 223 #define isa_memcpy_fromio(a,b,c)        _memcpy_fromio((a),__mem_isa(b),(c))
 224 #define isa_memcpy_toio(a,b,c)          _memcpy_toio(__mem_isa((a)),(b),(c))
 225
 226 #define isa_eth_io_copy_and_sum(a,b,c,d) \
 227                                 eth_copy_and_sum((a),__mem_isa(b),(c),(d))
 228
 229 #else   /* __mem_isa */
 230
 231 #define isa_readb(addr)                 (__readwrite_bug("isa_readb"),0)
 232 #define isa_readw(addr)                 (__readwrite_bug("isa_readw"),0)
 233 #define isa_readl(addr)                 (__readwrite_bug("isa_readl"),0)
 234 #define isa_writeb(val,addr)            __readwrite_bug("isa_writeb")
 235 #define isa_writew(val,addr)            __readwrite_bug("isa_writew")
 236 #define isa_writel(val,addr)            __readwrite_bug("isa_writel")
 237 #define isa_memset_io(a,b,c)            __readwrite_bug("isa_memset_io")
 238 #define isa_memcpy_fromio(a,b,c)        __readwrite_bug("isa_memcpy_fromio")
 239 #define isa_memcpy_toio(a,b,c)          __readwrite_bug("isa_memcpy_toio")
 240
 241 #define isa_eth_io_copy_and_sum(a,b,c,d) \
 242                                 __readwrite_bug("isa_eth_io_copy_and_sum")
 243
 244 #endif  /* __mem_isa */
 245
 246 /*
 247  * ioremap and friends.
 248  *
 249  * ioremap takes a PCI memory address, as specified in
 250  * Documentation/IO-mapping.txt.
 251  */
 252 extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long);
 253 extern void __iounmap(void __iomem *addr);
 254
 255 #ifndef __arch_ioremap
 256 #define ioremap(cookie,size)            __ioremap(cookie,size,0,1)
 257 #define ioremap_nocache(cookie,size)    __ioremap(cookie,size,0,1)
 258 #define ioremap_cached(cookie,size)     __ioremap(cookie,size,L_PTE_CACHEABLE,1)
 259 #define iounmap(cookie)                 __iounmap(cookie)
 260 #else
 261 #define ioremap(cookie,size)            __arch_ioremap((cookie),(size),0,1)
 262 #define ioremap_nocache(cookie,size)    __arch_ioremap((cookie),(size),0,1)
 263 #define ioremap_cached(cookie,size)     __arch_ioremap((cookie),(size),L_PTE_CACHEABLE,1)
 264 #define iounmap(cookie)                 __arch_iounmap(cookie)
 265 #endif
 266
 267 /*
 268  * can the hardware map this into one segment or not, given no other
 269  * constraints.
 270  */
 271 #define BIOVEC_MERGEABLE(vec1, vec2)    \
 272         ((bvec_to_phys((vec1)) + (vec1)->bv_len) == bvec_to_phys((vec2)))
 273
 274 /*
 275  * Convert a physical pointer to a virtual kernel pointer for /dev/mem
 276  * access
 277  */
 278 #define xlate_dev_mem_ptr(p)    __va(p)
 279
 280 /*
 281  * Convert a virtual cached pointer to an uncached pointer
 282  */
 283 #define xlate_dev_kmem_ptr(p)   p
 284
 285 #endif  /* __KERNEL__ */
 286 #endif  /* __ASM_ARM_IO_H */